WO2008087775A1 - シリコン薄膜形成方法 - Google Patents

シリコン薄膜形成方法 Download PDF

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Publication number
WO2008087775A1
WO2008087775A1 PCT/JP2007/070995 JP2007070995W WO2008087775A1 WO 2008087775 A1 WO2008087775 A1 WO 2008087775A1 JP 2007070995 W JP2007070995 W JP 2007070995W WO 2008087775 A1 WO2008087775 A1 WO 2008087775A1
Authority
WO
WIPO (PCT)
Prior art keywords
thin film
substrate
silicon thin
film formation
crystalline silicon
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/JP2007/070995
Other languages
English (en)
French (fr)
Japanese (ja)
Inventor
Eiji Takahashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nissin Electric Co Ltd
Original Assignee
Nissin Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nissin Electric Co Ltd filed Critical Nissin Electric Co Ltd
Priority to CN2007800501126A priority Critical patent/CN101632153B/zh
Priority to US12/523,709 priority patent/US20100062585A1/en
Publication of WO2008087775A1 publication Critical patent/WO2008087775A1/ja
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/24—Deposition of silicon only
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/02—Pretreatment of the material to be coated
    • C23C16/0227—Pretreatment of the material to be coated by cleaning or etching
    • C23C16/0245—Pretreatment of the material to be coated by cleaning or etching by etching with a plasma
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02422—Non-crystalline insulating materials, e.g. glass, polymers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02524—Group 14 semiconducting materials
    • H01L21/02532—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02656—Special treatments
    • H01L21/02658—Pretreatments
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H01L21/28035—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/661—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon having vertical doping variation
    • H10D64/662—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon having vertical doping variation the conductor further comprising additional layers, e.g. multiple silicon layers having different crystal structures
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • General Physics & Mathematics (AREA)
  • Materials Engineering (AREA)
  • General Chemical & Material Sciences (AREA)
  • Organic Chemistry (AREA)
  • Metallurgy (AREA)
  • Mechanical Engineering (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Plasma & Fusion (AREA)
  • Inorganic Chemistry (AREA)
  • Chemical Vapour Deposition (AREA)
  • Thin Film Transistor (AREA)
PCT/JP2007/070995 2007-01-19 2007-10-29 シリコン薄膜形成方法 Ceased WO2008087775A1 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
CN2007800501126A CN101632153B (zh) 2007-01-19 2007-10-29 硅薄膜形成方法
US12/523,709 US20100062585A1 (en) 2007-01-19 2007-10-29 Method for forming silicon thin film

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2007010476A JP2008177419A (ja) 2007-01-19 2007-01-19 シリコン薄膜形成方法
JP2007-010476 2007-04-19

Publications (1)

Publication Number Publication Date
WO2008087775A1 true WO2008087775A1 (ja) 2008-07-24

Family

ID=39635781

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2007/070995 Ceased WO2008087775A1 (ja) 2007-01-19 2007-10-29 シリコン薄膜形成方法

Country Status (5)

Country Link
US (1) US20100062585A1 (enExample)
JP (1) JP2008177419A (enExample)
KR (1) KR20090091819A (enExample)
CN (1) CN101632153B (enExample)
WO (1) WO2008087775A1 (enExample)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008124111A (ja) * 2006-11-09 2008-05-29 Nissin Electric Co Ltd プラズマｃｖｄ法によるシリコン系薄膜の形成方法
WO2011080957A1 (ja) 2009-12-29 2011-07-07 シャープ株式会社 薄膜トランジスタ、その製造方法、および表示装置
WO2012029661A1 (ja) * 2010-09-01 2012-03-08 株式会社日立国際電気 半導体装置の製造方法及び基板処理装置
KR102293862B1 (ko) 2014-09-15 2021-08-25 삼성전자주식회사 반도체 소자의 제조 방법
JP7200880B2 (ja) * 2019-08-19 2023-01-10 東京エレクトロン株式会社 成膜方法及び成膜装置

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1995034916A1 (en) * 1994-06-15 1995-12-21 Seiko Epson Corporation Manufacture of thin film semiconductor device, thin film semiconductor device, liquid crystal display device, and electronic device
JPH0851214A (ja) * 1994-08-05 1996-02-20 Casio Comput Co Ltd 薄膜トランジスタおよびその製造方法
JP2002164290A (ja) * 2000-11-28 2002-06-07 Tokuyama Corp 多結晶シリコン膜の製造方法

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5952061A (en) * 1996-12-27 1999-09-14 Stanley Electric Co., Ltd. Fabrication and method of producing silicon films
RU2189663C2 (ru) * 1997-06-30 2002-09-20 Мацушита Электрик Индастриал Ко., Лтд. Способ и устройство для изготовления тонкой полупроводниковой пленки
US20020060322A1 (en) * 2000-11-20 2002-05-23 Hiroshi Tanabe Thin film transistor having high mobility and high on-current and method for manufacturing the same
JP4254861B2 (ja) * 2004-03-26 2009-04-15 日新電機株式会社 シリコン膜形成装置
JP4299717B2 (ja) * 2004-04-14 2009-07-22 Ｎｅｃ液晶テクノロジー株式会社 薄膜トランジスタとその製造方法
JP4434115B2 (ja) * 2005-09-26 2010-03-17 日新電機株式会社 結晶性シリコン薄膜の形成方法及び装置
JP2007123008A (ja) * 2005-10-27 2007-05-17 Nissin Electric Co Ltd プラズマ生成方法及び装置並びにプラズマ処理装置
JP5162108B2 (ja) * 2005-10-28 2013-03-13 日新電機株式会社 プラズマ生成方法及び装置並びにプラズマ処理装置
JP2008124111A (ja) * 2006-11-09 2008-05-29 Nissin Electric Co Ltd プラズマｃｖｄ法によるシリコン系薄膜の形成方法

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1995034916A1 (en) * 1994-06-15 1995-12-21 Seiko Epson Corporation Manufacture of thin film semiconductor device, thin film semiconductor device, liquid crystal display device, and electronic device
JPH0851214A (ja) * 1994-08-05 1996-02-20 Casio Comput Co Ltd 薄膜トランジスタおよびその製造方法
JP2002164290A (ja) * 2000-11-28 2002-06-07 Tokuyama Corp 多結晶シリコン膜の製造方法

Also Published As

Publication number Publication date
CN101632153B (zh) 2011-04-13
CN101632153A (zh) 2010-01-20
US20100062585A1 (en) 2010-03-11
JP2008177419A (ja) 2008-07-31
KR20090091819A (ko) 2009-08-28

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