WO2008004288A1 - Plaque de circuit imprimé et dispositif électronique - Google Patents

Plaque de circuit imprimé et dispositif électronique Download PDF

Info

Publication number
WO2008004288A1
WO2008004288A1 PCT/JP2006/313405 JP2006313405W WO2008004288A1 WO 2008004288 A1 WO2008004288 A1 WO 2008004288A1 JP 2006313405 W JP2006313405 W JP 2006313405W WO 2008004288 A1 WO2008004288 A1 WO 2008004288A1
Authority
WO
WIPO (PCT)
Prior art keywords
land
wiring board
printed wiring
board according
shape
Prior art date
Application number
PCT/JP2006/313405
Other languages
English (en)
Japanese (ja)
Inventor
Mitsuhiko Sugane
Original Assignee
Fujitsu Limited
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Limited filed Critical Fujitsu Limited
Priority to PCT/JP2006/313405 priority Critical patent/WO2008004288A1/fr
Publication of WO2008004288A1 publication Critical patent/WO2008004288A1/fr

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/111—Pads for surface mounting, e.g. lay-out
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09372—Pads and lands
    • H05K2201/09381—Shape of non-curved single flat metallic pad, land or exposed part thereof; Shape of electrode of leadless component
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09372—Pads and lands
    • H05K2201/094—Array of pads or lands differing from one another, e.g. in size, pitch or thickness; Using different connections on the pads
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/09781—Dummy conductors, i.e. not used for normal transport of current; Dummy electrodes of components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
    • H05K2201/099—Coating over pads, e.g. solder resist partly over pads
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3452—Solder masks
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Definitions

  • the present invention relates to a printed wiring board, and more particularly to a printed wiring board on which a surface land for mounting a surface mounting component is formed and an electronic device using such a printed wiring board.
  • a multi-layer printed wiring board used in an electronic device is often formed with a large number of lands for mounting surface mounting components.
  • Ordinary lands are shaped based on commonly used wiring specifications.
  • the land shape is generally circular, and a pattern wiring with a width much smaller than the land diameter is connected to one part of the land circumference.
  • Surface mount components may include terminals that do not need to be electrically connected, and no wiring is connected on the printed wiring board to lands to which such terminals are connected.
  • a land to which a terminal that does not need to be electrically connected is connected is an isolated land on the printed wiring board.
  • Such an isolated land is generally referred to as an “empty pin land”.
  • the component When a component for surface mounting mounted on a printed wiring board fails, the component may be replaced.
  • the joining member such as solder that joins the terminal and land of the part is heated and melted. At this time, thermal stress is applied between the land and the substrate of the printed wiring board.
  • empty pin lands are not connected to the pattern wiring, so the adhesion of the printed wiring board to the substrate is small. For this reason, the vacant pin land is more easily peeled off than the normal land due to the thermal stress applied during component replacement.
  • the molten solder remaining on the land after removing the surface mounting components is scraped off with a soldering iron or the like, the unused pin land may peel off.
  • Patent Document 4 A technique for increasing the contact area between the through-hole land portion and the substrate has been proposed (for example, see Patent Document 4).
  • Patent Document 1 Japanese Patent Laid-Open No. 3-6088
  • Patent Document 2 Japanese Utility Model Publication No. 7-3161
  • Patent Document 3 Japanese Patent Laid-Open No. 11-8443
  • Patent Document 4 Japanese Unexamined Patent Application Publication No. 2004-172329
  • the above-described prior art is a technique for reducing the thermal stress of a normal land or improving the adhesion, and has not been particularly effective in consideration of the problem of detachment of an empty pin land. Since the empty pin land is not connected to the pattern wiring, it easily peels off from the normal land. Therefore, a countermeasure for preventing the empty pin land from being peeled off is particularly desired. In addition, even for ordinary lands, it is desirable to take measures to prevent the lands connected to the terminals located in the peripheral portion of the surface mount component from being peeled off.
  • a general object of the present invention is to provide a novel and useful printed wiring board and electronic device by solving the above-described problems.
  • a more specific object of the present invention is to provide a printed wiring board in which normal lands and vacant pin lands are prevented from being separated from the printed wiring board by thermal stress.
  • a printed wiring board configured to be mounted with a surface mounting component, the first land to which the wiring is connected, and the wiring And a second land that is not connected, and the second land has a larger area than the first land.
  • the printed wiring board according to the present invention is preferably covered with an outer peripheral force S resist other than the central portion of the second land.
  • a through via may be connected to the second land.
  • the second land may have at least one elongated, reinforcing portion extending radially from the periphery!
  • an electronic device having the above-described printed wiring board is provided.
  • the first land corresponds to a normal land, and since the second land, which is difficult to peel off because it is connected to the wiring, is used as an empty pin land, Since the area is larger, the contact area is large, and peeling becomes difficult. Therefore, it is possible to prevent the vacant pin land from peeling off.
  • FIG. 1 is a perspective view of an electronic device incorporating a printed wiring board to which the present invention is applicable.
  • FIG. 2A is a plan view of a part of the printed wiring board according to the first embodiment of the present invention.
  • FIG. 2B is a cross-sectional view taken along the line II of the printed wiring board shown in FIG. 2A.
  • FIG. 3A is a plan view of an elliptical empty pin land.
  • FIG. 3B is a plan view of a star-shaped empty pin land.
  • FIG. 3C is a plan view of an empty octagon land land.
  • FIG. 3D is a plan view of a diamond-shaped empty pin land.
  • FIG. 3E is a plan view of an inverted heart-shaped empty pin land.
  • FIG. 4A is a plan view of a part of a printed wiring board according to a second embodiment of the present invention.
  • FIG. 4B is a cross-sectional view taken along line VI-VI of the printed wiring board shown in FIG. 4A.
  • FIG. 5A is a plan view of a part of a printed wiring board according to a third embodiment of the present invention.
  • 5B is a cross-sectional view taken along the line VV of the printed wiring board shown in FIG. 5A.
  • FIG. 6 is a graph showing the results of a peeling test.
  • FIG. 1 is a perspective view of a server 1 which is an example of an electronic apparatus in which a printed wiring board 10 to which the present invention is applicable is incorporated.
  • a board module 12 to which a large number of printed wiring boards 10 are connected is incorporated.
  • Each printed wiring board 10 is provided with a large number of surface mounting components 14 such as BGA type LSIs.
  • FIGS. 2A and 2B A first embodiment of the present invention will be described with reference to FIGS. 2A and 2B.
  • 2A is a plan view showing a part of the printed wiring board 20 according to the first embodiment of the present invention
  • FIG. 2B is a cross-sectional view taken along the line II of the printed wiring board shown in FIG. 2A.
  • the printed wiring board 20 is a multilayer board, wiring is also formed in the inner layer, and the wiring is connected by via holes or the like.
  • FIG. 2B portions other than the surface portion of the printed wiring board 20 are shown in a simplified manner.
  • a circular land 22 for mounting a surface mounting component is formed on the surface of the printed wiring board 20, and a wiring 24 is connected to the land 22.
  • the land 22 and the wiring 24 are formed simultaneously in a process of patterning a copper foil by etching or the like.
  • a solder resist 26 is provided on the surface of the printed wiring board 20 to protect the wiring 24 while leaving a portion where the land 22 is formed. In the portion where the land 22 is formed, the solder resist 26 is removed to form a circular opening 26a. That is, the land 22 is exposed in the opening 26a, and the terminal of the surface mounting component can be soldered to the land 22.
  • an empty pin land 28 to which no wiring is connected is formed on the printed wiring board 20, in addition to the normal circular land 22 described above.
  • the empty pin land 28 has a shape other than a circle (in the example shown in FIG. 2A, an oval shape), and is formed so that the outer shape is larger than the outer shape of the land 22.
  • a circular opening 26b having the same dimensions as the circular land 22 is formed in the solder resist 26 provided on the vacant pin land 28. In this opening 26b, the empty pin land 28 is exposed, and the terminal of the surface mounting component can be soldered to the empty pin land 28.
  • the empty pin land 28 is covered with the solder resist 26. Therefore, for example, even when the portion of the empty pin land 28 is rubbed with a soldering iron or the like, the empty pin land 28 in which the soldering iron does not directly contact the edge of the empty pin land 28 is difficult to peel off. Natsume.
  • the empty pin land 28 has a larger shape than the normal land 22, that is, has a larger area
  • the contact area of the empty pin land 28 is larger than that of the normal land 22. It is difficult to peel off.
  • the shapes of the vacant pin lands 28 can be considered as shown in Fig. 3, but are not limited to these shapes.
  • FIG. 3A shows an oval free pin land 28, and only the center portion of the oval is An opening 26b of the resist 26 is formed.
  • FIG. 3B shows a star-shaped vacant pin land 28, and the opening 26b of the solder resist 26 is formed only in the central portion of the star.
  • FIG. 3C shows an octagonal empty pin land 28, and the opening 26b of the solder resist 26 is formed only in the central portion of the octagon.
  • Fig. 3D shows an empty pin land 28 of a diamond shape, and an opening 26b of the solder resist 26 is formed only in the central portion of the diamond shape.
  • FIG. 3E shows an inverted heart-shaped empty pin land 28, and the opening 26b of the solder resist 26 is formed only in the center portion of the inverted heart shape. That is, the empty pin land 28 can be one of an ellipse, a star, a polygon, and a heart.
  • FIGS. 4A and 4B are plan views showing a part of the printed wiring board 30 according to the second embodiment of the present invention
  • FIG. 4B is a cross-sectional view taken along the line IV-IV of the printed wiring board shown in FIG. 4A. 4A and 4B, parts that are the same as the parts shown in FIGS. 2A and 2B are given the same reference numerals, and descriptions thereof are omitted.
  • the printed wiring board 30 is a multilayer board, wiring is also formed in the inner layers, and the wiring is connected by via holes or the like.
  • FIG. 4B portions other than the surface portion of the printed wiring board 30 are shown in a simplified manner.
  • the empty pin land 28A according to the present embodiment has the same configuration as the empty pin land 28 according to the first embodiment described above, but is different in that the through via 32 is connected.
  • the through via 32 is formed in a portion of the vacant pin land 28 ⁇ / b> A covered with the solder resist 26.
  • the through via 28A is a force that extends through the printed wiring board 30 to the back surface so that it is not electrically connected to other lands and wiring, and the land 28A for the empty pin is in an electrically isolated state To be kept.
  • the shape of the empty pin land 28A in which the through via 32 is provided is not limited to the elliptical shape shown in FIG. 4B, and may be various shapes including the shapes shown in FIGS. 3A to 3E. In addition, if there is a place where the number of through vias 28 is not limited to one, a plurality of through vias may be provided in one empty pin land.
  • FIG. 5A is a plan view showing a part of the printed wiring board 40 according to the third embodiment of the present invention. 5A and 5B, parts that are the same as the parts shown in FIGS. 2A and 2B are given the same reference numerals, and descriptions thereof are omitted.
  • the empty pin land 28B is a circular shape having the same shape as that of the normal land 22, and is different in that the reinforcing portion 42 extends in the force and peripheral force.
  • the reinforcing portion 42 is formed at a position so as not to contact the land 22 and the wiring 24 around the empty pin land 28B.
  • the reinforcing portion 42 is formed as an elongated pattern having the same width as the wiring 24.
  • the width of the reinforcing portion 42 may be larger than the wiring 24.
  • the number of the reinforcing portions 42 is not limited to one, and two reinforcing portions may be configured to extend in opposite directions from both sides of the empty pin land 28B, and configured to extend in three directions in a Y shape. Even so.
  • FIG. 6 is a graph showing the results of the peel test. The shape of the empty pin land is shown at the top of the graph.
  • Sample 3 Land for vacant pins with reinforcing parts wider and wider than normal wiring extending in two directions on a straight line
  • Sample 4 Land for vacant pin with reinforcement part thicker and wider than normal wiring extending in two directions in L shape
  • Sample 5 Land for hollow pin with reinforcing part wider and wider than normal wiring extending in 3 directions in Y shape 6)
  • Sample 6 Land for vacant pins with a reinforcing part of the same width as normal wiring extending in one direction
  • Sample 7 Land for vacant pins that has a reinforcing part with the same width as a normal wire extending in two directions on a straight line
  • Sample 8 Land for vacant pins with reinforcement part of the same width as normal wiring extending in two directions in L shape
  • Sample 1 is an independent land having no reinforcement, and was tested as a comparison target.
  • the load required for peeling off Sample 1 was about 1400 g to 1900 g.
  • the load required for the peel force S was 1600g to 2700g, which was about 500g larger than Sample 1 on average. As a result, it was confirmed that it was difficult to peel off the empty pin land by providing the reinforcing portion.
  • the load required for the peeling force S was 2100g to 3200g, which was about 1OOOg larger than Sample 1 on average. It was confirmed that it would be more difficult to peel off by providing reinforcing parts on both sides. Therefore, as a result of testing Sample 4, it was found that the load required for peeling was 2000 g to 2500 g, which was not much different from Sample 1 having one reinforcing part. As a result, it was found that if two reinforcing parts were provided, it would be effective to extend in opposite directions on both sides of the empty pin land as in Sample 3.
  • Sample 6 has the same configuration as sample 2, but with a thinner reinforcing portion.
  • Sample 7 has the same configuration as Sample 3 with a thinner reinforcement.
  • Sample 8 has the same configuration as Sample 4 with a thinner reinforcing portion.
  • the load required for peeling was compared to the load required for peeling for samples 2-4. Although the variation was large, the average value was almost the same. From this result, it was proved that the width of the reinforcement did not affect the peeling load.
  • the width of the reinforcing portion is equal to the width of the normal wiring.
  • the width of the reinforcing portion is not limited to the width of the wiring, and can be any width.
  • the configuration of the above-described embodiment is a configuration for preventing the separation of the land for the empty pin
  • the configuration of the above-described embodiment may be applied to a normal land to which wiring is connected to prevent the separation. it can.
  • the above-mentioned reinforcing portion may be provided for a land that is easily peeled out of normal lands. Lands connected to terminals located on the corners and outer periphery of surface mount components may be more easily peeled off than lands connected to terminals located on the inner periphery where external forces are more likely to act. There is. Therefore, as in the above-described embodiment, by providing a reinforcing portion having the same width as the wiring, the adhesion area can be increased and peeling can be prevented.
  • the reinforcing part can be designed with the same design rule as the wiring, so that the land having the reinforcing part can be designed in the same way as a normal land or wiring design.
  • the present invention can be applied to an electronic device in which a printed wiring board is incorporated.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)

Abstract

L'invention concerne une plaque de circuit imprimé qui est constituée pour être montée avec un composant à montage en surface, ayant une première pastille à laquelle un câblage est connecté et une seconde pastille à laquelle aucun câblage n'est connecté. La seconde pastille a une surface plus grande que la première pastille, et la surface à contact étroit de la seconde pastille est supérieure à celle de la première pastille. La partie périphérique externe autre que la partie centrale de la seconde pastille peut être recouverte par un résist.
PCT/JP2006/313405 2006-07-05 2006-07-05 Plaque de circuit imprimé et dispositif électronique WO2008004288A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
PCT/JP2006/313405 WO2008004288A1 (fr) 2006-07-05 2006-07-05 Plaque de circuit imprimé et dispositif électronique

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2006/313405 WO2008004288A1 (fr) 2006-07-05 2006-07-05 Plaque de circuit imprimé et dispositif électronique

Publications (1)

Publication Number Publication Date
WO2008004288A1 true WO2008004288A1 (fr) 2008-01-10

Family

ID=38894266

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2006/313405 WO2008004288A1 (fr) 2006-07-05 2006-07-05 Plaque de circuit imprimé et dispositif électronique

Country Status (1)

Country Link
WO (1) WO2008004288A1 (fr)

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0286174U (fr) * 1988-12-20 1990-07-09
JPH10229273A (ja) * 1997-02-14 1998-08-25 Sony Corp プリント配線板及び該プリント配線板への部品のはんだ付法
JP2000031630A (ja) * 1998-07-15 2000-01-28 Kokusai Electric Co Ltd 半導体集積回路素子と配線基板との接続構造
JP2003347704A (ja) * 2002-05-28 2003-12-05 Toshiba Corp 回路基板および表面実装型パッケージ実装方法
JP2004281473A (ja) * 2003-03-12 2004-10-07 Kyocera Corp 配線基板

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0286174U (fr) * 1988-12-20 1990-07-09
JPH10229273A (ja) * 1997-02-14 1998-08-25 Sony Corp プリント配線板及び該プリント配線板への部品のはんだ付法
JP2000031630A (ja) * 1998-07-15 2000-01-28 Kokusai Electric Co Ltd 半導体集積回路素子と配線基板との接続構造
JP2003347704A (ja) * 2002-05-28 2003-12-05 Toshiba Corp 回路基板および表面実装型パッケージ実装方法
JP2004281473A (ja) * 2003-03-12 2004-10-07 Kyocera Corp 配線基板

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