WO2007055190A1 - 基板処理装置、基板処理方法及び記録媒体 - Google Patents

基板処理装置、基板処理方法及び記録媒体 Download PDF

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Publication number
WO2007055190A1
WO2007055190A1 PCT/JP2006/322155 JP2006322155W WO2007055190A1 WO 2007055190 A1 WO2007055190 A1 WO 2007055190A1 JP 2006322155 W JP2006322155 W JP 2006322155W WO 2007055190 A1 WO2007055190 A1 WO 2007055190A1
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Prior art keywords
substrate
processing
gas
processing chamber
wafer
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PCT/JP2006/322155
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English (en)
French (fr)
Japanese (ja)
Inventor
Yusuke Muraki
Shigeki Tozawa
Takehiko Orii
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Tokyo Electron Limited
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Publication of WO2007055190A1 publication Critical patent/WO2007055190A1/ja

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67155Apparatus for manufacturing or treating in a plurality of work-stations
    • H01L21/67161Apparatus for manufacturing or treating in a plurality of work-stations characterized by the layout of the process chambers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3065Plasma etching; Reactive-ion etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67098Apparatus for thermal treatment
    • H01L21/67109Apparatus for thermal treatment mainly by convection
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67155Apparatus for manufacturing or treating in a plurality of work-stations
    • H01L21/67236Apparatus for manufacturing or treating in a plurality of work-stations the substrates being processed being not semiconductor wafers, e.g. leadframes or chips
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/687Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
    • H01L21/68714Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
    • H01L21/6875Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by a plurality of individual support members, e.g. support posts or protrusions
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/791Arrangements for exerting mechanical stress on the crystal lattice of the channel regions
    • H10D30/797Arrangements for exerting mechanical stress on the crystal lattice of the channel regions being in source or drain regions, e.g. SiGe source or drain
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/027Manufacture or treatment of FETs having insulated gates [IGFET] of lateral single-gate IGFETs
    • H10D30/0275Manufacture or treatment of FETs having insulated gates [IGFET] of lateral single-gate IGFETs forming single crystalline semiconductor source or drain regions resulting in recessed gates, e.g. forming raised source or drain regions
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/01Manufacture or treatment
    • H10D62/021Forming source or drain recesses by etching e.g. recessing by etching and then refilling

Definitions

  • Substrate processing apparatus substrate processing method, and recording medium
  • the present invention relates to a substrate processing apparatus, a substrate processing method, and a recording medium.
  • a processing chamber containing a semiconductor wafer (hereinafter referred to as "wafer") is placed in a vacuum state close to a vacuum state.
  • wafer a processing chamber containing a semiconductor wafer
  • processing for removing an oxide film (silicon dioxide (SiO 2)) existing on the wafer surface is known.
  • a mixed gas of hydrogen fluoride gas (HF) and ammonia gas (NH) is supplied in a low pressure state while adjusting the temperature of the wafer to a predetermined temperature.
  • the reaction product is heated and vaporized (sublimated), so that weno and force are removed.
  • a mounting table (electrostatic chuck) that holds the wafer by electrostatic force is used.
  • the wafer is mounted substantially horizontally with the entire lower surface in close contact with the upper surface of the mounting table, and is attracted and held on the upper surface of the mounting table by electrostatic force.
  • means for adjusting the temperature of the mounting table for example, a conduit for circulating a liquid adjusted to a predetermined temperature is provided, and the temperature of the mounting table is adjusted by exchanging heat with the liquid.
  • the wafer is brought into contact with the upper surface of the substrate and is configured to adjust the temperature of the wafer.
  • Patent Document 1 US Patent Application Publication No. 2004Z0182417
  • Patent Document 2 US Patent Application Publication No. 2004Z0184792
  • the present invention has been made in view of the above points, and even when a wafer is processed in a low-pressure state, the wafer is prevented from being attached to the wafer or being damaged.
  • An object of the present invention is to provide a substrate processing apparatus and a substrate processing method capable of efficiently adjusting the temperature of the substrate. It is another object of the present invention to provide a recording medium used in the substrate processing apparatus and the substrate processing method.
  • an apparatus for processing a substrate the processing chamber storing the substrate, a supply mechanism for supplying a gas to the processing chamber, and the processing chamber being exhausted.
  • a temperature controller that adjusts the temperature of the substrate mounted on the mounting table according to the above, and a gas controller that supplies gas by the supply mechanism, exhaust by the exhaust mechanism, and a controller that controls the temperature controller.
  • the controller is configured with the processing chamber at a predetermined pressure. Control for adjusting the temperature of the substrate placed on the mounting table and control for making the processing chamber a pressure lower than the predetermined pressure and a processing atmosphere in which the substrate is subjected to a predetermined process are performed.
  • a substrate processing apparatus is provided.
  • the treatment atmosphere may contain a gas containing a halogen element and a basic gas, and the silicon dioxide present on the surface of the substrate may be transformed into a reaction product that can be vaporized by heating. good.
  • the process of transforming silicon dioxide present on the surface of a substrate into a reaction product is for example, COR (Chemical Oxide Removal) treatment (chemical oxide removal treatment).
  • COR processing a gas containing a halogen element and a basic gas are supplied to a substrate as a processing gas, whereby an oxide film on the substrate and gas molecules of the processing gas are chemically reacted to generate a reaction product.
  • the gas containing a halogen element is, for example, hydrogen fluoride vapor (HF), and the basic gas is, for example, ammonia vapor (NH 2).
  • a reaction product containing ammonium phosphate ((NH) SiF) is produced.
  • the processing atmosphere may include hydrogen fluoride gas and ammonia gas. Further, when the control chamber is set to a predetermined pressure, the control unit supplies an inert gas and an ammonia gas to the processing chamber and supplies a hydrogen fluoride gas to the processing chamber to which the ammonia gas is supplied. Accordingly, the processing chamber may be controlled to be the processing atmosphere.
  • control unit may control the processing chamber to be a processing atmosphere after setting the processing chamber to a pressure lower than the predetermined pressure.
  • the predetermined pressure may be 0.5 Torr or more, and the pressure lower than the predetermined pressure may be 0.1 Torr or less.
  • the processing time for adjusting the temperature of the substrate may be 15 seconds or more.
  • a method for processing a substrate wherein the substrate is carried into a processing chamber, the lower surface of the substrate is brought into contact with a contact member provided on the upper surface of the mounting table, and the substrate The substrate is placed on the mounting table with a gap formed between the lower surface of the mounting table and the upper surface of the mounting table, and the temperature of the mounting table is adjusted with the processing chamber at a predetermined pressure.
  • the substrate processing method is characterized in that the temperature of the substrate is adjusted, and then the substrate is subjected to a predetermined process in a processing atmosphere having a pressure lower than the predetermined pressure.
  • the treatment atmosphere includes a gas containing a halogen element and a basic gas, and the predetermined treatment transforms silicon dioxide present on the surface of the substrate into a reaction product by reacting with the treatment atmosphere. It may be processing. And after performing the said predetermined process, you may perform the process which vaporizes the said reaction product by heating.
  • the processing atmosphere may include hydrogen fluoride gas and ammonia gas. Also, By supplying an inert gas and ammonia gas to the processing chamber, the processing chamber is brought to a predetermined pressure, and then hydrogen fluoride gas is supplied to the processing chamber to which the ammonia gas has been supplied.
  • the chamber may be the processing atmosphere.
  • the processing chamber may be set to a pressure lower than the predetermined pressure, and then the processing chamber may be set as a processing atmosphere.
  • the predetermined pressure may be 0.5 Torr or more.
  • the pressure lower than the predetermined pressure may be 0.1 lTorr or less.
  • the processing time for adjusting the temperature of the substrate may be 15 seconds or more.
  • a recording medium on which a program that can be executed by the control unit of the substrate processing apparatus is recorded, and the program is executed by the control unit.
  • a recording medium is provided, which causes the substrate processing apparatus to perform the above-described substrate processing method.
  • the gap is provided between the lower surface of the substrate and the upper surface of the mounting table, particles are transferred from the mounting table to the substrate, or the substrate is damaged. Can be prevented.
  • gas can be supplied to the gap between the lower surface of the substrate and the chuck body by setting the processing chamber to a predetermined pressure, and between the substrate and the mounting table via the powerful gas. Heat exchange can be performed. Therefore, the temperature of the substrate can be adjusted efficiently.
  • FIG. 1 is a schematic longitudinal sectional view showing the structure of the surface of a wafer before etching a Si layer.
  • FIG. 2 is a schematic longitudinal sectional view showing the structure of the surface of a wafer after etching the Si layer.
  • FIG. 3 is a schematic plan view of the processing system.
  • FIG. 4 is a schematic longitudinal sectional view showing the configuration of a COR processing apparatus.
  • FIG. 5 is a plan view of the mounting table.
  • FIG. 6 is a schematic longitudinal sectional view of the mounting table.
  • ⁇ 7] It is a schematic longitudinal sectional view showing the configuration of the PHT processing apparatus.
  • FIG. 8 is a schematic longitudinal sectional view showing the state of the surface of a wafer after COR processing.
  • FIG. 9 is a schematic longitudinal sectional view showing the state of the surface of a wafer after PHT processing.
  • FIG. 10 is a schematic longitudinal sectional view showing the state of the surface of the wafer after the SiGe layer forming process.
  • FIG. Ll is a flowchart showing a procedure of steps in the COR processing apparatus.
  • FIG. 12 is a drawing showing a change in pressure in the processing chamber during processing in the COR processing apparatus.
  • FIG. 13 is an explanatory diagram of a processing system in which six processing apparatuses are provided around a common transfer chamber.
  • FIG. 14 is an explanatory diagram of a processing system configured to load a wafer into a COR processing apparatus via a load lock chamber and a PHT processing apparatus.
  • FIG. 15 is a graph showing the relationship between the processing chamber pressure and the wafer temperature when the processing time for adjusting the temperature of the wafer is 30 seconds.
  • FIG. 16 is a graph showing the relationship between the wafer processing temperature and the wafer temperature when the pressure is 2 Torr in step S2.
  • FIG. 1 is a schematic cross-sectional view of the wafer W before the etching process, and shows a part of the surface of the wafer W (device formation surface).
  • the wafer W is, for example, a thin silicon wafer formed in a substantially disk shape, and on its surface, a Si (silicon) layer, which is the base material of the wafer W, and an oxide layer (as an interlayer insulating layer) Silicon dioxide (SiO 2), a Poly—Si (polycrystalline silicon) layer used as the gate electrode, and
  • a structure made of, for example, a TEOS (tetraethylorthosilicate: Si (OC H)) layer is formed as a side wall portion (side wall) that also has an insulating force.
  • Si layer surface (upper surface) is abbreviated
  • the oxide layer is laminated so as to cover the surface of the Si layer. Further, this oxide layer is formed by a thermal CVD reaction in a diffusion furnace, for example.
  • the Poly-Si layer is formed on the surface of the oxide layer, and is etched along a predetermined pattern shape. Therefore, part of the oxide layer is covered with the Poly-Si layer, and the other part is exposed.
  • the TEOS layer is formed so as to cover the side surface of the Poly-Si layer.
  • the Poly-Si layer has a substantially prismatic cross-sectional shape and is formed in an elongated plate shape extending in the direction from the near side to the far side in FIG.
  • FIG. 2 shows the state of the wafer W after the etching process.
  • dry etching is performed on the wafer W after an oxide layer, a poly-Si layer, a TEOS layer, and the like are formed on the Si layer as shown in FIG.
  • the exposed oxide layer and a part of the Si layer covered by the oxidized layer are removed.
  • the recesses produced by etching are formed on the left and right sides of the Poly-Si layer and TEOS layer, respectively.
  • the recess is formed so as to sink from the height of the surface of the oxide layer to the Si layer, and the Si layer is exposed on the inner surface of the recess. Since the Si layer is easily oxidized, when oxygen in the atmosphere adheres to the surface of Si exposed in such a recess, a natural oxide film (silicon dioxide: SiO 2) is formed on the inner surface of the recess.
  • a processing system that performs COR processing, PHT (Post Heat Treatment) processing, and SiGe layer deposition processing on the etched wafer W will be described.
  • COR COR
  • a gas containing a halogen element and a basic gas are supplied to the wafer as a process gas to cause a natural reaction between the natural oxide film adhering to the wafer and the gas molecules of the process gas, thereby generating a reaction product. It is generated.
  • the gas containing a halogen element is, for example, hydrogen fluoride gas
  • the basic gas is, for example, ammonia gas.
  • a reaction product mainly containing ammonium fluorosilicate is produced.
  • the PHT process is a process that heats the wafer after the COR process is performed and vaporizes the reaction product of the COR process.
  • the processing system 1 shown in FIG. 3 includes a loading / unloading section 2 for loading / unloading wafers W and W into / from the processing system 1, a common transfer chamber 3 formed in a substantially polygonal shape (for example, a hexagonal shape),
  • a COR processing apparatus 5 as a substrate processing apparatus (vacuum processing apparatus) that works on this embodiment for performing COR processing
  • a PHT processing apparatus 6 as a substrate processing apparatus for performing PHT processing on a wafer W
  • SiGe layer A plurality of substrate processing apparatuses, for example, two epitaxial growth apparatuses 7A and 7B, and a control unit 8 that gives a control command to each part of the processing system 1 are provided.
  • the loading / unloading section 2 is a first wafer transfer machine that transfers a wafer W having a substantially disk shape, for example.
  • the structure 11 has a transfer chamber 12 provided therein.
  • the wafer transfer mechanism 11 has two transfer arms lla and lib that hold the wafer W substantially horizontally.
  • an orienter 14 is installed to rotate the wafer W and optically determine the amount of eccentricity for alignment.
  • the transfer chamber 12 and the common transfer chamber 3 are connected to each other via two load lock chambers 20A and 20B that can be evacuated. Gate valves 21 that can be opened and closed are provided between the load lock chambers 20A and 20B and the transfer chamber 12, and between the load lock chambers 20A and 20B and the common transfer chamber 3, respectively. These two load lock chambers 20A and 20B are used when either one (for example, load lock chamber 20A) force wafer W is unloaded from transfer chamber 12 and loaded into common transfer chamber 3, and the other (for example, The load lock chamber 20B) may be used when the wafer W is unloaded from the common transfer chamber 3 and loaded into the transfer chamber 12.
  • load lock chamber 20B may be used when the wafer W is unloaded from the common transfer chamber 3 and loaded into the transfer chamber 12.
  • the wafer W is held by the transfer arms l la and l ib, and is rotated and straightly moved and moved up and down in a substantially horizontal plane by driving the wafer transfer device 11. It is transported to a desired position. Then, the transfer arms l la and l ib are moved forward and backward with respect to the carrier C, the orienter 14 and the load lock chambers 20A and 20B on the mounting table 10, respectively. .
  • the common transfer chamber 3 is provided with a second wafer transfer mechanism 31 that transfers the wafer W.
  • the wafer transfer mechanism 31 has two transfer arms 31a and 31b that hold the wafer W substantially horizontally.
  • a COR processing unit 5 Outside the common transfer chamber 3, there are a COR processing unit 5, a PHT processing unit 6, an epitaxy growth unit 7A, an epitaxy growth unit 7B, a load lock chamber 20B, and a load lock chamber 20A. For example, it is arranged so as to line up in this order in the clockwise direction when the upward force is applied.
  • a gate valve 35 that can be opened and closed is provided between each chamber and the processing chamber 34! /.
  • the wafer W is held by transfer arms 31a and 31b. Then, the wafer is transported to a desired position by being driven to rotate and go straight in a substantially horizontal plane and moved up and down by driving the wafer transport mechanism 31.
  • Each of the load lock chambers 20A and 20B, the processing chamber 32 in the COR processing apparatus 5, the processing chamber 33 in the PHT processing apparatus 6, and the processing chamber 34 in each of the epitaxial growth apparatuses 7A and 7B are respectively transported arms. As 31a and 31b are advanced and retracted, they can be carried into and out of each processing chamber!
  • the COR processing device 5 includes a housing 5a, and the inside of the housing 5a is a processing chamber (processing space) 32 having a hermetically sealed structure for storing the wafer W. Yes.
  • a loading / unloading port 36 for loading / unloading the wafer W into / from the processing chamber 32 is provided on one side surface of the housing 5a, and the gate valve 35 described above is provided at the loading / unloading port 36.
  • a mounting table 40 for mounting the wafer W in a substantially horizontal state is provided.
  • the mounting table 40 includes a chuck body 41 having a substantially circular shape in plan view, and is arranged so that a substantially flat upper surface 41a of the chuck body 41 is substantially horizontal. ing.
  • a plurality of contact pins 42 as contact members that are brought into contact with the lower surface of the wafer W are provided so as to protrude upward.
  • three contact pins 42 are provided, and are provided at the peripheral edge of the upper surface 41a so as to surround the central portion of the upper surface 41a.
  • the wafer W is supported substantially horizontally on the upper side of the chuck body 41 in a state where the three portions on the peripheral edge of the lower surface are respectively placed on the upper ends of the contact pins 42.
  • a gap G having a predetermined width H in the height direction is formed between the lower surface of the wafer W supported by the contact pins 42 and the upper surface 41a of the chuck body 41.
  • the chuck body 41 includes a base 4 lb fixed to the bottom of the housing 5a, and an upper layer 41c having an upper surface 41a to which the contact pin 42 is attached.
  • the heat insulating material 41d is provided between the base portion 41b and the upper layer portion 41c.
  • the COR processing apparatus 5 is provided with a temperature controller 46 for adjusting the temperature of the wafer W by adjusting the temperature of the mounting table 40 (upper layer portion 41c) to a predetermined temperature.
  • the temperature controller 46 includes a pipe 47 through which a temperature adjusting liquid (for example, water) is allowed to pass, a pump 48, and a liquid temperature adjusting unit 49 that adjusts the temperature of the temperature adjusting liquid.
  • the pipe line 47 is introduced, for example, into the peripheral portion of the bottom force mounting table 40 of the housing 5a and is placed inside the upper layer portion 41c.
  • the peripheral portion force of the upper layer portion 41c is arranged in a spiral shape facing the central portion of the upper layer portion 41c along a predetermined rotation direction, and the outer side from the bottom portion of the housing 5a at the central portion of the mounting table 40.
  • the upstream end of the pipe 47 is connected to a pump 48 provided outside the housing 5a.
  • the liquid temperature adjusting unit 49 is interposed in the conduit 47 outside the housing 5a. In the powerful configuration, the temperature adjustment liquid flows in the pipe 47 by the operation of the pump 48, is temperature-controlled in the liquid temperature adjustment unit 49, and is then supplied to the upper layer portion 41c of the mounting table 40. At the center of the base 40, it is derived from the housing 5a.
  • the COR processing apparatus 5 is provided with a supply mechanism 50 for supplying gas to the processing chamber 32.
  • the supply mechanism 50 includes a supply path 51 for supplying hydrogen fluoride gas (HF) as a processing gas containing a halogen element to the processing chamber 32, and a supply path for supplying ammonia gas (NH) as a basic gas to the processing chamber 32.
  • HF hydrogen fluoride gas
  • NH ammonia gas
  • Argon gas as inert gas in treatment chamber 32
  • N Nitrogen gas (N) as an inert gas to supply path 53 for supplying (Ar) and processing chamber 32
  • a supply path 54 and a shower head 55 are provided.
  • the supply path 51 is connected to a supply source 61 of hydrogen fluoride gas. Further, the supply passage 51 is provided with a flow rate adjusting valve 62 capable of opening / closing the supply passage 51 and adjusting the supply flow rate of the hydrogen fluoride gas.
  • the supply path 52 is connected to an ammonia gas supply source 63.
  • the supply passage 52 is provided with a flow rate adjusting valve 64 that can open and close the supply passage 52 and adjust the supply flow rate of ammonia gas.
  • the supply path 53 is connected to an argon gas supply source 65.
  • the supply passage 53 is provided with a flow rate adjusting valve 66 that can open and close the supply passage 53 and adjust the supply flow rate of argon gas.
  • the supply path 54 is connected to a nitrogen gas supply source 67.
  • the supply passage 54 is provided with a flow rate adjusting valve 68 capable of opening / closing the supply passage 54 and adjusting the supply flow rate of nitrogen gas.
  • These supply channels 51, 52, 53, 54 are connected to a shower head 55 provided in the ceiling portion of the processing chamber 32, and hydrogen fluoride gas, ammonia gas, argon gas is introduced into the processing chamber 32 from the shower head 55. Exhaust gas and nitrogen gas Is issued.
  • the COR processing apparatus 5 is provided with an exhaust mechanism 71 for exhausting gas from the processing chamber 32.
  • the exhaust mechanism 71 includes an exhaust passage 75 in which an open / close valve 72 and an exhaust pump 73 for performing forced exhaust are interposed.
  • each unit such as 73 is controlled by the control command of the control unit 8. That is, supply of hydrogen fluoride gas, ammonia gas, argon gas, nitrogen gas by the supply mechanism 50, exhaust by the exhaust mechanism 71, temperature adjustment by the temperature controller 46, and the like are controlled by the control unit 8.
  • Components such as the mounting table 40, the casing 5a, and the shower head 55 of the COR processing apparatus 5 are made of a metal such as aluminum (A1) or aluminum alloy that has been subjected to a surface treatment such as anodizing. .
  • alumite treatment is applied to the surface of such a component, metal particles such as aluminum sulfate (Al (SO)) are more likely to be generated.
  • the wafer w may be contaminated.
  • solid aluminum or aluminum nitride without surface treatment In order to reduce the generation of strong metal particles, solid aluminum or aluminum nitride without surface treatment
  • a configuration using (AIN) or the like may be used.
  • an aluminum surface covered with quartz (SiO 2) or the like may be used.
  • the PHT processing apparatus 6 includes a processing chamber (processing space) 33 having a sealed structure for storing the wafer W, and the wafer W is set substantially horizontal in the processing chamber 33.
  • a mounting table 80 is provided.
  • a loading / unloading port for loading / unloading the wafer W into / from the processing chamber 33 is provided, and the above-described gate valve 35 is provided at the loading / unloading port.
  • the components such as the mounting table 80 of the PHT processing apparatus 6 are made of, for example, alumite (A1) that has been anodized, or solid aluminum that has not been surface-treated. May be. However, metal particles such as aluminum sulfate generated by surface force may be transferred to the lower surface of the wafer W by thermophoresis.
  • the temperature of the mounting table 80 is high. As the temperature is raised (for example, 160 ° C. or higher), the reaction of the PHT treatment in the treatment chamber 33 is facilitated, but the transfer of particles due to thermophoresis is more likely to occur. For this reason, the temperature of the mounting table 80 is not set too high, for example, about 150 ° C. or less, preferably about 100 ° C. to 135 ° C. By doing so, it is possible to reduce the adhesion of particles to the wafer W while favorably promoting the reaction.
  • the PHT treatment apparatus 6 includes an inert gas such as nitrogen gas (N) in the treatment chamber 33.
  • N nitrogen gas
  • a supply mechanism 82 having a supply path 81 for heating and supplying the gas and an exhaust mechanism 84 having an exhaust path 83 for exhausting the processing chamber 33 are provided.
  • the supply path 81 is connected to a nitrogen gas supply source 85.
  • the supply passage 81 is provided with a flow rate adjusting valve 86 capable of opening / closing the supply passage 81 and adjusting the supply flow rate of nitrogen gas.
  • the exhaust path 83 is provided with an open / close valve 87 and an exhaust pump 88 for forced exhaust.
  • each part of the PHT processing device 6 such as the gate valve 35, the flow rate adjusting valve 86, the exhaust pump 88, and the like is controlled by a control command of the control unit 8.
  • Each functional element of the processing system 1 is connected to a control unit 8 that automatically controls the operation of the entire processing system 1 via a signal line.
  • the functional elements are, for example, the gate valve 35, the pump 48, the liquid temperature adjusting unit 49, the flow rate adjusting valves 62, 64, 66, 68, the on-off valve 72, the exhaust pump 73, the PHT processing of the COR processing device 5 described above.
  • the control unit 8 is typically a general-purpose computer that can realize an arbitrary function depending on the software to be executed.
  • control unit 8 is inserted into the input / output unit 8b, the calculation unit 8a having a CPU (central processing unit), the input / output unit 8b connected to the calculation unit 8a. And a recording medium 8c storing control software.
  • the recording medium 8c stores control software (program) that is executed by the control unit 8 to cause the processing system 1 to perform a predetermined substrate processing method to be described later.
  • the control unit 8 realizes various process conditions (for example, pressure in the processing chamber 32) defined for each functional element of the processing system 1 by a predetermined process recipe.
  • the processing chamber 32 is set to a predetermined pressure P2. Steps Sl to S5 are performed in sequence, such as control to adjust the temperature of wafer W in the state (control to realize step S2), control to set the processing chamber 32 to the processing atmosphere at pressure P3 (control to realize step S4), etc.
  • the recording medium 8c is fixedly provided in the control unit 8, or is detachably attached to a reading device (not shown) provided in the control unit 8 and can be read by the reading device. There may be.
  • the recording medium 8c is a hard disk drive in which control software is installed by a service person of the manufacturer of the processing system 1.
  • the recording medium 8c is a removable disk such as a CD-ROM or DVD-ROM in which control software is written. Such a removable disk is read by an optical reading device (not shown) provided in the control unit 8.
  • the recording medium 8c may be of any format of RAM (random access m 61110) or 1 ⁇ 0] ⁇ 06 & (1 only memory).
  • the recording medium 8c may be a cassette type ROM.
  • control software may be stored in a management computer that comprehensively controls the control unit 8 of each processing system 1.
  • each processing system 1 is operated by a management computer via a communication line and executes a predetermined process.
  • FIG. 1 a wafer having a Si layer, an oxide layer, a poly-Si layer, and a TEOS layer is etched by a dry etching apparatus or the like, and a recess where Si is exposed is formed as shown in FIG. Is done. Weno and W after the powerful dry etching process are stored in the carrier C and transferred to the processing system 1.
  • a carrier C storing a plurality of wafers W is placed on the mounting table 13, and one wafer is transferred from the carrier C by the wafer transfer mechanism 11.
  • Yeha W is taken out and loaded into the load lock room 20A.
  • the load lock chamber 20A is loaded, the load lock chamber 20A is sealed and decompressed. Thereafter, the load lock chamber 20A and the common transfer chamber 3 decompressed with respect to the atmospheric pressure are communicated with each other. And The wafer W is unloaded from the load lock chamber 20A and loaded into the common transfer chamber 3 by the transfer mechanism 31.
  • the wafer W loaded into the common transfer chamber 3 is first loaded into the processing chamber 32 of the COR processing apparatus 5.
  • the wafer W is transferred from the wafer transfer mechanism 31 to the mounting table 40 with the surface (device formation surface) as the upper surface.
  • the loading / unloading port 36 is closed, and a series of processes including COR processing is started. The steps performed in the COR processing device 5 will be described later in detail.
  • the natural oxide film in the concave portion of the wafer W is transformed into a reaction product (see FIG. 8).
  • the loading / unloading port 36 is opened, and the wafer W is unloaded from the processing chamber 32 by the wafer transfer mechanism 31 and loaded into the processing chamber 33 of the PHT processing apparatus 6. .
  • the wafer W is placed in the processing chamber 33 with the surface thereof as the upper surface.
  • the processing chamber 33 is sealed and PHT processing is started.
  • a high-temperature heated gas is supplied into the processing chamber 33 through the supply passage 81, and the temperature inside the processing chamber 33 is raised by the heating gas.
  • the reaction product generated by the COR treatment is heated and vaporized, removed from the inner surface of the recess, and the surface of the Si layer is exposed (see FIG. 9).
  • the temperature and pressure in the processing chamber 33 are controlled so as to vaporize the reaction product, and are heated to, for example, a temperature of about 100 ° C. or higher.
  • the wafer W can be dry-cleaned, and the natural oxide film can be removed from the Si layer by dry etching.
  • the supply of the heated gas is stopped, and the loading / unloading port of the PHT processing apparatus 6 is opened. Thereafter, the wafer W is unloaded from the processing chamber 33 by the wafer transfer mechanism 31 and loaded into the processing chamber 34 of the epitaxial growth apparatus 7A or 7B.
  • the processing chamber 34 When the wafer W is loaded into the processing chamber 34, the processing chamber 34 is sealed, and the SiGe film forming process is started.
  • the reaction gas supplied into the processing chamber 34 and the exposed Si layer in the recess of the wafer W chemically react to cause SiGe to grow epitaxially in the recess (see FIG. 10).
  • SiGe can be preferably grown based on the surface of the Si layer.
  • the SiGe layers are formed in the concave portions on both sides in this way, in the Si layer, the portion sandwiched between the SiGe layers receives compressive stress from both sides. That is, a strained Si layer having a compressive strain is formed in a portion sandwiched between the SiGe layers below the Poly-Si layer and the oxide layer.
  • the wafer W is unloaded by the wafer transfer mechanism 31 and is loaded into the load lock chamber 20B.
  • the load lock chamber 20 B is sealed, and then the load lock chamber 20 B and the transfer chamber 12 are communicated.
  • the wafer transfer mechanism 11 carries out the force of the wafer lock chamber 20B and returns it to the carrier C on the mounting table 13. As described above, a series of steps in the processing system 1 is completed.
  • the wafer W and the wafer W transferred from the wafer transfer mechanism 31 to the mounting table 40 are substantially horizontal with a plurality of contact pins 42 contacting the lower peripheral edge of the wafer W. Placed. In this state where the lower surface is supported by the abutment pins 42, the wafer W is separated upward from the upper surface 41a of the mounting table 40, and a gap G is formed between the lower surface of the wafer W and the upper surface 41a.
  • the pressure in the processing chamber 32 is close to a vacuum state reduced from the atmospheric pressure Po and becomes the pressure P1.
  • the processing chamber 32 When the wafer W is loaded into the processing chamber 32 and delivered to the mounting table 40, the processing chamber 32 is sealed, and then ammonia gas, argon gas, and the like are supplied from the supply paths 52, 53, 54 to the processing chamber 32, respectively. Supply nitrogen gas. As a result, the processing chamber 32 has an initial pressure P at the time of loading.
  • a predetermined pressure P2 for example, about 2 Torr (about 2.67 ⁇ 10 2 Pa), PK P2 ⁇ P)
  • P2 for example, about 2 Torr (about 2.67 ⁇ 10 2 Pa), PK P2 ⁇ P)
  • the temperature controller 46 controls the temperature of the wafer W to a predetermined target value (for example, about Adjust to about 25 ° C (Step S2).
  • a predetermined target value for example, about Adjust to about 25 ° C (Step S2).
  • the temperature of the wafer W is controlled, the liquid is passed through the conduit 47, and the temperature of the upper layer portion 41c of the mounting table 40 is adjusted to a predetermined temperature.
  • the lower surface of the wafer W is close to the upper surface 41a, ammonia gas, argon gas, and nitrogen gas are previously introduced into the force processing chamber 32 that is spaced apart by the gap G. The mixed gas enters the gap G.
  • hydrogen fluoride gas is not supplied to the processing chamber 32 while the temperature of the wafer W is controlled in this way. This is because the hydrogen fluoride gas immediately adheres to the inner wall of the housing 5a of the processing chamber 32, and metals such as aluminum (A1) and aluminum-um alloys, which are often used as materials for the components of the COR processing device 5, Easily corroded by hydrogen fluoride gas! Also, hydrogen fluoride gas is a relatively expensive gas, and we would like to use as little hydrogen fluoride gas as possible. Therefore, while the temperature of the wafer W is being controlled, only the ammonia gas, the nitrogen gas, and the argon gas are supplied to the processing chamber 32 without supplying the hydrogen fluoride gas.
  • the inside of the processing chamber 32 is forcibly evacuated, and the processing chamber 32 is forced to a pressure P3 lower than the pressure P2 (for example, about 0.1 lTorr (about 13.3 Pa) or less).
  • PK P3 to P2 (Step S3).
  • hydrogen fluoride gas is supplied from the supply path 51 to the processing chamber 32.
  • the ammonia gas is supplied to the processing chamber 32 in advance, by supplying hydrogen fluoride gas, the atmosphere of the processing chamber 32 is changed to a processing atmosphere containing hydrogen fluoride gas and ammonia gas.
  • step S4 the COR process (step S4) is started on the wafer W.
  • a natural acid film forming force on the surface of the wafer W is chemically reacted with molecules of hydrogen fluoride gas and molecules of ammonia gas to be converted into reaction products.
  • the atmosphere in the processing chamber 32 is maintained at a constant pressure P3.
  • the process chamber 32 is forcibly evacuated again to reduce the pressure to P1 (step S5).
  • hydrogen fluoride gas and ammonia gas are discharged from the processing chamber 32.
  • the loading / unloading port 36 is opened, the wafer W is unloaded, and the next unprocessed wafer W is loaded into the processing chamber 32.
  • the gap G is formed between the lower surface of the wafer W and the upper surface 41a of the mounting table 40, particles are transferred from the mounting table 40 to the wafer and W. It is possible to prevent transcription. Further, the wafer W can be prevented from being damaged by the lower surface of the wafer W rubbing against the upper surface of the mounting table 40 and particles.
  • the mixed gas is supplied to the gap G between the lower surface and the upper surface 41a of the wafer W by pressurizing the inside of the processing chamber 32 to a predetermined pressure P2. As a medium, heat can be efficiently transferred between Ueno, W and the mounting table 40. Therefore, the temperature of the wafer W can be adjusted efficiently.
  • the substrate processing apparatus and the substrate processing method for processing a substrate in a low-pressure state illustrate the COR processing apparatus 5 and the processing method using the COR processing apparatus 5.
  • the present invention relates to such an apparatus.
  • the present invention is not limited to such a method, and can be applied to other substrate processing apparatuses and substrate processing methods, for example, a substrate processing apparatus and a substrate processing method for performing, for example, etching processing, CVD processing, etc. on a substrate.
  • the substrate is not limited to a semiconductor wafer, and may be, for example, glass for LCD substrates, CD substrates, printed substrates, ceramic substrates, and the like.
  • argon gas and nitrogen gas are exemplified as the inert gas supplied to the processing chamber 32.
  • the inert gas may be any other inert gas, for example, helium gas (He) or xenon gas (Xe), or argon gas, nitrogen gas, helium gas, or xenon gas. Of these, a mixture of two or more gases may be used.
  • a supply port that supplies gas directly to the gap G may be provided.
  • a supply port for discharging an inert gas such as helium (He) or nitrogen gas is provided on the upper surface 41 a of the mounting table 40, and this supply port force is applied to the lower surface of the wafer W mounted on the mounting table 40.
  • inert gas such as helium (He) or nitrogen gas
  • the temperature controller 46 is configured to adjust the temperature by flowing a temperature-controlling liquid into the mounting table 40.
  • the temperature controller 46 is not limited to a coverable configuration.
  • the mounting table 40 is heated by resistance heat. It may be configured to include an electric heater or a halogen lamp heater that heats the mounting table 40 by radiant heat. Also in this case, the wafer W can be heated by heating the mounting table 40 with an electric heater or a halogen lamp heater.
  • FIG. 14 a processing system in which six processing devices 100 to 105 are provided around a common transfer chamber (transferno) 3 as shown in FIG.
  • the present invention can be applied to 106.
  • wafer W is loaded into the COR processing device 5 from the loading / unloading section 2 via the load lock chamber 20 and the PHT processing device 6, and the COR processing device 5 and the PHT processing device 6 are loaded.
  • the present invention can also be applied to the processing system 110 configured to process the wafers W in this order.
  • the number and arrangement of processing devices provided in the processing system are arbitrary.
  • the target value of the temperature of the wafer W in step S2 may be, for example, about 10 ° C or higher and 60 ° C or lower.
  • the processing time for adjusting the temperature of the wafer in step S2 may be about 15 seconds or more and about 300 seconds or less. The longer the temperature control processing time, the target the wafer temperature. Force that can be close to the value Processing system 1 Considering the overall throughput and productivity, the shorter one is desirable, for example, about 30 seconds or less.
  • the pressure P2 in the processing chamber 32 may be a value not less than about 0.5 Torr (about 66.7 Pa) and not more than about lOOTorr (13.3 X 10 3 Pa). Note that the higher the pressure P2, the more efficiently the temperature of the wafer can be controlled.
  • the supply flow rate of hydrogen fluoride gas is about 500 sccm (about 8.45 X 10 _1 m 3 Zs) or less, and the supply flow rate of ammonia gas is about 500 sccm or less.
  • the argon gas supply flow rate may be about 2000 sccm (about 3.38 m 3 Zs) or less, and the nitrogen gas supply flow rate may be about 2000 sccm or less.
  • FIG. 15 shows the relationship between the pressure P2 in the processing chamber 32 and the wafer temperature when the processing time in which the temperature of the wafer is adjusted in step S2 is a constant value (30 seconds).
  • the temperature of the upper surface 41a of the mounting table 40 was 25 ° C, and the temperature of the wafer before temperature control was 35 ° C.
  • the pressure P2 is 0.9 Torr (about 1.20 X 10 2 Pa), 2 Torr, 4 Torr (about 5.33 X 10 2 Pa)
  • the temperature of the Weno coffee is about 29.48 respectively.
  • . C about 27.91. C, about 27.32.
  • the result was obtained. Therefore, it was proved that the higher the pressure P2, the more efficiently the temperature of the wafer can be controlled.
  • FIG. 16 shows the relationship between the wafer temperature and the processing time when the temperature of the wafer is adjusted when the pressure P2 is set to a constant value (2 Torr) in step S2.
  • the temperature of the upper surface 41a of the mounting table 40 was 25 ° C, and the temperature of the wafer before temperature control was 35 ° C.
  • the temperature of the Weno coffee is about 29.13 ° C, about 27.91 ° C, and about 26.90 ° C, respectively.
  • the present invention can be applied to a substrate processing apparatus, a substrate processing method, and a recording medium provided in such a substrate processing apparatus for processing a substrate in a low pressure state.

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PCT/JP2006/322155 2005-11-08 2006-11-07 基板処理装置、基板処理方法及び記録媒体 WO2007055190A1 (ja)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2355133A3 (en) * 2010-01-27 2013-05-22 Tokyo Electron Limited Substrate heating apparatus, substrate heating method and substrate processing system
TWI726366B (zh) * 2018-09-19 2021-05-01 日商斯庫林集團股份有限公司 處方轉換方法、記憶媒體、處方轉換裝置以及基板處理系統

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JP6400361B2 (ja) 2014-07-16 2018-10-03 東京エレクトロン株式会社 基板洗浄方法、基板処理方法、基板処理システム、および半導体装置の製造方法
JP6692202B2 (ja) * 2016-04-08 2020-05-13 東京エレクトロン株式会社 基板処理方法及び基板処理装置

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JP2000208498A (ja) * 1998-11-11 2000-07-28 Tokyo Electron Ltd 表面処理方法及びその装置
JP2004343094A (ja) * 2003-04-22 2004-12-02 Tokyo Electron Ltd シリコン酸化膜の除去方法及び処理装置

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JP2004128019A (ja) * 2002-09-30 2004-04-22 Applied Materials Inc プラズマ処理方法及び装置

Patent Citations (2)

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Publication number Priority date Publication date Assignee Title
JP2000208498A (ja) * 1998-11-11 2000-07-28 Tokyo Electron Ltd 表面処理方法及びその装置
JP2004343094A (ja) * 2003-04-22 2004-12-02 Tokyo Electron Ltd シリコン酸化膜の除去方法及び処理装置

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2355133A3 (en) * 2010-01-27 2013-05-22 Tokyo Electron Limited Substrate heating apparatus, substrate heating method and substrate processing system
TWI726366B (zh) * 2018-09-19 2021-05-01 日商斯庫林集團股份有限公司 處方轉換方法、記憶媒體、處方轉換裝置以及基板處理系統

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