Classifications

• • G—PHYSICS
  • G01—MEASURING; TESTING
  • G01J—MEASUREMENT OF INTENSITY, VELOCITY, SPECTRAL CONTENT, POLARISATION, PHASE OR PULSE CHARACTERISTICS OF INFRARED, VISIBLE OR ULTRAVIOLET LIGHT; COLORIMETRY; RADIATION PYROMETRY
  • G01J1/00—Photometry, e.g. photographic exposure meter
  • G01J1/42—Photometry, e.g. photographic exposure meter using electric radiation detectors
  • G01J1/44—Electric circuits
• • H—ELECTRICITY
  • H03—ELECTRONIC CIRCUITRY
  • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
  • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
  • H03M1/12—Analogue/digital converters
  • H03M1/64—Analogue/digital converters with intermediate conversion to phase of sinusoidal or similar periodical signals
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
  • H04N23/00—Cameras or camera modules comprising electronic image sensors; Control thereof
  • H04N23/70—Circuitry for compensating brightness variation in the scene
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
  • H04N23/00—Cameras or camera modules comprising electronic image sensors; Control thereof
  • H04N23/70—Circuitry for compensating brightness variation in the scene
  • H04N23/71—Circuitry for evaluating the brightness variation
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
  • H04N23/00—Cameras or camera modules comprising electronic image sensors; Control thereof
  • H04N23/70—Circuitry for compensating brightness variation in the scene
  • H04N23/76—Circuitry for compensating brightness variation in the scene by influencing the image signals
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
  • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
  • H04N25/50—Control of the SSIS exposure
  • H04N25/51—Control of the gain
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
  • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
  • H04N25/50—Control of the SSIS exposure
  • H04N25/53—Control of the integration time
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
  • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
  • H04N25/50—Control of the SSIS exposure
  • H04N25/57—Control of the dynamic range
  • H04N25/571—Control of the dynamic range involving a non-linear response
  • H04N25/575—Control of the dynamic range involving a non-linear response with a response composed of multiple slopes
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
  • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
  • H04N25/70—SSIS architectures; Circuits associated therewith
  • H04N25/76—Addressed sensors, e.g. MOS or CMOS sensors
  • H04N25/77—Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components
  • H04N25/772—Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components comprising A/D, V/T, V/F, I/T or I/F converters
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
  • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
  • H04N25/70—SSIS architectures; Circuits associated therewith
  • H04N25/76—Addressed sensors, e.g. MOS or CMOS sensors
  • H04N25/78—Readout circuits for addressed sensors, e.g. output amplifiers or A/D converters

Definitions

• This invention relates generally to the field of sensor devices and more particularly to an integration method and apparatus.
• the integration function is a mathematical function that is well known in the art. Briefly, an integral is a mathematical object that can be interpreted as an area or a generalization of area. If a signal is plotted as a curve, the integral of the signal is the area under the curve.
• An integrator is a device that integrates a signal present at its input and produces an integrated version of the input signal at its output.
• FIG. 1 illustrates a signal source 100 and a signal processing chain that consists of integrator 110, analog to digital converter (ADC) 120 and DSP 130.
• ADC analog to digital converter
• DSP 130 digital signal processing steps
• Signal source 100 generates a signal.
• signal source 100 could be a sensor such as a strain gage, a fuel flow sensor, a light intensity sensor or any other type of device that generates a signal in response to external stimuli.
• Signal source 100 is often, but not always, physically removed from the circuit assembly containing integrator 110, analog to digital converter (ADC) 120 and DSP 130.
• ADC analog to digital converter
• integrator 110 which integrates the signal V IN - Figure 2 illustrates the nature of the signal improvement.
• Waveform 200 is the combination of a constant value signal generated by signal source 100 and additive noise that corrupts the constant value signal.
• Waveform 210 is the integrator output generated in response to input signal waveform 200. It is readily observed that signal fluctuations caused by the additive noise are decreased by operation of the integrator, as illustrated by waveform 210.
• the output of integrator 110, V O u ⁇ is input to ADC 120.
• ADC 120 performs the analog to digital conversion function.
• the analog to digital conversion function is well known in the art.
• the analog signal V OUT present at ADC 120 input is converted into signal V D that can take one of a set of discrete levels.
• Figure 3 illustrates two ADC 120 input signals, 300 and 310, and corresponding ADC 320 output levels.
• Signals 300 and 310 are integrator 110 outputs in response to input signals of unequal power.
• Signal 300 is an integrator 110 output in response to a higher power input signal.
• Signal 310 is an integrator 110 output in response to a low power input signal.
• Vertical bar 320 represents the ADC conversion characteristic.
• An analog ADC 120 input signal value will be mapped into one of a finite set of discrete signal output values.
• the horizontal tic marks on bar 320 illustrate the set of discrete ADC 120 output values.
• ADC 120 is a five-bit device as illustrated here and it converts input signals into one of 32 discrete values. The discrete values span the range of 0 to 31 or 00000 to 11111 in binary representation. There are 32 corresponding tic marks on bar 320, each one corresponding to a specific analog voltage value.
• Signal 310 reaches a value of approximately 0.5 volts and it is converted to digital value three which is a relatively low output code. of ADC 120.
• An ADC input signal value that does not correspond exactly to one of the tick marks on bar 320 will be rounded-off to the value of the nearest tick-mark.
• the conversion error introduced by the rounding-off process is represented as quantization noise.
• the quantization error and associated quantization noise introduced by ADC is well known to one versed in the art.
• the round-off errors are proportionally more significant for lower value signals and less significant for higher value signals.
• Signal 300 will be affected less by quantization noise than signal 310.
• the signal to quantization noise ratio of signal 300 will be higher than the signal to quantization noise ration of signal 310.
• Signal to quantization noise ratio is a measure of signal degradation that negatively affects system performance.
• the minimum acceptable signal to quantization noise ratio is a design parameter and for that reason the minimum number of levels or equivalently the minimum number of bits of ADC 120 is a system design requirement.
• FIG. 4 Another kind of noise that degrades signal quality is additive thermal noise.
• signal 520 is the input to the integrator due to signal #1 which has a constant value of 1.5 volts and signal 530 is the input to the integrator due to signal #2 which has a constant value of 1 volt.
• Signal 500 is the integrator output due to input signal 520 and signal 510 is the
• signal 560 is the input to integrator 110 due to signal #3 which has a constant value of 2.5 volts.
• Signal 570 is the input to integrator 110 due to signal #4 which has a constant value of 1 volt.
• Signal 540 is the integrator 110 output due to input signal 560.
• Signal source 100 will generate a signal of sufficient maximum amplitude to insure that thermal noise effects are limited and do not significantly degrade system performance. This implies that at times the output of integrator 110 might be required to have a value larger than the available power supply voltage.
• Figure 5 illustrates a simple integrator circuit.
• the integrator input signal is generated by signal source 1000 and corrupted by noise source 1010.
• the signal and noise are added by adder 1020.
• This is a diagrammatic representation of signal and additive noise.
• the electronic components intrinsically generate noise and the addition of noise to the signal occurs > through inductive and other effects intrinsic to the physical component and system design and layout.
• Capacitor 1040 is a simple integrator. The input to the integrator is the output of adder 1020. Capacitor 1040 is reset by switch 1050 which is in the closed position prior to starting the integration process and resets the integrator. At the start of the integration process switch 1050 opens and the voltage across capacitor 1040 begins to change in response to the input signal originating from the output of adder 1020. At the end of the integration process switch 1030 closes and integrator output
• FIG. 4 is an illustrative diagram. The implementation of other similar integrators with identical functionality is well known and obvious to one skilled in the art.
• Integrator output 1060, Vou ⁇ 5 cannot in general exceed the upper limit imposed by the available power supply voltage. Power supply voltages are decreasing in state-of-the-art equipment due to stringent power consumption requirements.
• the required output voltage range of integrator 110 and input voltage range of ADC 120 can be in excess of the available system power supply voltage. By way of example this can occur when the output range of signal generator 100 is close to or larger than the available system power supply voltage. When the required output voltage range of integrator 110 is in excess of the available system power supply voltage the integrator output enters into saturation. [0022] Integrator output saturation occurs when the output voltage reaches its maximum value, here the available power supply voltage, and is unable to further increase its value in response to the input signal stimulus. Signal saturation causes system performance degradation. This condition will cause saturation when using conventional integrators, a simplified version of which is illustrated in Figure 4. Solutions to this problem have been published.
• an integration method includes the step of generating an integrated value of an input signal using a response provided by an oscillator coupled to the input signal. Because the integrated signal is generated using the oscillator's response, rather than the signal itself, a wider dynamic range of input voltages may be supported by the integrator; an integrator of the present invention can represent output values which are greater than the power supply of the sensor, because the saturation of the oscillator output cannot occur, hi addition, an integrator of the present invention can represent voltages at all ranges with increased resolution; as a result quantization errors are reduced and intensity levels of the signals may be more tightly compressed.
• an integrator includes an input for receiving a signal, an oscillator coupled to the input and operable to provide a response in accordance with a value of the signal, and a mechanism for translating the response provided by the oscillator into an integrator result.
• the novel approach disclosed herein implements accurate integrators that can accommodate output signal values far in excess of available power supply voltages and with very high accuracy and dynamic range.
• Figure 1 is a block diagram illustrating several components that are typically included in a sensor device that includes an integrator
• Figure 2 is a graph of a signal value and a corresponding integrated signal value, provided to illustrate the operation of an integrator
• Figure 3 is a graph illustrating a pair of integrated signals over time, and a quantization scale and is used to describe quantization;
• Figures 4A and 4B are graphs illustrating signals affected by thermal noise.
• Figure 4A illustrates how the effects of thermal noise may cause confusion for signal intensity spacing of small amounts, while Figure 4B illustrates that a larger intensity of signal spacing reduces the chances of integrator output value confusion;
• Figure 5 is a circuit diagram of a typical integrated circuit integrator;
• Figures 6A-6D are graphs, each of which illustrate outputs of different types of oscillators;
• Figure 7 A is a graph which illustrates an oscillator waveform that varies in frequency in response to an oscillator input illustrated in Figure 7B;
• Figures 8A and 8B are respective graphs which are used to describe a phase unwrapping technique of the present invention;
• Figures 9 A and 9B are graphs illustrating an oscillator phase, as determined using the unwrapping method of Figures 8A-8B, and a integrator output signal (9B), and is used to describe the signal integration capabilities of the present invention;
• Figure 10 is a circuit diagram illustrating representative components that may be included in an integrator operating according to the principles of the present invention.
• the present invention provides an integration method and integrator which uses a frequency response of an oscillator to integrate an input signal.
• the present invention recognizes that a relationship exists between the voltage of the signal and the frequency of the oscillator output, and that the phases of the oscillator output can be correlated to the integrated signal value.
• the correlation allows for integrated output values to be provided with a high degree of resolution, thereby overcoming the problems associated with quantization error, hi addition, because the integrator output value is based on oscillator phases, rather than on a simple voltage accuracy of the result is improved because saturation will not occur.
• Oscillators are a class of circuits well known in the art.
• the output of oscillator circuits can have a variety of shapes but they are all periodic, meaning that the output waveform is repetitive.
• One repetition of the output waveform comprises one oscillation cycle and the duration of a cycle is defined as its period of oscillation.
• the frequency of oscillation, f 0S c 3 is defined as the number of periods of oscillation per unit time and it is usually measured in Hertz (periods of oscillation per second).
• the frequency of oscillation of electronic oscillator circuits can be fixed or variable.
• a common oscillator with variable frequency of oscillation is the voltage-controlled oscillator (VCO).
• VCO voltage-controlled oscillator
• a VCO has a voltage input at which a signal voltage Sj n controls the frequency of oscillation.
• Voltage relates to current through Ohm's law and a signal Sj n can also be said to control the frequency of oscillation through its current rather than voltage characteristic.
• a VCO may also have a nominal frequency of oscillation f nom .
• the VCO oscillates at f nom when the frequency control input Sj n level is not present or of a value that does not modify the nominal frequency of oscillation, such as for example zero volts.
• the nominal frequency of oscillation can have any specified value including zero Hertz.
• the output frequency of the VCO changes in response to amplitude variations of the input signal.
• the instantaneous frequency of oscillation of the VCO will differ from the nominal frequency of oscillation of the VCO by some value f de i ta and will be given by
• FIG. 7 A illustrates the input and output signals of a VCO.
• the frequency of oscillation of the VCO output changes in response to variations in the input signal amplitude, as illustrated in Figure 7B.
• the VCO output segment 700 corresponds to input signal segment 720.
• the VCO output segment 710 corresponds to input signal segment 730.
• the frequency of oscillation of VCO output segment 700 is lower than the frequency of oscillation of VCO output segment 710.
• the amplitude of input signal segment 720 is lower than the amplitude of input signal segment 730. Therefore f ga i n has a positive value and the VCO frequency of oscillation is directly proportional to the input control signal amplitude.
• a VCO may also have additional inputs, such as RESET/ENABLE.
• RESET/ENABLE The function of RESET/ENABLE
• RESET/ENABLE when in the RESET state is to reset the VCO output waveform to a predetermined voltage that can be any value within the peak-to-peak voltage range.
• the function of RESET/ENABLE when in the ENABLE state is to enable the VCO output to oscillate.
• a VCO has an output V ou t- During each period of oscillation V ou t traverses an angular phase of 2 ⁇ radians. This implies that the output phase is measurable modulo 2 ⁇ and oscillator output values at phases that are separated by exactly 2 ⁇ are identical.
• Figure 6 illustrates several common VCO output waveforms. During a complete period each waveform in Figure 6 traverses exactly 2 ⁇ radians and waveforms values at phases that are separated by exactly 2 ⁇ are identical for all waveforms.
• the phase traversed by the oscillator output during a subset of one period is determined by sampling the oscillator output at the two instances of time marking the beginning and end of the subset of one period, identifying the phase associated with each sample and subtracting the two phases.
• the phase traversed by the oscillator output during a duration of time that spans more than one period of oscillation can only be determined modulo 2 ⁇ radians when using a method based on direct observation of the VCO output at two time instances.
• the integration may take place over a period of time, herein referred to as the integration period, and according to one aspect of the invention, the number of phases that the oscillator signal traverses over the integration period is accumulated.
• the present invention includes an additional function that counts the number of periods or significant fractions of a period traversed by the VCO output in order to resolve the ambiguity and provide a high resolution and dynamic range output signal.
• a circuit that counts the number of periods or significant fractions of a period traversed by the VCO output in a time interval, or 'unwraps' the phase, can be readily implemented in many forms. Waveforms associated with such a circuit are illustrated in Figures 8A and 8B.
• the transition times are labeled 930, 940 and 950 and they correspond to the VCO output states labeled 900, 910 and 920, respectively.
• the phase unwrapping circuit correlates the respective number of periods of an oscillator output signal to an integrated output voltage.
• the relationship between the VCO output and the output of the phase unwrapping circuit illustrated over one period of the VCO output can be extended over any number of VCO output periods with the output of the phase unwrapping circuit increasing in value by a predetermined amount each time the VCO output goes through its 0 and ⁇ (modulo 2 ⁇ ) phase values. It is obvious to one skilled in the art that there are alternative ways to implement the phase unwrapping function and mark the value of the unwrapped phase traversed by the VCO output, and the present invention is not limited by or to the particular method disclosed herein.
• the total phase traversed by the VCO output is given by the summation of two terms.
• the first term is the total unwrapped phase recorded by the phase unwrapping circuit.
• the second term is the total phase traversed by the VCO output since the last update of the phase unwrapping circuit output. This quantity can be unambiguously obtained by direct measurement of the VCO output.
• Figure 10 incorporates a simplified block diagram of the VCO subset of ICL8038 a commercially available IC provided by IntersilTM Corporation of Palm Bay, FL 32905. Additional phase unwrapping logic 835, total phase traversed logic 840 and VCO RESET/ENABLE functions 805 of the present invention are added.
• Flip-flop 825 changes states when triggered by comparators 815 and 820. Comparator 815 is triggered when capacitor 845 reaches a predetermined high voltage. Comparator 820 is triggered when capacitor 845 reaches a predetermined low voltage. Thus the comparators control the shape and voltage of the oscillating output.
• comparator 815 When comparator 815 is triggered, flip-flop 825 changes state such as to cause switch 865 to close. Current I 2 of current source 860 causes capacitor 845 to discharge thus causing the voltage across capacitor 845 to decrease. The decrease of the voltage across capacitor 845 immediately causes comparator 815 to change state.
• comparator 820 When the voltage across capacitor 845 decreases to a sufficiently low value comparator 820 is triggered. When comparator 820 is triggered flip-flop 825 changes state such as to cause switch 865 to open. Current I 1 of current source 855 causes capacitor 845 to charge thus causing the voltage across capacitor 845 to increase. The increase of the voltage across capacitor 845 immediately causes comparator 820 to change state.
• a constant current causes a linear change in the charge held by capacitor 845 as a function of time.
• the linear change in the charge held by capacitor 845 as a function of time causes a linear change in voltage across capacitor 845 as a function of time.
• the time required to charge and discharge capacitor 845 is determined by the magnitude of currents I 1 and I 2 generated by current sources 860 and 855.
• the sum of the times required to charge and discharge capacitor 845 to voltage levels that trigger comparators 815 and 820 determine the period of oscillation of the VCO. Therefore the magnitudes of currents I 1 and I 2 determine the period and frequency of oscillation of the VCO.
• the control signal applied at input 870 controls current sources 860 and 855 and therefore controls the VCO frequency of oscillation.
• a simple voltage or current splitter known as well to one versed in the art can be added between the control signal applied at 870 and current sources 860 and 855 to adjust the waveform symmetry.
• Counter 835 Reversal of the voltage across capacitor 845 is controlled by the state of flip-flop 825.
• Counter 835 is triggered and modifies its output state correspondingly each time flip-flop 825 changes state.
• the change in counter 835 output state can be a modified voltage level as shown in Figure 8B.
• Other voltage level modification schemes can be used as long as separate states are resolvable.
• Counter 835 output can also be of a digital format consisting of a digital word containing B bits. In such case a change in its output state can be a binary number where different states differ in one or more bits.
• the output state of counter 835 changes each time flip-flop 825 changes states and therefore counts how many times the VCO output reached its minimum and maximum values. If the output state of counter 835 is an even number the output of the VCO traversed an integer multiple of 2 ⁇ radians. The number of 2 ⁇ radians traversed by the VCO output is then given by dividing the output count of counter 835 by two.
• the output state of counter 835 is an odd number the number of 2 ⁇ radians traversed by the output of the VCO has an integer and a fractional part.
• the integer part of the number of 2 ⁇ radians traversed by the output of the VCO is given by dividing by two a number obtained by subtracting one from the output state of counter 835.
• the fractional part of the number of 2 ⁇ radians traversed by the output of the VCO depends on the degree of asymmetry between the rising and falling segments of the waveform and can be readily obtained by one skilled in the art. By way of example if the rising segment of the waveform takes twice as long as the falling segment of the waveform than then it requires 2/3 of a period of oscillation to complete.
• the voltage across capacitor 845 is proportional to the phase traversed by the VCO output following the last change in state of flip-flop 825. It can be readily obtained by one skilled in the art if a) the trigger voltages of comparators 815 and 820 (i.e., the maximum and minimum voltages of the VCO output) and b) the asymmetry between the rising and falling segments of the VCO output waveform are known. By way of example consider that if a) the VCO output voltage is halfway between the minimum and maximum value on the rising segment of the waveform and b) the rising segment of the waveform takes twice as long as the falling segment of the waveform then the waveform measurement is at 1/3 of a period of oscillation.
• the total phase traversed by the output of the VCO is obtained by summing the phase traversed by the VCO output as recorded by the voltage to phase converter 840 and by counter and phase converter 835. This function is performed by summer 880 and made available at output 890.
• Switch 850 resets capacitor 845 and therefore the VCO oscillator output to an initial voltage output by voltage source 810.
• Flip-flop 825 is reset by signal 895.
• the initial voltage of voltage source 810 together with the reset state of flip-flop 825 and the degree of asymmetry between the rising and falling segments of the VCO output waveform are sufficient to determine the initial phase of the VCO output waveform. This derivation is well known to one versed in the art.
• Phase and frequency have a differential relationship.
• K is a constant that is a function of the constant value f nom and ⁇ T (the integration tine) and is therefore well known.
• the second term consists of a constant value multiplier f ga i n and the term I Sj n dt which is the integral of the input signal Sj n .
• Sj n is comprised of two constant value segments, the first segments labeled 720 in Figure 7B being lower in value than the second segments, labeled 730 in Figure 7B.
• Integrator output segment 620 is the integral output as a function of time of Sj n when the lower value Sj n segment 720 was input to the integrator.
• Integrator output segment 630 is the integral output as a function of time of Sj n when the higher value Sj n segment 730 was input to the integrator.
• the phase accumulation rate is the integral of the phase traversed by the VCO as a function of time and can be expressed in units of radians.
• the velocity with which the VCO traverses a unit of phase is the frequency of oscillation and can be expressed in units of radians per second.
• the VCO control signal input waveform segment 720 causes the VCO to output waveform segment 700.
• the plot of the VCO output phase as a function of time generates the curve segment 600.
• the VCO control signal input waveform segment 730 causes the VCO to output waveform segment 710.
• the plot of the VCO output phase as a function of time generates the curve segment 610.
• the time domain integral of the input signal Sj n is therefore functionally equivalent to the phase domain integral of the input signal Sj n .
• the time domain integral of the input signal Sj n and the phase domain integral of the input signal Sj n are related through two constants, one of which may equal zero.
• phase measurement based integration measures the phase traversed by the oscillator output ⁇ during integration time ⁇ T.
• the phase traversed by the oscillator output ⁇ during integration time ⁇ T is proportional to the integral of the input control signal during integration time ⁇ T and the two are proportional.
• the minimum ⁇ value occurs for the smallest integral output.
• f ga i n - J s in dt ⁇ - K where K is a constant.
• ⁇ - K can be independently set to a specific value for any given value of J Sj n dt, including its minimum, by simply adjusting the VCO gain f ga i n -
• the ability to set the gain of the integrator and hence the minimum value of the measured integrator output variable eliminates the quantization noise issue associated with conventional integrators.
• variable oscillator circuits are common and fundamental building blocks of a wide variety of systems. Therefore they are widely available and have been highly optimized.
• oscillator based integrators are far superior to conventional integrators in quantization noise and dynamic range or lack of output saturation. Other advantages exist and are apparent to one versed in the art.

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