WO2006049245A1 - 液晶表示装置およびその駆動方法 - Google Patents
液晶表示装置およびその駆動方法 Download PDFInfo
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- WO2006049245A1 WO2006049245A1 PCT/JP2005/020290 JP2005020290W WO2006049245A1 WO 2006049245 A1 WO2006049245 A1 WO 2006049245A1 JP 2005020290 W JP2005020290 W JP 2005020290W WO 2006049245 A1 WO2006049245 A1 WO 2006049245A1
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/13306—Circuit arrangements or driving methods for the control of single liquid crystal cells
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- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
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- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
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- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
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- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
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- G—PHYSICS
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- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
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- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
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- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
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- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
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Definitions
- Liquid crystal display device and driving method thereof Liquid crystal display device and driving method thereof
- the present invention relates to a liquid crystal display device and a driving method thereof.
- TN mode liquid crystal display devices have been used, but the use of VA mode and IPS mode liquid crystal display devices having better viewing angle characteristics than TN mode is spreading. In recent years, it has been used in TVs and motors with MVA mode and S-IPS mode LCDs with improved viewing angle characteristics.
- the VA mode Compared to the IPS mode, the VA mode has an advantage that a high contrast ratio display can be realized because the black display quality is high. However, the viewing angle dependency of the ⁇ characteristic is larger than that of the IPS mode, which has a drawback.
- Patent Document 1 proposes a method of averaging the viewing angle dependency in the y characteristic by dividing each pixel into a plurality of subpixels and supplying different voltages for each subpixel.
- the liquid crystal display device described in Patent Document 1 has a configuration in which a display signal voltage is independently supplied to each of a plurality of subpixels included in a pixel. That is, when a pixel has two sub-pixels (first sub-pixel and second sub-pixel), the display signal voltage is supplied to the second sub-pixel separately from the source bus line that supplies the display signal voltage to the first sub-pixel. It is necessary to provide a source bus line to supply. Therefore, dividing the pixel in two doubles the number of source bus lines and source drive circuits. Two different display signal voltages supplied from the first subpixel and the second subpixel are determined in advance for each data to be displayed, and are stored in the look-up table.
- Patent Document 2 and Patent Document 3 describe a liquid crystal display device including a plurality of sub-pixels having different luminances with respect to at least one supplied display signal voltage. Yes. In this liquid crystal display device, a common display signal voltage is supplied to the first sub-pixel and the second sub-pixel, so that the number of source bus lines and source drive circuits is increased according to the number of divisions. There is no need to let it go.
- Patent Document 1 Japanese Patent Laid-Open No. 2003-295160
- Patent Document 2 JP 2004-62146 A
- Patent Document 3 Japanese Patent Application Laid-Open No. 2004-78157
- Patent Document 4 JP-A-6-332009
- a liquid crystal display device is AC driven in order to prevent a DC voltage from being applied to a liquid crystal layer regardless of the display mode.
- the electric field (DC voltage) in a certain direction is driven so as not to remain when time averaged.
- the voltage applied to the liquid crystal layer of each pixel of the active matrix liquid crystal display device corresponds to the difference between the common voltage (Vcom) supplied to the counter electrode and the display signal voltage supplied to the pixel electrode.
- Vcom common voltage supplied to the counter electrode
- the display signal voltage supplied to the pixel electrode the common voltage supplied to the counter electrode.
- the period for inverting the polarity of the display signal voltage is, for example, one vertical scanning period (typically one frame period of the input image signal).
- a voltage called “voltage” is applied to the liquid crystal layer.
- Bow I The penetration voltage depends on the size of the liquid crystal capacitance (capacity formed by subpixel electrode Z liquid crystal layer Z counter electrode, and the pixel capacitance is composed of liquid crystal capacitance and auxiliary capacitance). Capacitance depends on voltage. Therefore, in order to prevent the generation of a DC voltage due to the pull-in voltage, the display signal voltage is set so as to cancel the pull-in voltage for each data to be displayed (image data, input image signal).
- the present invention has been made to solve the above-described problems, and its main object is to improve the reliability of a liquid crystal display device having a pixel division structure.
- the liquid crystal display device of the present invention includes a liquid crystal layer, and a plurality of electrodes for applying a voltage to the liquid crystal layer.
- a pixel whose luminance changes in accordance with the display signal voltage supplied through the transistor
- the liquid crystal display panel includes a first subpixel having a first luminance and a second subpixel having a second luminance different from the first luminance with respect to at least one display signal voltage supplied.
- a source driving circuit for supplying a display signal voltage to a source bus line connected to the source of the transistor, a gate driving circuit for supplying a driving signal voltage to a gate bus line connected to the gate of the transistor,
- a luminance switching circuit configuration that performs mode switching between a first mode in which the first luminance is greater than the second luminance and a second mode in which the first luminance is smaller than the second luminance.
- first luminance and “second luminance” used here are not used to indicate fixed luminance levels, but are used to specify subpixels. That is, in a certain display state (a frame), the sub-pixel displayed at the first luminance is the first sub-pixel (for example, SP1 described later), and the sub-pixel displayed at the second luminance different from the first luminance is used.
- the second sub-pixel eg, SP 2
- Either of the two subpixels having different luminance may be used as the first subpixel.
- the first sub-pixel and the second sub-pixel thus determined have the first mode in which the first luminance is higher than the second luminance (the first sub-pixel is brighter than the second sub-pixel) and the first mode.
- the brightness is lower than the second brightness (the first sub-pixel is darker than the second sub-pixel) and the second mode is switched.
- the mode switching may be performed by randomly selecting the first mode and the second mode, or from the first mode to the second mode, or the second mode. It may be performed by forcibly switching from the mode to the first mode.
- the luminance switching circuit configuration may be configured by additionally providing a luminance switching circuit for luminance switching, or may be an existing circuit (for example, a source driving circuit, an auxiliary capacitance voltage generating circuit) and And Z or a combination thereof.
- each of the first subpixel and the second subpixel is a liquid crystal capacitor formed by a counter electrode and a subpixel electrode facing the counter electrode via the liquid crystal layer.
- An auxiliary capacitance counter voltage generating circuit for generating a voltage to be supplied to the capacitor counter electrode, and the counter electrode is a single electrode common to the first subpixel and the second subpixel.
- the storage capacitor counter electrode is electrically independent for each of the first subpixel and the second subpixel, and is provided corresponding to each of the first subpixel and the second subpixel.
- the two switching elements are on / off controlled by a scanning signal voltage supplied to a common gate bus line, and when the two switching elements are in an on state, the first subpixel and the second subpixel are controlled.
- a common source bus line display signal voltage is supplied to the sub-pixel electrode and the auxiliary capacitance electrode of each pixel, and the two switching elements are turned off. Then, the first sub-pixel and the auxiliary capacitance electrode are turned off.
- the voltage of the storage capacitor counter electrode of each second subpixel changes, and the amount of change defined by the direction and magnitude of the change differs between the first subpixel and the second subpixel. Accordingly, the first luminance and the second luminance are different.
- the luminance switching circuit configuration includes a circuit that inverts the phase of the voltage applied to the storage capacitor counter electrode of each of the first subpixel and the second subpixel.
- the luminance switching circuit configuration includes the first subpixel and the first subpixel.
- the luminance switching circuit configuration performs the mode switching at a time interval of two frames or more of the input image signal.
- the luminance switching circuit configuration further includes a circuit that counts an elapsed time after the mode switching, and the mode switching is performed every time a predetermined time elapses. Do. [0019] In one embodiment, the circuit further includes a circuit that integrates the operation time of the first mode and the operation time of the second mode, and the luminance switching circuit configuration includes the integration operation time of the first mode and the operation time of the first mode. When the difference from the accumulated operation time in the second mode exceeds a predetermined value, the mode is switched.
- the luminance switching circuit configuration performs the mode switching when a difference between the first luminance and the second luminance exceeds a predetermined value.
- the circuit further includes a circuit for obtaining an average luminance of the entire screen, and the luminance switching circuit configuration performs the mode switching when the value of the average luminance is within a predetermined range.
- a difference between the first luminance and the second luminance Z is an average luminance value between the first luminance and the second luminance of 90% or less of a maximum value. It corresponds to a certain gradation.
- the luminance switching circuit configuration performs the mode switching in response to a predetermined operation by an operator.
- the luminance switching circuit configuration performs the mode switching when a predetermined change occurs in the input image signal.
- the luminance switching circuit configuration further includes a luminance switching signal generation circuit that generates a luminance switching signal when a predetermined condition is satisfied, and the luminance switching circuit configuration includes the luminance switching circuit configuration, The mode is switched according to the luminance switching signal.
- the luminance switching signal generation circuit includes a plurality of trigger signal generation circuits that generate trigger signals according to different conditions, and the plurality of trigger signal output from the plurality of trigger generation circuits. And a signal generation circuit for generating the luminance switching signal based on the trigger signal.
- the areas of the first subpixel and the second subpixel are substantially equal.
- the pixel further includes a third sub-pixel.
- the third subpixel may have the same luminance as the first subpixel or the second subpixel, or may be different.
- Another liquid crystal display device of the present invention includes a liquid crystal layer, a plurality of electrodes for applying a voltage to the liquid crystal layer, and a pixel whose luminance changes according to a display signal voltage supplied via a transistor.
- the pixel includes a liquid crystal display panel including a plurality of subpixels including two subpixels that perform display with different luminance with respect to at least one supplied display signal voltage, and a source of the transistor
- a source driving circuit for supplying a display signal voltage to a source bus line connected to the gate, a gate driving circuit for supplying a scanning signal voltage to a gate bus line connected to the gate of the transistor, and a plurality of subpixels
- a luminance switching circuit configuration for performing mode switching between a plurality of modes in which the position of the sub-pixel having the highest luminance in the pixel is different from each other.
- each of the plurality of sub-pixels includes a liquid crystal capacitor formed by a counter electrode and a sub-pixel electrode facing the counter electrode via the liquid crystal layer;
- An auxiliary capacitor counter voltage generating circuit for generating a voltage to be supplied, wherein the counter electrode is a single electrode common to the plurality of sub-pixels, and the auxiliary capacitor counter electrode includes the plurality of sub-capacitor counter electrodes.
- Each subpixel is electrically independent and has a plurality of switching elements provided corresponding to each of the plurality of subpixels, and the plurality of switching elements are supplied to a common gate bus line. scanning When the plurality of switching elements are in the on state by being turned on and off by a signal voltage, a common source bus line display is provided on the subpixel electrode and the auxiliary capacitance electrode of each of the plurality of subpixels. After the signal voltage is supplied and the plurality of switching elements are turned off, the voltage of the auxiliary capacitor counter electrode of each of the plurality of subpixels changes, and is defined by the direction and magnitude of the change. The amount of change is different between the two sub-pixels, whereby the luminance of the two sub-pixels is different from each other.
- the areas of the sub-pixel having the highest luminance and the sub-pixel having the lowest luminance among the plurality of sub-pixels are substantially equal to each other.
- the area of each of the plurality of sub-pixels is substantially equal.
- the luminance changes according to the liquid crystal layer, the plurality of electrodes for applying a voltage to the liquid crystal layer, and the display signal voltage supplied via the transistor.
- the luminance changes according to a liquid crystal layer, a plurality of electrodes for applying a voltage to the liquid crystal layer, and a display signal voltage supplied via a transistor.
- a liquid crystal display panel driving method including a plurality of sub-pixels including two sub-pixels that perform display at different luminances with respect to at least one display signal voltage supplied thereto.
- the method includes a step of performing mode switching between a plurality of modes having the highest luminance among the plurality of sub-pixels and positions of the sub-pixels within the pixels being different from each other.
- the mode switching is performed by randomly selecting the first mode and the second mode.
- the mode switching is performed from the first mode to the second mode.
- the liquid crystal display device of the present invention includes two sub-pixels (bright sub-pixel and dark sub-pixel) whose pixels have different brightness, thereby improving the viewing angle dependency of the ⁇ characteristic.
- the mode switching operation for changing the luminance relationship between the sub-pixels is for averaging the DC voltage generated in the sub-pixels.
- the switching operation is performed at intervals of several tens of minutes or more. It is preferable to set the vertical scanning period to be longer than the vertical scanning period, but to be longer than the response time of the liquid crystal.
- the response time refers to the time from when a predetermined voltage is supplied to the liquid crystal layer of the pixel to when the pixel reaches the luminance corresponding to the supplied voltage, and is typically several millisecond power. Dozens of milliseconds.
- Patent Document 1 also describes that it is preferable to switch sub-pixels having different luminances, but this is to prevent flickering force. As it is described that it is preferable to switch within one frame period, it is necessary to switch fast enough with respect to the temporal resolution of human vision. I can't get it.
- FIG. 1 (a) is a schematic diagram showing a pixel division structure of the liquid crystal display device according to the embodiment of the present invention, and (b) is a schematic diagram showing a normal pixel.
- FIG. 2 is a diagram schematically showing an electrical configuration of a pixel included in the liquid crystal display device according to the embodiment of the present invention.
- FIG. 3 is a diagram for explaining a phenomenon in which a DC component is applied to a liquid crystal layer of a sub-pixel in a pixel division structure.
- FIG. 5 is a diagram showing a display state (operation state) in the liquid crystal display device according to the embodiment of the present invention.
- FIG. 6 is a diagram for explaining the principle that the DC component applied to the liquid crystal layer of the sub-pixel is reduced in the liquid crystal display device according to the embodiment of the present invention, and the drain voltage of each sub-pixel. It is a figure which shows the voltage level of a level and a counter electrode.
- FIG. 7 is a diagram for explaining the principle that the DC component applied to the liquid crystal layer of the sub-pixel is reduced in the liquid crystal display device according to another embodiment of the present invention.
- Drain It is a figure which shows a voltage level and the voltage level of a counter electrode.
- FIG. 8 is a graph showing the gradation dependency of the brightness difference between sub-pixels in the MVA mode liquid crystal display device according to the embodiment of the present invention.
- FIG. 9 is a graph showing the gradation dependence of the difference in the drain pull-in voltage Vd between subpixels in the MVA mode liquid crystal display device according to the embodiment of the present invention.
- FIG. 10 is a graph showing a change in the arrival rate of the luminance difference between the bright subpixel and the dark subpixel in each display gradation with respect to the light / dark mode switching period in the MVA mode liquid crystal display device according to the embodiment of the present invention.
- FIG. 11 is a graph showing the gradation dependency of a value (F value) obtained by dividing the luminance difference between sub-pixels by the average luminance in the MVA mode liquid crystal display device according to the embodiment of the present invention.
- FIG. 12 A schematic view showing a circuit configuration of a liquid crystal display device according to an embodiment of the present invention.
- FIG. 13 is a schematic diagram showing a configuration of a luminance switching circuit 60A suitably used as the luminance switching circuit 60 of the liquid crystal display device shown in FIG.
- FIG. 14 is a schematic diagram showing a circuit configuration of a liquid crystal display device according to another embodiment of the present invention.
- FIG. 15A is a schematic diagram showing a configuration of a luminance switching circuit 60B suitably used as the luminance switching circuit 60 of the liquid crystal display device shown in FIG.
- 15B is a schematic diagram showing a configuration of a CS signal generating circuit 50A including a function of the luminance switching circuit 60 of the liquid crystal display device shown in FIG.
- FIG. 15C is a diagram showing voltage waveforms of signals for explaining the operation of the CS signal generating circuit 50A shown in FIG. 15B.
- FIG. 16 is a diagram showing a display state (operation state) in the liquid crystal display device of Embodiment 1 according to the present invention.
- FIG. 17 is a diagram showing an equivalent circuit of the liquid crystal display device of Embodiment 1 according to the present invention.
- FIG. 18 is a diagram showing voltage waveforms and timings of signals for driving the liquid crystal display device shown in FIG. 17 (pattern A).
- FIG. 19 is a diagram showing voltage waveforms and timings of signals for driving the liquid crystal display device shown in FIG. 17 (pattern B).
- FIG. 20 is a diagram showing a voltage waveform and timing of each signal for driving the liquid crystal display device of Embodiment 2 according to the present invention (pattern A).
- FIG. 21 is a diagram showing voltage waveforms and timings of signals for driving the liquid crystal display device of Embodiment 2 according to the present invention (pattern B).
- FIG. 22 is a schematic diagram showing a pixel division structure of the liquid crystal display device of Embodiment 3 according to the present invention.
- FIG. 23 is a diagram showing an equivalent circuit of the liquid crystal display device of Embodiment 3 according to the present invention.
- FIG. 24 is a schematic diagram showing a configuration of a luminance switching circuit 60C used in the liquid crystal display device of Embodiment 3 according to the present invention.
- FIG. 25 is a diagram showing a display state (operation state) in the liquid crystal display device of Embodiment 3 according to the present invention.
- FIG. 26 is a diagram showing the voltage level of the drain of each subpixel and the voltage level of the counter electrode in the liquid crystal display device according to the third embodiment of the present invention.
- FIG. 27 is a diagram showing the voltage level of the drain of each subpixel and the voltage level of the counter electrode in another liquid crystal display device according to Embodiment 3 of the present invention.
- the liquid crystal display device has a pixel component as schematically shown in FIG. Has a split structure. That is, one pixel P shown in FIG. 1 (b) is divided into two subpixels SP1 and SP2, and different voltages can be supplied to the subpixels SP1 and SP2. By changing the voltage supplied to the subpixels SP1 and SP2 and making each subpixel have a different ⁇ characteristic, the viewing angle dependency of the y characteristic is improved.
- FIG. 2 schematically shows an electrical configuration of a pixel included in the liquid crystal display device according to the embodiment of the present invention.
- the pixel P is divided into a subpixel SP1 and a subpixel SP2.
- Corresponding TFTs 14a and 14b and auxiliary capacitors CS1 and CS2 are connected to the subpixel electrodes 11a and ib constituting the subpixels SP1 and SP2, respectively.
- the gate electrodes of TFT14a and TFT14b are connected to a common gate bus line (scanning line) 12, and the source electrodes of TFT14a and TFT14b are connected to a common (identical) source bus line (signal line) 13.
- the auxiliary capacitors CS1 and CS2 are connected to the corresponding CS bus line (auxiliary capacitor wiring) 15a and CS bus line 15b, respectively.
- the auxiliary capacitors CS1 and CS2 are respectively connected between the auxiliary capacitor electrode electrically connected to the sub-pixel electrodes 11a and ib, and the auxiliary capacitor counter electrode electrically connected to the CS bus lines 15a and 15b.
- the insulating layer (not shown, for example, a gate insulating film) is provided.
- the auxiliary capacitance counter electrodes of the auxiliary capacitances CS1 and CS2 are independent from each other, and have a structure in which different auxiliary capacitance counter voltages (also called “CS signals”) can be supplied from the CS bus lines 15a and 15b, respectively. And then.
- the auxiliary capacitor CS By varying the amount of change (specified by the direction and magnitude of change) of the auxiliary capacitor counter electrode of 1 and CS2 (ie, the voltage supplied from the CS bus line 15a or CS bus line 15b), respectively, Thus, a state where the effective voltages applied to the liquid crystal capacitances of the sub-pixels SP1 and SP2 are different, that is, a state where the luminance is different is obtained.
- the display signal voltage can be supplied from one source bus line 13 to the two subpixels SP1 and SP2, so that the number of source bus lines and the number of source drivers are not increased.
- the brightness of the pixels SP1 and SP2 can be made different from each other.
- the sub-pixel SP1 displays with a luminance higher than that of the sub-pixel SP2 for a given display signal voltage.
- the sub-pixel SP1 does not need to be displayed with a higher luminance than the sub-pixel SP2 with respect to all display signal voltages (gradation display signals), and is displayed with a higher luminance than at least one half-tone display signal voltage. do it.
- the subpixel SP1 performs display with a luminance higher than that of the subpixel SP2.
- the pull-in voltage Vd is expressed by the following equation (1).
- VgH and VgL are the TFT gate-on and gate-off voltages
- Cgd is the parasitic capacitance generated between the TFT gate and drain
- Clc (V) is the liquid crystal capacitance (capacitance)
- Ccs is Indicates the capacitance (capacitance value) of the auxiliary capacitor.
- the capacitance Clc of the liquid crystal capacitance depends on the magnitude of the voltage applied to the liquid crystal layer. This is because the orientation direction of the liquid crystal molecules having dielectric anisotropy changes depending on the voltage, and the capacitance of the liquid crystal capacitance varies depending on the luminance to be displayed.
- Vd (VgH-VgL) X Cgd / (Clc (V) + Cgd + Ccs)
- the pull-in voltage Vd depends on the capacitance of the liquid crystal capacitance, that is, depends on the luminance (gradation) to be displayed.
- the DC level of the drain voltage This is the median value of the potential of the pixel electrode and is also called the effective level of the drain voltage.
- the level of the counter voltage is made constant for all gradations, a gradation in which a DC component is applied to the liquid crystal layer is generated.
- the median value of the display signal voltage (source voltage or drain voltage) (the median value of the potential of the sub-pixel electrode in the case of AC driving at each gradation) is selected according to the gradation. This is set so as to compensate for Vd, so that the DC level of the drain voltage substantially coincides with the counter voltage, and no DC component is applied to the liquid crystal layer.
- the order of luminance between the sub-pixels is constant in a predetermined order. For example, as shown in FIG. Since the pattern of the dark subpixel of the pixel SP2 (hereinafter referred to as “pattern A”) is always maintained over the entire display period as long as the liquid crystal display device is operated, the liquid crystal layer (at least one of the subpixels) DC component is applied to the alignment film) and polarization occurs. As a result, a problem occurs in the reliability of the liquid crystal display device.
- the bright subpixels SP1 and the dark subpixels SP2 are not adjacent to each other in the row direction and the column direction.
- Sub-pixels SP1 and SP2 are arranged in a pinecone pattern.
- the DC component is continuously generated in the liquid crystal layer of each sub-pixel by switching the bright sub-pixel and the dark sub-pixel. Suppresses / prevents being applied.
- the mode 1 in which the subpixel SP1 is displayed in the pattern A of the bright subpixel and the subpixel SP2 is the sub-pixel
- the subpixel SP1 is By switching to mode 2 in which subpixel SP2 displays with the bright subpixel pattern B in the dark subpixel, the DC component applied to the liquid crystal layer of subpixel SP1 or SP2 is reduced.
- pattern A has a bright display with sub-pixel SP1 (first luminance) and dark sub-pixel SP2 (second luminance) (second luminance ⁇ first luminance), and sub-pixel SP1 ( Pattern B displays the first luminance) in the dark and the subpixel SP2 (second luminance) is bright (second luminance> first luminance) between subpixel SP1 and subpixel SP2.
- the DC component is reduced by reversing the luminance relationship. That is, the liquid crystal display device according to the embodiment of the present invention performs mode switching between the first mode in which the first luminance is larger than the second luminance and the second mode in which the first luminance is smaller than the second luminance.
- a luminance switching circuit configuration is provided.
- FIG. 6 shows the DC level of the drain voltage of each subpixel and the counter voltage (also referred to as “opposite level”) in pattern A and pattern B.
- Figure 6 shows the case where the DC level of the drain voltage of the bright subpixel is matched with the counter voltage.
- the DC level of the drain voltage of subpixel SP1 which is a bright subpixel
- the drain of subpixel SP2 which is a subpixel
- the DC level of the in voltage is different from the opposite level due to the difference in the amount of drain pull-in, and a DC component is applied to the liquid crystal layer of the IJ pixel SP2.
- the pattern B since the subpixel SP2 is a bright subpixel, a DC component is applied to the liquid crystal layer of the subpixel SP1 that is a dark subpixel.
- the DC component is applied to one of the subpixels SP1 and SP2.
- the DC component that is not continuously applied is averaged between the sub-pixels SP1 and SP2, and as a result, the reliability of the liquid crystal display device can be improved.
- setting the relative relationship between the DC level of the drain voltage and the counter level May be the display signal voltage and counter voltage applied to the subpixel electrode as the drain voltage. Done by setting.
- the voltage level of the counter electrode may be set to a level just between the DC level of the drain voltage of the bright subpixel and the DC level of the drain voltage of the subpixel. Yes.
- the center level between the DC level of the drain voltage of the subpixel SP1 that is the bright subpixel and the DC level of the drain voltage of the subpixel SP2 that is the subpixel is the counter voltage. If the level is, a DC component of + ⁇ is applied to the sub-pixel SP1, and a DC component of ⁇ is applied to the sub-pixel SP2.
- pattern B the counter voltage level is the same as in pattern A, and subpixel SP1 is a sub-pixel and subpixel SP2 is a bright subpixel.
- a DC component of ⁇ is applied to SP1
- a DC component of + ⁇ is applied to subpixel SP2.
- each pixel is divided into two sub-pixels
- the present invention can be similarly applied to a case where the pixel is divided into three or more sub-pixels.
- the two subpixels, the subpixel having the highest luminance and the subpixel having the lowest luminance are used as the above-mentioned bright subpixel and dark subpixel, respectively (
- the subpixels with intermediate luminance may be fixed) and configured as described above.
- the DC level of the drain voltage may be adjusted to the opposite level.
- the DC level of the drain voltage of the two bright sub-pixels may be set to the opposite level.
- the liquid crystal display device of the present embodiment can also be characterized as follows.
- the pixel included in the liquid crystal display device has a plurality of subpixels including two subpixels that perform display at different luminances with respect to at least one supplied display signal voltage. Therefore, it can be said that the luminance switching circuit configuration performs mode switching between a plurality of modes in which the position of the sub-pixel having the highest luminance among the plurality of sub-pixels is different from each other in the pixel. For example, when the pixel is divided into two sub-pixels along the column direction, the mode is switched between a mode in which the bright sub-pixel is located on the upper side and a mode in which the bright sub-pixel is located on the lower side.
- the mode in which the bright subpixel is located on the upper side when divided into three subpixels along the pixel column direction, the mode in which the bright subpixel is located on the upper side, the mode in which the bright subpixel is located in the center, and the mode in which the bright subpixel is located on the lower side Switch mode between and.
- a VA mode liquid crystal display device is close to black and white, and has a low gamma and high! Big.
- the pixel division structure shown in FIG. 2 is suitable for improving the viewing angle dependency of the ⁇ characteristic of a liquid crystal display device in a vertical alignment mode (VA mode) such as the MVA mode.
- VA mode vertical alignment mode
- the MVA mode if the pixel division structure shown in FIG. 2 is adopted, as shown in FIG. 8, the luminance difference between the sub-pixels is reduced in the low gradation and the high gradation that are large in the intermediate gradation. be able to.
- the difference in the drain pull-in voltage Vd between the bright subpixel and the dark subpixel is large in the middle tone which is small in the low gradation and the high gradation.
- FIG. 10 shows the display grayscale levels in the MVA mode liquid crystal display device having the pixel division structure shown in FIG. 2 for each display gradation with respect to the luminance switching cycle (switching between mode 1 and mode 2). The change in the arrival rate of the luminance difference between the bright subpixel and the dark subpixel is shown.
- 1 frame 16.7ms.
- FIG. 10 shows the result of halftone with a large luminance difference between the bright subpixel and the dark subpixel.
- the pixel division method improves the viewing angle characteristics by forming a single pixel with a plurality of sub-pixels having a luminance difference
- the luminance difference between the bright sub-pixel and the dark sub-pixel must be greater than a certain level. The effect cannot be obtained.
- the arrival rate of the luminance difference exceeds 90% after the switching cycle is 2 frames or more, and for low gray scales with a slow response, 90% exceeds 5 frames. Therefore, if the brightness switching between bright and dark is performed every frame, the response of the liquid crystal is 1 frame. If it is not completed within the time frame, the luminance difference between the light and dark sub-pixels is reduced or lost, which is not preferable.
- the switching cycle of the brightness is made every 2 frames or more, preferably 5 frames or more.
- the luminance switching need not be performed at regular intervals (periodically) . If the luminance switching interval is 2 cycles or more, preferably 5 cycles or more, the switching timing is arbitrary. Good.
- the display time in each mode luminance pattern
- the DC component between sub-pixels is not sufficiently averaged or canceled, so the total display time in each mode Are preferably controlled to be equal.
- one frame is 16.7 msec has been described as an example.
- mode switching may be performed in one frame.
- the brightness of each sub-pixel is switched every two or more frames.
- the brightness switching may be performed at regular intervals of 2 frames or more, but depending on the displayed image, the observer may feel uncomfortable. .
- A A certain force every fixed time. It is done in a relatively long time unit such as 30 minutes or 1 hour in units of frames. If switching is frequently performed in units of several frames or seconds, the frequency of observers feeling uncomfortable due to mode switching increases. Therefore, it is preferable to perform switching in a relatively long cycle such as 30 minutes or 1 hour. ,.
- the luminance difference between the bright subpixel and the dark subpixel is small or absent, the luminance of each subpixel does not change even when the mode is switched, so that the user does not feel uncomfortable.
- white and black solid screens rarely appear, so that switching is performed when the luminance difference between the bright subpixel and the dark subpixel is smaller than a predetermined value.
- the small luminance difference between the bright and dark sub-pixels is the low gradation and the high gradation.
- the mode is switched when the average value of the display gradation is above a certain gradation or below a certain gradation. For example, an average value of display gradations may be calculated, and mode switching may be performed using a trigger when a certain threshold value is reached.
- the threshold value that triggers the mode switching may be appropriately determined according to the CS voltage.
- the threshold value can be determined as follows.
- F shown in the following equation is used as a parameter for determining the luminance difference between the bright sub-pixel and the dark sub-pixel.
- ⁇ I is a luminance difference between the bright subpixel and the dark subpixel
- lave is an average luminance between the bright subpixel and the dark subpixel
- FIG. 11 shows a graph with the F value on the vertical axis and the gradation on the horizontal axis. In halftone near 100 gradations
- the luminance difference Fth as a threshold is set to X% of the maximum value (Fmax) of F as shown in the following equation.
- C The timing for switching the entire screen in response to a predetermined operation by the operator, such as when the power is turned ON / OFF, channel switching, or input switching, or when a CM image is inserted.
- a predetermined operation by the operator such as when the power is turned ON / OFF, channel switching, or input switching, or when a CM image is inserted.
- the entire screen is switched, so even if the bright and dark subpixels are switched, it cannot be distinguished from the switching of the entire screen, so the viewer will not feel uncomfortable.
- mode 1 for displaying in pattern A subpixel SP1: bright, subpixel SP2: dark
- mode 2 for displaying in pattern B (subpixel SP1: dark, subpixel SP2: bright)
- the display time in each mode is generally Does not match. Therefore, for example, the display time of pattern A and pattern B is counted by the integration counter, and the trigger signal generated under the above conditions is selected so that the display times are equal to each other. It is preferred that the times be equal to each other. For example, a circuit for counting the elapsed time after the mode switching is provided, and the mode switching is performed every time a predetermined time elapses. Alternatively, the mode may be switched when the difference between the accumulated operation time in mode 1 and the accumulated operation time in mode 2 exceeds a predetermined value.
- mode switching may be forcibly performed from mode 1 to mode 2 or from mode 2 to mode 1.
- mode 1 and mode 2 are selected at random. May be. That is, at the above timing, pattern A and pattern B may be selected (switched) randomly with a probability of 1Z2.
- the display time of the two modes can be made equal as a time average. For example, each time the power is turned on, either mode 1 or mode 2 should be selected randomly and with a probability of 1Z2.
- the display signal voltage is supplied from the common source bus line 13 to the subpixel electrode 11a and the subpixel electrode l ib, and the TFTs 14a and 14b are turned off.
- the amount of change in the voltage that is, the voltage supplied from the CS bus line 15a or CS bus line 15b
- the auxiliary capacitor counter electrode of the auxiliary capacitors CS1 and CS2 (specified by the direction and magnitude of the change).
- the effective voltages applied to the liquid crystal capacitors of the respective sub-pixels SP1 and SP2 are different, that is, a state where the luminance is different.
- phase of the voltage applied to the auxiliary capacitor counter electrode of each of the subpixel SP1 and subpixel SP2 is inverted, or By inverting the phase of the display signal voltage supplied to each of the sub-pixel SP1 and the sub-pixel SP2, it is possible to switch the luminance between the sub-pixel SP1 and the sub-pixel SP2 (reverse the magnitude relationship of luminance).
- the liquid crystal display device has a configuration shown in FIG. 12, for example, so that mode switching (luminance switching) is performed.
- the liquid crystal display device shown in FIG. 12 has a liquid crystal display panel 10 in which a pixel P includes two subpixels SP1 and SP2, and a display that receives an input image signal and supplies a predetermined drive signal to the liquid crystal display panel 10. And a control unit 20.
- the display control unit 20 supplies a predetermined signal to the gate driving circuit 30, the source driving circuit 40, the auxiliary capacitor counter voltage generation circuit 50, and the luminance switching circuit 60 at a predetermined timing.
- the luminance switching circuit 60 generates a mode switching trigger signal, and inverts the phase of the display signal voltage (source voltage) output from the source driving circuit 40 to the liquid crystal display panel 10.
- the luminance switching circuit 60 shown in FIG. 12 for example, the luminance switching circuit 60A shown in FIG. 13 can be suitably used.
- the luminance switching circuit 60A includes a luminance switching signal generation circuit 62, a polarity switching circuit 66, and an integration circuit 64.
- the source polarity control signal generation circuit 20a is included in, for example, the display control unit 20 in FIG.
- the horizontal synchronization signal Hsync and the vertical synchronization signal Vsync are input to the source polarity control signal generation circuit 20a, and PolA and PolB signals (display signal voltages) having different polarities (that is, 180 degrees different in phase) are generated.
- the polarity switching circuit 66 of the luminance switching circuit 60A outputs one of the two display signal voltages having different polarities to the source driving circuit 40. The mode is switched by selecting the polarity based on the luminance switching signal.
- the luminance switching signal generation circuit 62 includes at least one trigger signal generation circuit 62a and a signal generation circuit 62b.
- Each generates a trigger signal.
- the signal generation circuit 62b receives a predetermined signal from the integration circuit 64, the signal generation circuit 62b outputs a luminance switching signal to the polarity circuit. That is, the signal generation circuit 62b selects the trigger signal according to the signal from the integration circuit 64, and switches the modes so that the integration operation time in each mode becomes equal.
- the trigger signal generation circuit 62a when the average gradation of the entire screen is calculated and the average gradation satisfies the condition of a predetermined threshold, the trigger signal generation circuit 62a outputs a trigger signal and is input to the signal generation circuit 62b.
- the polarity switching circuit 66 switches the Pol signal and displays pattern B, it sends a signal to the integration circuit 64, stores the pattern A count in the integration circuit 64, resets the counter, and displays the pattern B display time. Start counting.
- the signal generation circuit 62b does not output the luminance switching signal even if the trigger signal is input to the signal generation circuit 62b.
- a signal is sent from the integration circuit 64 to the signal generation circuit 62b to stand-by the generation of the luminance switching signal.
- the trigger signal is input from the trigger signal generation circuit 62a to the signal generation circuit 62b in this standby state, the luminance switching signal is input to the polarity switching circuit 66, and the Pol signal is switched and the pattern A is displayed.
- the pattern B count is stored in, the counter is reset, and the Noturn A count is started.
- the display times of pattern A and pattern B can be made substantially equal.
- set the pattern A and pattern B to be switched every 2 frames or more.
- a liquid crystal display device performs mode switching (brightness switching) by having the configuration shown in FIG. 14, for example.
- the liquid crystal display device shown in FIG. 14 has a luminance switching circuit 60 that switches modes by inverting the phase of the auxiliary capacitor counter voltage (CS voltage) generated by the auxiliary capacitor counter voltage generator circuit 50. is doing.
- CS voltage auxiliary capacitor counter voltage
- the luminance switching circuit 60 shown in FIG. 14 for example, the luminance switching circuit 60B shown in FIG. 15A can be suitably used.
- the luminance switching circuit 60B has a luminance switching signal generating circuit 62, an integrating circuit 64, and a phase switching circuit 68.
- the luminance switching signal generation circuit 62 has at least one trigger signal generation circuit 62a and a signal generation circuit 62b.
- the trigger signal generation circuit 62a generates a trigger signal when any of the above-described conditions is satisfied. To do.
- the signal generation circuit 62b outputs a luminance switching signal to the polarity circuit when receiving a predetermined signal from the integration circuit 64. The That is, the signal generation circuit 62b selects the trigger signal according to the signal from the integration circuit 64, and performs mode switching so that the integration operation time in each mode becomes equal.
- mode switching is performed by inverting the phase of the CS signal.
- the CS signal generation circuit 50 generates CS signals (auxiliary capacitor counter voltages) CSA and CSB having different phases from the horizontal synchronization signal Hsync and the vertical synchronization signal Vsync.
- the two CS signals having different phases are transmitted to the auxiliary capacitor wiring CS1 or CS2 of the liquid crystal display panel through the phase switching circuit 68.
- This phase switching circuit 68 switches whether the CSA or CSB CS signal is output to the auxiliary capacitance lines CS1 and CS2, that is, mode switching.
- the trigger signal generation circuit 62a when the average gray level of the entire screen calculated by the integration circuit 64 satisfies the threshold condition, the trigger signal generation circuit 62a outputs a trigger signal for switching and is input to the signal generation circuit 62b.
- the signal is sent to the integration circuit 64, the count of the pattern A is stored in the integration circuit 64, the counter is reset, and the pattern B Start counting the display time. If the count of pattern B is less than the count of pattern A, do not output the luminance switching signal even if the trigger signal is input to the signal generation circuit 62b.
- the pattern B count is memorized and coincides with the pattern A count, a signal is sent from the integration circuit 64 to the signal generation circuit 62b, and the luminance switching signal generation is set to standby.
- the luminance switching signal is input to the phase switching circuit 68, the CS signal phase is switched, pattern A is displayed, and pattern B is counted simultaneously. Memorize, reset the counter and count pattern A. By repeating this operation, the display time of pattern A and pattern B can be controlled almost equally. However, since it is necessary to switch between pattern A and pattern B every two or more frames in order to achieve the viewing angle improvement effect by pixel division, the CS signal is used when the trigger signal is one frame interval. Set so that it does not switch.
- FIG. 15B is a schematic diagram showing a configuration of the CS signal generation circuit 50A
- FIG. 15C is a diagram showing voltage waveforms of signals for explaining the operation of the CS signal generation circuit 50A.
- the CS signal generation circuit 50 A has a CS signal circuit 52 and a polarity signal generation circuit 54.
- the CS signal circuit 52 generates an amplitude voltage (also called “oscillation voltage”) that oscillates between two voltage levels.
- the polarity signal generation circuit 54 receives the gate start pulse GSP and the count signal CNT, and outputs the CS polarity inversion signal Pol.
- the count signal CNT has a sufficiently short period for one frame, and for example, a gate clock signal can be used.
- the CS signal circuit 52 determines the polarity of the amplitude voltage according to the polarity indicated by the CS polarity inversion signal Pol and outputs it as a CS signal.
- Pattern A and pattern B have different times from when the power is turned on until gate start pulse GSP is input. Pattern A and pattern B are selected depending on this time difference.
- the initial state of the CS polarity inversion signal Pol is set to H, and then the CS The polarity inversion signal Pol is inverted between H and L every frame (every time the gate start pulse becomes H).
- the CS polarity inversion signal Pol set in this way is input to the CS signal circuit 52, the polarity of the output CS signal is selected according to the polarity of the CS inversion signal Pol.
- the CS bus line CS1 (for example, connected to the subpixel SP1 in FIG. 2) A CS signal having the polarity shown in pattern A is uniquely output to the CS bus line 15a).
- the CS bus line CS1 (for example, the CS bus line 15a connected to the subpixel SP1 in FIG. 2) is uniquely set.
- the CS signal with the polarity shown in pattern B is output.
- the other CS bus line CS2 (CS bus line 15b connected to subpixel SP2 in Fig. 2)
- the polarity of the CS signal output to CS1 is inverted in both patterns A and B.
- Signal power CS is output as a signal.
- the display times of the two modes are equal as the time average.
- the liquid crystal display device has a pixel structure in which one pixel is divided into a plurality of sub-pixels, and is an active matrix type liquid crystal display device.
- a force indicating an example in which one pixel is divided into two subpixels may be divided into three or more subpixels.
- the display in which the sub-pixel SP1 is the bright sub-pixel and the sub-pixel SP2 is the ⁇ sub-pixel is pattern A
- the sub-pixel SP1 is the ⁇ sub-pixel and the sub-pixel SP2 by switching the light and dark display.
- the pattern A and B are switched alternately, with the display that is a bright subpixel as pattern B.
- the timing of the voltage of each bus line is the subpixel SP1 is the bright subpixel and the subpixel SP2 is the subpixel
- the subpixel SP1 is the subpixel SP1.
- Vg is the gate voltage
- Vs is the source voltage
- Vcsl and Vcs2 are the voltages of the auxiliary capacitors of subpixel SP1 and subpixel SP2
- Vic1 and Vlc2 are the voltages of the pixel electrodes of subpixel SP1 and subpixel SP2, respectively.
- AC drive such as frame inversion, line inversion, and dot inversion is performed so that the liquid crystal is not polarized.
- Vsp is given to the source voltage as positive polarity with respect to the median value Vsc of the source voltage at the nth frame, and it is applied at the next (n + 1) frame.
- Vsn is applied to the source voltage as the eggplant polarity, and dot inversion drive is performed for each frame as shown in Fig.16.
- CS1 and CS2 input a signal whose amplitude is amplified by the amplitude voltage Vad and the phases of CS1 and CS2 are shifted by 180 degrees.
- Vg changes from VgL to VgH
- the TFTs of both subpixels are turned on, and the subpixel SP1, subpixel SP2 and auxiliary capacitors CS1, CS2 are charged with the voltage Vsp.
- Vg changes from VgH to VgL
- the TFTs of both sub-pixels are turned off, and sub-pixel SP1, sub-pixel SP2 and auxiliary capacitors CS1, CS 2 are electrically isolated from the source bus line Is done.
- the bow I penetration voltage of Vdb and Vdd is generated in each of the subpixel S P 1 and subpixel SP2, and the voltage of each subpixel is
- Vcs ⁇ Vcom— Vad
- Vcs 2 Vcom + Vad
- Vlcl Vsp— Vdb + 2 water K water Vad
- Vlc2 Vsp— Vdd— 2 water K water Vad
- Vcsl changes from Vcom + Vad to Vcom—Vad
- Vcs2 changes from Vcom—Vad to Vcom + Vad.
- the subpixel voltages Vlcl and Vlc2 are
- Vlcl Vsp- Vdb
- Vlc2 Vsp-Vdd
- Vcsl changes from Vcom—Vad to Vcom + Vad
- Vcs2 changes from Vcom + Vad to Vcom—Vad.
- the subpixel voltages Vlcl and Vlc2 are
- Vlcl Vsp— Vdb + 2 water K water Vad
- Vlc2 Vsp— Vdd— 2 water K water Vad
- Vlcl Vsp- Vdb + K water Vad
- Vlc2 Vsp- Vdd K Water Vad
- V2 Vsp-Vdd-K * Vad-Vcom (3)
- the subpixel SP1 is a bright subpixel
- the subpixel SP2 is a vertical subpixel
- Vs is inverted to invert the polarity.
- Vg changes from VgL to VgH, the TFTs of both sub-pixels are turned on, and the auxiliary capacitors CS1 and CS2 are charged with the voltage Vsn.
- Vlcl Vsn— Vdb— 2 water K water Vad
- Vlc2 Vsn— Vdd + 2 water K water Vad
- Vcsl changes from Vcom—Vad to Vcom + Vad
- Vcs2 changes from Vcom + Vad to Vcom—Vad.
- the subpixel voltages Vlcl and Vlc2 are
- Vlcl Vsn -Vdb
- Vcsl changes from Vcom + Vad to Vcom—Vad
- Vcs2 changes from Vcom—Vad to Vcom + Vad.
- Vlc2 Vsn— Vdd + 2 water K water Vad
- Vlcl Vsn- Vdb K water Vad
- Vlc2 Vsn— Vdd + K water Vad
- Vl Vsn-Vdb-K * Vad-Vcom (4)
- V2 Vsn-Vdd + K * Vad-Vcom (5)
- the sub-pixel SPl is a bright sub-pixel and the sub-pixel SP2 is a vertical sub-pixel.
- Vldc Vsc-Vdb (6)
- V2dc Vsc-Vdd (7)
- Vsc is the median source voltage
- Vsc (Vsp + Vsn) / 2.
- the pull-in voltages Vdb and Vdd of the subpixel SP1 and the subpixel SP2 generated at time T2 will be described.
- the pull-in voltage is affected by the liquid crystal capacitance Clc (V) as shown in Eq. (1).
- Clc (V) the liquid crystal capacitance
- the voltage applied to the liquid crystal layer changes, the orientation direction of the liquid crystal molecules having dielectric anisotropy changes, so that Clc (V) changes.
- the time for VgH ( ⁇ ) is very short, about 10 ⁇ sec, whereas the response of the liquid crystal is on the order of msec, so the liquid crystal cannot complete the response within ⁇ ,
- the liquid crystal is almost not displaced from the state before T1.
- the subpixel SP1 is a bright subpixel and the subpixel SP2 is a vertical subpixel.
- Clcl (V)> Clc 2 (V) Therefore, Clcl (V)> Clc2 (V) also at time T2, and (1) Formula force Vdb ⁇ Vdd.
- the DC voltages VI dc and V2dc of the voltages applied to the pixel electrodes of the sub-pixel SP1 and the sub-pixel SP2 are such that (6) and (7) force are also Vide> V2dc.
- V2dc becomes Vcom
- the sub-pixel SP1 is continuously displayed as a bright sub-pixel and the sub-pixel SP2 is displayed as a sub-pixel
- the DC level of the drain voltage of the sub-pixel SP1 and the opposing level coincide with each other.
- the opposite level of the DC level of the drain voltage of pixel SP2 is shifted.
- Vlcl Vsp- Vdd K Water Vad
- Vlc2 Vsp- Vdb + K water Vad
- Vlcl Vsn- Vdd + K water Vad
- Vlc2 Vsn-Vdb-K * Vad
- Vldc Vsc-Vdd (8)
- V2dc Vsc-Vdb (9)
- sub-pixel SP1 is a sub-pixel and sub-pixel SP2 is a bright sub-pixel, so Vlcl is Vlc2, and the negative type liquid crystal has the same 1) ⁇ 1) 2). Therefore, even at time T2, Clc 1 (V) ⁇ Clc 2 (V), and (1) force Vdd> Vdb.
- the DC level of the drain voltage of subpixel SP2 and the counter level match, and the DC level of the drain voltage of subpixel SP1 The direction level does not match.
- the liquid crystal display device of this embodiment has substantially the same configuration as that of FIG. 17 described in the first embodiment, the details are omitted.
- the bright subpixel and the dark subpixel in the patterns A and B shown in FIG. 16 are switched by switching the polarity of the source signal.
- Figures 20 and 21 show the voltage waveforms of signals in pattern A and pattern B, respectively. The symbols and the like in the figure are the same as in the first embodiment.
- Vlcl Vsp- Vdb + K water Vad
- Vlc2 Vsp- Vdd K Water Vad
- Vlcl Vsn- Vdb K water Vad
- Vlc2 Vsn— Vdd + K water Vad
- sub-pixel SP1 is a bright sub-pixel and sub-pixel SP2 is a sub-pixel.
- Vlcl Vsn- Vdd + K water Vad
- Vlc2 Vsn-Vdb-K * Vad
- sub-pixel SP1 is a sub-pixel and sub-pixel SP2 is a bright sub-pixel.
- Vldc Vsc-Vdb
- V2dc Vsc-Vdd
- V2dc Vsc-Vdb
- the mode switching by inverting the polarity of the source can be performed using, for example, the luminance switching circuit 60 described with reference to FIGS.
- the polarity of the source signal is inverted for each frame for dot inversion driving.
- polarity inversion due to dot inversion does not occur only during pattern switching.
- pattern A and pattern B are not used in order not to reduce the effect of preventing flicking force by preventing DC application due to dot inversion. It is better not to switch frequently. Therefore, in this embodiment, the switching interval is set to be 30 minutes or more.
- the mode may be switched at the timing of the above-mentioned conditions B and C.
- the liquid crystal display device of the present embodiment is obtained by dividing one pixel into three sub-pixels. As in the equivalent circuit shown in Fig. 23, three subpixels are driven by one gate bus line and one source node line. As in the first and second embodiments, each subpixel changes the applied voltage according to the amplitude voltage of the CS bus line. When the number of sub-pixels is large, the viewing angle characteristics are improved, but there are also adverse effects such as a decrease in transmittance, so it may be appropriately selected according to the purpose of use.
- the luminance switching circuit 60C shown in FIG. 24 can be used.
- the luminance switching circuit 60C has basically the same configuration as the luminance switching circuit 60B shown in FIG. 15A, and the phase switching circuit 68 has polarity to three CS bus lines corresponding to the three subpixels. It differs in that it is configured to output two different types of CS signals CSA or CSB.
- phase switching circuit 68 switches whether CSA or CSB is output to CS1, CS2, and CS3, that is, pattern A, pattern B, and pattern C are switched.
- a trigger signal for switching is output and input to the signal generation circuit 62b.
- the CS signal is switched by the phase switching circuit 68 and the display is changed from pattern A to pattern B
- a signal is sent to the integrating circuit 64, the pattern A is counted by the integrating circuit 64, the counter is reset, and the pattern B is reset.
- the count of pattern B coincides with the set count, a signal is sent from integration circuit 64 to signal generation circuit 62b, and the brightness switching signal is stunned.
- the luminance switching signal is input to the phase switching circuit 68, the CS signal phase is switched, pattern C is displayed, and pattern B is simultaneously displayed. End the count, reset the counter, and start counting for C.
- the phase switching circuit 68 operates by the trigger signal input after the count reaches the set value, and switches to pattern A. At this time, the count of the turn C is completed, the counter is reset, and the pattern A count is started. By repeating this operation, the display time of pattern A, pattern B, and pattern C can be controlled to the set time. However, in order to achieve the viewing angle improvement effect by pixel division, it is necessary to switch between Pattern A, Pattern B, and Pattern C every 2 frames or more, so the setting count is 2 frames or more.
- FIG. 26 shows the voltage level of the drain of each subpixel and the voltage level of the counter electrode.
- the counter voltage is adjusted to the DC level of the drain voltage of the dark subpixel in order to reduce the area where DC application occurs.
- pattern A the opposition level is optimum for subpixel SP2 and subpixel SP3, and the opposition level is shifted in subpixel SP1, and application of a DC component occurs.
- pattern B the opposition level is optimum for the subpixel SP1 and the subpixel SP3, and the DC component is applied to the subpixel SP2.
- pattern C subpixel SP1 and subpixel S At P2, the optimum counter level is reached, and a DC component is applied at subpixel SP3.
- the method of setting the DC level and the counter level of the drain voltage of the sub-pixel is not limited to the above example, and may be set as shown in FIG.
- FIG. 27 shows the DC level of the drain voltage of each subpixel and the voltage level of the counter electrode.
- the difference in the DC level of the drain voltage of the bright subpixel and the dark subpixel is ⁇
- the DC level of the drain voltage of the bright subpixel is + 2 ⁇ 3 ⁇ with respect to the counter voltage
- the drainage of the ⁇ subpixel is Set the DC level of the IN voltage to 1Z3 AV with respect to the opposite level.
- pattern DC DC of + 2 ⁇ 3 ⁇ is applied to subpixel SP1, and 1 ⁇ 3 ⁇ V is applied to subpixel SP2 and subpixel SP3.
- pattern B + 2 ⁇ 3 ⁇ is applied to subpixel SP2, and DC of 1Z3 AV is applied to subpixel SP1 and subpixel SP3.
- pattern C + 2Z3 ⁇ is applied to subpixel SP3, and DC of 1Z3 AV is applied to subpixel SP1 and subpixel SP2.
- the application of the DC component can be canceled on a time average, and the DC application can be prevented.
- the DC voltage generated in the subpixels can be made almost zero by averaging. This makes it possible to improve the reliability of the liquid crystal display device.
- the present invention improves the display quality and reliability of a large-screen liquid crystal display device such as a liquid crystal television.
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- Crystallography & Structural Chemistry (AREA)
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- Nonlinear Science (AREA)
- Mathematical Physics (AREA)
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- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
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Abstract
Description
Claims
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP05800325A EP1818903A4 (en) | 2004-11-05 | 2005-11-04 | Liquid crystal display device and method for its activation |
US11/666,290 US8310424B2 (en) | 2004-11-05 | 2005-11-04 | Liquid crystal display apparatus and method for driving the same |
CN2005800379055A CN101053009B (zh) | 2004-11-05 | 2005-11-04 | 液晶显示装置及其驱动方法 |
JP2006542442A JP4642031B2 (ja) | 2004-11-05 | 2005-11-04 | 液晶表示装置およびその駆動方法 |
Applications Claiming Priority (2)
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JP2004-322876 | 2004-11-05 | ||
JP2004322876 | 2004-11-05 |
Publications (1)
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WO2006049245A1 true WO2006049245A1 (ja) | 2006-05-11 |
Family
ID=36319245
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PCT/JP2005/020290 WO2006049245A1 (ja) | 2004-11-05 | 2005-11-04 | 液晶表示装置およびその駆動方法 |
Country Status (6)
Country | Link |
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US (1) | US8310424B2 (ja) |
EP (1) | EP1818903A4 (ja) |
JP (2) | JP4642031B2 (ja) |
KR (1) | KR100869200B1 (ja) |
CN (1) | CN101053009B (ja) |
WO (1) | WO2006049245A1 (ja) |
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Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH07121144A (ja) * | 1993-10-20 | 1995-05-12 | Nec Corp | 液晶表示装置 |
JP2003295160A (ja) * | 2002-01-30 | 2003-10-15 | Sharp Corp | 液晶表示装置 |
JP2004062146A (ja) * | 2002-06-06 | 2004-02-26 | Sharp Corp | 液晶表示装置 |
JP2004078157A (ja) * | 2002-06-17 | 2004-03-11 | Sharp Corp | 液晶表示装置 |
JP2004302023A (ja) * | 2003-03-31 | 2004-10-28 | Fujitsu Display Technologies Corp | 画像処理方法及びそれを用いた液晶表示装置 |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3401049B2 (ja) | 1993-05-26 | 2003-04-28 | コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ | 階調液晶表示パネル |
KR100234402B1 (ko) | 1996-01-19 | 1999-12-15 | 윤종용 | 액정 표시 장치의 구동 방법 및 장치 |
US6310591B1 (en) | 1998-08-18 | 2001-10-30 | Texas Instruments Incorporated | Spatial-temporal multiplexing for high bit-depth resolution displays |
WO2001006309A1 (en) * | 1999-07-16 | 2001-01-25 | Koninklijke Philips Electronics N.V. | Liquid crystal display device |
US6801220B2 (en) * | 2001-01-26 | 2004-10-05 | International Business Machines Corporation | Method and apparatus for adjusting subpixel intensity values based upon luminance characteristics of the subpixels for improved viewing angle characteristics of liquid crystal displays |
KR100836986B1 (ko) | 2003-03-31 | 2008-06-10 | 샤프 가부시키가이샤 | 화상 처리 방법 및 그것을 이용한 액정 표시 장치 |
-
2005
- 2005-11-04 EP EP05800325A patent/EP1818903A4/en not_active Ceased
- 2005-11-04 WO PCT/JP2005/020290 patent/WO2006049245A1/ja active Application Filing
- 2005-11-04 JP JP2006542442A patent/JP4642031B2/ja not_active Expired - Fee Related
- 2005-11-04 KR KR1020077003091A patent/KR100869200B1/ko not_active IP Right Cessation
- 2005-11-04 US US11/666,290 patent/US8310424B2/en active Active
- 2005-11-04 CN CN2005800379055A patent/CN101053009B/zh not_active Expired - Fee Related
-
2010
- 2010-11-04 JP JP2010247913A patent/JP5129314B2/ja not_active Expired - Fee Related
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH07121144A (ja) * | 1993-10-20 | 1995-05-12 | Nec Corp | 液晶表示装置 |
JP2003295160A (ja) * | 2002-01-30 | 2003-10-15 | Sharp Corp | 液晶表示装置 |
JP2004062146A (ja) * | 2002-06-06 | 2004-02-26 | Sharp Corp | 液晶表示装置 |
JP2004078157A (ja) * | 2002-06-17 | 2004-03-11 | Sharp Corp | 液晶表示装置 |
JP2004302023A (ja) * | 2003-03-31 | 2004-10-28 | Fujitsu Display Technologies Corp | 画像処理方法及びそれを用いた液晶表示装置 |
Non-Patent Citations (1)
Title |
---|
See also references of EP1818903A4 * |
Cited By (39)
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US10102815B2 (en) | 2015-05-27 | 2018-10-16 | Apple Inc. | Electronic device display with charge accumulation tracker |
JP2016218466A (ja) * | 2016-08-05 | 2016-12-22 | 株式会社半導体エネルギー研究所 | 半導体装置 |
CN110505738A (zh) * | 2019-08-06 | 2019-11-26 | 江苏富联通讯技术有限公司 | 一种根据开关时间间隔调整灯具亮度的智能控制系统 |
CN112859331A (zh) * | 2021-02-26 | 2021-05-28 | 深圳市华星光电半导体显示技术有限公司 | 多畴垂直取向液晶显示面板的模拟方法 |
Also Published As
Publication number | Publication date |
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CN101053009A (zh) | 2007-10-10 |
CN101053009B (zh) | 2010-06-16 |
KR20070051264A (ko) | 2007-05-17 |
US20080158203A1 (en) | 2008-07-03 |
JP5129314B2 (ja) | 2013-01-30 |
US8310424B2 (en) | 2012-11-13 |
KR100869200B1 (ko) | 2008-11-18 |
EP1818903A4 (en) | 2009-06-03 |
EP1818903A1 (en) | 2007-08-15 |
JP4642031B2 (ja) | 2011-03-02 |
JP2011065176A (ja) | 2011-03-31 |
JPWO2006049245A1 (ja) | 2008-05-29 |
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