WO2006030723A1 - 半導体ウェーハの評価方法及び半導体ウェーハの評価装置 - Google Patents
半導体ウェーハの評価方法及び半導体ウェーハの評価装置 Download PDFInfo
- Publication number
- WO2006030723A1 WO2006030723A1 PCT/JP2005/016707 JP2005016707W WO2006030723A1 WO 2006030723 A1 WO2006030723 A1 WO 2006030723A1 JP 2005016707 W JP2005016707 W JP 2005016707W WO 2006030723 A1 WO2006030723 A1 WO 2006030723A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- semiconductor wafer
- wafer
- measured
- chuck
- soi
- Prior art date
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Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
- G01R31/2886—Features relating to contacting the IC under test, e.g. probe heads; chucks
- G01R31/2889—Interfaces, e.g. between probe and tester
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/10—Measuring as part of the manufacturing process
- H01L22/14—Measuring as part of the manufacturing process for electrical parameters, e.g. resistance, deep-levels, CV, diffusions by electrical means
Definitions
- the present invention relates to an evaluation method and an evaluation apparatus for measuring semiconductor electrical characteristics by measuring electrical characteristics of a semiconductor wafer, and more particularly, when evaluating a semiconductor wafer, a semiconductor is used.
- the present invention relates to a semiconductor wafer evaluation method and an evaluation apparatus capable of evaluating semiconductor wafers with high accuracy by improving a wafer chuck that holds a wafer and forms a mercury electrode. Background art
- Semiconductor wafers currently in use include, for example, silicon wafer, epoxy (EP), silicon on insulator (SOI) wafer, etc., and by forming a device on these wafers, a semiconductor device is formed. Manufactured. In recent years, miniaturization, high integration, high speed, high yield, etc. are required for semiconductor devices. Among them, it is said that the performance and yield of the formed semiconductor device reflect the quality of the wafer.
- the quality of a thermal oxide film formed by thermally oxidizing a semiconductor wafer which is one of the most important qualities in semiconductor wafers, depends on whether the oxide film formation conditions are good and the crystal quality of the surface of the semiconductor wafer. Etc. are reflected.
- the electrical characteristics of Metal Insulator Semiconductor (MIS) capacitors reflect the quality of the insulating film formed on the semiconductor wafer, especially the surface of the semiconductor wafer and the vicinity of the surface in addition to the quality of the insulating film itself. It also reflects the crystal quality. In the future, it will become increasingly important to provide high-quality semiconductor wafers so that the electrical characteristics of insulating films formed on semiconductor wafers can be evaluated with higher sensitivity and higher accuracy.
- Japanese Patent Application Laid-Open No. 2001-60676 or Japanese Patent Application Laid-Open No. 2001-267384 A method of piercing and contacting a needle-like probe as an electrode is disclosed.
- a needle-like probe there is a problem if the contact resistance increases because the tip of the needle is distorted or rubbing debris adheres to the object to be measured.
- the contact area between the wafer and the mercury electrode is reduced. It causes changes, and acts as a leak source or insulator depending on the type of impurities. As a result, the electrical conductivity becomes unstable, and the measured electrical characteristics may be abnormal.
- an object of the present invention is to evaluate a semiconductor wafer by measuring electrical characteristics of the semiconductor wafer using a silver silver electrode. By making the holding surface of the wafer chuck smaller than the surface of the semiconductor wafer to be measured, the semiconductor wafer can be evaluated with high accuracy and efficiency.
- the object of the present invention is to provide an evaluation apparatus and evaluation method.
- the semiconductor wafer evaluation method of the present invention is a method for evaluating a semiconductor wafer by measuring the electrical characteristics of the semiconductor wafer using a mercury electrode.
- a semiconductor wafer is held on a wafer chuck having a mercury electrode formed in the holding surface with the measured surface side of the wafer chuck side
- the diameter constituting the outermost periphery of the holding surface of the wafer chuck is It is smaller than the diameter constituting the outermost circumference of the surface to be measured of the semiconductor wafer, held on a wafer chuck, and the electrical characteristics are measured by bringing the mercury electrode into contact with the surface to be measured of the wafer.
- the diameter constituting the outermost periphery of the holding surface of the wafer chuck is set to a semiconductor wafer held by the wafer chuck.
- the diameter By making the diameter smaller than the diameter that forms the outermost circumference of the surface to be measured, the current leaking through the side surface of the semiconductor wafer to the opposite side (back side) can be suppressed, and a very small current of 10 A or less As a result, the electrical properties of semiconductor wafers can be determined accurately.
- the semiconductor wafer is an SOI wafer, and a MESA portion in which an SOI layer that provides the measurement surface is partially left is formed on the measurement surface side of the SOI wafer.
- the semiconductor wafer is an SOI wafer, and the MESA part in which the SOI layer of the SOI wafer is partially left is used, and the surface of the SOI layer of the MESA part is used as a measurement surface. Since the peripheral area of the surface to be measured can be a BOX film (buried acid film) that is an insulating film, the current leaking to the opposite side through the side surface of the semiconductor wafer can be further suppressed.
- the diameter constituting the outermost periphery of the holding surface of the wafer chuck is 0.5 times or more and less than 1.0 times the diameter constituting the outermost periphery of the surface to be measured of the semiconductor wafer. Is preferred.
- the diameter constituting the outermost circumference of the holding surface of the wafer chuck is set to be not less than 0.5 times and less than 1.0 times the diameter constituting the outermost circumference of the surface to be measured of the semiconductor wafer. It is possible to reliably suppress the current leaking to the opposite side (back side) through the side face.
- the relative humidity of the atmosphere When measuring the electrical characteristics of the semiconductor wafer, it is preferable to adjust the relative humidity of the atmosphere to less than 50%. Thus, when measuring the electrical characteristics of a semiconductor wafer, the current leaking to the opposite side through the side surface of the semiconductor wafer is further suppressed by making the relative humidity of the atmosphere less than 50%. be able to.
- the humidity of the room in which the measuring device is placed may be controlled by air conditioning so that the relative humidity of the room itself is less than 50%, or the measuring device is covered with a sealed box, for example.
- -It may be configured to blow dry air or nitrogen through a purifier near the hachach.
- the semiconductor wafer evaluation apparatus of the present invention is an apparatus for measuring a semiconductor wafer by measuring electrical characteristics of the semiconductor wafer using a mercury electrode, and at least the semiconductor wafer is evaluated.
- a wafer chuck that holds the measured surface side of the wafer chuck with a holding surface, and a probe part that forms a mercury electrode in the holding surface of the wafer chuck.
- the diameter constituting the outermost circumference of the holding surface is smaller than the diameter constituting the outermost circumference of the surface to be measured of the semiconductor wafer.
- the diameter constituting the outermost periphery of the holding surface of the wafer chuck is set to By reducing the diameter of the outer circumference of the measurement surface of the semiconductor wafer held by the wafer chuck, the current flowing through the semiconductor wafer side to the opposite side (back side) can be suppressed. can be, also enables measurements following micro current 10- 7 a, the binding As a result, the electrical property values of the semiconductor wafer can be accurately obtained.
- the diameter force constituting the outermost circumference of the holding surface of the wafer chuck must be 0.5 times or more and less than 1.0 times the diameter constituting the outermost circumference of the measured surface of the semiconductor wafer. preferable. In this way, by setting the diameter constituting the outermost periphery of the holding surface of the wafer chuck to be not less than 0.5 times and less than 1.0 times the diameter constituting the outermost circumference of the surface to be measured of the semiconductor wafer, It is possible to reliably suppress the current leaking to the opposite side (back side) through the side face.
- the diameter force that constitutes the outermost circumference of the holding surface of the wafer chuck If the diameter is less than 0.5 times the diameter that constitutes the outermost circumference of the measurement surface of the semiconductor wafer, the held semiconductor wafer may become unstable. On the other hand, if it becomes 1.0 times or more, the current leaking to the opposite side through the side surface of the semiconductor wafer cannot be suppressed.
- the semiconductor wafer is an SOI wafer, and a MESA portion is formed on the surface to be measured of the SOI wafer.
- the MESA portion is formed by partially leaving the SOI layer that provides the surface to be measured. I like it.
- the semiconductor wafer is an SOI wafer, and the SOI layer of the SOI wafer is left as a MESA part, and the surface of the SOI layer of the MESA part is used as the measurement surface. Since the region can be a BOX film that is an insulating film, the current leaking to the opposite side through the side surface of the semiconductor wafer can be more reliably suppressed.
- an air conditioner that includes at least a chamber that hermetically encloses the wafer chuck and the semiconductor wafer held by the wafer chuck, and controls the relative humidity of the atmosphere in the chamber to less than 50%. It is preferable that a machine is provided. As described above, the air conditioner is provided with the chamber that hermetically encloses the semiconductor wafer held by the wafer chuck and controls the relative humidity of the atmosphere in the chamber to less than 50%. When measuring the electrical characteristics of a semiconductor wafer, the current leaking to the opposite side through the side surface of the semiconductor wafer can be more reliably suppressed by making the relative humidity of the atmosphere less than 50%.
- the size of the wafer chuck is made smaller than the surface to be measured of the semiconductor wafer, it is opposite to the semiconductor wafer that is the object to be measured. can reduce the leakage current to the side, the lower measurement limit current value of the minute current region from 10- 7 Alpha to 10- U a It is possible to measure up to pA level. This improves the accuracy of Dit (interface state density), which also calculates the tilt force of the IV curve in the subthreshold region, and provides a more reliable and stable measurement result. It can also contribute to improving the quality of semiconductor wafers.
- Dit interface state density
- FIG. 1 is a schematic sectional view of an evaluation apparatus according to the present invention.
- FIG. 2 is a perspective view of the upper side of FIG. 1 along the A—A gland of FIG.
- FIG. 3 is an Id-Vg curve of an example.
- FIG. 5 is an Ig-Vg curve of Examples and Comparative Examples.
- FIG. 7 is a schematic cross-sectional view for explaining a Pseudo-MOSFET measurement method.
- FIG. 8 is an explanatory diagram of a method for calculating the interface state density from the Pdudo-MOSFET Id-Vg curve.
- Figure 7 illustrates the Pseudo-MOSFET measurement method using a mercury electrode disclosed in HJ Hovel, "bi film electrical characterization in Sul substrates by HgFE T technique", Solid-State Electronics, 47, 1311 (2003). It is a figure for doing.
- a metal electrode 3 is provided on the back surface of the base wafer 2 of the SOI wafer 1 to serve as a gate electrode, while a mercury electrode 6 serving as a source electrode and a drain electrode is provided on the surface of the SOI layer 5 on the BOX film 4. Touch.
- the interface between the SOI layer and ZBOX film is evaluated by measuring the current flowing between the source electrode and the drain electrode when the gate voltage is changed.
- the interface state density (Dit) is evaluated by plotting the drain current Id (A) when the gate voltage Vg (V) is changed on a log scale as shown in Fig. 8, and in the subthreshold region.
- the drain current is measured from several tens of pA for stable measurement. It must be possible.
- the present invention is that the lower limit of the drain current measurement is in the 1E-7A range due to leakage to the gate due to the wafer chuck, and accurate current measurement between the source electrode and the drain electrode cannot be performed. They paid attention and completed the present invention.
- the semiconductor wafer evaluation method includes a MESA structure (mesa structure) when a semiconductor wafer, particularly an SOI wafer 1, is subjected to Pseudo-MOS evaluation as shown in FIG. 1 and FIG.
- a wafer chuck 7 whose area is necessarily smaller than that of the MESA portion (silicon island) 5a where a part of the SOI layer 5 is left is used. That is, the SOI wafer 1 is placed and held on the wafer chuck 7 supported by the wafer chuck support portion 8 with the surface side of the MESA portion 5a facing the wafer chuck 7, and the holding surface of the wafer chuck 7 is held.
- a ring-shaped drain electrode and a silver electrode 6 serving as a source electrode located at the center of the ring-shaped drain electrode are formed inside, and a metal electrode is provided on the back surface of the base wafer 2 of the SOI wafer 1 to form a gate.
- the outermost periphery of the holding surface of the wafer chuck 7 is used. Is made smaller than the diameter constituting the outermost periphery of the surface (surface to be measured) of the MESA portion 5a of the SOI wafer 1.
- An evaluation apparatus for carrying out this evaluation method includes at least a wafer chuck 7 and a probe unit 9 for forming the mercury electrode 6.
- At least a chamber 10 that hermetically encloses the wafer chuck 7 and the SOI wafer 1 and an air conditioner 11 that can control the relative humidity of the atmosphere in the chamber 10 to less than 50% are provided.
- the MESA unit 5a or later of SOI wafer 1 is used.
- the outside is completely insulated by air, and leakage current to the gate side can be suppressed
- the MESA structure is fabricated, the SOI layer 5 around the mercury electrode 6 is removed, the BOX film 4 is exposed, and unnecessary current flowing on the surface of the SOI wafer 1 is eliminated.
- the SOI wafer 1 periphery is not in contact with the wafer chuck 7 and air is passed through to eliminate leaks from the SOI wafer 1 end force to the wafer chuck 7 and the periphery, thereby enabling stable measurement. .
- the diameter constituting the outermost circumference of the holding surface of the woofer chuck 7 should be not less than 0.5 times and less than 1.0 times the diameter constituting the outermost circumference of the surface of the MESA part 5a of the SOI wafer 1. Is more preferably 0.5 times or more and less than 0.98.
- an SOI wafer manufactured using a silicon single crystal wafer having a P-type, a diameter of 200 mm, and a crystal orientation of 100> was used.
- the dopant for this P-type wafer is boron.
- the SOI layer / BOX film thickness is about 100/145 nm.
- a 10 mm square sample was cut from this SO I wafer, and the SOI layer was etched with 5% TMAH (Tetra Methyl Ammonium Hydroxide) solution to produce a MESA structure. After that, after treatment with 1% HF for 1 minute, rinse with pure water, and then remove moisture with dry air. Left.
- TMAH Tetra Methyl Ammonium Hydroxide
- the present invention is not limited to the above embodiment.
- the above-described embodiment is merely an example, and has any configuration that has substantially the same configuration as the technical idea described in the claims of the present invention and that exhibits the same operational effects. Are also included in the technical idea of the present invention.
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- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
Abstract
Description
Claims
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2006535866A JP4379627B2 (ja) | 2004-09-13 | 2005-09-12 | 半導体ウェーハの評価方法及び半導体ウェーハの評価装置 |
EP05782361A EP1796157A4 (en) | 2004-09-13 | 2005-09-12 | METHOD AND DEVICE FOR EVALUATING A SEMICONDUCTOR WAFER |
US11/661,276 US7633305B2 (en) | 2004-09-13 | 2005-09-12 | Method for evaluating semiconductor wafer and apparatus for evaluating semiconductor wafer |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2004265800 | 2004-09-13 | ||
JP2004-265800 | 2004-09-13 |
Publications (1)
Publication Number | Publication Date |
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WO2006030723A1 true WO2006030723A1 (ja) | 2006-03-23 |
Family
ID=36059976
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/JP2005/016707 WO2006030723A1 (ja) | 2004-09-13 | 2005-09-12 | 半導体ウェーハの評価方法及び半導体ウェーハの評価装置 |
Country Status (4)
Country | Link |
---|---|
US (1) | US7633305B2 (ja) |
EP (1) | EP1796157A4 (ja) |
JP (1) | JP4379627B2 (ja) |
WO (1) | WO2006030723A1 (ja) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2007311564A (ja) * | 2006-05-18 | 2007-11-29 | Shin Etsu Handotai Co Ltd | 半導体基板の評価方法 |
JP2008016773A (ja) * | 2006-07-10 | 2008-01-24 | Shin Etsu Handotai Co Ltd | Soiウエーハの評価方法 |
JP2008300468A (ja) * | 2007-05-30 | 2008-12-11 | Sumco Corp | シリコンウェーハの評価方法およびシリコンウェーハの製造方法 |
JP2020113642A (ja) * | 2019-01-11 | 2020-07-27 | 株式会社Sumco | 高抵抗材料の抵抗率測定方法 |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
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KR102140789B1 (ko) * | 2014-02-17 | 2020-08-03 | 삼성전자주식회사 | 결정 품질 평가장치, 및 그것을 포함한 반도체 발광소자의 제조 장치 및 제조 방법 |
US11555791B2 (en) * | 2019-12-03 | 2023-01-17 | Corning Incorporated | Chamber for vibrational and environmental isolation of thin wafers |
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JP2008016773A (ja) * | 2006-07-10 | 2008-01-24 | Shin Etsu Handotai Co Ltd | Soiウエーハの評価方法 |
JP2008300468A (ja) * | 2007-05-30 | 2008-12-11 | Sumco Corp | シリコンウェーハの評価方法およびシリコンウェーハの製造方法 |
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Also Published As
Publication number | Publication date |
---|---|
US20070279080A1 (en) | 2007-12-06 |
EP1796157A4 (en) | 2010-10-06 |
JPWO2006030723A1 (ja) | 2008-05-15 |
EP1796157A1 (en) | 2007-06-13 |
JP4379627B2 (ja) | 2009-12-09 |
US7633305B2 (en) | 2009-12-15 |
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