WO2005081052A1 - 液晶表示装置 - Google Patents
液晶表示装置 Download PDFInfo
- Publication number
- WO2005081052A1 WO2005081052A1 PCT/JP2005/002650 JP2005002650W WO2005081052A1 WO 2005081052 A1 WO2005081052 A1 WO 2005081052A1 JP 2005002650 W JP2005002650 W JP 2005002650W WO 2005081052 A1 WO2005081052 A1 WO 2005081052A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- liquid crystal
- crystal display
- display device
- transition
- drive circuit
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3648—Control of matrices with row and column drivers using an active matrix
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1337—Surface-induced orientation of the liquid crystal molecules, e.g. by alignment layers
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
- G09G2330/02—Details of power systems and of start or stop of display operation
- G09G2330/026—Arrangements or methods related to booting a display
Definitions
- the present invention relates to a liquid crystal display device that uses an OCB (Optically Compensated Bend) liquid crystal display element to display an image.
- OCB Optically Compensated Bend
- a liquid crystal display device includes a liquid crystal display panel forming a matrix array of a plurality of OCB liquid crystal display elements.
- the liquid crystal display panel includes an array substrate in which a plurality of pixel electrodes are covered with an alignment film and arranged in a matrix, and a counter substrate in which a counter electrode is covered with an alignment film and arranged to face the plurality of pixel electrodes.
- a liquid crystal layer sandwiched between the array substrate and the opposing substrate substrate adjacent to each alignment film and further has a structure in which a pair of polarizing plates are attached to the array substrate and the opposing substrate via an optical retardation plate. (See, for example, JP-A-9-185032).
- each OCB liquid crystal display element forms a pixel within the range of the corresponding pixel electrode.
- a liquid crystal display device is connected to an image information processing unit serving as an external signal source.
- image information processing unit includes a microcomputer that performs image information processing, and a power supply that outputs a power supply voltage to the microcomputer and the liquid crystal display device.
- the output of the power supply voltage is performed at T2 after the power supply switch is turned on at T1 and the power supply unit is stabilized.
- the microcomputer starts image information processing at T3, which is a fixed time after T2, and supplies a synchronization signal and a display signal obtained at T4 to the liquid crystal display device as a result of the image information processing.
- the liquid crystal display device is provided with a drive circuit for driving a plurality of OCB liquid crystal display elements.
- this drive circuit outputs a synchronization signal from the image information processing unit. It is also used as a clock signal required for applying a transition voltage. Specifically, the application of the transition voltage is started at T4 when this clock signal is supplied from the image information processing unit, and the transition voltage application period is measured based on this clock signal.
- the drive circuit drives the plurality of OCB LCDs using the synchronization signal and the display signal, and causes these OCB LCDs to display an image corresponding to the display signal.
- T1-T5 setup time of 2 or 3 seconds
- An object of the present invention is to provide a liquid crystal display device which can solve the above-mentioned problem and can shorten a setup time required until an image is displayed.
- a liquid crystal display element portion is initialized such that an alignment state of liquid crystal molecules is changed from a splay alignment to a bend alignment capable of displaying an image, and the liquid crystal molecules are initialized upon initialization.
- a drive circuit that applies a transition voltage for changing the alignment state from the splay alignment to the bend alignment to the liquid crystal display element portion, and a clock signal output to the drive circuit as a reference for starting application of the transfer voltage and measuring an application period.
- a liquid crystal display device comprising: a clock signal generator that is generated when power is supplied to a drive circuit.
- FIG. 1 is a diagram schematically showing a circuit configuration of a liquid crystal display device according to one embodiment of the present invention.
- FIG. 2 is a view showing a partial cross-sectional structure of the liquid crystal display panel shown in FIG. 1.
- FIG. 3 is a diagram showing a circuit configuration of an OCB liquid crystal display element which performs display for one pixel by the cross-sectional structure shown in FIG.
- FIG. 4 shows an alignment state of liquid crystal molecules which transition from splay alignment to bend alignment by a transition voltage applied as a liquid crystal application voltage in the OCB liquid crystal display device shown in FIG. FIG.
- FIG. 5 is a waveform chart for explaining the operation of the liquid crystal display device shown in FIG. 1.
- FIG. 6 is a diagram for explaining a setup time of the liquid crystal display device shown in FIG. 1.
- FIG. 7 is a diagram for explaining a setup time of a conventional liquid crystal display device. BEST MODE FOR CARRYING OUT THE INVENTION
- FIG. 1 schematically shows a circuit configuration of the liquid crystal display device 100
- FIG. 2 shows a partial cross-sectional structure of a liquid crystal display (LCD) panel 41 shown in FIG. 1
- FIG. 1 shows a circuit configuration of an OCB liquid crystal display element 6 which performs display of one pixel by a cross-sectional structure.
- LCD liquid crystal display
- the liquid crystal display device 100 is connected to an image information processing unit SG serving as an external signal source in, for example, a TV set or a mobile phone.
- the image information processing unit SG includes a microcomputer that performs image information processing and a power supply that outputs a power supply voltage to the microcomputer and the liquid crystal display device 100.
- the output of the power supply voltage is performed after the power supply switch PW provided on the image information processing unit SG is turned on and the power supply unit is stabilized.
- the microcomputer starts image information processing after a certain period of time, and supplies a synchronization signal and a display signal obtained as a result of the image information processing to the liquid crystal display device 100.
- the liquid crystal display device 100 includes an LCD panel 41 constituting a matrix array (liquid crystal display element portion) of a plurality of OCB liquid crystal display elements 6, a backlight BL illuminating the LCD panel 41, and an LCD panel 41 and a backlight BL. And a driving circuit DR for driving the driving circuit.
- the LCD panel 41 includes an array substrate AR, a counter substrate CT, and a liquid crystal layer LQ.
- the array substrate AR includes a transparent insulating substrate GL having a glass plate, a plurality of pixel electrodes 15 formed on the transparent insulating substrate GL, and an alignment film AL covering the pixel electrodes 15.
- the counter substrate CT is composed of a transparent insulating substrate GL which becomes a glass plate, a color filter layer CF formed on the transparent insulating substrate GL, a counter electrode 16 formed on the color filter layer CF, and the counter electrode 16.
- the liquid crystal layer LQ is obtained by filling the gap between the counter substrate CT and the array substrate AR with liquid crystal.
- Color filter layer CF is a red coloring layer for red pixels, green Includes a green coloring layer for elementary colors, a blue coloring layer for blue pixels, and a black coloring (light shielding) layer for black matrix.
- the LCD panel 41 includes a pair of retardation plates RT disposed outside the array substrate AR and the counter substrate CT, and a pair of polarizing plates PL disposed outside these retardation plates RT.
- the knock light BL is arranged outside the polarizing plate PL on the array substrate AR side as a light source.
- the alignment film AL on the array substrate AR and the alignment film AL on the counter substrate CT are rubbed in parallel with each other.
- a plurality of pixel electrodes 15 are arranged in a substantially matrix on the transparent insulating substrate GL. Also, a plurality of gate lines 29 (Y1 to Ym) are arranged along the rows of the plurality of pixel electrodes 15, and a plurality of source lines 26 (XI to Xn) are arranged along the columns of the plurality of pixel electrodes 15. You. A plurality of pixel switches 27 are arranged near the intersection of the gate line 29 and the source line 26. Each pixel switch 27 is driven by a corresponding thin film transistor having a gate 28 connected to a gate line 29 and a source-drain path connected between the source line 26 and the pixel electrode 15, for example. Is conducted between the corresponding source line 26 and the corresponding pixel electrode 15.
- Each of the plurality of liquid crystal display elements 6 has a liquid crystal capacitance Clc between the pixel electrode 15 and the counter electrode 16.
- Each of the plurality of auxiliary capacitance lines Cst (C1 ⁇ Cm) is capacitively coupled to the pixel electrode 15 of the liquid crystal display element 6 in the corresponding row to form an auxiliary capacitance Cs.
- the drive circuit DR is configured to control the transmittance of the LCD panel 41 by a liquid crystal application voltage applied from the array substrate AR and the counter substrate CT to the liquid crystal layer LQ.
- Each OCB liquid crystal display element 6 forms a pixel in the range of the corresponding pixel electrode 15.
- the drive circuit DR initializes the liquid crystal molecules from the spray alignment to the bend alignment by applying the transition voltage to the liquid crystal layer LQ as the liquid crystal application voltage every time the power switch PW is turned on. It is composed of
- the driving circuit DR forces a gate driver 39 that sequentially drives a plurality of gate lines 29 so as to conduct a plurality of switching elements 27 in units of rows.
- the pixel voltage Vs is set to a Source driver 38, which outputs to the counter line 26, the counter electrode driver 40, which drives the counter electrode 16 of the LCD panel 41, the backlight driver 9, which drives the knock light BL, the gate driver 39, the source driver 38, the counter electrode
- the gate driver 39, the source driver 38, and the controller 37 that control the electrode driver 40, the backlight driver 9, and the power (specifically, the power supply voltage) supplied to the image information processing unit SG power drive circuit DR.
- a power supply circuit 7 for generating a plurality of internal power supply voltages required for the controller 37.
- the controller 37 outputs a vertical timing control signal generated based on the synchronization signal to which the image information processing unit SG is also input to the gate driver 39, and outputs the synchronization signal to which the image information processing unit SG is input. And outputs a horizontal timing control signal generated based on the display signal and pixel data for one horizontal line to the source driver 38, and further outputs a lighting control signal to the backlight driver 9.
- the gate driver 39 selects a plurality of gate lines 29 sequentially in one frame period under the control of the vertical timing control signal, and applies a gate drive voltage to the pixel switches 27 of each row for one horizontal scanning period H to the selected gate line 29. Output.
- the source driver 38 converts the pixel data for one horizontal line into the pixel voltage Vs during one horizontal scanning period H when the gate drive voltage is output to the selection gate line 29 under the control of the horizontal timing control signal. Are output in parallel.
- the pixel voltage Vs is a voltage applied to the pixel electrode 15 with reference to a common voltage VCOM output from the common electrode driver 40 to the common electrode 16.
- the pixel voltage Vs performs frame inversion driving and line inversion driving.
- the polarity is inverted with respect to the common voltage VCOM.
- the controller 37 of the drive circuit DR uses each liquid crystal display element as a liquid crystal application voltage with a transition voltage for changing the alignment state of liquid crystal molecules from spray alignment to bend alignment as shown in FIG. 6 is provided with a transition voltage setting unit 1 for performing a transition voltage setting process for applying the voltage to the control unit 6.
- the transition voltage is such that the potential of the common electrode 16 determined by the common voltage VCOM output from the common electrode driver 40 is higher than the potential of the pixel electrode 15 determined by the pixel voltage Vs output from the source driver 38. It is set to shift in a predetermined format.
- the clock signal generator 2 supplies a clock signal to the transition voltage setting unit 1 in accordance with power supply to the power supply circuit 7 of the drive circuit DR. It is provided for.
- This clock signal is used as a reference for starting the application of the transition voltage in the transition voltage setting process performed by the transition voltage setting unit 1 and measuring the application period of the transition voltage.
- the clock signal generator 2 operates with the power (that is, the power supply voltage) from the image information processing unit SG, but may be configured to operate with the internal power supply voltage generated by the power supply circuit 7! ⁇ .
- the liquid crystal display device 100 operates as shown in FIG. 5 by the power supply voltage supplied to the drive circuit DR also in the image information processing unit SG.
- the power supply circuit 7 converts the power supply voltage into a plurality of internal power supply voltages and supplies the plurality of internal power supply voltages to the controller 37, the source driver 38, the gate driver 39, the counter electrode driver 40, the backlight driver 9, and the like.
- the clock signal generator 2 supplies a clock signal to the transition voltage setting unit 1 of the controller 37 in response to the power supply voltage supplied to the drive circuit DR.
- the response time of the clock signal generator 2, that is, the supply power of the power supply voltage is approximately 0.08 seconds or less until the clock signal is generated.
- the transition voltage setting section 1 performs a transition voltage setting process, and applies the transition timing voltage of the clock signal to each liquid crystal display element 6 as a liquid crystal application voltage.
- the transition voltage application period is divided into a reset period RP of approximately 0.4 seconds and a transition period TP of approximately 0.6 seconds following the reset period RP.
- the transition voltage is maintained at a constant value that adjusts the alignment state of the liquid crystal molecules during the reset period RP, and alternately changes the alignment state of the liquid crystal molecules to a value of a different polarity that substantially transitions from the splay alignment to the bend alignment during the transition period TP. I do.
- the constant value LO is substantially zero volts and the value of the different polarity is absolutely about 25 volts.
- the transition period TP is further divided into a first half transition period TP1 and a second half transition period TP2, each of which is about 0.3 second, and the transition voltage is changed to the first polarity value L1 which is positive in the first half transition period TP1. It is set to the second polarity value L2 which is a negative polarity in the latter half transition period TP2.
- the pixel voltage Vs is fixed, and the common voltage VCOM output from the counter electrode dryer 40 is varied so as to obtain the above-described transition voltage.
- the transition voltage setting section 1 confirms the elapse of the reset period RP and the transition period TP by counting the clock signal, the transition voltage setting process ends. At the end of this, about 1.08 seconds have elapsed since the supply of the power supply voltage to the drive circuit DR.
- the controller 37 outputs from the counter electrode driver 40.
- the source driver 38, the gate driver 39, and the counter electrode driver 40 apply a liquid crystal applied voltage obtained by fixing the common voltage VCOM to be applied and changing the pixel voltage Vs according to the pixel data to each liquid crystal display element 6.
- the controller 37 controls the backlight drive unit 9 so that the knock light BL is kept turned off during the transition voltage application period (reset period RP + transition period TP), and the backlight BL is turned on during the display period DP. .
- the matrix array of the plurality of liquid crystal display elements 6 can display an image.
- the above-described operation ends when the supply of the power supply voltage to the drive circuit DR is stopped, and is similarly repeated when the power supply voltage is supplied again.
- FIG. 6 shows a setup time of the liquid crystal display device 100.
- the user of the TV set, mobile phone, etc. operates the power switch PW on the image information processing unit SG to turn on the power and waits for the setup time until the image display.
- the image information processing unit SG waits until its power supply section is stabilized after the power switch PW is turned on at T1 as before, and then supplies the power supply voltage to the drive circuit of the liquid crystal display device 100 at T2.
- Output to DR With the supply of the power supply voltage, the clock generator 2 supplies a clock signal to the transition voltage setting unit 1 at T6 earlier than T4 shown in FIG. Therefore, the transition to the bend orientation is completed at T7 earlier than T5 shown in FIG.
- the supply of the clock signal from the clock signal generator 2 is started immediately after the supply of power to the drive circuit DR, so that the start of the application of the transition voltage is earlier than before. Therefore, the setup time required until the image is displayed can be reduced. Therefore, after operating the power switch PW, the user can use the TV set, mobile phone, and the like more quickly than before.
- the backlight BL is kept off during the transition voltage application period, it is possible to prevent unnecessary light from leaking from the LCD panel 41.
- the present invention is not limited to the above-described embodiment, and can be variously modified without departing from the gist thereof.
- the transition period TP is divided into the first half transition period TP1 and the second half transition period TP2, and the transition voltages are set to different polarities in the first half transition period TP1 and the second half transition period TP2.
- To a DC value with one of the positive and negative polarities By setting, the alignment state of liquid crystal molecules is changed from splay alignment to bend alignment.
- first half transition period TP1 and the second half transition period TP2 are set to the same length, but these lengths can be arbitrarily changed. For example, if the length of the second half transition period TP2 is limited to about 70% of the first half transition period TP1, the effect of reducing the frit force can be obtained.
- the transition voltage application period is divided into a reset period RP and a transition period TP, and the transition voltage is set to a constant value in order to adjust the alignment state of the liquid crystal molecules.
- this reset period RP is not provided.
- the transition voltage application period may be composed only of the transition period TP, which substantially changes the alignment state of the liquid crystal molecules from the splay alignment to the bend alignment! / ⁇ .
- the clock signal generator 2 is disposed in the liquid crystal module including the LCD panel 41 serving as the liquid crystal display element section and the drive circuit DR, but is independently provided along with the supply of the power supply voltage to the drive circuit DR. If the configuration is such that the clock signal is supplied to the transition voltage setting unit 1 of the drive circuit DR, it may be arranged in the image information processing unit SG. Further, the clock signal generator 2 may include a detector that detects supply of a power supply voltage to the drive circuit DR in order to start generation of a clock signal.
- the present invention can be applied to a liquid crystal display device using an OCB liquid crystal display element for displaying an image.
Landscapes
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Crystallography & Structural Chemistry (AREA)
- Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Chemical & Material Sciences (AREA)
- Computer Hardware Design (AREA)
- Theoretical Computer Science (AREA)
- Mathematical Physics (AREA)
- Optics & Photonics (AREA)
- Spectroscopy & Molecular Physics (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Liquid Crystal (AREA)
- Liquid Crystal Display Device Control (AREA)
Description
Claims
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2006519354A JP4528774B2 (ja) | 2004-02-20 | 2005-02-18 | 液晶表示装置 |
CNB2005800004232A CN100422801C (zh) | 2004-02-20 | 2005-02-18 | 液晶显示装置 |
KR1020057024716A KR100749358B1 (ko) | 2004-02-20 | 2005-02-18 | 액정 표시 장치 |
US11/505,890 US8068075B2 (en) | 2004-02-20 | 2006-08-18 | Liquid crystal display device |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2004045209 | 2004-02-20 | ||
JP2004-045209 | 2004-02-20 |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US11/505,890 Continuation US8068075B2 (en) | 2004-02-20 | 2006-08-18 | Liquid crystal display device |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2005081052A1 true WO2005081052A1 (ja) | 2005-09-01 |
Family
ID=34879379
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/JP2005/002650 WO2005081052A1 (ja) | 2004-02-20 | 2005-02-18 | 液晶表示装置 |
Country Status (6)
Country | Link |
---|---|
US (1) | US8068075B2 (ja) |
JP (1) | JP4528774B2 (ja) |
KR (1) | KR100749358B1 (ja) |
CN (1) | CN100422801C (ja) |
TW (1) | TWI300865B (ja) |
WO (1) | WO2005081052A1 (ja) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100866603B1 (ko) * | 2007-01-03 | 2008-11-03 | 삼성전자주식회사 | 디시리얼라이징과 시리얼라이징을 수행하는 데이터 처리 방법 및 데이터 처리 장치 |
JP2009098652A (ja) * | 2007-09-26 | 2009-05-07 | Toshiba Matsushita Display Technology Co Ltd | 液晶表示装置 |
KR101577223B1 (ko) * | 2009-06-03 | 2015-12-15 | 엘지디스플레이 주식회사 | 액정 표시장치 |
TWI423242B (zh) * | 2011-03-01 | 2014-01-11 | Innolux Corp | 影像顯示系統與方法 |
KR20120109241A (ko) * | 2011-03-28 | 2012-10-08 | 삼성디스플레이 주식회사 | 셔터 안경의 구동 방법 및 이를 수행하기 위한 표시 시스템 |
TWI455099B (zh) * | 2012-03-29 | 2014-10-01 | Ili Technology Corp | Drive circuit, backlight driver and backlight drive method |
KR20200110489A (ko) | 2019-03-13 | 2020-09-24 | 삼성디스플레이 주식회사 | 플렉시블 표시 장치와 그를 포함한 증강 현실 제공 장치 |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2002303849A (ja) * | 2000-11-10 | 2002-10-18 | Samsung Electronics Co Ltd | 液晶表示装置及びその駆動装置と方法 |
JP2003202546A (ja) * | 2001-12-27 | 2003-07-18 | Lg Philips Lcd Co Ltd | 液晶表示装置の駆動方法及び装置 |
JP2004361616A (ja) * | 2003-06-04 | 2004-12-24 | Matsushita Electric Ind Co Ltd | 液晶表示装置 |
Family Cites Families (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100526030B1 (ko) * | 1998-09-03 | 2005-11-08 | 마쯔시다덴기산교 가부시키가이샤 | 액정표시장치 및 그 제조방법, 및 액정표시장치의 구동방법 |
US6392620B1 (en) * | 1998-11-06 | 2002-05-21 | Canon Kabushiki Kaisha | Display apparatus having a full-color display |
EP1148375A4 (en) * | 1999-10-19 | 2005-08-17 | Matsushita Electric Ind Co Ltd | CONTROL TECHNIQUE FOR STARTING A LIQUID CRYSTAL APPARATUS |
EP1113412B1 (en) | 1999-12-27 | 2014-05-21 | Japan Display Inc. | Liquid crystal display apparatus and method for driving the same |
TW527508B (en) | 2000-02-10 | 2003-04-11 | Matsushita Electric Ind Co Ltd | Liquid crystal display device and producing method |
US7088322B2 (en) * | 2000-05-12 | 2006-08-08 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device |
JP4746735B2 (ja) * | 2000-07-14 | 2011-08-10 | パナソニック株式会社 | 液晶表示装置の駆動方法 |
JP2002107695A (ja) * | 2000-09-27 | 2002-04-10 | Matsushita Electric Ind Co Ltd | 液晶表示装置 |
JP4210040B2 (ja) * | 2001-03-26 | 2009-01-14 | パナソニック株式会社 | 画像表示装置および方法 |
JP3967577B2 (ja) | 2001-10-19 | 2007-08-29 | 東芝松下ディスプレイテクノロジー株式会社 | 液晶パネルの駆動方法および液晶表示装置 |
JP4121352B2 (ja) * | 2001-10-23 | 2008-07-23 | 松下電器産業株式会社 | 液晶表示装置およびその駆動方法 |
WO2003036379A1 (fr) * | 2001-10-23 | 2003-05-01 | Matsushita Electric Industrial Co., Ltd. | Appareil d'affichage a cristaux liquides et procede de commande de celui-ci |
KR100883270B1 (ko) * | 2002-08-08 | 2009-02-10 | 엘지디스플레이 주식회사 | 액정표시장치 및 그 구동방법 |
JP4163081B2 (ja) * | 2003-09-22 | 2008-10-08 | アルプス電気株式会社 | 液晶表示装置の駆動方法及び液晶表示装置 |
-
2005
- 2005-02-18 KR KR1020057024716A patent/KR100749358B1/ko not_active IP Right Cessation
- 2005-02-18 CN CNB2005800004232A patent/CN100422801C/zh not_active Expired - Fee Related
- 2005-02-18 JP JP2006519354A patent/JP4528774B2/ja active Active
- 2005-02-18 WO PCT/JP2005/002650 patent/WO2005081052A1/ja active Application Filing
- 2005-02-21 TW TW094105096A patent/TWI300865B/zh not_active IP Right Cessation
-
2006
- 2006-08-18 US US11/505,890 patent/US8068075B2/en not_active Expired - Fee Related
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2002303849A (ja) * | 2000-11-10 | 2002-10-18 | Samsung Electronics Co Ltd | 液晶表示装置及びその駆動装置と方法 |
JP2003202546A (ja) * | 2001-12-27 | 2003-07-18 | Lg Philips Lcd Co Ltd | 液晶表示装置の駆動方法及び装置 |
JP2004361616A (ja) * | 2003-06-04 | 2004-12-24 | Matsushita Electric Ind Co Ltd | 液晶表示装置 |
Also Published As
Publication number | Publication date |
---|---|
TWI300865B (en) | 2008-09-11 |
JPWO2005081052A1 (ja) | 2007-10-25 |
JP4528774B2 (ja) | 2010-08-18 |
KR100749358B1 (ko) | 2007-08-16 |
KR20060037274A (ko) | 2006-05-03 |
US8068075B2 (en) | 2011-11-29 |
CN100422801C (zh) | 2008-10-01 |
CN1788228A (zh) | 2006-06-14 |
US20060274017A1 (en) | 2006-12-07 |
TW200540502A (en) | 2005-12-16 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP4528775B2 (ja) | 液晶表示装置 | |
US8441424B2 (en) | Liquid crystal display device and method of driving the same | |
JP4528774B2 (ja) | 液晶表示装置 | |
WO2005081053A1 (ja) | 液晶表示装置 | |
WO2017134967A1 (ja) | 表示装置、電子機器および投射型表示装置 | |
US7817128B2 (en) | Liquid crystal display device and driving circuit for liquid crystal panel with a memory effect | |
KR101385202B1 (ko) | 액정표시장치 및 이의 구동방법 | |
US7733322B2 (en) | Liquid crystal display device and driving method of the same | |
WO2016208321A1 (ja) | 制御回路、表示装置、電子機器および投射型表示装置 | |
JP2007256488A (ja) | 液晶表示装置 | |
JP2010152157A (ja) | 液晶表示装置 | |
JP2007256793A (ja) | 液晶表示装置 | |
JP2007127785A (ja) | 光源駆動装置 | |
US8400387B2 (en) | Liquid crystal display device | |
KR101169050B1 (ko) | 액정 표시 장치 및 그의 구동 방법 | |
KR100670143B1 (ko) | 액정 표시 장치의 구동방법 | |
WO2009119882A1 (ja) | 強誘電性液晶パネルの駆動方法及び液晶表示装置 | |
WO2006095437A1 (ja) | 液晶表示装置の駆動方法及び液晶表示装置 | |
JPWO2005122126A1 (ja) | 液晶表示装置及びその駆動方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
WWE | Wipo information: entry into national phase |
Ref document number: 2006519354 Country of ref document: JP |
|
AK | Designated states |
Kind code of ref document: A1 Designated state(s): AE AG AL AM AT AU AZ BA BB BG BR BW BY BZ CA CH CN CO CR CU CZ DE DK DM DZ EC EE EG ES FI GB GD GE GH GM HR HU ID IL IN IS JP KE KG KP KR KZ LC LK LR LS LT LU LV MA MD MG MK MN MW MX MZ NA NI NO NZ OM PG PH PL PT RO RU SC SD SE SG SK SL SY TJ TM TN TR TT TZ UA UG US UZ VC VN YU ZA ZM ZW |
|
AL | Designated countries for regional patents |
Kind code of ref document: A1 Designated state(s): GM KE LS MW MZ NA SD SL SZ TZ UG ZM ZW AM AZ BY KG KZ MD RU TJ TM AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IS IT LT LU MC NL PL PT RO SE SI SK TR BF BJ CF CG CI CM GA GN GQ GW ML MR NE SN TD TG |
|
121 | Ep: the epo has been informed by wipo that ep was designated in this application | ||
WWE | Wipo information: entry into national phase |
Ref document number: 1020057024716 Country of ref document: KR |
|
WWE | Wipo information: entry into national phase |
Ref document number: 20058004232 Country of ref document: CN |
|
WWP | Wipo information: published in national office |
Ref document number: 1020057024716 Country of ref document: KR |
|
WWE | Wipo information: entry into national phase |
Ref document number: 11505890 Country of ref document: US |
|
NENP | Non-entry into the national phase |
Ref country code: DE |
|
WWW | Wipo information: withdrawn in national office |
Country of ref document: DE |
|
WWP | Wipo information: published in national office |
Ref document number: 11505890 Country of ref document: US |
|
122 | Ep: pct application non-entry in european phase |