Classifications

• • G—PHYSICS
  • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
  • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
  • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
  • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
  • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
  • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
  • G09G3/3611—Control of matrices with row and column drivers
  • G09G3/3685—Details of drivers for data electrodes
  • G09G3/3688—Details of drivers for data electrodes suitable for active matrices only
• • G—PHYSICS
  • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
  • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
  • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
  • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
  • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
  • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
• • G—PHYSICS
  • G02—OPTICS
  • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
  • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
  • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
  • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
  • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
• • G—PHYSICS
  • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
  • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
  • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
  • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
• • G—PHYSICS
  • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
  • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
  • G09G2310/00—Command of the display device
  • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
  • G09G2310/0202—Addressing of scan or signal lines
  • G09G2310/0218—Addressing of scan or signal lines with collection of electrodes in groups for n-dimensional addressing
• • G—PHYSICS
  • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
  • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
  • G09G2310/00—Command of the display device
  • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
  • G09G2310/0232—Special driving of display border areas
• • G—PHYSICS
  • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
  • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
  • G09G2310/00—Command of the display device
  • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
  • G09G2310/0264—Details of driving circuits
  • G09G2310/027—Details of drivers for data electrodes, the drivers handling digital grey scale data, e.g. use of D/A converters
• • G—PHYSICS
  • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
  • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
  • G09G2310/00—Command of the display device
  • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
  • G09G2310/0264—Details of driving circuits
  • G09G2310/0297—Special arrangements with multiplexing or demultiplexing of display data in the drivers for data electrodes, in a pre-processing circuitry delivering display data to said drivers or in the matrix panel, e.g. multiplexing plural data signals to one D/A converter or demultiplexing the D/A converter output to multiple columns

Definitions

• Driving device driving method and display panel driving system
• the present invention relates to an active matrix display panel, and more particularly, to a driving device, a driving method, and a display panel driving system that are commonly used for display panels of various display formats.
• an active matrix type display panel for example, a liquid crystal panel
• the number of pixels tends to increase with higher definition.
• dot-sequential driving in which a video signal is written one pixel at a time leads to a short writing time. Therefore, a plurality of video signal input lines for supplying a video signal from the outside to the liquid crystal panel are used.
• a multiple pixel simultaneous sampling method is adopted in which video signals supplied from the plurality of video signal input lines are simultaneously sampled and supplied to a plurality of pixels.
• a relatively high-resolution active matrix type such as XGA (extended graphic array: 1024 x 768), WXGA (wide extended graphic array: 1386 x 768), and SXGA (super extended graphic array: 1400 x 1500).
• Display panels, and high-definition pixels such as SXGA + (Super extended Graphic Array PLUS: 1400 X 1050), UXGA (Ultra extended Graphic Array: 1600 X 1200), and Full HD (Full High Definition: 1920 X 1080)
• video signals can be written well by adopting a multiple pixel simultaneous sampling method.
• FIGS. 1 and 2 a description will be given of a multiple pixel simultaneous sampling method for driving a liquid crystal panel.
• Figure 1 shows a liquid crystal panel drive system that is mounted on a liquid crystal projector and has liquid crystal panels 60R, 60B, and 60G, which are liquid crystal panels for red, green, and blue, respectively, which are driven by a multiple pixel simultaneous sampling method. It is.
• Each of the liquid crystal panels 60R, 60G, and 60B included in the liquid crystal panel drive system 50 is a liquid crystal panel compatible with the XGA format, and simultaneously writes six video signals to horizontal pixels by a multiple pixel simultaneous sampling method. I will go.
• the LCD panel drive system 50 performs gamma correction and color correction on the externally supplied digital video signal for red (R), digital video signal for green (G), and digital video signal for blue (B).
• a DSD (Digital Signal Driver) 51 having a DSD core 51a that performs unevenness correction, etc., and an LCD that converts the digital video signal corrected by the DSD 51 to an analog video signal and supplies it to each liquid crystal panel 60R, 60B, 60G Drivers 52, 53 and 54 are provided.
• Each of the liquid crystal panels 60R, 60B, and 60G is mounted on a liquid crystal panel module 61R, 61G, and 61B together with a horizontal drive circuit and a vertical drive circuit (not shown).
• the LCD drivers 51, 52, and 53 convert the digital video signal supplied from the DSD 51 into a number of analog video signals corresponding to the number of samples to be simultaneously sampled.
• the number of simultaneous sampling is set to 6 pixels, so the LCD drivers 52, 53, and 54 convert the supplied digital video signals into 6 parallel analog video signals. Convert to a signal.
• the timing pulse for driving each of the liquid crystal panels 60R, 60G, and 60B is generated by a TG (Timing Generator) 51b of the DSD 51.
• the simultaneous sampling method of a plurality of pixels will be described in detail using the liquid crystal panel module 61R shown in FIG.
• the simultaneous sampling method for a plurality of pixels in the liquid crystal panels 61R, 61G, and 61B is completely the same, and therefore, the liquid crystal panel module 61R equipped with the liquid crystal panel 60R will be described as a representative.
• the liquid crystal panel module 61R converts the video signals supplied via the video signal supply lines VSIG1 and VSIG6 into six signal lines 63 of the liquid crystal panel 60R.
• 63 has a sampling switch group SW composed of six sampling switches for sampling simultaneously.
• the sampling switch group SW is connected to the switch pulse supplied from the horizontal drive circuit 62.
• the number of pixels to be simultaneously sampled needs to be increased as the resolution of the liquid crystal panel increases, taking into account the transistor characteristics and switch characteristics of the liquid crystal panel, since it is necessary to secure a sufficient time for writing the video signal.
• SXGA requires the number of simultaneous samplings to be 12 pixels
• UXGA requires the number of simultaneous samplings to be 24 pixels.
• the number of video signals supplied to the liquid crystal panel that is, FIGS. 2, the number of parallel analog video signals to convert the LCD driver 52, 53, 54 also need power s replaced in accordance with the display format.
• the number of LCD drivers 52, 53, and 54 is required for the number of display formats, resulting in an increase in cost and an increase in the size of the device. Will occur.
• a ghost which is a phenomenon in which the same image is displayed, is shifted from the originally displayed image so that the same image is displayed due to the phase relationship between the video signal and the timing noise. There is a problem such as that.
• An object of the present invention is to apply a novel display panel driving device, a driving method, and a display panel driving system that can solve the problems of the conventional technology as described above. It is another object of the present invention to provide a driving device, a driving method, and a display panel driving system for driving display panels of various display formats while avoiding the occurrence of ghost.
• the driving device has a display having x X y pixels arranged in a matrix at an intersection of X signal lines arranged in a column direction and y gate lines arranged in a row direction.
• the data array conversion means for converting the m-bit digital video signal into a data array in accordance with the display format of the display panel, and the data array in accordance with the display format by the data array conversion means.
• x, y, p, m, and k are natural numbers, and N is a natural number satisfying N ⁇ (x / k).
• the driving method according to the present invention is directed to a display having x X y pixels arranged in a matrix at an intersection of X signal lines arranged in a column direction and y gate lines arranged in a row direction.
• the m-bit digital video signal is converted into a data array according to the display format of the display panel, and the m-bit digital video signal is converted into a data array according to the display format.
• the signal is converted into a parallel p-phase analog video signal, the p-phase analog video signal is expanded into an x / k-phase analog video signal, and the expanded analog video signal is selected from N video signal supply lines.
• XZk video signal supply lines and divides the X signal lines into k signal lines that are adjacent to each other without overlapping. Same One by one sequentially selected in timing, to the signal line selected, supplied in xZk of video signal supply lines Sampled analog video signal.
• x, y, p, m, and k are natural numbers, and N is a natural number satisfying N ⁇ (x / k).
• the display panel driving system has XX y pixels arranged in a matrix at the intersection of X signal lines arranged in the column direction and y gate lines arranged in the row direction.
• a display panel drive system that drives a display panel, a data array conversion device that converts an m-bit digital video signal into a data array that conforms to the display format of the display panel, and a display format using a data array conversion device
• a signal processor that converts m-bit digital video signals converted to a data array that conforms to the above into parallel p-phase analog video signals, a display panel of any display format, and a signal processor Expands the expanded P-phase analog video signal into an x / k-phase analog video signal and supplies the expanded analog video signal to N video signal supply lines
• a vertical drive circuit connected to the stage and the gate line, and driving the gate line line-sequentially to select X pixels in the row direction, and k signal lines adjacent to each other without overlapping X signal lines From the x / k signal
• x, y, p, m, and k are natural numbers, and N is a natural number satisfying N ⁇ (x / k).
• the number of pixels that can be written at a time is, for example, 100 or more, which is greatly increased as compared with the conventional multiple pixel simultaneous sampling method. Therefore, sufficient writing time can be secured, and stable writing can be realized.
• the present invention by designing the display panel module to correspond to the highest definition display format, for example, Full HD, adjustment of the number of development of analog video signals, It is possible to flexibly cope with display panels of any display format by simply adjusting the sampling timing, etc., as appropriate.
• the system configuration can be greatly simplified for the high-resolution display formats SXGA +, UXGA, and Full HD.
• a desired signal line is sequentially selected one by one at the same timing from each signal line group obtained by dividing the signal line of the display panel, and the video signal is sampled. Due to the difference in the phase relationship between the video signal and the timing pulse, it is possible to completely eliminate the cause of the ghost caused by the video signal entering in addition to the video signal to be originally written.
• FIG. 1 is a block diagram of a liquid crystal panel drive system to which a conventional multiple pixel simultaneous sampling method is applied.
• FIG. 2 is a circuit diagram showing a liquid crystal panel module used to explain a multiple pixel simultaneous sampling method in detail.
• FIG. 3 is a block circuit diagram showing a display panel driving system according to the present invention.
• FIG. 4 is a diagram showing a display panel included in a display panel drive system
• FIG. 1 A first figure.
• FIG. 5 is a diagram showing a display panel included in a display panel drive system.
• FIG. 1 A first figure.
• FIG. 6 is a diagram showing a ratio between a writing time of a video signal according to a conventional method and a writing time that can be secured in the display panel drive system.
• FIG. 7 is a diagram showing the number of switch SWs required for each display format.
• FIG. 8 is a diagram for explaining the number of video signal developments by post-drive.
• FIGS. 9A to 9G are diagrams showing how a video signal is developed by a post drive for each display format.
• FIG. 1 OA—FIG. 1 OF shows a state where a video signal is written to a pixel by a signal line selection sampling method.
• the liquid crystal panel driving system 1 according to the present invention will be described with reference to FIG.
• the liquid crystal panel drive system 1 is provided in, for example, a three-panel liquid crystal projector or the like, and includes a liquid crystal panel 9R for red, a liquid crystal panel 9G for green, and a liquid crystal panel 9G for blue as liquid crystal panels.
• RU liquid crystal panel drive system 1
• the LCD panel driving system 1 includes a DSD (Digital Signal Driver) 2 for performing predetermined signal processing on a digital video signal supplied from the outside, a pre-driver (Pre Driver) 3 for driving the liquid crystal panel 9R, and a post driver ( Post Driver) 4, pre-driver 5, driving LCD panel 9G, post-driver 6, pre-driver 7, driving LCD panel 9B, post-driver
• DSD Digital Signal Driver
• Pre Driver pre-driver
• Post Driver post driver
• the liquid crystal panel 9R and the post driver 4 are modularized as a liquid crystal panel module 10R together with a vertical drive circuit (not shown).
• the liquid crystal panel 9G and the post driver 6 are modularized together with a vertical drive circuit (not shown) as a liquid crystal panel module 10G
• the liquid crystal panel 9B and the post driver 8 are combined with the vertical drive circuit (not shown) together with the liquid crystal panel. Modularized as module 10B.
• the DSD 2 includes a DSD core 2a, a memory 2b, and a TG (Timing Generator) 2c.
• the DSD core 2a performs digital signal processing such as gamma correction and color unevenness correction on each of the externally supplied RGB digital video signals.
• Each RGB digital video signal is supplied from the outside as 12-bit parallel data.
• the numerical value of 12 bits is based on the fact that the video signal was handled by 12 bits in the LCD panel driving system 50 shown as a conventional technology, and is a value used only for design upstream. is there. Therefore, this value is m bits (m is a natural number) instead of 12 bits.
• the memory 2b stores RGB digital video signals that have been subjected to digital signal processing by the DSD core 2a.
• RGB digital video signals stored in memory 2b are SVGA, XGA,
• the data is converted into a data array corresponding to the display format such as WXGA, SXGA, SXGA +, UXGA, and Full HD, and supplied to the pre-drivers 3, 5, and 7 in parallel as 12-bit digital data.
• the pre-driver 3 is supplied with 12-bit digital video signals in parallel as digital video signals Rl and R2, and the pre-driver 5 is supplied with 12-bit digital video signals in parallel as digital video signals Gl and G2
• the pre-driver 7 is supplied to the parallel as a 12-bit digital video signal Bl, B2.
• the timing generator 2c of the DSD2 generates a timing panel S2 to be supplied to the pre-drivers 3, 5, and 7, and a timing pulse S1 to be supplied to the liquid crystal panel modules 10R, 10G, and 1OB. Predrinos 3, 5, 7 and f are controlled in synchronization with this timing pulse S1 or S2.
• the pre-drivers 3, 5, and 7 convert the digital video signals input in parallel from DSD2 into p (p is a natural number) phase analog video signals based on the timing pulse S2 synchronized with the video signals, respectively.
• the data is converted and supplied to the post drivers 4, 6, and 8, respectively.
• the pre-drivers 3, 5, and 7 convert p to 12 to a 12-phase analog video signal.
• the predrivers 3, 5, and 7 also generate a precharge signal (PSIG) to be supplied to the liquid crystal panels 9R, 9G, and 9B, respectively, and a panel common DC voltage (VCOM).
• PSIG precharge signal
• VCOM panel common DC voltage
• liquid crystal panel modules 10R, 10G, and 10B will be described.
• Each of the liquid crystal panel modules 10R, 10G, and 10B has the same configuration except that the output wavelength regions of the liquid crystal panels 9R, 9G, and 9B included in the liquid crystal panel modules 10R, 10G, and 9B are different. I do.
• the liquid crystal panel module 10R includes a post driver 4, a liquid crystal panel 9R, a vertical drive circuit 12, a precharge drive circuit 13, and a signal line selection switch group 14.
• the post-driver 4 converts the 12-phase analog video signal supplied from the pre-driver 3 based on the timing pulse S1 synchronized with the video signal into SVGA, XGA, WXGA , SXGA, SXGA +, UXGA, Full HD, expands into video signals for the number of outputs corresponding to display formats, video signal supply line VSIG (N is a natural number), signal line
• the process of expanding the 12-phase analog signal in the post driver 4 into video signals corresponding to the number of outputs corresponding to the above-described display format is a process based on a sampling method executed in the liquid crystal panel drive system 1.
• the sampling method of the liquid crystal panel drive system 1 first selects the signal lines of the liquid crystal panel 9R for the number of outputs of the video signals developed by the post-dryno 4, and then selects the signal lines that will be described later. In this method, writing the developed video signal at the same time at the same time is repeated several times, and sampling is performed on all signal lines. This sampling method is called a signal line selection sampling method.
• the number of video signals developed by the post driver 4 depends on the display format of the liquid crystal panel 9R and the number of times of writing the video signal to all the signal lines of the liquid crystal panel 9R. It will be determined relatively. For example, if the display format of the liquid crystal panel 9R is a high-resolution display format with a high pixel count, it is necessary to increase the number of video signal developments. Also, if the number of times of writing the video signal to all the signal lines of the liquid crystal panel 9R is reduced, the number of signal lines for writing the video signal at one time must be increased, so that the number of developed video signals also needs to be increased. This signal line selection sampling method will be described later in detail.
• the liquid crystal panel 9R includes a plurality of gate lines 21 arranged in rows, a plurality of signal lines 22 arranged in columns, and pixels 23 arranged at intersections of both lines.
• the pixel 23 includes a thin film transistor (TFT) (not shown) and a liquid crystal cell (not shown).
• TFT thin film transistor
• the gate electrode of the TFT is connected to the corresponding gate line 21, the source electrode is connected to the corresponding signal line 22, and the drain electrode is connected to one electrode (pixel electrode) of the corresponding liquid crystal cell.
• the panel common DC voltage (VCOM) generated by the pre-driver 3 is supplied to the other electrode (counter electrode) of the liquid crystal cell as a predetermined counter potential.
• the vertical drive circuit 12 is divided into left and right sides, connected to a gate line 21, and connected to each gate.
• the line 21 is driven line-sequentially from both sides to select the pixels 23 in the row direction.
• the precharge drive circuit 13 pre-charges the precharge signal (PSIG) supplied from the predriver 3 via a precharge line (not shown) before writing the video signal.
• the signal line selection switches 14 connect the video signal supply line VSIG from the post driver 4.
• It comprises a plurality of switches for sampling the video signal supplied via the signal line 22.
• the plurality of switches included in the signal line selection switch group 14 are switched at the same timing based on the timing pulse S1 supplied from the TG2c of DSD2, and by repeating this multiple times, all the switches included in the liquid crystal panel 9R are switched.
• the video signal is sampled on the signal line 22.
• the video signal sampled on the signal line 22 is written to the pixel 23 in the row direction selected by the vertical drive circuit 12.
• N N is a natural number
• video signal supply lines VSIG—VSIG connected to the post drive 4 are connected to the switches provided in the signal line selection switch group 14 respectively.
• the switch SW overlaps the signal line 22.
• One is provided for each of the six signal lines 22 adjacent to each other without duplication. From the group of signal lines having the six signal lines 22 as a unit, one signal is supplied each time the timing pulse S1 is supplied. One of the signal lines 22 will be selected.
• the signal line 22 on the left end of the signal line group is selected at the timing of the first timing pulse S1
• the signal line on the right is selected at the next timing, and the remaining four signal lines are sequentially selected. 22 will be selected.
• the switches are arranged in the order of the left end forces of the six signal lines.
• the signal line 22 is selected at the same timing as the SW.
• each switch SW operates simultaneously by the timing pulse S1 and
• the switch SW is connected to the signal line 22 of the liquid crystal panel 9R as described above.
• the number of signal lines 22 that can be sampled at one time increases, so that a sufficient time for writing to the signal lines 22 can be secured.
• Figure 6 shows the write time that can be secured in the signal line selection sampling method with respect to the write time A in the conventional method, that is, the write time in the multiple pixel simultaneous sampling method (the write time required when 6 pixels are sampled simultaneously).
• the ratio of B is shown when the number of signal lines 22 selected is 1, 2, 4, 6, and 8.
• the number of switch SWs constituting the signal line selection switch group 14, N is the number of switch SWs constituting the signal line selection switch group 14, N.
• the display format is the same, it is determined by the number of selections of the signal line 22. For example, if the number of selected signal lines 22 decreases, the number of required switch SWs increases.
• Figure 7 shows the number of switch SWs required for each display format when the number of signal lines 22 selected is fixed at six. Note that in Fig. 6, " ⁇ " indicates the programming time according to the conventional method.
• One switch SW is assigned to this signal line 22 as well.
• SVG SVG
• a dummy signal line 22 and a dummy pixel are added to the liquid crystal panel 9R in order to correspond to the increased one switch SW.
• XGA, SXGA, SXGA +, and UXGA add a dummy signal line 22 and a dummy pixel to the LCD panel 9R in the same way, and change the number of horizontal pixels to the number of horizontal pixels as shown in Fig. 7. (Ha), it is possible to maintain consistency with the number of switch SW.
• Video signal supply from post driver 4 is described. Video signal supply from post driver 4
• the video signal is a video signal developed from a 12-phase analog video signal in bar 4.
• the switch SW is connected to the signal line 22 of the liquid crystal panel 9R.
• the video signal is sampled by the switching operation.
• the video signal supply lines VSIG As many as the number of switch SWs, the video signal supply lines VSIG
• N 1 A video signal supplied via one VSIG is also required.
• the post driver 4 converts the 12-phase video signal supplied from the pre-driver 3 into a switch SW determined by the display format of the liquid crystal panel 9R and the number of times of writing to the signal line 22 provided in the liquid crystal panel 9R. It will be expanded and output by the number.
• Figure 8 shows the display format when the number of signal lines 22 selected by the switch SW is six.
• the number of video signal outputs from the post driver 4 depends on the display format of the liquid crystal panel 9R and the switch SW.
• the number of expansions by the post driver 4 is also x / k phase.
• the display format is Full HD, and the number of switch SWs required when the number of signal lines 22 selected is 6. Since the number of outputs from the post driver 4 is 320, four video signals are
• the other 320 video signals are supplied to the 320 video signal supply lines VSIG—VSIG connected to the post driver 4.
• the post driver 4 expands the 12-phase video signal with the total number of expansions shown in Fig. 8, and expands it.
• the output video signal is output by thinning out the video signal supply line VSIG VSIG as shown in FIGS. 9B, 9C, D, 9E, 9F, and 9G.
• the post driver of the LCD panel module 9R is used.
• the 1 N video signal is supplied to each switch SW of the signal line selection switch group 14, and
• each switch SW supplies the signal to the selected signal line 22.
• FIG. 10A video signals are simultaneously written to pixels arranged at 5 pixel intervals from the leftmost pixel as shown in FIG.10A, and at the subsequent timing, FIG.10B, FIG.10C, FIG.10D, FIG.10E, FIG. As shown in FIG. 10F, the video signal is sequentially written to the pixel on the right.
• the cross-line area indicated by a indicates pixels that have already been written, and the hatched area indicated by b indicates newly written pixels.
• pixels written at the same timing are not adjacent to each other and always maintain a predetermined pixel interval, so that, for example, the phase relationship between the video signal and the timing noise is shifted. Even in such a case, other pixels are not affected.
• the phase relationship between the video signal and the timing pulse deviates, as in the multiple pixel simultaneous sampling method, the cause of the ghost caused by the video signal entering other than the video signal to be written originally Can be completely removed.
• the pre-driver 3, the post driver 4, and the liquid crystal panel 9R are described.
• the liquid crystal panel 9G driven by the pre-driver 5, the post driver 6, and the pre-driver 7, the post driver 8 are driven.
• the signal line selection sampling method is executed in the same manner.
• the number of pixels that can be written at a time is, for example, 6 to 100 in comparison with the simultaneous sampling method of a plurality of pixels implemented as the conventional technology. Since the number of calories has increased significantly, such as the number of pieces, more than twice the writing time can be secured, and stable writing is achieved.
• the same system configuration can be used for liquid crystal panels of various display formats without changing the IC.
• the system configuration can be greatly simplified. It should be noted that the present invention is not limited to the above-described embodiment described with reference to the drawings, and various modifications, substitutions, or equivalents thereof are made without departing from the scope of the appended claims and the gist thereof. It is clear to a person skilled in the art that this can be done.

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• Computer Hardware Design (AREA)
• Crystallography & Structural Chemistry (AREA)
• Chemical & Material Sciences (AREA)
• Nonlinear Science (AREA)
• Mathematical Physics (AREA)
• Optics & Photonics (AREA)
• Control Of Indicators Other Than Cathode Ray Tubes (AREA)
• Liquid Crystal Display Device Control (AREA)
• Liquid Crystal (AREA)
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• Video Image Reproduction Devices For Color Tv Systems (AREA)

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• 2003
  • 2003-08-29 JP JP2003307921A patent/JP4100299B2/ja not_active Expired - Lifetime
• 2004
  • 2004-08-23 TW TW093125362A patent/TW200518024A/zh not_active IP Right Cessation
  • 2004-08-26 CN CNB2004800249470A patent/CN100446074C/zh not_active Expired - Fee Related
  • 2004-08-26 EP EP04772211A patent/EP1662470A4/en not_active Ceased
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  • 2004-08-26 WO PCT/JP2004/012255 patent/WO2005022503A1/ja not_active Ceased
  • 2004-08-26 US US10/568,860 patent/US7719514B2/en active Active

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