WO2004093458A1 - 動画像符号化又は復号化処理システム及び動画像符号化又は復号化処理方法 - Google Patents
動画像符号化又は復号化処理システム及び動画像符号化又は復号化処理方法 Download PDFInfo
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- WO2004093458A1 WO2004093458A1 PCT/JP2004/005394 JP2004005394W WO2004093458A1 WO 2004093458 A1 WO2004093458 A1 WO 2004093458A1 JP 2004005394 W JP2004005394 W JP 2004005394W WO 2004093458 A1 WO2004093458 A1 WO 2004093458A1
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
- H04N19/10—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
- H04N19/134—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the element, parameter or criterion affecting or controlling the adaptive coding
- H04N19/156—Availability of hardware or computational resources, e.g. encoding based on power-saving criteria
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
- H04N19/10—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
- H04N19/102—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the element, parameter or selection affected or controlled by the adaptive coding
- H04N19/127—Prioritisation of hardware or computational resources
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
- H04N19/10—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
- H04N19/134—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the element, parameter or criterion affecting or controlling the adaptive coding
- H04N19/136—Incoming video signal characteristics or properties
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
- H04N19/10—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
- H04N19/169—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding
- H04N19/17—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding the unit being an image region, e.g. an object
- H04N19/172—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding the unit being an image region, e.g. an object the region being a picture, frame or field
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
- H04N19/42—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals characterised by implementation details or hardware specially adapted for video compression or decompression, e.g. dedicated software implementation
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
- H04N19/60—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using transform coding
- H04N19/61—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using transform coding in combination with predictive coding
Definitions
- the present invention relates to a moving picture coding or decoding processing system and a moving picture coding or decoding processing method.
- the present invention relates to a moving picture coding or decoding processing system for coding or decoding moving pictures using a processor whose operating frequency and operating voltage can be changed, and a moving picture coding or decoding. It relates to a chemical treatment method. Background art
- Such coding / decoding technology is applied to information terminal equipment such as a personal computer or a mobile phone incorporating a microcomputer, and is used for a computer based on a program describing coding / decoding means.
- information terminal equipment such as a personal computer or a mobile phone incorporating a microcomputer
- a processor or the like By operating a processor or the like, it functions as a moving image encoding system when transmitting moving images, and as a moving image decoding system when receiving moving images.
- the powerful moving picture encoding or decoding processing requires a relatively large amount of computation, so that power consumption tends to increase, and software that is more versatile than hardware is used. Thus, reducing power consumption in code / decode processing has become a major issue.
- Non-Patent Document 1 A conventional means for reducing power consumption is disclosed in, for example, Non-Patent Document 1 below.
- Non-Patent Document 1 Proceedings of IEEE International Symposium on Circuits and System 2001 (May, 2001) pp918-921 "An LSI for VDD-Hopping and MPEG4 System Based on the Chip” (H. Kawaguchi, G. Zhang , S. Lee, and ⁇ . Sakurai)
- FIG. 10 is a diagram showing a conventional technique for reducing the power consumption of a moving image (moving image) encoding processing system shown in Non-Patent Document 1. Note that the means for reducing the power consumption is the same in the moving picture decoding processing system.
- the operating voltage and operating frequency are controlled to reduce power consumption when processing moving image coding (especially MPEG) on a processor capable of dynamically changing the operating voltage and operating frequency.
- the method is shown. That is, in the conventional example, as shown in FIG. 11, when performing moving picture encoding, the amount of calculation of moving picture encoding or decoding in frame units depends on the intensity of motion in the moving picture. Note that the power consumption is reduced by controlling the operating frequency and operating voltage of the processor.
- the processing time of one frame is limited by the time Tf due to the regulations of the encoding method (MPEG, etc.), and it is necessary that the encoding process of one frame be completed within the processing time Tf. Is done.
- Tf time slot
- TR i Tf—T slot X i.
- the number of video blocks to be processed in one ⁇ 0 time slot T slot (video coding is processed on a block-by-block basis) is R (that is, RXN is the number of blocks in one frame), and RX i) Time taken for block processing (ie time slot Let Tacc (i + 1) be the time actually required for processing the blocks to be processed from Tslotl to time slot Tslot i. The time until the operating voltage and operating frequency stabilize when the voltage is changed is defined as Trd. The actual time slot RTsloti indicates the processing time actually required for the processing to be completed in the time slot Tsloti.
- Fig 10 first, for the processing of the blocks assigned to time slot Tslotl and time slot Tslot 2, even if the load is maximum, sufficient processing is performed in time slots Tslot 1 and Tslot 2. Operate at the clock frequency f max that can be completed. If the time Tacc3 required for the processing is equal to Tacc3 (Tf-TR2), that is, if the allocated block group has completed processing in time slots Tslot1 and Tslot2, it is allocated to the next time slot Tslot3.
- Tacc3 Tacc3
- the processing times Tfl, Tf2, and Tf3 of FIG. 10 indicate the processing times when the operation is performed at the operating frequencies f1, f2, and f3 when the load is the maximum in the time slot Tslot3.
- the operation frequency and the operation frequency can be comprehensively changed.
- Required to operate with lower operating voltage Power consumption is reduced by controlling the voltage according to the processing.
- the processor is set to a certain processing time through the processing time of one frame. It is preferable to perform processing by operating at an operating voltage and an operating frequency. That is, assuming that the processing time of one frame is Tf (second), the amount of operation Kf (cycle), and the operating frequency Ff, the operating frequency Ff is set to Kf / Tf (cycle / second), By operating the processor at a constant operating frequency F f throughout the processing time T f, power consumption can be reduced as compared with the case where the operating frequency F f is changed many times within the processing time T f . This proof is given in a first embodiment described later.
- the operating voltage and operating frequency are changed up to N times in one frame, even though the unit of the processing time Tf is synchronized with one frame. Electricity was not enough.
- the low power consumption of moving picture coding or decoding in a processor that can control the operating voltage and operating frequency in multiple stages as in the conventional example is achieved by reducing the operating voltage many times during the processing of one frame. And the operating frequency had to be changed.
- the control is performed at a minimum constant frequency that allows processing during the processing of one frame. For this reason, in the conventional example in which the operating voltage and the operating frequency are changed up to N times during the processing of one frame, it was not possible to sufficiently reduce the power consumption.
- the present invention has been made to solve the above-described problems, and a moving image encoding or decoding processing system and a moving image capable of significantly reducing power consumption as compared with the conventional technology. It is to propose an image encoding or decoding processing program. Disclosure of the invention
- the moving picture coding or decoding processing system of the present invention comprises a plurality of frames.
- a processor that encodes or decodes a moving image composed of frames in units of frames, calculates the necessary amount of computation K p necessary for encoding or decoding one frame, and encodes the one frame.
- the operating frequency F at which the necessary amount of computation Kp can be encoded or decoded within the time T e allocated to the decoding or decoding process in advance, and the operating frequency F and the operating frequency are determined.
- the encoding or decoding process of the one frame is performed while operating the processor at an operating voltage V suitable for F, and furthermore, a failure phenomenon that occurs when the required computation amount Kp is smaller than the actually required computation amount is described.
- the moving picture coding or decoding processing method provides a method for coding or decoding a moving picture composed of a plurality of frames in one frame by using a processor for coding or decoding in a frame unit.
- the required operation amount Kp is calculated, and the operating frequency at which the required operation amount Kp can be encoded or decoded within the time T e previously allocated to the encoding or decoding processing of the one frame.
- the encoding or decoding processing of the one frame is performed while operating the processor at the operating frequency F and the operating voltage V suitable for the operating frequency F, and further, the necessary amount of computation It is characterized by comprising one or more failure avoidance steps for avoiding a failure phenomenon that occurs when Kp is smaller than the actually required amount of computation.
- the processing time is assigned in advance to the current frame.
- the required operation amount Kp required for encoding or decoding one frame is calculated, and within a time T e previously allocated to the encoding process or decoding process for the one frame.
- An operating frequency F at which the necessary amount of computation Kp can be encoded or decoded is determined, and the code or decoding operation is performed while the processor is constantly operated at the operating frequency F and the operating voltage V suitable for the operation frequency. Processing is performed. Therefore, the encoding or decoding processing is performed while the processor is constantly operated at the minimum operating voltage and operating frequency necessary for encoding or decoding for each frame, and the predetermined division of the frame is performed.
- the operating frequency and operating voltage are determined for each number of blocks, so that Power consumption can be reduced as compared with the conventional technology in which the operating voltage and the operating frequency are changed. Furthermore, if the required amount of computation Kp is smaller than the actually required amount of computation, the encoding or decoding of the current frame is not completed within a predetermined time, resulting in poor image quality.
- the present invention includes one or more failure avoidance means for avoiding the failure phenomenon, so that the occurrence of the failure phenomenon is avoided.
- the moving picture coding or decoding processing method is characterized in that a frame to be coded before the one frame among a plurality of continuous frames is set as a previous frame.
- the required calculation amount ⁇ is calculated using one or more elements of the required calculation amount of the previous frame.
- the video encoding / decoding processing system / method according to the present invention is configured such that a frame to be decoded before the one frame among a plurality of continuous frames is a preceding frame.
- the number of bits of the coded data of the one frame, and the type of whether the one frame has been subjected to intra-frame coding or inter-frame coding is a preceding frame.
- the average value of the magnitude of the motion vector of the one frame or the previous frame, the variance of the magnitude of the motion vector of the one frame or the previous frame, the number of effective blocks of the one frame or the previous frame The number of effective coefficients of the one frame or the previous frame, the bit rate of the one frame or the previous frame, the code of the one frame or the previous frame Signal amount, the average value of the quantization step size of the one frame or the previous frame, and the difference of the average value of the quantization step size (the difference between the quantization step size of the one frame and the previous frame, or 1 (The difference between the quantization step size of the previous frame and the quantization step size of the previous frame), the amount of computation actually required to decode the previous frame, and the required computation amount of the previous frame. It is characterized in that the required operation amount Kp is calculated using the elements.
- Each of the plurality of elements is an element that affects the operation amount of the encoding or decoding processing.
- the required computation amount Kp is calculated by using one or more of the elements, so that the calculated required computation amount Kp is actually Becomes a value closer to the calculation amount of. Therefore, it is possible to reduce the rate of occurrence of a failure event that the required computation amount Kp is smaller than the actual computation amount and the encoding or decoding process is not completed in time. In addition, the possibility that the calculated required amount of calculation Kp is too large than the actual amount of calculation and the reduction in power consumption is hindered is reduced.
- the video encoding or decoding processing system / method of the present invention is characterized in that the failure avoiding means Z step includes a first failure avoiding means Z step for increasing a required operation amount Kp.
- the failure avoidance means increases the required computation amount by a predetermined value, it is highly likely that the calculated required computation amount Kp satisfies the actual computation amount, and the failure phenomenon can be avoided. it can.
- the first failure avoiding means / step is characterized in that the required computation amount Kp is multiplied by m (m is a real number not less than 1) or the required computation amount Kp is added with a real number n larger than 0.
- calculation is performed by adjusting the values of m and n in order to multiply the required operation amount Kp by m or add n to the required operation amount Kp by the first failure avoidance means / step.
- the calculated required calculation amount Kp can be set to a value larger than the actual calculation amount and approximate to the real calculation amount, and the failure phenomenon can be avoided.
- the moving image encoding or decoding processing system / method of the present invention As a step, if the encoding processing of the one frame is not completed within the time previously allocated to the encoding or decoding processing of the one frame, the failure phenomenon of performing the processing of avoiding the failure phenomenon is avoided. And at least one second failure avoiding means Z step for performing the following processing.
- a process for avoiding a failure phenomenon is performed by increasing the required computation amount Kp regardless of whether or not a failure phenomenon has occurred.
- the process for avoiding the failure phenomenon is performed in the process, the process for avoiding the failure phenomenon is performed only when the failure phenomenon occurs, and the failure phenomenon can be efficiently avoided.
- the second failure avoiding means Z step interrupts the encoding processing at a predetermined timing, and if there is a macroblock that has not been encoded, performs the invalid block processing on the macroblock. It is characterized. In the decryption processing, no invalid block processing is performed.
- the second breakup avoiding means / step interrupts the video encoding or decoding processing at the above timing, for example, when there is a macroblock which is not encoded. Since it is determined that the encoding process of the one frame is not completed within the time T e and a failure occurs, and the invalid blocking process is performed on the macro block, the failure phenomenon is avoided. Can be.
- the second failure avoiding means / step interrupts the encoding / decoding processing at a predetermined timing, and at the time of the interruption, the remaining amount of the necessary computation amount Kp is: If it is smaller than the remaining amount of operation actually required for the encoding or decoding process, it is specially equipped with at least the remaining operation amount judging means to increase the operating frequency and operating voltage of the processor. .
- the moving image encoding or decoding processing is interrupted at a predetermined timing, and the remaining amount is compared. If the remaining amount of the required operation amount ⁇ is small compared with the remaining amount of the actually required operation amount, the code or decoding operation is not completed within the time Te. Judge that a breakdown phenomenon will occur, and increase the operating frequency and operating voltage of the processor.
- the calculation speed of the processor is increased, so that the amount of processing that can be performed is increased and the failure phenomenon can be avoided.
- the number of interrupts is plural, the operating frequency and the operating voltage can be increased stepwise according to the processing state, and the possibility of avoiding the breakdown phenomenon is further increased.
- the operating frequency F e is calculated from the possible operating frequency at which the processor can operate.
- the operating frequency F which is equal to or higher than the required operating frequency F e and which is closest to the operating frequency F e is determined, and the operating voltage V suitable for the determined operating frequency F is determined.
- Encode or decrypt while operating at operating voltage V That is, the possible operating frequency at which the processor can operate and Among the operating voltages, the minimum operating frequency F and operating voltage V capable of processing the required amount of computation Kp within the time T e while operating the processor while encoding or decoding the one frame on the processor. Since power processing is performed, power consumption can be reduced efficiently even if a processor with available operating frequencies prepared in stages is used.
- FIG. 1 is a schematic block diagram showing the operation of the video coding system of the first embodiment of the present invention.
- FIG. 2 is a diagram illustrating an implementation example of the video encoding processing system according to the embodiment.
- FIG. 3 is a diagram showing a moving image coding processing program for causing a computer to function as the moving image coding processing system of the above embodiment, and a schematic flowchart of a moving image coding processing method realized by the program. .
- FIG. 4 is a diagram showing the relationship between the encoding processing time and the remaining calculation amount in the video encoding system according to the embodiment.
- FIG. 5 is a conceptual diagram showing an operating voltage and an operating frequency of a processor used in the moving picture coding processing system of the above embodiment.
- FIG. 6 is a diagram illustrating the effectiveness of the present invention.
- FIG. 7 is a schematic block diagram showing an operation of the moving picture coding processing system according to the second embodiment of the present invention.
- FIG. 8 is a diagram showing a schematic flowchart of a moving picture coding processing program that causes a computer to function as the moving picture coding processing system of the above embodiment.
- FIG. 9 is a schematic block diagram showing the operation of the video decoding processing system according to the third embodiment of the present invention.
- FIG. 10 is a diagram showing a conventional method for reducing the power consumption of the moving picture coding processing system.
- Fig. 11 is a conceptual diagram showing a state in which the amount of video coding or decoding computation differs for each frame.
- the moving picture coding processing system is realized by a computer which is an information terminal device such as a mobile phone or a personal computer having a built-in microcomputer.
- a computer which is an information terminal device such as a mobile phone or a personal computer having a built-in microcomputer.
- This is a system that functions as a part of a digital signal processing unit and the like, and that sequentially encodes a moving image composed of a predetermined number of continuous frames in frame units.
- FIG. 1 is a schematic block diagram showing the operation of the moving picture coding processing system S1 of the present embodiment.
- the moving picture coding processing system S1 is provided with an operating voltage and an operating frequency of r stages (r is an integer of 2 or more) (that is, it can be operated at an operating voltage and operating frequency of r stages) and a program.
- a processor 1 capable of changing an operating voltage and an operating frequency according to an operation voltage, an operating voltage and an operating frequency control means 4 including a DC-DC converter ⁇ PLL and the like to control an operating power supply voltage and an operating frequency of the processor 1; (Particularly, a multimedia signal processing unit in the computer) including at least a local decoding frame memory 6, an input frame memory 7, an element memory 8, and a processed macroblock number register 10 which are storage areas for storing the data of .
- the operating voltage and operating frequency of the local decoding memory 6 and the input frame memory 7 may be controlled by the operating voltage and operating frequency control means 4 in the same manner as in the processor 1.
- the elements included in the control area CA indicated by the dotted line (processor 1, local decoding frame memory 6, element memory 8, processed macroblock number register 10, input frame memories 7a, 7b, etc. ), The operating frequency and operating voltage are controlled.
- the processor 1 includes, as means operating on the processor 1, a necessary operation amount calculating means 2, an operating voltage / operating frequency calculating means 3, a moving picture coding means 5, and two failure avoiding means 9, 1 1. .
- the two failure avoidance means 9, 11 1 are arranged so that the required computation amount calculated by the required computation amount calculation means 2 is actually necessary for the encoding process by the encoding means 5. This is a means for avoiding a failure phenomenon that occurs when a value smaller than the calculation amount is calculated, and the first failure prevention means 11 and the second failure prevention means functioning as a part of the necessary calculation amount calculation means 2.
- reference numeral 101 denotes input image data
- reference numeral 102 denotes an operating voltage and an operating frequency instruction
- reference numeral 103 denotes local decoded data of a previous frame
- reference numeral 105 denotes an operating voltage and operating frequency supply
- 106 is the encoded data of the frame
- 107 is the information of the average value of the quantization step size of the previous frame
- 108 is the intra-frame coding or inter-frame coding for each frame.
- code 109 is information on the coding bit rate of the moving image
- code 110 is the amount of activity in the previous frame
- code 111 is the number of macroblock matching in the previous frame
- code 112 Is the number of effective blocks of the previous frame
- code 1 13 is the number of effective coefficients of the previous frame
- code 1 14 is the average of the quantization step size of the previous frame and the average of the quantization step size of the previous frame Value difference
- sign 1 1 5 The amount of processing actually required for the code of the previous frame
- code 1 16 is the required amount of calculation of the previous frame calculated by the required calculation amount calculation means 2
- code 1 17 is the macroblock for which the encoding process has been completed. Is the number of processing macroblocks.
- the element memory 8 is a part of a plurality of elements used in the required operation amount calculation means 2 described later (a type 1 08 or an intra-frame encoding or an inter-frame encoding, This is a storage area for storing the code rate 109, the amount of frame activity 110, and the required computation amount 1 16) calculated by the required computation amount calculation means 2.
- the processed macroblock number register 10 is a register for temporarily storing information on the number of encoded macroblocks 1 17.
- MP EG-4 is used as the encoding method for the moving picture encoding means 5
- other encoding methods such as H.26X, MPEG-1, and MP EG-2 are used. Also good ,.
- FIG. 2 shows an implementation example of the moving picture coding processing system S1.
- the system S1 mainly includes a processor 1, peripheral devices such as various memories MR, 7a and 7b, various interfaces CI, DI, and BI, and an operating voltage and operating frequency control circuit 4a. It is realized by one piece of hardware.
- the above components can communicate with each other via paths Bl, B2, and the like.
- the processor 1 includes a processor core 1a, an instruction cache memory 1b, and a data cache memory 1c.
- Necessary operation amount calculation means 2, operating voltage / operating frequency determination means 3, moving picture coding means 5, failure avoidance means 9, 11 are used to execute programs stored in memory MR on processor core 1a as necessary. It is realized by being executed in.
- the instruction cache memory 1b and the data cache memory 1c are cache memories provided to speed up the processing of a program executed on the processor core 1a.
- the local decoding frame memory 6, the element memory 8, the processed macroblock number register 10 are aggregated in the FIG. 2 memory MR, and the average quantization step size of the previous frame 1 107, each frame
- the type of intra-frame or inter-frame encoding is 108
- the bit rate of video coding is 109
- the amount of activity of the previous frame (past frame) is 110
- the previous frame The number of block matchings 1 1 1, the number of effective blocks in the previous frame 1 1 2, the number of effective coefficients in the previous frame 1 1 3, the average value of the quantization step size of the previous frame, and the value of the previous frame Difference of average value of quantization step size 1 1 4, amount of processing actually required for encoding of previous frame 1 15, required amount of computation of previous frame 1 16 calculated by required computation amount calculation means, processing Macrob Click Number 1 1 7 is stored as data in the memory 1 f.
- the local decoded data 103 is transmitted and received as signals 100 j, 100 k, and 100 1 between the memory MR and the processor core 1
- the two input frame memories 7a and 7b correspond to the frame memory 7 of FIG.
- Video data (input image data 101) input from the camera interface CI is input to the input frame memory 7a (or the input frame memory 7b) via the bus B2.
- Input frame memory (# 0) 7a and input frame memory (# 1) 7b is replaced every time one frame is processed. That is, in the processing of the i-th frame, the input image data is written to the input frame memory (# 1) 7b by the signal 100h, and the signal 100 is used for the encoding processing by the moving image encoding means.
- the input frame memory (# 0) 7a by o In the processing of the (i + 1) th frame, the input frame memory (# 0) 7a by the signal 100i
- the input image data is written into the input frame memory (# 1) 7b by the signal 100p for encoding processing by the moving image encoding processing means. Therefore, when the input image data is written to the input frame memory (# 1) 7b by the signal 100h, the signal 100 Op does not occur, and conversely, the image is read by the signal 100p. When it is output, no signal 100h is generated.
- the input frame memory (# 0) 7a is used to control the operating frequency and operating voltage in the processing of the (i + 1) -th frame. Be eligible.
- the input image from the camera interface CI which always has a constant operating frequency
- the data write operation and the read operation of the input image data whose operating frequency fluctuates based on the calculated value of the required operation amount can be executed without hindering each other.
- the operating voltage / operating frequency control circuit 4a is capable of transmitting and receiving signals to and from the PLL 4b and the DC-DC converter 4c, and these function as operating voltage / operating frequency control means 4.
- Operating voltage The operating frequency control circuit 4a receives the operating voltage and operating frequency instruction 102 by the signal 100e from the processor core 1a, and sends the instruction to the PLL 4b based on the instruction 102. Sends a signal 100 u, DC—DC Transmits a signal of 100 V to converter 4c.
- the PLL 4b transmits an operating frequency signal 100a based on the signal 100u, and the DC-DC converter 4c supplies an operating voltage 100b based on the signal 100V.
- Signal 100 e, 100 j, 100 k, 100 1, 100 m, 100 ⁇ , ⁇ ⁇ ⁇ ⁇ , 100 q, lOO r, 100 s is the operating frequency signal output by PLL4 b 100 a, DC-DC converter 4
- the frequency and signal level change according to the value of the power supply 100 b output by c.
- the encoded data 106 after encoding by the moving image encoding means 5 operating on the processor 1 is transmitted as a signal 100 m to the bit stream interface BI via the bus B 1 and output as a signal 100 n, Sent to the memory MR functioning as the local decoding frame memory 6. Further, image data and the like are read out from the memory via the bus B1 as a signal 100q and transmitted to the display interface DI.
- the signal 100q received by the display interface DI is output as video data based on the signal 100t.
- the video data is output and displayed as a moving image via a monitor connected to the display interface DI.
- Operating voltage and operating frequency control circuit 4a, display interface DI, and bit stream interface BI always operate at a constant operating voltage, but the signals 100e, 100q, and 100m transmitted and received between them operate in the control area CA.
- the signal level fluctuates according to the change in the operating voltage of the elements (processor 1, memory MR, input frame memories 7a, 7b, etc.) included in.
- the operating voltage and operating frequency control circuit 4a, display interface DI, and bit stream interface BI are equipped with level converters that correct the signal levels of the received signals 100e, 100q, and 100m. It is desirable.
- the moving picture coding processing system S1 is realized by causing a computer (particularly, a multimedia signal processing unit in the computer) to function as the following predetermined means by a moving picture coding processing program Prg1.
- a computer particularly, a multimedia signal processing unit in the computer
- Prg1 a moving picture coding processing program
- any one of the frames to be encoded from among the sequentially encoded frames is defined as the current frame (that is, the frame to be encoded next with reference to the time when a certain frame is encoded, In other words, the frame that has not been encoded at this point in time and is scheduled to be encoded in the future), one frame encoded earlier than the current frame (the frame encoded in the past) (Frame) is set as the previous frame, and the process of encoding the current frame will be described, but the same process is performed for any frame.
- FIG. 3 is a diagram showing a schematic flowchart of the video encoding processing program Prg1.
- the moving picture coding processing program Prg1 causes the computer to function as the following units in Steps 1 to 5 described later.
- Step 1 The image information of the current frame is input to the input frame memory 7.
- Step 2 It functions as the required calculation amount calculation means 2 for calculating the required calculation amount K P of the current frame.
- Step 3 Function as an operating voltage / operating frequency calculating means 3 for calculating the operating frequency F and the operating voltage V of the processor according to the calculated required operation amount ⁇ .
- Step 4 Operate as the operating voltage / operating frequency control means 4 for controlling the operation of the processor 1 at the calculated operating frequency F and operating voltage V.
- Step 5 Function as the moving picture coding means 5 for coding the picture information of the current frame. As described above, the processing of Steps 1 to 5 is performed on all the frames in the order of the frames input to the input frame memory 7 (that is, the order of encoding), thereby encoding the moving image. . The details will be described below.
- Step 1 The input image data is temporarily stored in an input frame memory 7, which is a storage area for temporarily storing frames, in order to synchronize the frames. You.
- Step 2 The required computation amount calculation means 2 accesses the input frame memory 7 to obtain the input image data 101 of the current frame, and calculates the required computation amount Kp required for the encoding processing of the current frame.
- the required calculation amount of the frame is included.
- the required calculation amount is made relatively large, and when the value of one element is small, the required calculation amount is made relatively small as compared with the case where the value is large.
- the required computation amount Kp is relatively small compared to the case of inter-frame coding, and when the current frame is inter-frame coding, frame ⁇ ⁇ frame
- the required calculation amount Kp is made relatively large as compared with.
- the required computation amount calculation means 2 determines the required computation amount Kp according to these elements. By performing the calculation so as to increase or decrease the (cycle), the required operation amount Kp calculated by the required operation amount calculation means 2 becomes a value closer to the operation amount when the encoding process is actually performed.
- the calculation is performed using the function G, and the input frame memory is calculated.
- the input image data 101 of the current frame stored in 7 is compared with the local decoded data 103 of the previous frame that has been decoded and stored in the local decoded frame memory 6, and the Predicts (calculates) the magnitude of the motion of the image.
- the local decoded data 103 of the previous frame is obtained by encoding the encoded data 106 of the previous frame formed by encoding the previous frame in the encoding process of the previous frame in which encoding is performed before the current frame. It is formed by decoding by a local decoder and stored in the local decoding frame memory 6.
- a sum of absolute differences is used as an example of prediction (calculation) of the magnitude of the motion.
- the following describes how to calculate the sum of absolute differences ⁇ and the required amount of computation Kp.
- the local decoded data 106 decoded by a local decoder after encoding may be used, but the input image data of the input previous frame is used as it is. You may.
- the input image data 101 of the current frame stored in the input frame memory 7 is stored in X (i: j) (i is the horizontal coordinate of the image, j is the vertical coordinate) and stored in the local decoding frame memory 6 described later.
- the accumulated local decoded data 103 of the previous frame is Y (i, j) (where i is the horizontal coordinate of the image and j is the vertical coordinate)
- the sum of the absolute differences is Z
- the activity amount of the current frame is W a
- the activity amount of the previous frame (past frame) is W b
- the average quantization step size of the previous frame is Qprev
- the number of macroblock matchings in the previous frame is M
- the number of effective blocks in the previous frame is B
- the effective coefficient of the previous frame is C is the number
- s is the amount of processing actually required for the code of the previous frame
- s is the coding bit rate of the current frame
- BR is the average value of the quantization step size of the previous frame
- quantization of the previous frame is If ⁇ Qprev is the difference between the average values of the step sizes, D is the actual number of bits generated in the previous frame, and Kp 'is the calculated amount of computation in the previous frame, one or more of these elements are Using the required computational amount Kp
- Kp G (Z, Wa, Wb, Qprev, M, B, C, S, BR, ⁇ Qprev, D, Kp ')... (Equation 1)
- G is a function derived from one or more elements of Z, Wa, Wb, Qprev, M, B, C, S, BR, Q, Qprev, D, and Kp '.
- Z Wa, Wb, Qprev, M, B, C, S, BR, Q, Qprev, D, and Kp '.
- Kp j + ⁇ +] 3 ⁇ + ⁇ + ⁇ ⁇ + ⁇ AQprev-. ⁇ (Equation 2), but is not limited to this.
- type I which indicates whether the current frame is intra-frame encoding or inter-frame encoding.
- the required operation amount Kp when the current frame is an intraframe code is small, and the required operation amount Kp when the current frame is interframe encoding is a large value.
- the function G will be described. If the change of the image between the previous frame and the current frame is large (small size), that is, if the sum of absolute differences Z is large (small size), the number of macroblock pi matching performed in the current frame is large ( Therefore, the amount of calculation (depending on the number of executed macroblock matchings) required for the motion detection processing of the current frame becomes larger (smaller).
- the activity amount Wa of the current frame is large (small)
- the current frame contains many (small) high-frequency components of the image.
- the function G is configured to set Hp large (small) when parameters such as M, B, C, S, Wb, and Hp 'are large (small).
- the target bit rate is large (small)
- the value of the quantization step size is set small (large), and as a result, the number of effective blocks and the number of effective coefficients generated in the encoding process become large (small).
- the value of the quantization step size of the current frame is set smaller (larger) and the effective block generated in the encoding process is set. And the number of effective coefficients become smaller (larger).
- the above function G sets the actual number of generated bits D of the previous frame larger than BR so that Hp is set large (small).
- the threshold is small (small level)
- the difference between the average quantization step size of the previous frame Qp rev and the average value of the quantization step size of the previous frame and the average value of the quantization step size of the immediately preceding frame By considering AQp rev, H p calculated by the function G can be set to a value close to the amount of calculation required to actually encode the current frame.
- the first failure avoidance means 11 included in the necessary computation amount calculation means 2 increases the required computation amount Kp by a predetermined value and calculates A process is performed to give a margin to the required calculation amount Kp.
- a real number 11 n is a real number greater than or equal to 0
- a fixed value can be provided with a margin regardless of the calculated required operation amount value.
- the failure phenomenon is avoided by performing processing in the processing completion determination means 9 which is second failure avoidance means described later.
- the required calculation amount 116 of the previous frame calculated by the required calculation amount calculation means is stored in advance in the element memory 8 which is a storage area where the elements are stored. Read into 2 and used.
- the average value of the quantization step size of the previous frame 107, the number of macroblock matchings of the previous frame 111, the number of effective blocks of the previous frame 1 12, the number of effective coefficients of the previous frame 1 13, and the quantization step size of the previous frame The difference between the average value and the average value of the quantization step size of the immediately preceding frame 114, and The processing amount 115 actually required for the coding of the frame is fed back from the moving picture coding means 5 to the necessary calculation amount calculating means 2 when the coding processing of the previous frame is performed.
- the necessary operation amount calculation means 2 only one of these elements may be used, or a plurality of elements may be used in combination.
- the operating voltage / operating frequency calculation means 3 performs a calculation for predicting the operating frequency F e (cycle da seconds) for the processing of the current frame based on the value of the required operation amount Kp. That is, the minimum unit for which the processing time is defined by the encoding system is one frame, and if the time allocated to the encoding process of the current frame is Te (seconds), it is necessary for the current frame.
- the time T e allocated to the encoding processing of the predetermined frame is the time limit of the processing of one frame, the power, the time for estimating the calculation amount for the predetermined frame, ⁇ , the operating frequency of the processor, and the operating power. This is the time obtained by subtracting the time T s for changing the voltage / substrate bias voltage.
- Step 4 The operating voltage / operating frequency control means 4 converts the values of the operating voltage V (r) and the operating frequency F (r) instructed by the operating voltage / operating frequency Control is supplied to peripheral devices including the processor 1 and / or the local decoding memory 6 (reference numeral 105), and the processor 1 is operated at a constant operating voltage V (r) and operating frequency F (r). Do. As a result, peripheral devices including the processor 1 and / or the local decoding memory 6 operate at a constant operating voltage V (r) and operating frequency F (r).
- the moving picture coding means 5 is a means realized on the processor 1- of the computer by the moving picture coding processing program P rg 1 and is stored in the input frame memory 7 using the processor 1. This is a means for accessing the input image data in units of video coding and performing coding processing. That is, the moving picture encoding unit 5 acquires the input image data 101 of the current frame from the input frame memory 7 and encodes it to generate encoded data 106.
- the peripheral devices including the processor 1 and / or the local decoding memory 6 operate at the constant operating voltage V (r) and the operating frequency F (r) supplied from the operating voltage / operating frequency control means 4.
- the operating voltage ⁇ operating frequency control means 4 uses the operating frequency F (r) and the operating voltage V (r) for the processor 1 and / or the local decoding memory.
- Moving image encoding means 5 that performs encoding using the processor 1 while the peripheral devices including 6 and the like are operated at a constant rate encodes the current frame. For example, for a rapidly moving image (input image data 101 of the current frame), peripheral devices including the processor 1 and / or the local decoding memory 6 are constantly operated at a high frequency to obtain an image with little movement. On the other hand, low power consumption can be achieved by constant operation at a low frequency.
- the moving picture coding means 5 includes a local decoder having a function of decoding the coded data 106, and the coded data 106 of the current frame is decoded by the local decoder to form a locally decoded frame. It is stored in the memory 6 as the locally decoded data 103.
- the local decoded data 103 of the current frame is used when calculating the required computation amount Kp for the frame to be encoded next to the current frame.
- Encoded data of current frame 1 0 6 is transmitted through a transmission path or stored in a storage medium.
- the processing completion judging means 9 is configured to execute the code encoding processing routine at a predetermined timing when the moving picture encoding means 5 executes the encoding processing routine of the input image data 101 of the current frame in step 5. And interrupts the processing within the processing time, and determines whether the encoding processing of the current frame has been completed or not. If there is a macro block that has not been encoded, the required computation amount calculated by the required computation amount calculation means is smaller than the actually required computation amount, and the processing is not completed within the time Te. Since it can be determined that there is a high possibility that a failure phenomenon will occur, invalid block processing is performed on the macroblock.
- the processing completion determination means 9 disables the remaining processing by changing the processing to a processing that can greatly reduce the remaining processing.
- FIG. 4 shows the relationship between the time at which an interrupt is performed and the remaining amount of computation.
- the number of macroblocks in one frame is set to MB, and the amount of computation required to process one macroblock as an invalid macroblock is calculated. Ks.
- the calculation amount Ks required for processing as an invalid macroblock is much smaller than the calculation amount required for normal processing of one macroblock, and the same processing is performed for macroblocks of any frame. I do.
- the interrupting time may be calculated by the operating voltage / operating frequency calculator 3.
- Processing is performed for all unprocessed macroblocks as invalid blocks, and the process returns to the encoding processing routine.
- the interrupt is performed at the timing of the time T i, the calculation amount for processing at least all the MAC blocks as invalid blocks is secured, so that the failure phenomenon can always be avoided.
- the breakdown phenomenon may be avoided by increasing the operating frequency and operating voltage of the processor 1 as described later instead of the invalid blocking processing.
- an interrupt is performed at a timing that allows enough time to encode all the unprocessed macro blocks within the time allocated in advance to the encoding processing of the current frame.
- the operating voltage of processor 1 and The operating frequency is variable in P stages as shown in Fig. 5, the required computation amount of any one frame is Kt, and the time allocated to the processing of that frame is Tt.
- the operating frequency is set to Ft
- the operating voltage when operating the processor 1 at the operating frequency Ft is set to VDD
- the processing of the required calculation amount Kt is completed at time Tt (I.e., when the operating frequency is constant) is Case 1
- the initial operating frequency is set to h * Ft, as shown in Fig 6 (b), and the processor is operated at the operating frequency h * Ft.
- the operation voltage of the processor is changed to h * FtZ2 when the time T1 has elapsed, and the operation voltage for operating the processor 1 at the operation frequency h * FtZ2 is set to V2.
- Case 2 The case where the processing of the required operation amount Kt ends at time T 1 + T 2 (that is, the case where the operating frequency is switched once) is defined as Case 2, and the arbitrary one frame is defined for each Casel and Case2.
- FIG. 7 is a schematic block diagram showing the operation of the video encoding system S2 according to the second embodiment.
- the video coding processing system S2 of the present embodiment is different from the video coding processing system S1 of the first embodiment in that the processing completion determination means 9 and the processing completion determination means 9 are used as second failure avoidance means. At least a calculation remaining amount determining means 29 is provided in place of the used macro block number register 10.
- FIG. 8 is a diagram showing a schematic flowchart of a moving picture coding processing program Prg2 and a moving picture coding processing method realized thereby.
- the program Prg2 is a program that causes a computer to function as a moving image encoding processing system S2 including various means, and includes a second failure avoidance step that is executed by interrupting the encoding process (Step 5).
- the moving picture coding processing system S 2 is different from the moving picture coding processing system S 1, in that the operating frequency and operation of operating the peripheral device including the processor 1 and / or the local decoding memory 6 are different.
- the problem described above is solved by controlling the dynamic operating voltage and operating frequency to change the voltage.
- the dynamic operating voltage and operating frequency control will be described in detail.
- the operating frequency and operating voltage for the processing of the current frame are calculated by the operating voltage / operating frequency calculating means 3 based on the values calculated by the necessary operation amount calculating means 2.
- the calculated value of the required computation amount Kp is smaller than the required computation amount Km actually required for processing the current frame, the calculated value is calculated based on the value of the required computation amount Kp.
- the operating frequency and operating voltage are also lower than the operating frequency and operating voltage that are actually suitable for processing the current frame.
- the moving picture coding means 5 is provided with N times of interrupt processing at equal intervals to perform coding.
- the calculation remaining amount determination means 29 calculates the calculation remaining amount K i which is the remaining amount of the necessary calculation amount of the current frame calculated by the necessary calculation amount calculation means 2, and In the encoding processing of a predetermined frame by the moving picture encoding means 5, the amount of operation actually required is compared with the remaining amount of operation.
- F0 is the operating frequency of the processor set at the start of processing of the current frame
- j 0, 1,..., (I-1).
- the calculation remaining amount determining means 29 determines whether Ki ⁇ KpmX (MB-MBi) / MBi or Ki ⁇ KpmX (MB-MBi) / MBi.
- the video encoding means 5 performs (i + 1) times Processing of the current frame is continued until the time of the first interrupt processing.
- the calculation remaining amount determination means 29 is necessary when the calculated remaining calculation amount K i and the calculation amount Kpn ⁇ 3 ⁇ 43 ⁇ 4 ⁇ K i ⁇ KpmX (MB -MB i) ZMB i used for processing the current frame are satisfied. It is determined that the required amount of operation calculated by the operation amount calculation means 2 is smaller than the actually required amount of operation, and an instruction is given to the operating voltage / operating frequency control means 4 to increase the operating voltage and operating frequency by one step (sign 104). Here, an instruction may be given to increase the operating voltage and the operating frequency by two or more steps.
- MB is the total number of macroblocks included in the current frame
- MBi is the number of macroblocks that have been code-processed in the current frame at the i-th interrupt processing occurrence time.
- K i ⁇ KpmX (MB -MB i) / MB i and the formulas K i and KpmX (MB -MB i) / MB i K i ⁇ Kpm X (B LB L i) / BL i and K i ⁇ K pm X (BL—BL i) / BL i may be used.
- BL represents the total number of blocks included in the current frame
- BLi represents the number of processed blocks of the current frame at the i-th interrupt processing occurrence time.
- the system S2 may also include the first failure avoidance unit 11.
- the video decoding processing system S3 is a system that decodes an encoded video.
- FIG. 9 is a schematic block diagram showing the operation of the video decoding processing system S3.
- the moving picture decoding processing system S3 of the present embodiment is a processor in which the operating voltage and the operating frequency are prepared in r stages (r is an integer of 2 or more) and the operating voltage and the operating frequency can be changed by a program. 1 and the said Operating voltage and operating frequency controlling means for controlling the operating voltage and operating frequency of processor 1; local decoding frame memory 36 for storing the decrypted data of the previous frame; and determination of the remaining amount of operation to be performed on processor 1 Means 39.
- the operating voltage and operating frequency of the local decoding memory 36 may be controlled by the operating voltage and operating frequency control means 4 in the same manner as the processor 1.
- the processor 1 includes a required operation amount calculating unit 32 operating on the processor 1, an operating voltage / operating frequency calculating unit 3 ′ operating on the processor 1, and a moving image decoding unit 3 operating on the processor 1. 5 is provided.
- Reference numeral 301 denotes input encoded data
- reference numeral 102 denotes operating voltage / operating frequency instruction
- reference numeral 105 denotes operating voltage / operating frequency supply
- reference numeral 303 denotes decoded data.
- the same reference numerals as those in the embodiment denote portions having the same function or a function equivalent thereto.
- the point that decoding is performed instead of encoding and the points other than the following are the same as in the second embodiment.
- any one of the sequentially decoded frames to be decoded i.e., the next frame to be decoded based on the point in time when a certain frame is decoded
- the frame that has not been decoded yet at this point and is to be decoded in the future is replaced with the current frame, and one frame decoded before the current frame (decoded in the past).
- the process of decoding the current frame is described with the previous frame as the previous frame, but the same process is performed for any frame.
- the moving picture decoding processing program P rg 3 that makes the computer function as the moving picture decoding processing system S 3 is almost the same as the moving picture coding processing program P rg 1, but in Step 5, the A computer (specifically, a processor 1 built in the computer) functions as moving image decoding means 35 for decoding the encoded data.
- the input coded data 301 input to the video decoding processing system S3 is input to the required computation amount calculation means 32.
- the necessary calculation amount calculation means 32 calculates the amount of information (the number of bits) FB generated for one frame of the code data 301, ie, the coded data 310 of the current frame. A calculation is performed to predict the required calculation amount K ⁇ .
- the required computation amount ⁇ ⁇ is
- Kp G (FB, MVa, MV v, B, C, BR, Q, m ⁇ 2, I, E, P) ⁇ ⁇ ⁇ (Equation 11)
- FB is the number of bits of the encoded data of the current frame or the previous frame
- MVa is the average value of the motion vector size of the current frame or the previous frame
- MVv is the motion vector of the current frame or the previous frame.
- B is the number of effective blocks in the current or previous frame
- C is the number of effective coefficients in the current or previous frame
- BR is the bit rate of the current or previous frame
- Q is the quantum of the current or previous frame.
- AQ is the difference between the average values of the quantization step sizes of the current frame and the previous frame or the average value of the quantization step sizes of the previous frame and the frame before the previous frame.
- E is the amount of computation actually required to decode the previous frame
- P is the required performance. It represents a necessary calculation amount of the previous frame calculated by the amount computing means.
- the amount of computation required for decoding the current frame depends on the number of times the IDCT processing, IQ processing, and VLD processing are executed in decoding the current frame.
- the number of executions of the IDCT processing depends on the number of effective blocks included in the current frame
- the number of executions of the IQ processing and the VLD processing depends on the number of effective coefficients included in the current frame. In other words, when the number of effective blocks and the number of effective coefficients included in the current frame are large and small, the amount of computation required for the decoding process is large (small). Therefore, the function G is configured to set Hp large (small) when B and C are large (small).
- the function G is configured to set Hp large (small) when MVa and MVv are large (small).
- the function G is configured to set Hp small when the current frame is an I picture.
- the function G is? If 8 ⁇ 8 1 is large (small level), configure to set Hp large (small). Also, since the value of the quantization step size is changed when controlling the bit rate, for example, when Q or ⁇ ⁇ ⁇ is large (small), the quantization step size is set to a small (large) Hp. By considering the average value Q of the size and the difference ⁇ Q between the average values of the quantization step sizes, the value of H p calculated by the above function G is close to the amount of computation necessary to actually decode the current frame. It can be.
- MVa, MVv, B, C, BR, FB, and Q have similar values between the current frame and the previous frame. Therefore, when these parameters are used in the function G, the values in the current frame may be used, or the values in the previous frame may be used.
- the prediction operation amount Hp can be set to a value closer to the operation amount necessary for the actual decoding process by using the value in the current frame.
- the predicted operation amount Hp can be calculated before receiving the input coded data of the current frame.
- the decryption processing can be performed simultaneously.
- the amount of computation required for decoding the current frame is the amount of computation E that was actually required in the decoding process for the previous frame. And a value close to.
- the predicted operation amount calculated by the necessary operation amount calculation means is a value close to the operation amount required for the actual decryption processing, it becomes PE. Therefore, the necessary computation amount of the current frame is set to a value obtained by increasing or decreasing E or P according to the magnitude of parameters such as FB, MVa, MVv, B, C, BR, Q, and Q.
- E and P Hp calculated by the function G can be set to a value close to the amount of calculation necessary to actually decode the current frame.
- the required computation amount calculation means 32 only one of these elements may be used, or a plurality of these elements may be used in combination. That is, since these multiple elements are elements that affect the required computation amount required for the decoding processing of the current frame, the required computation amount calculation means 3 2 power
- the required computation amount K p (Saital) is calculated so that the required computation amount K p calculated by the required computation amount calculation means 32 is closer to the computation amount when the decoding process is actually performed. Become.
- the operating voltage / operating frequency calculating means 3 and the operating voltage / operating frequency control means 4 are the same as in the first embodiment.
- the moving image decoding means 35 decodes the input coded data 301 of the current frame to generate decoded data 306.
- the decoding processing is performed by the operating voltage / operating frequency control means 4 while operating the processor 1 at a constant operating voltage and operating frequency. For each frame, the required calculation amount is calculated before decoding the frame, and the frame is decoded while operating the processor at a constant operating frequency and operating voltage corresponding to the required calculation amount.
- the decrypted data 306 is displayed as a moving image on the image display unit of the mobile phone computer, or stored in a storage medium such as a disk or hard disk.
- the remaining computation Equipped with an amount judgment means 39 is almost the same as that of the second embodiment, except that the calculation remaining amount judging means 39 judges the calculation amount of the decoding process instead of the coding operation amount.
- the calculation remaining amount judging means 39 can avoid the failure phenomenon. Note that, as in the first embodiment, it is also possible to provide a processing completion determining means as first failure avoiding means. Note that there is no processing completion means in the decryption processing, and no invalid block processing is performed.
- the moving picture coding processing system includes a first failure avoiding means 11, a processing completion determining means 9 as a second failure avoiding means 9, and a calculation remaining amount determination as a second failure avoiding means.
- the means 29 and 39 may be provided independently, or may be provided by appropriately combining the respective means.
- the first and second failure avoidance means are all provided, and if the failure cannot be avoided even if the required amount of computation is increased by the first failure avoidance means 11, the second failure avoidance means If the operating voltage and operating frequency are raised by means of the remaining calculation means 29 and 39 as means, and furthermore the failure cannot be avoided, the processing completion determination means as second failure avoidance means 9 may be used to perform a failure avoiding process such as simply performing an encoding process.
- the moving picture coding processing program may be realized by hardware having the same function as the program.
- a first embodiment of the moving picture coding system S 1 according to the first embodiment will be described.
- the moving picture data composed of five frames is used as a c- encoding target.
- the second frame will be described as an example.
- Each frame is composed of a pixel array of 144 rows and 176 columns.
- MPEG-4 is used for the encoding process.
- the processor 1 of the video coding system S1 has an operating frequency of 189 MHz to 405 MHz, an operating voltage of 1.06 V to 1.8 V, an operating frequency of 27 MHz and It is variable in 9 steps at equal intervals for each voltage of 0.0925V.
- the video encoding system S 1 accesses the input frame memory 7 and 3 Obtain the second frame, and calculate the required calculation amount Kp of the frame by the required calculation amount calculation means 2. Specifically, the required amount of computation ⁇ is calculated using the following equation, using the 31st frame as the previous frame.
- the activity amount W of the 32nd frame which is the current frame is calculated by the following equation.
- the average quantization step size of the previous frame (average quantization step size) Qprev 4
- Number of effective coefficients of previous frame C 6 0 1 1
- amount of processing actually required for coding of previous frame S 1 544 7 1 0 5
- coding bit rate of current frame BR 6 5 5 3 Get 6.
- the required operation amount Kp is calculated by the following formula using each element.
- the above equation 3 will be described as an example.
- an operating frequency of 243 MHz and an operating voltage of 1.25 V are selected as the operating frequencies satisfying this operating frequency.
- the operating voltage / operating frequency control means 4 controls at least the processor 1 to operate constantly at an operating voltage of 243 MHz and an operating frequency of 1.25 V.
- the moving picture coding means 5 obtains the frame F from the input frame memory 7, and uses the port processor 1 which is constantly operated at the above operating frequency of 243 MHz and operating voltage of 1.25 V. Encoding processing is performed to generate encoded data.
- the processing completion determining means 9 calculates an interruption time by the following formula and performs an interruption.
- the processing completion judging means 9 judges whether or not Mbi and MB at the timing of this interrupt.
- T i 0.06665
- MB i is MB
- all remaining macro blocks are processed as invalid blocks. Return to the encoding routine.
- the current frame to be coded or decoded (encoded or decoded in the future) (The frame to be processed)
- a calculation is performed to predict the required amount of computation required for encoding or decoding
- control is performed almost constant at the minimum operating frequency within the time allocated to the processing of the current frame. Since the operating voltage and operating frequency are dynamically controlled in frame units, low power consumption can be achieved.
- the provision of the failure avoidance means makes it possible to avoid a failure phenomenon that occurs when the calculated required computational amount is smaller than the actually required computational amount, and the encoded or decoded moving image becomes poor. Can be prevented.
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CA002522870A CA2522870A1 (en) | 2003-04-15 | 2004-04-15 | System for encoding or decoding motion picture and metthod for encoding or decoding motion picture |
US10/553,651 US20060174303A1 (en) | 2003-04-15 | 2004-04-15 | Moving picture encoding or decoding processing system and mobin g picture encoding or decoding processing method |
JP2005505451A JPWO2004093458A1 (ja) | 2003-04-15 | 2004-04-15 | 動画像符号化又は復号化処理システム及び動画像符号化又は復号化処理方法 |
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US11949877B2 (en) * | 2021-10-01 | 2024-04-02 | Microsoft Technology Licensing, Llc | Adaptive encoding of screen content based on motion type |
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Cited By (8)
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JP4932846B2 (ja) * | 2005-11-11 | 2012-05-16 | エムテクビジョン カンパニー リミテッド | イメージ処理方法及び装置 |
JP2007251553A (ja) * | 2006-03-15 | 2007-09-27 | Matsushita Electric Ind Co Ltd | リアルタイム処理装置及びその方法 |
JP2012075145A (ja) * | 2006-08-29 | 2012-04-12 | Nvidia Corp | ビデオ復号時に動的周波数調整する方法及び装置 |
TWI413418B (zh) * | 2006-08-29 | 2013-10-21 | Nvidia Corp | 於視訊解碼時動態頻率調整之方法、系統、與時鐘頻率控制器 |
TWI448161B (zh) * | 2006-08-29 | 2014-08-01 | Nvidia Corp | 於視訊解碼時動態頻率調整之方法、系統、與時鐘頻率控制器 |
JP2009200672A (ja) * | 2008-02-20 | 2009-09-03 | Sony Corp | 画像信号処理装置、画像信号処理方法、およびプログラム |
JP4513034B2 (ja) * | 2008-02-20 | 2010-07-28 | ソニー株式会社 | 画像信号処理装置、画像信号処理方法、およびプログラム |
JP2009302597A (ja) * | 2008-06-10 | 2009-12-24 | Fujitsu Ltd | 画像復号装置 |
Also Published As
Publication number | Publication date |
---|---|
CA2522870A1 (en) | 2004-10-28 |
CN1774929A (zh) | 2006-05-17 |
EP1615438A1 (en) | 2006-01-11 |
JPWO2004093458A1 (ja) | 2006-07-13 |
US20060174303A1 (en) | 2006-08-03 |
EP1615438A4 (en) | 2007-05-02 |
KR20060009840A (ko) | 2006-02-01 |
AU2004229732A1 (en) | 2004-10-28 |
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