WO2003017331A3 - Speicherzelle mit grabenkondensator und vertikalem auswahltransistor und einem zwischen diesen geformten ringförmigen kontaktierungsbereich - Google Patents

Speicherzelle mit grabenkondensator und vertikalem auswahltransistor und einem zwischen diesen geformten ringförmigen kontaktierungsbereich Download PDF

Info

Publication number
WO2003017331A3
WO2003017331A3 PCT/DE2002/002559 DE0202559W WO03017331A3 WO 2003017331 A3 WO2003017331 A3 WO 2003017331A3 DE 0202559 W DE0202559 W DE 0202559W WO 03017331 A3 WO03017331 A3 WO 03017331A3
Authority
WO
WIPO (PCT)
Prior art keywords
selection transistor
trench capacitor
contacting area
memory cell
area formed
Prior art date
Application number
PCT/DE2002/002559
Other languages
English (en)
French (fr)
Other versions
WO2003017331A2 (de
Inventor
Albert Birner
Matthias Goldbach
Till Schloesser
Original Assignee
Infineon Technologies Ag
Albert Birner
Matthias Goldbach
Till Schloesser
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Infineon Technologies Ag, Albert Birner, Matthias Goldbach, Till Schloesser filed Critical Infineon Technologies Ag
Priority to US10/486,758 priority Critical patent/US7268381B2/en
Priority to JP2003522141A priority patent/JP4050230B2/ja
Priority to KR1020047002145A priority patent/KR100613927B1/ko
Priority to EP02762218A priority patent/EP1417707A2/de
Publication of WO2003017331A2 publication Critical patent/WO2003017331A2/de
Publication of WO2003017331A3 publication Critical patent/WO2003017331A3/de

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/01—Manufacture or treatment
    • H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
    • H10B12/03—Making the capacitor or connections thereto
    • H10B12/038—Making the capacitor or connections thereto the capacitor being in a trench in the substrate
    • H10B12/0383—Making the capacitor or connections thereto the capacitor being in a trench in the substrate wherein the transistor is vertical
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/01—Manufacture or treatment
    • H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
    • H10B12/03—Making the capacitor or connections thereto
    • H10B12/038—Making the capacitor or connections thereto the capacitor being in a trench in the substrate
    • H10B12/0385—Making a connection between the transistor and the capacitor, e.g. buried strap
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/01—Manufacture or treatment
    • H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
    • H10B12/05—Making the transistor
    • H10B12/053—Making the transistor the transistor being at least partially in a trench in the substrate

Abstract

Die obere Kondensatorelektrode (10) des Grabenkondensators ist durch einen rohrförmigen monokristallinen Si-Kontaktierungsbereich (7.1) mit einem epitaktisch aufgewachsenen Source-/Drain-Gebiet (21) des Auswahltransistors (20) verbunden. Die Gateelektrodenschicht (24) weist einen ovalen Umfangsverlauf um den Transistor (20) auf, wobei die ovalen Umfangsverläufe der Gateelektrodenschichten (24) von entlang einer Wortleitung aneinandergereihter Speicherzellen zur Steigerung der Packungsdichte Überlappungsbereiche (24.3) bilden.
PCT/DE2002/002559 2001-08-14 2002-07-12 Speicherzelle mit grabenkondensator und vertikalem auswahltransistor und einem zwischen diesen geformten ringförmigen kontaktierungsbereich WO2003017331A2 (de)

Priority Applications (4)

Application Number Priority Date Filing Date Title
US10/486,758 US7268381B2 (en) 2001-08-14 2002-07-12 Memory cell with trench capacitor and vertical select transistor and an annular contact-making region formed between them
JP2003522141A JP4050230B2 (ja) 2001-08-14 2002-07-12 トレンチキャパシタ、縦型選択トランジスタ、および、それらの間に形成された環状接触領域を備えたメモリーセル、メモリーセル構造体、ならびに、これらの製造方法
KR1020047002145A KR100613927B1 (ko) 2001-08-14 2002-07-12 메모리 셀, 메모리 셀 배열물, 메모리 셀 제조 방법 및메모리 셀 배열물 제조 방법
EP02762218A EP1417707A2 (de) 2001-08-14 2002-07-12 Speicherzelle mit grabenkondensator und vertikalem auswahltransistor und einem zwischen diesen geformten ringförmigen kontaktierungsbereich

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE10139827A DE10139827A1 (de) 2001-08-14 2001-08-14 Speicherzelle mit Grabenkondensator und vertikalem Auswahltransistor und einem zwischen diesen geformten ringförmigen Kontaktierungsbereich
DE10139827.1 2001-08-14

Publications (2)

Publication Number Publication Date
WO2003017331A2 WO2003017331A2 (de) 2003-02-27
WO2003017331A3 true WO2003017331A3 (de) 2003-10-09

Family

ID=7695362

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/DE2002/002559 WO2003017331A2 (de) 2001-08-14 2002-07-12 Speicherzelle mit grabenkondensator und vertikalem auswahltransistor und einem zwischen diesen geformten ringförmigen kontaktierungsbereich

Country Status (7)

Country Link
US (2) US20040104192A1 (de)
EP (1) EP1417707A2 (de)
JP (1) JP4050230B2 (de)
KR (1) KR100613927B1 (de)
DE (1) DE10139827A1 (de)
TW (1) TWI223439B (de)
WO (1) WO2003017331A2 (de)

Families Citing this family (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7309080B2 (en) * 2003-07-24 2007-12-18 Mein Gary W Extendable arm for a motor vehicle
KR100532509B1 (ko) * 2004-03-26 2005-11-30 삼성전자주식회사 ＳｉＧｅ를 이용한 트렌치 커패시터 및 그 형성방법
US7547945B2 (en) * 2004-09-01 2009-06-16 Micron Technology, Inc. Transistor devices, transistor structures and semiconductor constructions
US7384849B2 (en) 2005-03-25 2008-06-10 Micron Technology, Inc. Methods of forming recessed access devices associated with semiconductor constructions
US7282401B2 (en) 2005-07-08 2007-10-16 Micron Technology, Inc. Method and apparatus for a self-aligned recessed access device (RAD) transistor gate
US7867851B2 (en) 2005-08-30 2011-01-11 Micron Technology, Inc. Methods of forming field effect transistors on substrates
US7700441B2 (en) 2006-02-02 2010-04-20 Micron Technology, Inc. Methods of forming field effect transistors, methods of forming field effect transistor gates, methods of forming integrated circuitry comprising a transistor gate array and circuitry peripheral to the gate array, and methods of forming integrated circuitry comprising a transistor gate array including first gates and second grounded isolation gates
US7602001B2 (en) 2006-07-17 2009-10-13 Micron Technology, Inc. Capacitorless one transistor DRAM cell, integrated circuitry comprising an array of capacitorless one transistor DRAM cells, and method of forming lines of capacitorless one transistor DRAM cells
US7772632B2 (en) 2006-08-21 2010-08-10 Micron Technology, Inc. Memory arrays and methods of fabricating memory arrays
US7589995B2 (en) 2006-09-07 2009-09-15 Micron Technology, Inc. One-transistor memory cell with bias gate
US7923373B2 (en) 2007-06-04 2011-04-12 Micron Technology, Inc. Pitch multiplication using self-assembling materials
US8072345B2 (en) * 2008-02-14 2011-12-06 Darren Gallo Electronic flare system and apparatus
EP2133508B2 (de) * 2008-06-13 2015-03-18 BAUER Maschinen GmbH Bauarbeitsgerät mit ausfahrbarem Mast und Verfahren zum Betrieb eines solchen Bauarbeitsgerätes
JP5248952B2 (ja) * 2008-08-29 2013-07-31 株式会社タダノ ジブ付きクレーン車のジブ格納装置
US8187938B2 (en) * 2009-04-13 2012-05-29 Hynix Semiconductor Inc. Non-volatile memory device and method for fabricating the same
US9815674B2 (en) * 2013-02-21 2017-11-14 Manitowoc Crane Companies, Llc Pin puller for crane connections
KR102154075B1 (ko) * 2013-10-21 2020-09-09 삼성전자주식회사 반도체 소자의 검사 방법 및 반도체 검사 시스템
DE202017101042U1 (de) 2017-02-24 2017-03-24 Manitowoc Crane Group France Sas Verbolzungseinheit
US10589966B2 (en) 2017-03-02 2020-03-17 Manitowoc Crane Companies, Llc Jib coupling system for jib stowage
CN110520989B (zh) 2017-05-08 2023-09-29 美光科技公司 存储器阵列
US10825815B2 (en) 2017-05-08 2020-11-03 Micron Technology, Inc. Memory arrays
US11043499B2 (en) 2017-07-27 2021-06-22 Micron Technology, Inc. Memory arrays comprising memory cells
US10181472B1 (en) * 2017-10-26 2019-01-15 Nanya Technology Corporation Memory cell with vertical transistor
CN108167002A (zh) * 2018-01-31 2018-06-15 湖南五新隧道智能装备股份有限公司 一种用于拱架施工作业的伸缩臂组
CN110246841B (zh) * 2018-03-08 2021-03-23 联华电子股份有限公司 半导体元件及其制作方法
US10950618B2 (en) 2018-11-29 2021-03-16 Micron Technology, Inc. Memory arrays
US11665881B2 (en) 2021-07-30 2023-05-30 Nanya Technology Corporation Memory device with vertical field effect transistor and method for preparing the same

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5641694A (en) * 1994-12-22 1997-06-24 International Business Machines Corporation Method of fabricating vertical epitaxial SOI transistor
EP0905771A2 (de) * 1997-09-30 1999-03-31 Siemens Aktiengesellschaft DRAM Zelle mit Grabenkondensator und Verfahren zu deren Herstellung
US6144054A (en) * 1998-12-04 2000-11-07 International Business Machines Corporation DRAM cell having an annular signal transfer region
DE19946719A1 (de) * 1999-09-29 2001-04-19 Infineon Technologies Ag Grabenkondensator und Verfahren zu seiner Herstellung
US6262448B1 (en) * 1999-04-30 2001-07-17 Infineon Technologies North America Corp. Memory cell having trench capacitor and vertical, dual-gated transistor

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US1746109A (en) * 1929-03-21 1930-02-04 Edwards Lowi Lifeboat-handling mechanism
DE1709504A1 (de) * 1966-02-26 1976-05-13 Wieger Teleskopbagger mit um seine laengsachse drehbarem ausleger
FR1601845A (de) * 1968-12-30 1970-09-14
US3863407A (en) * 1971-02-13 1975-02-04 Gottwald Kg Leo Telescopic crane jib
US3842985A (en) * 1972-12-15 1974-10-22 Harnischfeger Corp Means for extending and retracting crane boom section
US3840128A (en) * 1973-07-09 1974-10-08 N Swoboda Racking arm for pipe sections, drill collars, riser pipe, and the like used in well drilling operations
US5743149A (en) * 1996-02-26 1998-04-28 Skyjack Equipment Inc. Articulated telescopic boom having slide-through knuckle
CN1213182A (zh) 1997-09-30 1999-04-07 西门子公司 用于动态随机存取存储器的存储单元
US6137128A (en) * 1998-06-09 2000-10-24 International Business Machines Corporation Self-isolated and self-aligned 4F-square vertical fet-trench dram cells
DE19844997A1 (de) * 1998-09-30 2000-04-13 Siemens Ag Vertikaler Feldeffekttransistor mit innenliegendem Gate und Herstellverfahren
DE19942012A1 (de) 1999-03-02 2000-09-28 Muesing Anton Gmbh Co Kg Verfahren und Vorrichtung zur Beseitigung von Treibselgut aus dem Bereich eines Deiches
US6320215B1 (en) * 1999-07-22 2001-11-20 International Business Machines Corporation Crystal-axis-aligned vertical side wall device
US6153902A (en) 1999-08-16 2000-11-28 International Business Machines Corporation Vertical DRAM cell with wordline self-aligned to storage trench
DE19944012B4 (de) * 1999-09-14 2007-07-19 Infineon Technologies Ag Grabenkondensator mit Kondensatorelektroden und entsprechendes Herstellungsverfahren

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5641694A (en) * 1994-12-22 1997-06-24 International Business Machines Corporation Method of fabricating vertical epitaxial SOI transistor
EP0905771A2 (de) * 1997-09-30 1999-03-31 Siemens Aktiengesellschaft DRAM Zelle mit Grabenkondensator und Verfahren zu deren Herstellung
US6144054A (en) * 1998-12-04 2000-11-07 International Business Machines Corporation DRAM cell having an annular signal transfer region
US6262448B1 (en) * 1999-04-30 2001-07-17 Infineon Technologies North America Corp. Memory cell having trench capacitor and vertical, dual-gated transistor
DE19946719A1 (de) * 1999-09-29 2001-04-19 Infineon Technologies Ag Grabenkondensator und Verfahren zu seiner Herstellung

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
HYUN-JIN CHO ET AL: "A novel pillar DRAM cell for 4 Gbit and beyond", VLSI TECHNOLOGY, 1998. DIGEST OF TECHNICAL PAPERS. 1998 SYMPOSIUM ON HONOLULU, HI, USA 9-11 JUNE 1998, NEW YORK, NY, USA,IEEE, US, PAGE(S) 38-39, ISBN: 0-7803-4770-6, XP010291127 *

Also Published As

Publication number Publication date
US20040232466A1 (en) 2004-11-25
EP1417707A2 (de) 2004-05-12
KR100613927B1 (ko) 2006-08-21
US20040104192A1 (en) 2004-06-03
JP2004538660A (ja) 2004-12-24
JP4050230B2 (ja) 2008-02-20
US7268381B2 (en) 2007-09-11
DE10139827A1 (de) 2003-03-13
WO2003017331A2 (de) 2003-02-27
KR20040030962A (ko) 2004-04-09
TWI223439B (en) 2004-11-01

Similar Documents

Publication Publication Date Title
WO2003017331A3 (de) Speicherzelle mit grabenkondensator und vertikalem auswahltransistor und einem zwischen diesen geformten ringförmigen kontaktierungsbereich
SG161735A1 (en) Folded bit line dram with vertical ultra thin body transistors
DE59607562D1 (de) Verfahren zur Herstellung einer DRAM-Speicherzelle mit vertikalem Transistor
WO2002015276A3 (de) Speicherzelle, speicherzellenanordnung und herstellungsverfahren
TW357435B (en) 4F-square memory cell having vertical floating-gate transistors with self-aligned shallow trench isolation
TW200703575A (en) Memory cell array and method of forming the same
WO2006026159A8 (en) Integrated dram-nvram multi-level memory
JPS6437865A (en) Semiconductor memory device and its manufacture
ATE222403T1 (de) Dram-speicherzelle mit vertikalem transistor und verfahren zur herstellung derselben
TW200737502A (en) Phase-change memory device and methods of fabricating the same
JPS6445160A (en) Semiconductor memory device and its manufacture
WO2002097891A3 (de) Dram-zellenanordnung mit vertikalen mos-transistoren und verfahren zu deren herstellung
EP1179850A3 (de) Ein Halbleiterspeicher und sein Produktionsverfahren
CA2006745A1 (en) Cross-point lightly-doped drain-source trench transistor and fabrication process therefor
TW349270B (en) 2F-square memory cell for gigabit memory applications
TW200735225A (en) Field effect transistors with vertically oriented gate electrodes and methods for fabricating the same
TW200618181A (en) Transistor array for semiconductor memory devices and method for fabricating a vertical channel transistor array
DE60122656D1 (de) DRAM Speicherzelle mit Grabenkondensator und vertikalem Transistor
SG124347A1 (en) Method for forming high-k charge storage device
EP0029099A3 (de) Halbleiterspeichervorrichtung
WO2003067640A3 (de) Verfahren zur herstellung und aufbau einer speicherzelle
WO2003069676A1 (fr) Dispositif a semi-conducteurs et procede de fabrication
TW200627639A (en) Semiconductor device with OMEGA gate and method for fabricating a semiconductor device
WO1997049134A3 (en) Soi-transistor circuitry employing soi-transistors and method of manufacture thereof
TW200711053A (en) A method of forming a memory cell array and a memory cell array

Legal Events

Date Code Title Description
AK Designated states

Kind code of ref document: A2

Designated state(s): JP KR

Kind code of ref document: A2

Designated state(s): JP KR US

AL Designated countries for regional patents

Kind code of ref document: A2

Designated state(s): DE FR GB IE IT

121 Ep: the epo has been informed by wipo that ep was designated in this application
DFPE Request for preliminary examination filed prior to expiration of 19th month from priority date (pct application filed before 20040101)
WWE Wipo information: entry into national phase

Ref document number: 2002762218

Country of ref document: EP

WWE Wipo information: entry into national phase

Ref document number: 1020047002145

Country of ref document: KR

WWE Wipo information: entry into national phase

Ref document number: 2003522141

Country of ref document: JP

WWP Wipo information: published in national office

Ref document number: 2002762218

Country of ref document: EP

WWE Wipo information: entry into national phase

Ref document number: 10486758

Country of ref document: US

WWW Wipo information: withdrawn in national office

Ref document number: 2002762218

Country of ref document: EP