WO2002027789A1 - Dispositif de connexion - Google Patents

Dispositif de connexion Download PDF

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Publication number
WO2002027789A1
WO2002027789A1 PCT/DE2001/003439 DE0103439W WO0227789A1 WO 2002027789 A1 WO2002027789 A1 WO 2002027789A1 DE 0103439 W DE0103439 W DE 0103439W WO 0227789 A1 WO0227789 A1 WO 0227789A1
Authority
WO
WIPO (PCT)
Prior art keywords
area
connection
circuit unit
contact device
region
Prior art date
Application number
PCT/DE2001/003439
Other languages
German (de)
English (en)
Other versions
WO2002027789B1 (fr
Inventor
Robert Bergmann
Joost Larik
Ralf Otremba
Xaver Schloegel
Juergen Schredl
Original Assignee
Infineon Technologies Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from DE10124141A external-priority patent/DE10124141B4/de
Application filed by Infineon Technologies Ag filed Critical Infineon Technologies Ag
Priority to EP01971698A priority Critical patent/EP1320889A1/fr
Publication of WO2002027789A1 publication Critical patent/WO2002027789A1/fr
Publication of WO2002027789B1 publication Critical patent/WO2002027789B1/fr

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Definitions

  • the connecting device according to the invention is characterized in that the connecting device is essentially designed as a - preferably prefabricated - metallic or alloy area at least partially in the area of the circuit unit and / or in the area of the contact device while largely avoiding adhesive elements and solder elements.
  • connecting device it is therefore a basic idea of the connecting device according to the invention to provide a metallic or alloy area instead of gluing or soldering.
  • this measure avoids adhesive yards or soldering yards, and space is thus saved according to the invention.
  • metallic or alloy areas are particularly suitable for absorbing thermomechanical tensions between a circuit unit and a contact device to be contacted, because favorable thermomechanical or thermal expansion properties can be achieved through an appropriately selected composition - especially in the context of a prefabrication process.
  • a metallization or alloying process is easier to integrate in terms of production technology than gluing or soldering.
  • At least one buffer area in particular in the form of a layer, is provided. This is designed so that the thermomechanical tensions between the circuit unit and the contact device can be absorbed during operation. Thus, a thermo-mechanical decoupling, and discharge is generated between the circuit unit and the contacts in the circuit arrangement ⁇ direction realized by the vorgese ⁇ Henen buffer area.
  • Layer e.g. the buffer, through which both the buffer property and the connection function are then realized.
  • connection area is advantageously formed at least with a surface area thereof as an essentially integral component, in particular as a layer, in an area of the existing structure of the contact device and / or the circuit unit.
  • the integration into an existing structure also enables automated production, preferably in a prefabrication step, with regard to the design of the connection area.
  • an additional intermediate area is provided, in particular in the form of an intermediate layer, in order to indirectly mechanically and / or electrically connect the buffer area and the connecting area to one another during operation. It can thereby be achieved that the circuit unit and the contact device as well as the buffer area and the connection area are further decoupled from one another thermomechanically, ot ) t P 1 P> o c ⁇ o C ⁇ o UI tr P- ⁇ «SD SD ⁇ td tr tr o C ⁇ 3> d ⁇ Tl> ⁇ o C ⁇ cn P ⁇ 13 n Cd C ⁇
  • P 3 P- 3 SS to SD 3 3 ⁇ P P P- N O ⁇ Hi " ⁇ tr ⁇ d EP vQ ⁇ ⁇ td ⁇ P" N ⁇ 3 N ⁇ ⁇ ⁇ P- ⁇ o Cd rt P ⁇ ! P- P- 3 ⁇
  • thermomechanical tensions between a chip and, for example, a lead frame have been compensated for by gluing or soldering.
  • the buffer layer also favors the alloying process. Usually the thin alloy layers - from e.g. l ⁇ m - only applicable for small chip areas.
  • the buffer layer also allows large chip areas according to the invention, as can also be achieved with gluing or soldering.
  • the alloying process is also considerably easier to implement than the gluing process or the soldering process. Overall, this leads to a significant reduction in process costs.
  • Another advantage lies in the far better reliability of the alloy connection compared to other die bonding processes.
  • the decoupling between the buffer layer and the connection layer is also decisive for the advantages of the connection device according to the invention described above.
  • the buffer is moved to another existing structure, namely the structure of the circuit unit or the structure of the contact device.
  • connection layer in the connection area, in particular in a first area thereof, from gold and tin or from tin alone.
  • the connection area as a whole and in particular the first area thereof, which at least contains tin, is advantageously realized as thin as possible and is thereby arranged between two areas or layers made of the same material - namely either between two silver layers or between two copper layers.
  • connection region 16 in this embodiment likewise consists of two layers, namely a layer 16-2 of gold and tin connected to the intermediate layer 14 with a thickness of 1 ⁇ m and subsequently another layer 16-1, which consists of silver and which Surface area 16b is connected to the copper of the lead frame or the contact device 4.
  • contact devices 34 and 35 are also embedded in a housing 36 made of a potting compound.
  • the circuit unit 32 of the conventional circuit arrangement 30 is connected to the contact device 34 via an adhesive or soldering 31.
  • P- P SD ⁇ ⁇ rt ex ⁇ P * l P ⁇ P CL ⁇ CO P- 3 SD C ⁇ P- ⁇ d C ⁇ tr P 3 3 P ex ⁇ ⁇ SD ⁇ P- vQ ⁇ P 4-> ⁇ C ⁇ 1 P 1 3

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Wire Bonding (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

L'objectif de l'invention est, lors du soulagement thermomécanique pendant la connexion d'un circuit (2) avec un dispositif de contact (4) d'un ensemble circuit (1), au moyen d'un dispositif de connexion (10), de solliciter le moins de place possible. A cet effet, il est proposé, selon l'invention, que le dispositif de connexion (10) se présente sous la forme d'une zone métallique ou d'alliage préfaçonné dans la zone du circuit (2) et dans la zone du dispositif de contact (4), cette zone préfaçonnée étant obtenue, dans la plus large mesure, sans élément de collage ou de soudage.
PCT/DE2001/003439 2000-09-29 2001-09-10 Dispositif de connexion WO2002027789A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
EP01971698A EP1320889A1 (fr) 2000-09-29 2001-09-10 Dispositif de connexion

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
DE10048426.3 2000-09-29
DE10048426 2000-09-29
DE10124141.0 2001-05-17
DE10124141A DE10124141B4 (de) 2000-09-29 2001-05-17 Verbindungseinrichtung für eine elektronische Schaltungsanordnung und Schaltungsanordnung

Publications (2)

Publication Number Publication Date
WO2002027789A1 true WO2002027789A1 (fr) 2002-04-04
WO2002027789B1 WO2002027789B1 (fr) 2002-07-25

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EP (1) EP1320889A1 (fr)
WO (1) WO2002027789A1 (fr)

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DE102005024430A1 (de) * 2005-05-24 2006-11-30 Infineon Technologies Ag Siliziumwafer mit einer lötbaren Beschichtung auf seiner Waferrückseite und Verfahren zum Herstellen desselben
US8110437B2 (en) 2002-05-16 2012-02-07 Osram Opto Semiconductors Gmbh Method for attaching a semiconductor chip in a plastic encapsulant, optoelectronic semiconductor component and method for the production thereof
US8211752B2 (en) * 2007-11-26 2012-07-03 Infineon Technologies Ag Device and method including a soldering process
DE102012111654B4 (de) * 2011-12-01 2020-02-06 Infineon Technologies Ag Verfahren zur Herstellung eines elektronischen Bauelements

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US4929516A (en) * 1985-03-14 1990-05-29 Olin Corporation Semiconductor die attach system
EP0253691A2 (fr) * 1986-06-17 1988-01-20 Fairchild Semiconductor Corporation Procédé de montage d'un dé en silicium
DD271595A1 (de) * 1988-04-26 1989-09-06 Seghers A Mikroelektronik Veb Rueckseitenmetallisierung von si-halbleiterbauelementen
DE3823347A1 (de) * 1988-07-09 1990-01-11 Semikron Elektronik Gmbh Leistungs-halbleiterelement
JPH07147292A (ja) * 1993-11-25 1995-06-06 Nec Corp 半導体装置の製造方法
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EP0714126A1 (fr) * 1994-11-23 1996-05-29 AT&T Corp. Couche métallique d'adaptation
US5901901A (en) * 1996-02-19 1999-05-11 Siemens Aktiengesellschaft Semiconductor assembly with solder material layer and method for soldering the semiconductor assemly

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Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8110437B2 (en) 2002-05-16 2012-02-07 Osram Opto Semiconductors Gmbh Method for attaching a semiconductor chip in a plastic encapsulant, optoelectronic semiconductor component and method for the production thereof
DE102005024430A1 (de) * 2005-05-24 2006-11-30 Infineon Technologies Ag Siliziumwafer mit einer lötbaren Beschichtung auf seiner Waferrückseite und Verfahren zum Herstellen desselben
DE102005024430B4 (de) * 2005-05-24 2009-08-06 Infineon Technologies Ag Verfahren zum Beschichten eines Siliziumwafers oder Siliziumchips
US8211752B2 (en) * 2007-11-26 2012-07-03 Infineon Technologies Ag Device and method including a soldering process
US8710678B2 (en) 2007-11-26 2014-04-29 Infineon Technologies Ag Device and method including a soldering process
DE102012111654B4 (de) * 2011-12-01 2020-02-06 Infineon Technologies Ag Verfahren zur Herstellung eines elektronischen Bauelements
US11842975B2 (en) 2011-12-01 2023-12-12 Infineon Technologies Ag Electronic device with multi-layer contact and system

Also Published As

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WO2002027789B1 (fr) 2002-07-25
EP1320889A1 (fr) 2003-06-25

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