WO2000063960A1 - Process for etching a silicon layer in a plasma processing chamber to form deep openings - Google Patents
Process for etching a silicon layer in a plasma processing chamber to form deep openings Download PDFInfo
- Publication number
- WO2000063960A1 WO2000063960A1 PCT/US2000/009447 US0009447W WO0063960A1 WO 2000063960 A1 WO2000063960 A1 WO 2000063960A1 US 0009447 W US0009447 W US 0009447W WO 0063960 A1 WO0063960 A1 WO 0063960A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- etching
- silicon layer
- gas
- plasma etching
- plasma
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P50/00—Etching of wafers, substrates or parts of devices
- H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
- H10P50/24—Dry etching; Plasma etching; Reactive-ion etching of semiconductor materials
- H10P50/242—Dry etching; Plasma etching; Reactive-ion etching of semiconductor materials of Group IV materials
Definitions
- This invention relates to the fabrication of semiconductor integrated circuits (ICs).
- the present invention relates to improved methods for etching a silicon layer in a plasma processing chamber to form deep openings having high aspect ratios.
- Deep openings which may have aspect ratios higher than 35:1, may be etched in the silicon for the purposes of, by way of example, storage, forming isolated capacitors or in MEM device applications. Openings having etch depths of about 3 ⁇ m to about 10 ⁇ m may be termed as deep openings, whereas openings having etch depths of more than about 10 ⁇ m may be termed as ultra deep openings. These ranges are provided as a guide to explaining the invention, and are not intended to define any limitations to the invention. For example, it is assumed that a method for etching an ultra deep opening would be equally effective for etching a more shallow opening.
- Fig.1 shows the steps involved in a prior art method of etching deep openings that utilizes a prior art etching gas chemistry.
- This prior art method starts at 102 when a substrate is provided in a plasma processing chamber and begins with an initial breakthrough etch using a fluorine chemistry in 104, which may be, by way of example, CF4.
- This initial etch phase is followed by preparations for the main etch step, which starts at 106 by providing an SF 6 /O /He etchant gas chemistry and striking a plasma using this gas chemistry in 108.
- the main etch starts in 110 by using the plasma to etch a deep opening in a silicon layer, for example, a trench having a depth of approximately
- Fig. 2 illustrates a cross-sectional view of an exemplary deep opening having an etch depth of approximately 5.5 ⁇ m in a silicon layer with a masking layer over it that was etched using the prior art etching method presented in Fig. 1.
- a silicon layer 202 which has a masking layer 204 disposed over it, is etched to form a deep trench 206.
- Masking layer 204 may be a layer of conventional photoresist material, which may be patterned for etching, e.g., through exposure to ultraviolet rays. An etch rate of approximately 1.5 ⁇ m/min is achieved.
- Deep trench 206 which was etched using the etching method described in Fig.l, has a number of structural flaws, for example, bowed features 208 in the sidewalls as well as notch-like features 210, which resulted from undercutting of the hard mask.
- a method of etching deep openings in a silicon layer in a plasma etching reactor includes the steps of providing a semiconductor substrate including the silicon layer into the plasma etching reactor and flowing a gas chemistry for the main etch that includes an oxygen reactant gas, and a helium gas into the plasma etching reactor.
- the method further includes striking a plasma using the etchant gas chemistry, and then providing a fluorine-containing additive gas, which may include, by way of example, SF ⁇ , into the plasma etching reactor subsequent to striking the plasma.
- the method continues with etching an opening at least partially through the silicon layer using this plasma.
- a chlorine-containing chemistry is provided prior to flowing the main etch gas chemistry to etch through a native oxide layer that may be disposed over the silicon layer.
- a method of etching ultra deep openings in a silicon layer in a plasma etching reactor includes the steps of providing a semiconductor substrate including the silicon layer into the plasma etching reactor and flowing a gas chemistry for the main etch that includes an oxygen reactant gas, a helium gas, and an inert bombardment-enhancing gas into the plasma etching reactor.
- the method further includes striking a plasma using the etchant gas chemistry, and then providing a fluorine-containing additive gas, which may include, for example, SF 6 , into the plasma etching reactor subsequent to striking the plasma.
- the method continues with etching an opening at least partially through the silicon layer using this plasma.
- argon is selected as the inert bombardment-enhancing gas and a chlorine-containing chemistry is provided prior to flowing the main etch gas chemistry to etch through a native oxide layer that may be disposed over the silicon layer.
- Fig. 1 shows the steps involved in a prior art method of etching deep openings that utilizes a prior art etching gas chemistry.
- Fig. 2 illustrates a cross-sectional view of a deep opening in a silicon layer that was etched using the prior art etching method.
- Fig. 3 is a simplified diagram of a plasma reactor that may be suitably employed with the improved gas chemistry in accordance with one aspect of the invention.
- Fig. 4 shows the steps involved in a first inventive method of etching deep openings in accordance with one aspect of the present invention.
- Fig. 5(a) illustrates a cross-sectional view of a deep opening in a silicon layer that was etched using an inventive etching method in accordance with one embodiment of the present invention.
- Fig. 5(b) illustrates a cross-sectional view of the result obtained by attempting to etch an ultra deep opening in a silicon layer using the same inventive etching method as Fig.
- Fig. 6 shows the steps involved in a second inventive method of etching ultra deep openings using a second etching gas chemistry in accordance with another aspect of the invention.
- Fig. 7 illustrates a cross-sectional view of an ultra deep opening in a silicon layer that was etched using the second inventive etching method in accordance with one embodiment of the present invention.
- inventive etching process in accordance with one aspect of this invention is a complex application that produces deep, high aspect ratio openings with precisely controlled sidewall angles.
- Etch depths achieved using the inventive process may reach approximately 30 ⁇ m or more, with aspect ratios of greater than about 10:1, some as high as about 35:1.
- Sidewall angles may generally be greater than approximately 87 degrees.
- a preferred result of applying this invention is to achieve a deep opening in the silicon layer having all the desired characteristics such as a substantially vertical profile, high etch rate/depth, minimal RIE lag and critical dimension bias, and high TEOS/Si selectivity and silicon uniformity.
- a method of etching deep openings in a silicon layer in a plasma etching reactor includes the steps of providing a semiconductor substrate including the silicon layer into the plasma etching reactor and flowing a gas chemistry for the main etch that includes an oxygen reactant gas, and a helium gas into the plasma etching reactor.
- the method further includes striking a plasma using the etchant gas chemistry, and then providing a fluorine-containing additive gas that may include, by way of example, SF 6 , into the plasma etching reactor subsequent to striking the plasma.
- the method continues with etching an opening at least partially through the silicon layer using this plasma.
- a chlorine- containing chemistry is provided prior to flowing the main etch gas chemistry to etch through a native oxide layer that may be above the silicon layer.
- a method of etching ultra deep openings in a silicon layer in a plasma etching reactor includes the steps of providing a semiconductor substrate including the silicon layer into the plasma etching reactor and flowing a gas chemistry for the main etch that includes an oxygen reactant gas, a helium gas, and an inert bombardment-enhancing gas into the plasma etching reactor.
- the method further includes striking a plasma using the etchant gas chemistry, and then providing a fluorine-containing additive gas, which may include, by way of example, SF 6 , into the plasma etching reactor subsequent to striking the plasma.
- the method continues with etching an opening at least partially through the silicon layer using this plasma.
- argon is selected as the inert bombardment-enhancing gas and a chlorine-containing chemistry is provided prior to flowing the main etch gas chemistry to etch through a native oxide layer that may be above the silicon layer.
- a wafer reactor 302 includes a plasma processing chamber 304. On the top surface of the chamber 304. there is disposed a quartz window 306, which serves as a transparent medium to allow RF energy to enter the chamber.
- a coil 308 positioned above plasma processing chamber 304 emits the RF energy, which is supplied by a power generator 310 that generates power that may range from about 300 W to about 2000 W, preferably between about 400 W and about 1200 W, and more preferably at about 1000
- the etching gas chemistry is released through a gas inlet 312 into the RF-induced plasma region 314 between quartz window 306 and a wafer 316.
- the etching gas chemistry may also be released from other ports built into the walls of the chamber itself.
- Wafer 316 is introduced into chamber 304 and disposed on an electrostatic chuck 318, which acts as the bottom electrode that is driven by a power generator 320.
- Power generator 320 generates power that may range from about 20 W to about 100 W, preferably between about 20 W and about 30 W, and more preferably at about 25 W in one embodiment.
- Helium cooling gas may be introduced under pressure (e.g., about 4-14 Torr, preferably about 6-10 Torr, and more preferably at about 8 Torr, for example, in one embodiment) between electrostatic chuck 318 and wafer 316 to act as a heat transfer medium for accurately controlling the wafer's temperature during processing to ensure uniform and repeatable etching results.
- the temperature of electrostatic chuck 318 may be kept between about 0°C and about 70°C, preferably between about 15°C and about 60°C, more preferably about 20°C in one embodiment, whereas the chamber temperature may be kept between about 20°C and 70°C, preferably between about 40°C and about 70°C, more preferably at about 50°C in one embodiment.
- the pressure within plasma processing chamber 304 is preferably kept low, e.g., between about 40 mTorr to about 110 mTorr, preferably between about 50 mTorr to about 100 mTorr, more preferably at about 60 mTorr in one embodiment.
- Fig. 4 shows the steps involved in a first inventive method of etching deep openings in accordance with one aspect of the present invention.
- This inventive method starts at 402 when a substrate is placed upon a lower electrode, which may be an electrostatic chuck, in a plasma processing chamber.
- the lower electrode temperature is maintained at approximately 30 °C, which is substantially less than the lower electrode temperature of approximately 50 °C that is provided in the prior art method.
- a reduced lower electrode temperature is believed to minimize critical dimension bias, which results in a more uniform cross-sectional area along the entire depth of the etched opening, in this example, a CD bias of less than approximately 0.03 is achieved.
- a chlorine-containing chemistry is provided for an initial breakthrough etch in 404.
- This chlorine-containing chemistry was found to be more effective than the fluorine- containing chemistry used in the prior art in achieving the purpose of this initial breakthrough etch, which is to etch through a native oxide layer that is usually formed on the silicon layer when the silicon reacts with the oxygen in the air.
- the use of a chlorine- containing chemistry is also believed to eliminate the bowed features 208 which were present in the results shown in Fig. 2.
- a gas chemistry having oxygen and helium is provided, followed by the striking of a plasma using this gas chemistry in 408.
- a fluorine-containing gas such as SF 6 does play a role in this etchant chemistry
- this reactive gas element is deliberately excluded during the striking of the plasma to avoid a vertical flash effect that may cause an undercutting of the hard mask and the silicon interface, which in turn may cause a notch-like structure to form along the sidewalls of the opening.
- the act of striking the plasma absent the presence of SF 6 may be sustained for a given time period, for example, seven seconds.
- SF 6 is added into the plasma processing chamber in 410, followed by the start of the main etch. This process ends in 414 when the etching of a deep opening is complete.
- gases that may be substituted for SF 6 include C 4 F 8 , CF 4 , NF 3 , and CHF 3 .
- Fig. 5(a) illustrates a cross-sectional view of a deep opening 502 in a silicon layer 504 that was etched using this inventive etching method in accordance with one embodiment of the present invention.
- deep opening 502 which has an etch depth of approximately 5.5 ⁇ m, has a straight vertical profile, without the problematic characteristics such as the bowed features and the notch-like features that result from undercutting the hard mask that were present in a deep opening etched using the prior art method as depicted in Fig. 2.
- Fig. 5(b) illustrates a cross-sectional view of the result obtained by attempting to etch an ultra deep opening in a silicon layer using largely the same inventive etching method and parameters as Fig. 5(a) except the lower electrode temperature is further reduced to 20 °C in an attempt to further improve the critical dimension control.
- a deep opening 512 in a silicon layer 514 having an etch depth of approximately 13 ⁇ m is shown in this figure.
- the average etch rate achieved was approximately 1.6 ⁇ m/min. It is questionable whether the average etch rate calculated in this instance is at all reflective of the actual etch rate, since the etching failed to reach the targeted etch depth of 30 ⁇ m, in fact there was an etch stop at an etch depth of approximately 15 ⁇ m which occurred prior to the end of the designated etch time of 500 seconds. Deep opening 512 still has a largely vertical profile, except near the top surface where sidewalls of the opening is pulled back due to the reoccurrence of the undercutting of the hard mask, which causes a sloped profile 516 from a level where the pulling back begins to the top edge of the etched opening.
- Fig. 6 shows the steps involved in a second inventive method of etching deep openings using a second etching gas chemistry in accordance with another aspect of the invention that begins in 602.
- a chlorine chemistry is provided for an initial breakthrough etch in 604.
- a gas chemistry having an oxygen reactant, helium, and an inert bombardment-enhancing gas such as argon is provided. After flowing this gas chemistry, a plasma is struck using this etchant gas chemistry in 608.
- a fluorine-containing reactive gas element does play a role in this etchant chemistry but is deliberately excluded during the striking of the plasma to avoid a vertical flash effect that may cause an undercutting of the hard mask and the silicon interface, which in turn may cause a notch-like structure to form along the sidewalls of the opening.
- the act of striking the plasma absent the presence of a fluorine-containing chemistry such as SF 6 may be sustained for a certain amount of time, for example, seven seconds.
- SF 6 is added into the plasma processing chamber in 610, followed by the start of the main etch in 612. This process ends in 614 when the etching of a deep opening is complete.
- FIG. 7 illustrates a cross-sectional view of an opening in a silicon layer that was etched using the second inventive etching method in accordance with one embodiment of the present invention.
- the top power was increased and the chamber pressure was decreased in one embodiment to bolster the etching process and therefore minimize the possibility of an etch stop.
- the addition of argon also played a contributory role in enhancing the ion bombardment.
- an ultra deep opening 702 approximately 30 ⁇ m, having a high aspect ratio greater than approximately 30:1, has been etched into a silicon layer 704.
- An etch rate of 3.6 ⁇ m/min was reached in this instance.
- the sidewall profile was substantially vertical with good critical dimension control, as can be seen in this figure, which is very difficult to achieve in etching openings of comparable depths and aspect ratios.
- an important feature of this inventive method of etching ultra deep openings is the inclusion of an inert bombardment-enhancing gas such as argon or xenon. It is believed that the addition of this inert bombardment-enhancing gas might possibly play a role in eliminating the undercutting of the hard mask, which in turn helps in controlling the sidewall profile. Adding a heavy inert gas such as argon to the total gas flow is also believed to contribute to the improvement of the RIE lag problem.
- RIE lag is the etch rate difference between different openings that are being etched. Usually RIE lag occurs in openings having different feature sizes, but in some cases, RIE lag occurs in features of the same size.
- the improved etching gas chemistry provides a silicon:TEOS selectivity ratio of greater than approximately 60:1, which is much higher than the selectivity ratio of approximately 25:1 or less provided by the prior art etching gas chemistry (which does not employ an inert bombardment-enhancing gas such as Ar).
- inventive methods each involve only one main etch step without a polymerizing step, and therefore are more direct and cleaner processes in comparison with methods commonly used in the industry to etch deep openings which involve etching down a predetermined depth, followed by a polymerizing step for passivation, and then repeating this alternating sequence until the desired etch depth is reached.
- these improved etching methods advantageously allow for the etching of an opening with a desired etch depth in one main etch.
- Table 1 provides approximate ranges of suitable parameters for use in the plasma reactor such as the chamber pressure (in mTorr), the top power and bias power (in W), the chamber temperature and lower electrode temperatures(in degrees Celsius), the helium pressure at the electrostatic chuck(in Torr), as well exemplary parameters used to obtain the etching results shown in the Figs. 2, 5(a), 5(b), and 7.
- Table 2 provides the approximate preferred and approximate more preferred ranges of flow rates (in seem) of some of the basic components of an exemplar etching gas chemistry used in the inventive method, e.g., Cl 2 , SF 6 , O 2 , He, and Ar, as well as exemplar recipes for the specific gas chemistries used to obtain the etching results shown in the figures.
- Table 3 provides the approximate preferred and approximate more preferred ranges and exemplar parameters of flow rates of some basic components such as Cl 2 , O , He, and Ar in an exemplar etching chemistry used in the inventive method, relative to the SF 6 flow rate in percentage
- gas components may or may not be present in certain specific gas chemistries, for example, Cl 2 is used to substantially replace the CF used for the initial breakthrough etch in the prior art process, so it is not a primary component of the breakthrough etch gas chemistry used in process A.
- this gas chemistry components listed in Table 2 are by no means all-inclusive, other types of gases may also be included in a gas chemistry to achieve certain purposes or to meet the particular needs of the specific type of etching equipment used.
- the most preferred gas chemistry used in the main etch for etching an ultra deep opening does not include any significant amount of additional gases other than those provided in Table 2, namely, SF 6 , O 2 , He, and Ar.
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- Drying Of Semiconductors (AREA)
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2000612994A JP4852196B2 (ja) | 1999-04-20 | 2000-04-06 | 深開口部を形成するためにプラズマ処理室内でシリコン層をエッチングする方法 |
| KR1020017013210A KR20020010605A (ko) | 1999-04-20 | 2000-04-06 | 깊은 개구부 형성을 위한 플라즈마처리 반응실에서의실리콘층 에칭공정 |
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US09/295,634 US6191043B1 (en) | 1999-04-20 | 1999-04-20 | Mechanism for etching a silicon layer in a plasma processing chamber to form deep openings |
| US09/295,634 | 1999-04-20 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| WO2000063960A1 true WO2000063960A1 (en) | 2000-10-26 |
Family
ID=23138562
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| PCT/US2000/009447 Ceased WO2000063960A1 (en) | 1999-04-20 | 2000-04-06 | Process for etching a silicon layer in a plasma processing chamber to form deep openings |
Country Status (5)
| Country | Link |
|---|---|
| US (2) | US6191043B1 (https=) |
| JP (1) | JP4852196B2 (https=) |
| KR (1) | KR20020010605A (https=) |
| TW (1) | TW457584B (https=) |
| WO (1) | WO2000063960A1 (https=) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| SG145568A1 (en) * | 2002-06-14 | 2008-09-29 | Lam Res Corp | Process for etching dielectric films with improved resist and/or etch profile characteristics using etch gas with fluorocarbon and hydrogen |
| US7799691B2 (en) | 2003-07-11 | 2010-09-21 | Infineon Technologies Ag | System and method for anisotropically etching a recess in a silicon substrate |
| US7927966B2 (en) | 2006-12-12 | 2011-04-19 | Nxp B.V. | Method of manufacturing openings in a substrate, a via in substrate, and a semiconductor device comprising such a via |
| US9245764B2 (en) | 2011-11-17 | 2016-01-26 | Tokyo Electron Limited | Semiconductor device manufacturing method |
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| US6544860B1 (en) * | 2000-03-06 | 2003-04-08 | Koninklijke Philips Electronics N.V. | Shallow trench isolation method for forming rounded bottom trench corners |
| US6743732B1 (en) * | 2001-01-26 | 2004-06-01 | Taiwan Semiconductor Manufacturing Company | Organic low K dielectric etch with NH3 chemistry |
| US6451673B1 (en) * | 2001-02-15 | 2002-09-17 | Advanced Micro Devices, Inc. | Carrier gas modification for preservation of mask layer during plasma etching |
| US6746961B2 (en) | 2001-06-19 | 2004-06-08 | Lam Research Corporation | Plasma etching of dielectric layer with etch profile control |
| AU2002337812A1 (en) * | 2001-10-31 | 2003-05-12 | Tokyo Electron Limited | Method of etching high aspect ratio features |
| US20040171260A1 (en) * | 2002-06-14 | 2004-09-02 | Lam Research Corporation | Line edge roughness control |
| JP4098225B2 (ja) * | 2003-12-01 | 2008-06-11 | 松下電器産業株式会社 | プラズマエッチング方法 |
| KR101083558B1 (ko) * | 2003-12-01 | 2011-11-14 | 파나소닉 주식회사 | 플라즈마 에칭 방법 |
| US20050280674A1 (en) | 2004-06-17 | 2005-12-22 | Mcreynolds Darrell L | Process for modifying the surface profile of an ink supply channel in a printhead |
| US7309641B2 (en) * | 2004-11-24 | 2007-12-18 | United Microelectronics Corp. | Method for rounding bottom corners of trench and shallow trench isolation process |
| US7202178B2 (en) * | 2004-12-01 | 2007-04-10 | Lexmark International, Inc. | Micro-fluid ejection head containing reentrant fluid feed slots |
| JP5041696B2 (ja) * | 2005-11-15 | 2012-10-03 | パナソニック株式会社 | ドライエッチング方法 |
| US7985688B2 (en) * | 2005-12-16 | 2011-07-26 | Lam Research Corporation | Notch stop pulsing process for plasma processing system |
| CN101379600A (zh) * | 2006-02-01 | 2009-03-04 | 阿尔卡特朗讯公司 | 各向异性刻蚀方法 |
| US7608195B2 (en) * | 2006-02-21 | 2009-10-27 | Micron Technology, Inc. | High aspect ratio contacts |
| US7517804B2 (en) * | 2006-08-31 | 2009-04-14 | Micron Technologies, Inc. | Selective etch chemistries for forming high aspect ratio features and associated structures |
| KR100838399B1 (ko) | 2007-05-17 | 2008-06-13 | 주식회사 하이닉스반도체 | 반도체 소자의 트렌치 형성 방법 |
| JP5135879B2 (ja) * | 2007-05-21 | 2013-02-06 | 富士電機株式会社 | 炭化珪素半導体装置の製造方法 |
| US8500913B2 (en) * | 2007-09-06 | 2013-08-06 | Micron Technology, Inc. | Methods for treating surfaces, and methods for removing one or more materials from surfaces |
| US8263497B2 (en) * | 2009-01-13 | 2012-09-11 | International Business Machines Corporation | High-yield method of exposing and contacting through-silicon vias |
| JP5305973B2 (ja) * | 2009-02-20 | 2013-10-02 | ラピスセミコンダクタ株式会社 | トレンチ形成方法 |
| WO2011066668A1 (en) * | 2009-12-02 | 2011-06-09 | C Sun Mfg. Ltd. | Method of etching features into substrate |
| US8802571B2 (en) | 2011-07-28 | 2014-08-12 | Lam Research Corporation | Method of hard mask CD control by Ar sputtering |
| US20140199833A1 (en) * | 2013-01-11 | 2014-07-17 | Applied Materials, Inc. | Methods for performing a via reveal etching process for forming through-silicon vias in a substrate |
| CN104347390B (zh) * | 2013-07-31 | 2017-06-27 | 中微半导体设备(上海)有限公司 | 一种等离子体刻蚀基片的方法 |
| JP6557588B2 (ja) * | 2015-12-04 | 2019-08-07 | 株式会社日立ハイテクノロジーズ | ドライエッチング方法 |
| JP6328703B2 (ja) * | 2016-08-15 | 2018-05-23 | 東京エレクトロン株式会社 | 半導体装置の製造方法 |
| WO2020131793A1 (en) * | 2018-12-20 | 2020-06-25 | Mattson Technology, Inc. | Silicon mandrel etch after native oxide punch-through |
| CN112285828A (zh) * | 2020-09-30 | 2021-01-29 | 中国科学院微电子研究所 | 一种端面耦合器及其封装方法、应用 |
| CN114678270B (zh) * | 2020-12-24 | 2025-08-08 | 中微半导体设备(上海)股份有限公司 | 一种电感耦合等离子处理装置及其刻蚀方法 |
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2000
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- 2000-04-06 WO PCT/US2000/009447 patent/WO2000063960A1/en not_active Ceased
- 2000-04-06 KR KR1020017013210A patent/KR20020010605A/ko not_active Withdrawn
- 2000-04-07 TW TW089106468A patent/TW457584B/zh not_active IP Right Cessation
- 2000-12-27 US US09/750,499 patent/US20010001743A1/en not_active Abandoned
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| SG145568A1 (en) * | 2002-06-14 | 2008-09-29 | Lam Res Corp | Process for etching dielectric films with improved resist and/or etch profile characteristics using etch gas with fluorocarbon and hydrogen |
| US7547635B2 (en) | 2002-06-14 | 2009-06-16 | Lam Research Corporation | Process for etching dielectric films with improved resist and/or etch profile characteristics |
| US7799691B2 (en) | 2003-07-11 | 2010-09-21 | Infineon Technologies Ag | System and method for anisotropically etching a recess in a silicon substrate |
| US7927966B2 (en) | 2006-12-12 | 2011-04-19 | Nxp B.V. | Method of manufacturing openings in a substrate, a via in substrate, and a semiconductor device comprising such a via |
| US9245764B2 (en) | 2011-11-17 | 2016-01-26 | Tokyo Electron Limited | Semiconductor device manufacturing method |
Also Published As
| Publication number | Publication date |
|---|---|
| US6191043B1 (en) | 2001-02-20 |
| TW457584B (en) | 2001-10-01 |
| JP2002542623A (ja) | 2002-12-10 |
| JP4852196B2 (ja) | 2012-01-11 |
| KR20020010605A (ko) | 2002-02-04 |
| US20010001743A1 (en) | 2001-05-24 |
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