WO1999057755A1 - Procede selectif d'attaque a sec - Google Patents

Procede selectif d'attaque a sec Download PDF

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Publication number
WO1999057755A1
WO1999057755A1 PCT/JP1999/002025 JP9902025W WO9957755A1 WO 1999057755 A1 WO1999057755 A1 WO 1999057755A1 JP 9902025 W JP9902025 W JP 9902025W WO 9957755 A1 WO9957755 A1 WO 9957755A1
Authority
WO
WIPO (PCT)
Prior art keywords
gas
etching
dry etching
layer
based material
Prior art date
Application number
PCT/JP1999/002025
Other languages
English (en)
Japanese (ja)
Inventor
Kuniaki Goto
Kimiaki Tanaka
Toshiro Yamada
Original Assignee
Nippon Zeon Co., Ltd.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Zeon Co., Ltd. filed Critical Nippon Zeon Co., Ltd.
Publication of WO1999057755A1 publication Critical patent/WO1999057755A1/fr

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/311Etching the insulating layers by chemical or physical means
    • H01L21/31105Etching inorganic layers
    • H01L21/31111Etching inorganic layers by chemical means
    • H01L21/31116Etching inorganic layers by chemical means by dry-etching

Definitions

  • the present invention relates to a dry etching method applied in the field of manufacturing semiconductor devices and the like, and more particularly to a method of dry etching a silicon oxide-based material layer while securing a large selectivity to a silicon nitride-based material layer.
  • the base material layer here mainly refers to a silicon-based material layer such as a silicon substrate, a polysilicon layer, and a polycide film.
  • the same gas composition as that for etching the SiO x layer is basically applied to the dry etching of the SiO x N y layer.
  • the SiO x layer is etched by a mechanism mainly based on ion-assisted reaction
  • the SiO x Ny layer is etched based on a radical reaction mechanism using F radical as a main etching species. The etching rate is also faster than that of the SiO x layer.
  • Some silicon device manufacturing processes require highly selective etching between the SiO x layer and the SiO x N y layer. Further, miniaturization of the device, and an increasing number of cases in which complicated the and also Doconnection S i x N y layer is formed as an etching stop layer for preventing the etching damage at various locations, therefore, S i A need has arisen for highly selective etching of the Si x layer on the xN y layer.
  • ⁇ _NO S i O x layer ZS i x N y or are a gate insulating film is formed having a layer ZS i O x layer
  • S i O x layer dividing lines on this shall the etching reliably stopped at the surface of S i x N y layer.
  • Japanese Patent Laid-Open No. 6- 2 75568 within the ion density may generate etching apparatus 10 11 ions ZCM 3 or more plasma, the general formula C x F y (provided that, x, y are natural numbers, satisfy y ⁇ x + 2 relationship. the Furuorokabon compound represented by) to produce a plasma of the etching gas mainly, S i x N S I_ ⁇ based material formed on the y-based material layer Methods have been proposed for selectively etching layers.
  • 8-31797 describes a method for selectively etching a silicon oxide-based material layer on a substrate having a silicon oxide-based material layer formed on a silicon nitride-based material layer. Etching the silicon oxide-based material layer substantially by the thickness of the layer;
  • the over-etching step of performing dry etching using an etching gas mainly composed of a bon-based compound and etching the remaining portion of the silicon oxide-based material layer the etching including the fluorocarbon-based compound and the nitrogen-containing organic silicon compound is performed.
  • a method of performing dry etching using a ting gas has been proposed.
  • An object of the present invention is to provide a method for dry-etching a silicon oxide-based material on a substrate having a silicon oxide-based material layer formed on a silicon nitride-based material. It is an object of the present invention to provide a method capable of sufficiently reducing the in-plane variation of the image.
  • a method for selectively dry-etching a silicon oxide-based material layer on a substrate having a silicon oxide-based material layer formed on a silicon nitride-based material layer comprising: Is characterized by using perfluorocycloolefin having an oxygen content of 1,000 ppm or less as an etching gas.
  • a selective dry etching method is provided.
  • the dry-etching gas containing perfluorocycloolefin used in the present invention may be any gas as long as fluorine radicals are generated by plasma in dry etching, and the carbon number of perfluorocycloolefin is exceptional. Although not limited, it is usually 3 to 8, preferably 4 to 6, and most preferably 5.
  • perfluorocycloolefin examples include perfluorocycloprobene, perfluorocyclobutene, perfluorocyclopentene, perfluorocyclohexene, and perfluorocyclohepne. And perfluorocyclooctene, perfluoro-1-methylcyclobutene, perfluoro-3-methylcyclobutene, perfluoro-1-methylcyclopentene, perfluoro-3-methylcyclopentene, and the like.
  • perfluorocyclobutene perfluorocyclopentene, perfluorocyclohexene, perfluorocyclobutene, no-fluorocyclopentene, perfluoro-3-methylcyclobutene, and perfluorool Preferred are 1-methylcyclopentene, perfluoro-3-methylcyclopentene and the like, and most preferred is perfluorocyclopentene.
  • Perfluorocycloolefins are usually produced by a fluorination reaction using a corresponding chlorine-containing cyclic hydrocarbon as a raw material.
  • octafluorocyclopentene is produced by reacting octachlorocyclopentene as a raw material with potassium fluoride in an organic solvent.
  • reaction intermediates and by-products in which the fluorination reaction does not completely proceed are mixed in the reaction product.
  • the desired fluorfluorocyclopentene is accompanied by various compounds having a chlorine atom as impurities.
  • Examples of typical chlorine atom-containing compounds include 1-chloro-2,3,3,4,4,5,5—hepnofluorocyclopentane, 1,3-dichloro-2,3,4,4 , 5,5-hexafluorocyclopentene, 1,3,4-trichloro-2,3,4,5,5_pentafluorofluoropentene, 1-chloro-1,2-, 2,3,3,4,4, 5, 5- O-cyclopentane, 1,4-dichloro-1,2,3,3,4,5,5-hexafluorocyclopentene and 1,4,4-trichloro-1,2-, 3,3,5,5-pentene Fluorocyclopentene and the like.
  • perfluorocycloolefin is used as an etching gas, and the concentration of impurities having chlorine atoms contained in the perfluorocycloolefin is suppressed to 100 ppm or less.
  • the silicon oxide-based material layer can be etched with high selectivity on a substrate in which a silicon oxide-based material layer is formed on a silicon nitride-based material layer.
  • the concentration of the impurity having a chlorine atom must be not more than 1,000 ppm, and is preferably as low as possible.
  • the concentration is preferably less than 100 ppm, more preferably less than 100 ppm, and most preferably less than 1 ppm.
  • Impurities having chlorine atoms are usually removed from perfluorocycloolefins by distillation utilizing a difference in boiling point from perfluorocycloolefins.
  • the fluorination reaction product is washed with water, dried, and then distilled at normal pressure under an inert gas atmosphere.
  • the content of chlorine atom-containing impurities in perfluorocycloolefin can be measured by gas chromatography analysis.
  • the etching gas composed of perfluorocycloolefin can contain various gases generally used as dry etching gas.
  • gases include oxygen gas, nitrogen gas, argon gas, hydrogen gas, carbon monoxide gas, carbon dioxide gas, nitrogen oxide gas and sulfur oxide gas.
  • a fluorocarbon-based gas at a hide port can be added.
  • examples of such an additive gas include CF 3 H gas and CF 2 H 2 gas. These additional gases may be used alone or in combination of two or more.
  • the amount of the added gas varies depending on the degree of the gas exerted on the material to be etched, but is usually 40 parts by weight or less, preferably 2 parts by weight, based on 100 parts by weight of the dry etching gas containing perfluorocycloolefin. 5 parts by weight or less.
  • 10 '" ⁇ 0 13 Ion'no cm 3 of about Density is preferable for achieving higher performance and forming fine patterns
  • the particularly high etching rate and high silicon oxide-based material layer selection targeted by the present invention are intended.
  • the polymer film cannot be achieved, and a polymer film is formed by deposition, which is not preferable.
  • the pressure at the time of etching the gas composition containing the gas for dry etching and other gas used in combination as required does not need to be selected in a special range. It introduced so that the gas composition in the pressure of about 10To rr ⁇ 10- 5 to rr within etching apparatus degassed. Preferably a l (r 2 To rr ⁇ 10- 3 To rr.
  • the temperature of the substrate to be etched may be controlled to any temperature by a heating or cooling device or may not be substantially controlled.
  • the temperature of the substrate is usually from 0 ° C to about 300 ° C, preferably from 50 ° C to 150 ° C, more preferably from 70 ° C to 130 ° C, most preferably 80 ° C (: to Select within a range of 100 ° C.
  • high-speed etching can be performed while maintaining high selectivity with respect to polysilicon and selectivity with respect to photoresist.
  • “Etching without substantial control” means within etching within ⁇ 30% of the temperature reached by the substrate to be etched when the temperature of the substrate to be etched is not controlled at all, preferably ⁇ 20%. %, More preferably ⁇ 10% Refers to performing etching at a temperature of Therefore, the operation of rapidly cooling in response to the rapid heat generation during etching is excluded, but the operation of cooling down before removing the substrate to be etched is included. As described above, if it is possible to maintain the temperature of the substrate to be etched substantially the same as the temperature in the case of controlling without substantially controlling the temperature, it is extremely advantageous in operation.
  • the etching time is about 10 seconds to 10 minutes.
  • high-speed etching is generally possible, so that it is preferably 10 seconds to 3 minutes from the viewpoint of improving productivity.
  • the interlayer insulation film having a so-called ON_ ⁇ (S i O x layer ZS i x N y layer ZS I_ ⁇ x layer) structure.
  • ON_ ⁇ S i O x layer ZS i x N y layer ZS I_ ⁇ x layer
  • the configuration of a wafer used as an etching sample in this embodiment will be described.
  • a silicon substrate On a silicon substrate, forming a S i 3 N 4 base film layer, followed by forming a S I_ ⁇ second interlayer insulating film first layer. Further, a Si 3 N 4 etching stop layer was patterned on the first SiO 2 interlayer insulating film. This etching stop layer is formed by forming an opening having an opening width of about 0.6 m by patterning using a resist mask. Further, on the S i 3 N 4 etching stop layer, the S I_ ⁇ second interlayer insulating film a second layer entirely coating formed, the uppermost layer to form a resist mask having a predetermined
  • the resist mask was patterned so that the opening having an opening width of about 2 m was located directly above the opening of the Si 3 N 4 etching stop layer (about 0.6 im in width).
  • a 150-mm diameter wafer consisting of an interlayer insulating film with a multilayer structure as described above is set in a helicon wave type plasma etching system (I-4100 SH type, manufactured by ANELVA), and the system is evacuated and then etched. Production Example 1 was used as the gas. Pressure in the system was maintained at 5mmTo rr, the plasma density was set to 5 X 10 1 ° I O emissions / cm 3.
  • Etching was performed by cooling the wafer stage so that the surface temperature of the silicon wafer was maintained at 90 ° C.
  • the wafer surface temperature was confirmed to be the specified temperature ⁇ 4 ° C using a thermal label.
  • the silicon oxide insulating film layer on the Si 3 N 4 base film layer and the Si 3 N 4 etching stop layer could be etched very well in a predetermined pattern. Further, the opening edge of the Si 3 N 4 etching stop layer was not etched, and no deformation was observed. No polymer deposition on the hall wall was observed.
  • Etching was performed in the same manner as in Example 1 except that Sample 4 of Production Example 1 was used. As a result, a silicon oxide insulating film layer on the Si 3 N 4 underlayer and the Si 3 N 4 etching stopper layer was obtained. Was able to be etched very well in a predetermined pattern. Further, the opening edge of the Si 3 N 4 etching stop layer was not etched at all, and no deformation was observed. No polymer deposition on the hall wall was allowed.
  • Etching was performed in the same manner as in Example 1 except that Sample 1 of Production Example 1 was used. As a result, the opening of the Si 3 N 4 etching stop layer was etched in the same manner as the silicon oxide insulating film layer, The predetermined hole diameter was not maintained. In particular, the Si 3 N 4 etching significantly deformed the edge portion of the stop layer. Polymer deposition was noted on the hall wall.
  • the present invention has been described with respect to three specific examples, but the present invention is not limited to these examples. It goes without saying that the configuration of the sample wafer, the etching conditions, and the type of the etching gas used in the etching apparatus can be appropriately changed. Industrial applicability
  • etching between a silicon oxide-based material layer and a silicon nitride-based material layer can be realized with high selectivity. It is suitable for the manufacture of a semiconductor device which is designed based on and has a high degree of integration and high performance.

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  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Inorganic Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • General Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Drying Of Semiconductors (AREA)

Abstract

L'invention concerne un procédé sélectif d'attaque à sec d'une couche de matière à base d'oxyde de silicium sur un substrat où l'on a formé une couche d'une matière à base de nitrure de silicium, ainsi qu'une couche d'une matière à base d'oxyde de silicium formée sur la matière à base de nitrure de silicium. Ce procédé consiste à utiliser en tant que gaz d'attaque une perfluorocyclo-oléfine d'une teneur en chlore contenant des impuretés égale ou inférieure à 1000 ppm. On utilise de préférence la perfluorocyclo-oléfine ayant de trois à huit atomes de carbone, mieux encore, de quatre à six atomes de carbone; toutefois, on utilise idéalement l'octacyclopentène.
PCT/JP1999/002025 1998-04-30 1999-04-16 Procede selectif d'attaque a sec WO1999057755A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP13429798A JPH11317392A (ja) 1998-04-30 1998-04-30 選択ドライエッチング方法
JP10/134297 1998-04-30

Publications (1)

Publication Number Publication Date
WO1999057755A1 true WO1999057755A1 (fr) 1999-11-11

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PCT/JP1999/002025 WO1999057755A1 (fr) 1998-04-30 1999-04-16 Procede selectif d'attaque a sec

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JP (1) JPH11317392A (fr)
TW (1) TW409306B (fr)
WO (1) WO1999057755A1 (fr)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002025979A (ja) 2000-07-03 2002-01-25 Hitachi Ltd 半導体集積回路装置の製造方法
US6686296B1 (en) 2000-11-28 2004-02-03 International Business Machines Corp. Nitrogen-based highly polymerizing plasma process for etching of organic materials in semiconductor manufacturing

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04258117A (ja) * 1991-02-12 1992-09-14 Sony Corp ドライエッチング方法
JPH0992640A (ja) * 1995-09-22 1997-04-04 Sumitomo Metal Ind Ltd プラズマエッチング方法
JPH0997835A (ja) * 1995-09-29 1997-04-08 Sony Corp 接続孔の製造方法
JPH09173773A (ja) * 1995-12-26 1997-07-08 Tokuyama Corp ペルフルオロオレフィンの除去方法

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04258117A (ja) * 1991-02-12 1992-09-14 Sony Corp ドライエッチング方法
JPH0992640A (ja) * 1995-09-22 1997-04-04 Sumitomo Metal Ind Ltd プラズマエッチング方法
JPH0997835A (ja) * 1995-09-29 1997-04-08 Sony Corp 接続孔の製造方法
JPH09173773A (ja) * 1995-12-26 1997-07-08 Tokuyama Corp ペルフルオロオレフィンの除去方法

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TW409306B (en) 2000-10-21
JPH11317392A (ja) 1999-11-16

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