WO1999030546A1 - Procede et dispositif pour la correction d'un trajet d'insertion automatique - Google Patents

Procede et dispositif pour la correction d'un trajet d'insertion automatique Download PDF

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Publication number
WO1999030546A1
WO1999030546A1 PCT/KR1997/000257 KR9700257W WO9930546A1 WO 1999030546 A1 WO1999030546 A1 WO 1999030546A1 KR 9700257 W KR9700257 W KR 9700257W WO 9930546 A1 WO9930546 A1 WO 9930546A1
Authority
WO
WIPO (PCT)
Prior art keywords
automatic insertion
insertion path
path
initially
corrected
Prior art date
Application number
PCT/KR1997/000257
Other languages
English (en)
Inventor
Chae-Won Yun
Original Assignee
Daewoo Electronics Co., Ltd.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Daewoo Electronics Co., Ltd. filed Critical Daewoo Electronics Co., Ltd.
Priority to EP97947217A priority Critical patent/EP0968636A1/fr
Priority to PCT/KR1997/000257 priority patent/WO1999030546A1/fr
Priority to JP53066199A priority patent/JP2001511954A/ja
Publication of WO1999030546A1 publication Critical patent/WO1999030546A1/fr

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Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K13/00—Apparatus or processes specially adapted for manufacturing or adjusting assemblages of electric components
    • H05K13/08—Monitoring manufacture of assemblages
    • H05K13/085—Production planning, e.g. of allocation of products to machines, of mounting sequences at machine or facility level
    • H05K13/0853—Determination of transport trajectories inside mounting machines

Definitions

  • the present invention relates to an automatic insertion machine for automatically inserting electronic components into a printed circuit board (PCB) . More particularly, the present invention relates to a method for correcting an automatic insertion path necessary to insert electronic components into the PCB to a desired path and a device for performing the same.
  • PCB printed circuit board
  • an automatic inserting machine used for automatically inserting electronic components into a PCB
  • working preparation hours and guide tables should be produced so as to increase efficiency of an automatic insertion machine.
  • a worker produces an automatic insertion path in advance so that the automatic insertion machine can insert the electronic components into the corresponding location of the PCB along the automatic insert path.
  • a model automatically inserted into the PCB is variable, whenever the PCB model changes, the worker must produce a new automatic insertion path.
  • an automatic insertion path and order are adjusted to the characteristics of the automatic inserting equipment and electronic components.
  • workers decide an automatic insertion path in advance in the field, they produce numerical control programs and working guide tables.
  • the above-mentioned operation needs an expert with much experience and knowledge with respect to the equipment .
  • Much time is required even for workers who have been working for a long time in the field, and the workers find it hard to perform the operation of everything by hand.
  • development of software which produces rational operation strategy by means of a computer necessitated.
  • the automatic insertion path produced as described above is less efficient than a path which a worker directly produces. Accordingly, the worker partially amends and stores the path, compares the stored path with a previously and automatically produced path, and decides the most efficient path based on the comparison result. At this time, working guide tables and numeral control programs with respect to a determined path should be produced. However, when an automatic insertion path which is produced as mentioned above is not a path that a worker wants, the automatic insertion path should be corrected to the path that the worker wants.
  • U.S. Patent No. 5,079,834 (issued to Masato Itagaki et al . on January 14, 1992) discloses an electronic- component mounting apparatus and mounting method which mount small-sized electronic components on printed circuit boards.
  • the patent of Masato Itagaki et al . consists in that printed patterns on a printed circuit board and component information near the printed patterns are photographed, that the type of an electronic component to be mounted and the mounting position and mounting attitude of the electronic component are recognized from the photographed image, and that the predetermined electronic component is mounted on the predetermined position of the printed circuit board at the predetermined attitude on the basis of the above information items. Further, a program for the mounting order of all the electronic components to be mounted on the printed circuit board is generated on the basis of the image processing information items.
  • the patent of Masato Itagaki et al . does not disclose a method or an apparatus for correcting an automatic inserting path.
  • method for correcting an automatic insertion path comprising the steps of: a) producing an initially automatic insertion path with respect to electronic components to be inserted into a printed circuit board; b) constituting a connecting state matrix of the initially automatic insertion path based on the initially produced automatic insertion path; c) correcting the initially automatic insertion path based on the connecting state matrix of the initially automatic insertion path to obtain a corrected path including a plurality of paths; and d) judging whether all paths of the corrected path are connected to determine whether the corrected path is a desired automatic insertion path according to a result of the judgement.
  • an apparatus for correcting an automatic insertion path comprising: a means for producing an initially automatic insertion path with respect to electronic components to be inserted into a printed circuit board; an input section for inputting data for correcting the initially automatic insertion path in order to obtain a corrected automatic insertion path; a control section for constituting a connecting state matrix of the initially automatic insertion path based on the initially automatic insertion path produced by said means, and judging whether all paths of the corrected automatic insertion path are connected to determine whether the corrected automatic insertion path obtained by said input section is a desired automatic insertion path according to a result of the judgement; and a memory for storing the initially automatic insertion path produced by said means and the corrected automatic insertion path obtained by said input section.
  • an automatic insertion path with respect to electronic components to be inserted into a printed board can be corrected into a desired automatic insertion path that a user wants.
  • FIG. 1 is a block diagram for showing a configuration of an apparatus for correcting an automatic insertion path according to an embodiment of the present invention
  • FIG. 2 is a view for showing an example of a main menu screen indicated in the monitor of FIG. 1 ;
  • FIGs. 3(A) and (B) are views for showing a connecting state matrix of an automatic insertion path with respect to electronic components to be inserted into a PCB according to the present invention
  • FIG. 4 is a view for showing an initial state of an automatic insertion path produced by an automatic insertion path producing section of FIG. 1 ;
  • FIG. 5 shows a first matrix for illustrating connecting states between electronic components to be inserted on a PCB in the initial state of the automatic insertion path shown in FIG. 4;
  • FIG. 6 is a view for showing an intermediate state that first predetermined paths are deleted from the initial state of the automatic path shown in FIG. 4;
  • FIG. 7 shows a second matrix for illustrating connecting states between electronic components in the second state shown in FIG. 6;
  • FIG. 8 is a view for showing a corrected state that second predetermined paths are added to the second state of the automatic path shown in FIG. 6;
  • FIG. 9 shows a third matrix for illustrating connecting states between electronic components in the third state shown in FIG. 8; and FIG. 10 is a flow chart for illustrating a method for correcting an automatic insertion path according to an embodiment of the present invention.
  • FIG. 1 shows a configuration of an apparatus 10 for correcting an automatic insertion path according to an embodiment of the present invention.
  • the apparatus 10 includes an automatic insertion path producing section 102, an input section 104, a control section 106, and a memory 108.
  • the automatic insertion path producing section 102 produces an initially automatic insertion path with respect to electronic components to be inserted into a printed circuit board.
  • the input section 104 inputs data for correcting the initially automatic insertion path in order to obtain a corrected automatic insertion path.
  • the input section 104 includes a mouse 104a for correcting the initially automatic insertion path produced by the automatic insertion path producing section 102 to obtain a correctted path by deleting first predetermined paths and adding second predetermined paths.
  • the input section includes a keyboard 104b for inputting a file name for storing a desired automatic insertion which will be described.
  • the control section 106 constitutes a connecting state matrix of the initially automatic insertion path based on the initially automatic insertion path produced by the automatic insertion path producing section 102.
  • the control section 106 judges whether all paths of the corrected automatic insertion path are connected to determine whether the corrected automatic insertion path obtained by the input section 104 is a desired automatic insertion path according to a result of the judgement. That is, when all paths of the corrected path are connected, the control section 106 produces a numerical control program according to a data format of automatic insertion equipment in order to process the corrected path, and when any paths of the corrected path are not connected, the control section 106 generates an error message.
  • the input section 104 corrects the initially automatic insertion path based on the connected state matrix of the initially automatic insertion path constituted by the control section 106.
  • the memory 108 stores the initially automatic insertion path produced by the automatic insertion path producing section 102 and the corrected automatic insertion path obtained by the input section 104.
  • the apparatus according to the present invention further includes a monitor 110 for displaying the initially automatic insertion path produced by the automatic insertion path producing section 102 and a result message according to whether the corrected automatic insertion path is a desired automatic insertion path by the control section 106.
  • FIG. 2 shows an example of a main menu screen 20 displayed on the monitor 106 of FIG. 1.
  • An initially automatic insertion path 201 which is produced by an automatic insertion path producing section 102 is indicated at the upper left portion of the main menu screen 20.
  • a pattern 202 which connects each of the components is indicated at the lower left portion of the initially automatic insertion path 201.
  • Reference numerals A, B, C, D, E, and F are the first, second, third, fourth, fifth, and sixth electronic components, respectively, to be inserted into a PCB 201a.
  • Reference numeral PI is a first path between the first component A and the second component B.
  • Reference numeral P2 is a second path between the second component B and the third component C.
  • Reference numeral P3 is a third path between the third component C and the fourth component D .
  • Reference numeral P4 is a fourth path between the fourth component D and the fifth component E.
  • Reference numeral P5 is a fifth path between the fifth component E and the sixth component F.
  • Six electronic components A, B, C, D, E, and F are shown in FIG. 2, but a greater number of the electronic components may be inserted in the PCB 201a.
  • a menu 203 for selecting a function is described at the right portion of the component layout 201 and the pattern 202.
  • the menu 203 includes a model register and modification, a model selection, a component distribution, a touch test, a present condition of a component distribution, equipment selection, a path selection, an automatic insertion path production, a path decision, E.C. application, an inserting line composition by hand, a component search, a screen return, a print, and an end.
  • FIGs. 3(A) and (B) show a connecting state matrix of electronic components to be inserted into a PCB 201a based on the initially automatic insertion path of FIG. 2.
  • FIG. 3 (A) indicates a component n-1 (where, n is an integer greater than 2) to be presently inspected, the left of the center component n-1 of FIG. 3 (A) indicates a component n-2 which have been previously inspected, and the right of the center component n-1 indicates a component n which will inspected next.
  • the center column of FIG. 3(B) indicates components to be presently inspected, the left of the center column indicates components which have been previously inspected, and the right column indicates components which will inspected next.
  • components from a first component "1" to an n-th component "n” are arranged in order.
  • a first component "1” is allotted to a first center column, and since there is not a component at a left of the first component "1", "-1" is allotted to a left of the first center column.
  • an n-th component n is allotted to an n-th center column, and since there is not a component at the left of the n-th component, "-1" is allotted to a left of the n-th center column. Therefore, if values which is not "-1" are left or right of each component, the corresponding component is in a connecting state with components which are located in front of and behind the corresponding component. On the other hand, if "-l" is allotted to the left and the right of a component, the component is not in a connecting state with other components .
  • FIG. 4 shows an initial state of an automatic insertion path produced by an automatic insertion path producing section 102 of FIG. 1.
  • Reference numerals A, B, C, D, E, and F are the first, second, third, fourth, fifth, and sixth electronic components, respectively, to be inserted into a PCB 201a.
  • Reference numerals PI, P2 , P3 , P4 , P5 , and P6 are a first path between the first and second components A and B, a second path between the second and third components B and C, a third path between the third and fourth components C and D, a fourth path between the fourth and fifth components D and E, and a fifth path between the fifth and sixth components E and F.
  • FIG. 5 shows a first matrix for illustrating connecting states between electronic components to be inserted on a PCB in the initial state of the automatic insertion path shown in FIG. 4.
  • the first component A is allotted to a first center column, and since there is not a component at the left of the first component A, "-1" is allotted to the left of the first center column, while the second component B is allotted to the right of the first center column.
  • the second component B is allotted to a second center column, the first and third components A and C are allotted to the left and the right of the second center column, respectively.
  • the third, fourth, and fifth components C, D, and E are allotted to third, fourth, and fifth center columns.
  • the second and fourth components B and D are allotted to the left and the right of the third center column, respectively;
  • the third and fifth components C and E are allotted to the left and the right of the fourth center column, respectively; and the fourth and sixth components D and F are allotted to the left and the right of the fifth center column, respectively.
  • a sixth component F is allotted to a sixth center column, and since there is not a component at the right of the sixth component F, "- 1" is allotted to the right of the sixth center column, while the fifth component E is allotted to the left of the sixth center column.
  • values which is not "-1" are allotted to the left or a right of all components A, B, C, D, E, and F, the components A, B, C, D, E, and F are in a connecting state with components which are located in front of and behind the corresponding component.
  • FIG. 6 shows an intermediate state that first predetermined paths, that is, the first, third, and fourth paths PI, P3 , and P4 are deleted from the initial state of the automatic insertion path shown in FIG. 4 by the operation of the mouse 108a of FIG. 1.
  • FIG. 7 shows a second matrix for illustrating connecting states between paths in the intermediate state of the automatic insertion path shown in FIG. 6.
  • the first component A is allotted to a first center column, and since there are no components at the left and the right of the first component A, "-1" is allotted to the left and the right of the first center column.
  • the fourth component D is allotted to a fourth center column, and since there are no components at the left and the right of the fourth component D, "-1" is allotted to the left and the right of the fourth center column.
  • the second component B is allotted to a second center column, and since there is not a component at the left of the first component B, » -i" is allotted to the left of the second center column, while the third component C is allotted to the right of the second center column.
  • the fifth component E is allotted to a fifth center column, and since there is not a component at the left of the fifth component E, "-l" is allotted to the left of the fifth center column, while the sixth component F is allotted to the right of the fifth center column.
  • the third component C is allotted to a third center column, and since there is no a component at the right of the third component C, "-1" is allotted to the right of the third center column, while the second component B is allotted to the left of the third center column.
  • a sixth component E is allotted to a sixth center column, and since there is not a component at the right of the sixth component E, "-i » is allotted to the right of the sixth center column, while the fifth component E is allotted to the left of the sixth center column.
  • FIG. 8 shows a corrected state that second predetermined paths, that is, the sixth, seventh, and eighth paths P6, P7, and P8 are added to the intermediate state of the automatic insertion path shown in FIG. 6 by the operation of the mouse 108a of FIG. 1.
  • FIG. 9 shows a corrected matrix for illustrating connecting states between electronic components in the corrected state shown in FIG. 8.
  • the first component A is allotted to a first center column, and since there is no the component at the left of the first component A, "- 1" is allotted to the left of the first center column, while the fourth component D is allotted to the right of the first center column.
  • the second component B is allotted to a second center column
  • the fourth and third components D and C are allotted to the left and the right of the second center column, respectively.
  • the third, fourth, and fifth components C, D, and E are allotted to third, fourth, and fifth center columns, respectively.
  • the second and fifth components B and E are allotted to the left and the right of the third center column, respectively; the first and second components A and B are allotted to the left and the right of the fourth center column, respectively; and the third and sixth components C and F are allotted to the left and the right of the fifth center column, respectively.
  • the sixth component F is allotted to an sixth center column, and since there is no a component at the right of the sixth component F, "-l" is allotted to the right of the sixth center column, while the fifth component is allotted to the left of the sixth center column.
  • FIG. 10 shows the method for correcting an automatic insertion path according to an embodiment of the present invention.
  • step S101 the control section 106 controls an automatic insertion path producing section 102 to produce a file of an initially automatic insertion path with respect to the electronic components A, B, C, D, E, and F to be inserted into the printed circuit board 201a, as shown in FIG. 4.
  • step S102 the control section 106 controls the memory 108 to store the initially automatic insertion path file produced by the automatic insertion path producing section 102 therein.
  • step S103 the control section 106 reads out the initially automatic insertion path file which is stored in the memory 108.
  • step S104 the control section 106 constitutes a connecting state matrix of the initially automatic insertion path with respect to the electronic components on the basis of the automatic inserting path file read from the memory 108, as shown in FIG. 4.
  • step S105 the control section 106 controls the monitor 106 to display the initially automatic insertion path 201, the pattern 202, and the menu 203, as shown in FIG. 2.
  • step S106 a user controls the mouse 104a to correct the initially automatic insertion path to obtain a corrected path.
  • the operation of correcting the initially automatic insertion path into the corrected path is as follows. After a user controls the mouse 104a to be placed on a first path PI between a first component A and a second component B to be deleted, when the user clicks the mouse 108a, the first path PI is deleted from FIG. 4. In the same manner, third and fourth paths P3 and P4 are also deleted. The intermediate state that the first, third, and fourth PI, P3 , P4 have been deleted are shown in FIG.6.
  • the user controls the mouse 104a to move a cursor displayed on the monitor 110 onto the first component A, and clicks the mouse 104a.
  • a sixth path P6 is constituted between the first component A and the fourth component D.
  • a seventh path P7 between the second component B and the fifth component E is constituted and an eighth path P8 between the third component C and the fifth component E is constituted.
  • the first, third, and fourth paths PI, P3 and P4 are deleted from the initially automatic insertion path of FIG. 4 so that an intermediate automatic insertion path is constituted as shown in FIG. 6.
  • step S107 the control section 106 controls the memory 108 to store the corrected automatic insertion path necessary to insert the electronic components into the PCB 201a therein.
  • step S108 the control section 106 reads out the corrected path which is stored in the memory 110.
  • step S109 the control section 106 judges whether or not all paths of the corrected path are connected based on the read corrected automatic insertion path. At this time, referring to FIG. 9, when values which are not "-1" are allotted to the left or the right of respective components, it is judged that all paths of the corrected path are connected. Alternatively, when "-1" is allotted to the left and right of the respective components, it is judged that any path of the corrected automatic insertion path are not connected with each other.
  • step S109 when it is judged that the any paths of the corrected automatic insertion path are not connected, the control section 106 controls the monitor 110 to display an "error" message thereon (step S110) . And, the routine returns to step S106.
  • the user selects a path decision button on the menu 203 by an operation of the mouse 108a or the keyboard 104b so that a path decision selection signal is applied to the control section 106 (step Sill) .
  • control section 106 determines that the corrected path is the desired automatic insertion path in response to the path decision selection signal from the mouse 104a or the keyboard 104b and controls the monitor
  • the control section 106 When the user inputs a file name for storing the desired automatic insertion path by the operation of the keyboard 104b, the control section 106 receives the file name for storing the desired automatic insertion path from the key board 104b (step S113) . In step S114, the control section 106 produces numerical control programs according to data formats of respectively automatic insertion equipments components in order to process the desired automatic insertion path. The numerical control program is supplied to the memory 108. In step S115, the control section 106 controls the memory 108 to store the numerical control program in the received file name of the desired automatic insertion path, an entire routine finishes.
  • an automatic insertion path with respect to electronic components to be inserted into a printed board can be corrected into a desired automatic insertion path that a user wants.

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  • Engineering & Computer Science (AREA)
  • Operations Research (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Supply And Installment Of Electrical Components (AREA)

Abstract

L'invention concerne un procédé et un dispositif permettant la correction d'un trajet d'insertion automatique, pour les besoins de l'insertion des composants électroniques dans un circuit imprimé suivant un trajet voulu. Selon le procédé décrit, on établit un trajet d'insertion automatique initial correspondant aux composants électroniques à insérer dans une carte à circuit imprimé. On établit ensuite une matrice d'état de connexion de trajet initial d'insertion automatique, d'après le trajet initial d'insertion automatique établi. La correction dudit trajet s'effectue sur la base de la matrice en question, ce qui donne un trajet corrigé englobant plusieurs trajets. On vérifie alors si tous les trajets de ce trajet corrigé sont connectés, afin de déterminer si le trajet corrigé est un trajet d'insertion automatique qui répond aux besoins, d'après le résultat de l'évaluation. Ainsi, il est possible de corriger un trajet d'insertion automatique de composants électroniques destinés à une carte à circuit imprimé, pour obtenir le trajet d'insertion automatique répondant aux besoins de l'utilisateur.
PCT/KR1997/000257 1997-12-05 1997-12-05 Procede et dispositif pour la correction d'un trajet d'insertion automatique WO1999030546A1 (fr)

Priority Applications (3)

Application Number Priority Date Filing Date Title
EP97947217A EP0968636A1 (fr) 1997-12-05 1997-12-05 Procede et dispositif pour la correction d'un trajet d'insertion automatique
PCT/KR1997/000257 WO1999030546A1 (fr) 1997-12-05 1997-12-05 Procede et dispositif pour la correction d'un trajet d'insertion automatique
JP53066199A JP2001511954A (ja) 1997-12-05 1997-12-05 自動挿入経路訂正方法及びその装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/KR1997/000257 WO1999030546A1 (fr) 1997-12-05 1997-12-05 Procede et dispositif pour la correction d'un trajet d'insertion automatique

Publications (1)

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WO1999030546A1 true WO1999030546A1 (fr) 1999-06-17

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PCT/KR1997/000257 WO1999030546A1 (fr) 1997-12-05 1997-12-05 Procede et dispositif pour la correction d'un trajet d'insertion automatique

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JP (1) JP2001511954A (fr)
WO (1) WO1999030546A1 (fr)

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4852015A (en) * 1987-06-24 1989-07-25 Eta Systems, Inc. Automatic circuit layout router
US5107497A (en) * 1989-07-28 1992-04-21 At&T Bell Laboratories Technique for producing an expert system for system fault diagnosis
US5363313A (en) * 1992-02-28 1994-11-08 Cadence Design Systems, Inc. Multiple-layer contour searching method and apparatus for circuit building block placement
US5377124A (en) * 1989-09-20 1994-12-27 Aptix Corporation Field programmable printed circuit board
JPH07122648A (ja) * 1993-10-26 1995-05-12 Hitachi Ltd 配線経路処理方法
JPH07271676A (ja) * 1994-04-01 1995-10-20 Oki Electric Ind Co Ltd メモリチップ挿入位置チェック装置

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4852015A (en) * 1987-06-24 1989-07-25 Eta Systems, Inc. Automatic circuit layout router
US5107497A (en) * 1989-07-28 1992-04-21 At&T Bell Laboratories Technique for producing an expert system for system fault diagnosis
US5377124A (en) * 1989-09-20 1994-12-27 Aptix Corporation Field programmable printed circuit board
US5363313A (en) * 1992-02-28 1994-11-08 Cadence Design Systems, Inc. Multiple-layer contour searching method and apparatus for circuit building block placement
JPH07122648A (ja) * 1993-10-26 1995-05-12 Hitachi Ltd 配線経路処理方法
JPH07271676A (ja) * 1994-04-01 1995-10-20 Oki Electric Ind Co Ltd メモリチップ挿入位置チェック装置

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
PATENT ABSTRACTS OF JAPAN, Vol. 95, No. 8, 29 September 1995; & JP 7122648 A (HITACHI) 12 May 1995. *
PATENT ABSTRACTS OF JAPAN, Vol. 96, No. 2, 29 February 1996; & JP 7271676 A (OKI) 20 October 1995. *

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JP2001511954A (ja) 2001-08-14

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