WO1998006131A1 - Composant a semi-conducteur et son procede de fabrication - Google Patents

Composant a semi-conducteur et son procede de fabrication Download PDF

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Publication number
WO1998006131A1
WO1998006131A1 PCT/JP1996/002226 JP9602226W WO9806131A1 WO 1998006131 A1 WO1998006131 A1 WO 1998006131A1 JP 9602226 W JP9602226 W JP 9602226W WO 9806131 A1 WO9806131 A1 WO 9806131A1
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Prior art keywords
layer
oxide
conductive
semiconductor device
region
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PCT/JP1996/002226
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English (en)
Japanese (ja)
Inventor
Masahiko Hiratani
Keiko Kushida
Kazuyoshi Torii
Hiroshi Miki
Yuichi Matsui
Yoshihisa Fujisaki
Kazushige Imagawa
Kazumasa Takagi
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Hitachi, Ltd.
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Priority to PCT/JP1996/002226 priority Critical patent/WO1998006131A1/fr
Priority to TW086110808A priority patent/TW343376B/zh
Publication of WO1998006131A1 publication Critical patent/WO1998006131A1/fr

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40—Capacitors

Definitions

  • the present invention relates to a semiconductor device using an oxide dielectric, particularly a strong oxide dielectric as a capacitor, which is suitable for large-scale integrated circuits (LSI), and a method for manufacturing the same.
  • an oxide dielectric particularly a strong oxide dielectric as a capacitor
  • LSI large-scale integrated circuits
  • oxide dielectric means a so-called high dielectric having a relative dielectric constant of several hundred without containing silicon oxide or the like).
  • ferroelectrics have spontaneous polarization, and can not only reverse their polarity but also retain them with an external electric field, so their application as non-volatile memory has been attempted.
  • a conventional memory using a ferroelectric material is described in, for example, Japanese Patent Application Laid-Open No. 63-199098 (the oxide ferroelectric material also has a Since it can be regarded as a dielectric, the following description uses the term dielectric as a typical description.)
  • oxide dielectric used for the memory lead zirconate titanate, strontium barium titanate, and the like are generally used.
  • crystallization of an oxide dielectric requires a temperature as high as 500 or more in an oxidizing atmosphere, which makes it difficult to apply an oxide dielectric capacitor to a conventional semiconductor device such as a memory.
  • platinum and silicon react with each other, and platinum silicide reacts and forms at the interface between them to increase the resistance of the electrode.
  • platinum electrode is brought into direct contact with a silicon substrate or polycrystalline silicon. (Conventional structure 1) is not desirable. So, for example,
  • Japanese Patent Application Laid-Open No. 3-25658-58 discloses a method of embedding a conductive material and electrically connecting a source or a drain of a MOS transistor and one electrode of a capacitor.
  • Polycrystalline silicon is generally used as the embedded conductive material. The following description is based on this structure. However, this structure raises the same problem as described above. In other words, a structure in which an oxide dielectric is directly crystallized on polycrystalline silicon, (conventional structure 2) an oxide dielectric polycrystalline silicon,
  • the structure is essentially the same as that of (Conventional Structure 1). Platinum and polycrystalline silicon react to form a silicide, increasing the resistance of the electrode. A silicon oxide film is formed on the gold surface, and the characteristics of the dielectric capacitor deteriorate. In addition, there arises a problem that constituent elements of the dielectric diffuse into the silicon substrate.
  • a diffusion preventing non-oxide conductive layer of Ti, Ta, TiN, etc. is provided for the purpose of preventing mutual diffusion
  • the advantage of having the oxide dielectric in direct contact with the conductive ruthenium oxide is that the oxide dielectric is in contact with the same oxide electrode rather than in contact with a completely dissimilar metal electrode. This is because the mechanical adhesion at the oxide dielectric electrode interface increases. This increase in mechanical adhesion between the oxide dielectric and the electrode improves the properties of the oxide dielectric capacitor, such as the polarization reversal cycle.
  • the capacitor that forms a key Yapashita on formed by being although polycrystalline silicon on Si0 2 from the same reason as (conventional structure 1) and (conventional structure 3), oxide It is necessary to provide a noble metal layer such as platinum or ruthenium between the ruthenium oxide and the polycrystalline silicon in order to avoid direct contact with the polycrystalline silicon.
  • a noble metal layer such as platinum or ruthenium between the ruthenium oxide and the polycrystalline silicon
  • the oxide dielectric is ruthenium oxide / (platinum, ruthenium, etc.) Z polycrystalline silicon. Disclosure of the invention
  • (conventional structure 6) will be described. Also in this case, since the ruthenium oxide layer is usually formed in an oxidizing atmosphere, oxygen diffuses through the (platinum, ruthenium, etc.) layer to the polycrystalline silicon, and the insulating layer is formed by the oxidation reaction. Is not resolved. Therefore, (Conventional Structure 6) does not solve the problems of the prior art.
  • the problems with the conventional structure described above are not only the materials specifically shown in the above example, (Platinum, ruthenium, etc.) as a noble metal, (Ti, Ta, TiN, etc.) as a diffusion-prevention non-oxide conductive layer, and ruthenium oxide layer as a conductive oxide. This is true even if it is expanded to a material category that is a category. That is,
  • the problems brought about by the noble metal layer are (a) the possibility of forming a high-resistance silicide by contact with silicon and (b) the possibility of forming a diffusion path for silicon, oxygen and oxide constituent elements.
  • the second problem with oxide dielectrics and conductive oxide layers is (c) the possibility of oxidizing the electrodes to increase or insulate the electrode resistance.
  • the problem caused by (d) is the possibility of oxidation and high resistance.
  • oxides such as oxide dielectrics and conductive oxides
  • the problem of causing oxygen diffusion and oxidation reactions to non-oxides such as noble metals, diffusion-prevention non-oxide conductive layers and polycrystalline silicon remains unsolved.
  • a first object of the present invention is to solve the above-mentioned problems of the prior art and to provide a fine memory suitable for high integration using an oxide dielectric (including a ferroelectric) as a capacitor insulating film. It is to provide a semiconductor device.
  • a second object of the present invention is to provide a method for manufacturing such a semiconductor device.
  • a semiconductor device having a capacitor (capacitor) made of an oxide dielectric a semiconductor substrate or a semiconductor layer provided on the substrate and an oxide dielectric are made of different conductive materials. Connected via at least two layers of conductive material. The combination of the materials (or material composition) of the two conductive regions results in a diffusion barrier or antioxidant layer located between the region consisting of the semiconductor and the region consisting of the oxide dielectric, which is caused by the prior art. It suppresses the rise in electrical resistance.
  • the semiconductor device includes a first region (a wiring layer or an electrode portion formed of a semiconductor substrate or a semiconductor thin film) made of a conductive semiconductor material and a first region.
  • a second region made of a first conductive material and a third region joined to the second region and made of a second conductive material; and a third region joined to the third region and made of an oxide dielectric.
  • the material composition at the bonding interface with the first region in the second region and the material composition at the bonding interface with the third region in the second region are approximately equal to the average material composition in the second region. , which are approximately equal to each other.
  • the third region and the fifth region constitute a capacitor via the fourth region.
  • Oxide dielectric which constitutes the fourth area, the change in polarization value in respect rising and falling of the applied field is different properties of the semiconductor device which may c present invention in the so-called ferroelectric place showing the (hysteresis)
  • the main feature is that the first region has a composition substantially equal to the semiconductor material forming the first region at the junction interface with the second region, and the second region has the composition at the junction interface with the first region.
  • the material composition of the first region and the second region is substantially uniform so that they have a material composition substantially equal to that of the first conductive material at the bonding interface with the third region. That is, a substance that increases the electric resistance (such as the above-described silicon oxide, metal silicide, or titanium oxide) is not formed in these regions. As described above, a substance that increases the electrical resistance or substantially exhibits electrical insulation (hereinafter referred to as a high-resistance substance) is formed by sequentially laminating each layer from the second area to the fourth area on the first area. In the process of forming, it is formed around the junction interface between the regions.
  • the bonding interface between the first region and the second region, and the second region and the second by appropriately selecting the first conductive material and the second conductive material, the bonding interface between the first region and the second region, and the second region and the second The formation of a high-resistance substance at the bonding interface with the third region is prevented, and the material composition at the bonding interface between the first region and the second region is substantially equal to the average material composition of the first region. Then, the second region is formed such that the material composition at the bonding interface with the first region and the material interface at the bonding interface with the third region are substantially equal to the average material composition in the second region. It is.
  • the fact that the formation of a high-resistance material is not a problem at the junction interface between the third region and the fourth region is due to the use of a noble metal in the third region (conventional structure 7) or the use of a conductive acid. Force that is evident from the use of a compound (conventional structure 8) to improve the conductivity from the first region to the third region or to improve the oxide formation conditions in the fourth region
  • a region (layer) made of a conductive material having a composition different from the first and second conductive materials may be provided between the region and the fourth region.
  • a region (layer) made of a conductive material having a composition different from that of the first and second conductive materials may be provided between the first region and the second region. In short, it is only necessary that the second region and the third region are joined.
  • the first guideline is that the two conductive materials are both formed of conductive oxides that are composed of the same element and have the same basic skeleton of the same crystal structure. That is, the second conductive material is made lower in oxygen deficiency than that of the conductive material.
  • a second guideline is to use titanium aluminum nitride (TiAIN) for the first conductive material and an antioxidant metal material for the second conductive material. In any of the selection guidelines, it is desirable to select two conductive materials each having a specific resistivity of 10 mQ * cm (0.01 ⁇ ⁇ cm) or less.
  • the outline of the present invention is described in detail below for each conductive material selection guideline.
  • the first to third regions (including the conductive material layer between the third and fourth regions, if included) are referred to as the lower electrode, and the fifth region as the upper electrode. .
  • the second region and the third region are formed as a two-layer conductive oxide layer capable of suppressing diffusion and oxidation of oxygen (third region).
  • Objective To provide a method for producing a two-layer conductive oxide layer capable of suppressing oxygen diffusion and oxidation reaction in order to achieve the second object of the present invention (fourth object). Things.
  • a semiconductor device using an oxide dielectric capacitor in particular, a two-layer conductive oxide including a conductive oxide layer having oxygen vacancies
  • a structure of a semiconductor device including layers is described.
  • the characteristics and specific examples of the metal scrap, the characteristics and specific examples of the diffusion preventing non-oxide conductive layer, and the specific examples of the oxide dielectric will be sequentially described.
  • the characteristics and specific examples of the two-layer conductive oxide layer including the conductive oxide layer having oxygen deficiency are described together with the means for achieving the second object, that is, the method for manufacturing a semiconductor device. , explain.
  • the method for achieving the third object is described in detail together with the method for achieving the first and second objects.
  • the method for achieving the fourth object is described in detail together with the method for achieving the second object.
  • the semiconductor device of the present invention has an oxide dielectric capacitor using an oxide dielectric as a capacitor insulating film.
  • FIG. 1 shows a schematic diagram of an oxide dielectric capacitor.
  • FIG. 1 does not show the detailed structure of the oxide dielectric capacitor of the semiconductor device, but rather shows the lamination of each layer constituting the capacitor in an easy-to-understand manner.
  • the oxide dielectric capacitor includes a lower electrode layer 11 provided on the substrate (only the direction 10 on the substrate side is shown in FIG. 1) and an oxide dielectric layer 1 provided thereon. 6 and an upper electrode layer 17 provided thereon.
  • the lower electrode layer 11 includes a conductive oxide layer 12, and this lightning conductive oxide layer is composed of the same crystal structure and element, but has only a different composition ratio with respect to oxygen. And 15 That is, of the two adjacent layers, the conductive oxide layer 14 located on the substrate side contains oxygen vacancies.
  • the conductive oxide layers 14 and 15 correspond to the second region and the third region described in the above concept, respectively.
  • the lower electrode layer 11 is formed via the lower electrode layer component 13 including at least one or more layers located closer to the substrate than the conductive oxide layer I 4 containing oxygen vacancies. It is electrically connected to a source region or a drain region of a MOS transistor formed on a substrate.
  • An example of the constituent element 13 of the lower electrode layer will be described below in detail with reference to FIGS. 2, 3, and 4.
  • FIG. 2 shows that the conductive oxide layer 14 containing oxygen vacancies in FIG. Components of lower electrode scrap located 13 Power structure of oxide dielectric capacitor in the case of conductive polycrystalline silicon layer 20 is shown.
  • the conductive polycrystalline silicon layer 20 corresponds to the first region described in the above concept.
  • typical conditions necessary for crystallizing oxides such as 500 or more in an oxidizing atmosphere, are inevitable for silicon oxidation, so that the oxides are in direct contact with silicon.
  • the key is that the layer adjacent to the polycrystalline silicon layer 20 is the conductive oxide layer 14 containing oxygen vacancies, and the structure of FIG. 2 is realized.
  • the features of the two-layer conductive oxide layer 12 including the conductive oxide layer 14 having oxygen vacancies will be described later.
  • FIG. 3 shows that the component 13 of the lower electrode layer located closer to the substrate than the conductive oxide layer 14 containing oxygen vacancies in FIG. 1 shows a configuration of an oxide dielectric capacitor in the case of the polycrystalline silicon layer 20 of FIG.
  • the diffusion preventing non-oxide conductive layer 30 corresponds to the layer provided between the first region and the second region described in the above concept. In the prior art, under typical conditions necessary for crystallizing oxides, at 500 ° C.
  • FIG. 4 shows that the components 13 of the lower electrode layer located closer to the substrate than the conductive oxide layer 14 containing oxygen vacancies in FIG. 1 are composed of the metal layer 40 and the diffusion preventing non-oxide conductive layer 3.
  • the structure of an oxide dielectric capacitor in the case of 0 and a conductive polycrystalline silicon layer 20 is shown.
  • the metal layer 40 and the diffusion preventing non-oxide conductive layer 30 correspond to the layer provided between the first region and the second region described in the above concept.
  • Conventional technology In typical conditions necessary for crystallizing oxides, in an oxidizing atmosphere of 500 or more, oxygen diffuses through the metal layer 40 to form the diffusion preventing non-oxide conductive layer 30.
  • the metal layer 40 may be oxidized and the thickness of the metal layer 40 needs to be increased in order to suppress the oxidation.
  • the key is that the layer adjacent to the metal layer 40 is the conductive oxide layer 14 containing oxygen vacancies, and there is no limitation on the thickness of the metal layer.
  • the structure is realized. The features of the two-layer conductive oxide layer 12 including the conductive oxide chips 14 having oxygen vacancies will be described later.
  • a noble metal having high oxidation resistance is considered as a candidate.
  • platinum which has excellent oxidation resistance
  • ruthenium or iridium which is the same as the noble metal element contained in the conductive oxide layer described later, and at least three of the above three elements
  • One type of noble metal element is preferred.
  • the conditions for the diffusion preventing non-oxide conductive layer are, of course, conductivity, oxidation resistance, and reaction resistance to silicon.
  • Compounds that can be considered as candidates are nitrides (nitrides), silicides (gayides), borides (borides), and carbides (carbides).
  • nitrides nitrides
  • silicides gayides
  • borides borides
  • carbides carbides
  • the heating condition is a maximum of about 800 at most and several minutes, which is a sufficient temperature and time condition for forming a reaction product due to mutual diffusion. Therefore, there is no concern about the resistance to silicon.
  • the oxidation resistance when the conductive oxide layer containing oxygen deficiency in the two-layer conductive oxide layer according to the present invention is adjacent to the diffusion-preventing non-oxide conductive layer (FIG. 3), No problem at all. As described later, the formation conditions of the conductive oxide layer containing oxygen vacancies are non-oxidizing atmosphere, and the conductive oxide layer containing oxygen vacancies becomes a barrier to the diffusion path of oxygen. It depends on the reason.
  • a conductive oxide layer containing oxygen vacancies is prevented from diffusing through a metal layer.
  • the oxide conductive layer FIG. 4
  • the diffusion preventing non-oxide conductive layer is further away from the oxide layer.
  • the fact that the metal layer is adjacent to the diffusion-preventing non-oxide conductive layer is not a problem from the conventional example.
  • nitride a nitride containing at least one metal of Ti, Ta, Zr, Nb, V, and W is preferable because it has high conductivity.
  • a silicide such as Ti, a boride such as La, and a carbide such as Ti are preferable.
  • the oxide dielectric material naturally includes the case of a ferroelectric material, and there is no particular limitation on the material.
  • the oxide dielectric material naturally includes the case of a ferroelectric material, and there is no particular limitation on the material.
  • lead zirconate titanate in which part or all of titanium is replaced with zirconium, or part or all of this lead is replaced with balium Typical examples thereof include barium lead zirconate titanate, barium strontium titanate containing only alkaline earth elements, and the like.
  • the bismuth-based dielectric comprising a layered structure, Bi 4 T i 3 0 1 2, SrB i bismuth layer dielectric such as 2 Ta 2 0 9 is a typical example.
  • oxide dielectrics oxide ferroelectrics, and new oxide dielectrics and oxide ferroelectrics that may be discovered in the future are oxide dielectrics. It can be used as a body layer.
  • the features of the two-layer conductive oxide layer 12 including the conductive oxide layer having oxygen deficiency which will be described later in the description of the structure of FIGS. 2 to 4, will be described.
  • the features are described as a second object of the present invention, a method of manufacturing a semiconductor device, a third object, a function of a two-layer conductive oxide layer capable of suppressing diffusion and oxidation of oxygen, and
  • the structure, function and manufacturing method of the two-layer conductive oxide layer will be described in general.
  • an oxidizing atmosphere which is indispensable for forming an oxide layer
  • an already stacked diffusion prevention layer is not provided. This is to oxidize the oxide conductive layer and the polycrystalline silicon.
  • Oxides of alkaline earth elements such as Sr and Ca and oxides of transition elements such as Ru and Ti are much more stable than the oxidation reaction of Si due to the magnitude of the standard free energy of formation of oxides.
  • a diffusion-preventing non-oxide conductive layer composed of a transition metal nitride, silicide, boride, or a carbide is also oxidized by reacting with an oxide from the viewpoint of free energy. Very Hard to think. Rather, they are oxidized by the oxidizing active gas in the atmosphere that forms the oxide layer. Therefore, we thought that a major problem could be solved if an oxide layer could be formed in a non-oxidizing atmosphere in the sense that other elements constituting the semiconductor device would not be oxidized.
  • Oxide thin films such as oxide dielectrics (including ferroelectrics) and conductive oxide electrodes that form oxide dielectric capacitors are generally formed in an oxidizing atmosphere. This is mainly due to the fact that oxides are chemically unstable in non-oxidizing atmospheres, so that oxide thin films are not formed or sufficient properties are not obtained even if they can be formed. For intellectual reasons. Certainly, in oxide ferroelectrics containing 4 and 5% typical elements such as lead and bismuth, the formation of thin films under insufficient oxidation conditions due to the high vapor pressure of these elements leads to selective evaporation or composition. Cause fluctuations. At the same time, the presence of decomposition products other than the target compound significantly reduces the ferroelectric properties.
  • a non-oxidizing atmosphere introduces oxygen vacancies in the compound.
  • oxide dielectrics containing 4% transition elements such as titanium and zirconium
  • oxygen deficiency causes a decrease in dielectric constant and, consequently, a leakage current. Therefore, for oxide dielectrics, it is not practical to form the thin film in a non-oxidizing atmosphere.
  • the constituent elements 13 of the lower electrode layer adjacent to the conductive oxide layer 12 are a polycrystalline silicon layer 20 in FIG. 2, a diffusion preventing non-oxide conductive layer 30 in FIG. In FIG. 4, the diffusion preventing non-oxide conducting layer 30 is interposed via the metal layer 40.
  • the conductive oxide layer 12 is placed on the side 14 adjacent to the component 13 (20, 30, 40) of the lower electrode layer in a non-oxidizing atmosphere. I thought that it should be formed.
  • the conductive property in an oxidizing atmosphere is continuously changed by changing only the oxidizing power, for example, the oxygen pressure and the type of the oxidizing gas in the conditions for forming the layer.
  • the remaining layer 15 of the oxide layer 12 may be formed.
  • the conductive oxide layer 12 is composed of two adjacent layers 14 and 15, which are composed of the same crystal structure and element, but differ only in the composition ratio of oxygen.
  • the conductive oxide layer 14 Since the conductive oxide layer 14 is formed in a non-oxidizing atmosphere, the components 13 of the adjacent lower electrode layer (polycrystalline silicon layer 20, diffusion preventing non-oxide conductive layer 30, metal layer 4) 0) is not oxidized. In addition, since the once formed conductive oxide layer 14 containing oxygen vacancies is stable from the viewpoint of standard free energy of formation, the constituent elements 13 (20, 30, 40, 40) of the lower electrode layer are formed. ) Is still not oxidized. Further, even when the metal layer 40 is inserted as seen in the example of FIG. 4, there is no concern that the diffusion-preventing non-oxide conductive layer 30 is oxidized by diffusion of oxygen. Can be made as thin as possible.
  • the conductive oxide layer 14 when the conductive oxide layer 15 and the oxide dielectric layer 16 are formed in an oxidizing atmosphere, the conductive oxide layer 14 Since it contains oxygen vacancies, it functions as an oxygen diffusion buffer layer. That is, for one thing, even when the surface of the conductive oxide layer 14 containing oxygen vacancies is exposed to an active oxidizing gas, the introduced oxygen vacancies buffer the diffusion of oxygen ions and simultaneously diffuse the oxygen. Capture elementary ions. The other is, again, that the formed conductive oxide layer 14 itself is stable from the viewpoint of the standard free energy of formation, so that the constituent elements 13 (20, 30, 4) of the lower electrode layer 0) also functions as an antioxidant layer. Therefore, the two-layer conductive oxide layer including the conductive oxide layer into which oxygen vacancies are formed, which is formed in a non-oxidizing atmosphere, functions as an excellent oxidation suppressing film and an oxygen diffusion preventing layer.
  • the component 13 (20, 30, 40) of the lower electrode layer is completely covered, A viewpoint that the lower electrode component 13 (20, 30, 40) is not oxidized by the subsequent formation of the conductive oxide layer 15 and the oxide dielectric layer 16 in an oxidizing atmosphere. And preferably 10 nm or more. There is no particular upper limit on the thickness.
  • All of the conductive oxide layers 12 may be composed of the conductive oxide layers 14 containing oxygen vacancies formed in a non-oxidizing atmosphere. However, since the subsequent oxide dielectric layer 16 is naturally formed in an oxidizing atmosphere, the interface between the oxide dielectric layer 16 and the adjacent conductive oxide layer 14 is oxidized. A thin layer 15 is formed. Therefore, a two-layer conductive oxide layer 12 is formed.
  • a non-oxidizing atmosphere will be referred to for the method of manufacturing the two-layer conductive oxide layer.
  • the reliable non-oxidizing atmosphere is an atmosphere containing a reducing gas such as hydrogen gas.
  • oxygen is actively deprived of the growth of the thin film during the process of forming the oxide thin film, so that the thin film is likely to be reduced to a metallic state.
  • Milder nonoxidizing ⁇ gas is inert gas atmosphere such as rare gas or nitrogen such as argon or Heriumu or oxygen (0 2), nitrogen monoxide (N 2 0),, nitrogen dioxide (N0 2), ozone (0 3) is a vacuum state of not intentionally introducing an oxidizing gas such as.
  • the component 13 of the lower electrode layer is a diffusion preventing non-oxide conductive layer 30 (including the case of the metal layer 40), and the conductive oxide layer to be formed from now is more diffused.
  • the non-oxide conductive layer 30 is more reactive than oxygen, use a slightly oxidizing atmosphere containing a small amount of oxidizing gas such as oxygen, nitric oxide, nitrogen dioxide, or ozone.
  • the diffusion-preventing non-oxide conductive layer is likely to be oxidized in a remarkable oxidizing atmosphere as described in the related art, but in an atmosphere containing only a small amount of oxidizing gas, the diffusion-preventing non-oxide conductive layer is oxidized.
  • the conductive layer can form a conductive oxide layer containing oxygen vacancies without being oxidized. This is due to the existence of an energy barrier for an oxidation reaction between the diffusion-preventing non-oxide conductive layer already forming the compound and the conductive oxide layer.
  • the specific non-oxidizing atmosphere depends on the individual thin film forming method for forming the conductive oxide layer.
  • the thin film forming source needs to contain oxygen. Examples of this song include a sputtering method using a sintered oxide target, a laser evaporation method using a sintered oxide target, and an electron beam evaporation method using an oxide evaporation source. Since the sputtering method requires a discharge gas, an argon (Ar) gas having a purity of 3 N (99.9 99) or more may be introduced from a few millimeters to several tens of mTorr.
  • Ar argon
  • Gases of low purity are not preferred because they can lead to unexpected results such as unstable discharge and precipitation of foreign phases.
  • an oxide thin film can be formed in a vacuum.
  • An electron beam evaporation method using an oxide evaporation source can also form a thin film in a vacuum.
  • vacuum refers to a state achieved by a vacuum exhaust device without intentionally introducing an oxidizing gas such as oxygen, nitrogen monoxide, nitrogen dioxide, or ozone.
  • the pressure condition in both the laser deposition method and the electron beam deposition method is preferably 1 ⁇ Torr or less from the viewpoint of a non-oxidizing atmosphere.
  • oxidation is performed on the diffusion-prevention non-oxide conductive layer ( c including the case where a metal layer is interposed).
  • the method of forming the object thin film can be applied to all the above-mentioned thin film forming methods.
  • an oxidizing gas may be mixed into the discharge gas.
  • the oxidizing gas may be introduced.
  • the evaporation source was limited to oxides, but in a slightly oxidizing atmosphere, use a metal evaporation source. Can be.
  • the heating source is not limited to the electron beam, and a heater such as an effusion cell (K cell) may be used.
  • a heater such as an effusion cell (K cell)
  • the total pressure or partial pressure of the oxidizing gas introduced from the viewpoint of the non-oxidizing atmosphere is 10 nTorr or less in all of the sputtering method, the laser deposition method, the evaporation method using the electron beam and the heater. It is preferable that
  • the central cation constituting the conductive oxide is a multiply-charged ion. Therefore, first, conductive oxides containing Cr, Mn, Fe, Co, Ni, Cu, and V are excluded.
  • Ru0 2, Ir0 2 include two of.
  • CaRu0 3 and SrRu0 3 Ti (titanium) part of SrTi0 3 of Sr centering element 0.5 wt% or more of a central element R u (ruthenium) and 4.0 was replaced by% by weight of the amount of La (La, Sr) Ti0 3 , three of are ⁇ up.
  • the conductive oxide taking the re0 3 structure include re0 3.
  • oxygen vacancies are introduced when forming a conductive oxide in a non-oxidizing atmosphere.
  • thermal equilibrium state only a few oxygen vacancies of 0.1% or less are introduced as point defects.
  • excess oxygen vacancies are easily frozen unlike thin-film formation, which often proceeds in a non-equilibrium state.
  • measuring the oxygen deficiency concentration inherent in thin films is extremely difficult even with the current analysis techniques, and it is virtually impossible to define an allowable oxygen deficiency concentration with a strict numerical value.
  • X-ray diffraction analysis of the thin film formed in a non-oxidizing atmosphere by X-ray diffraction confirmed the crystal structure and no significant impurities at the same time, and the ICPS (inductively coupled plasma spectroscopy)
  • the composition analysis confirmed the stoichiometric composition of the cation.
  • the resistivity increased by up to an order of magnitude compared to the case where the same thin film was formed in an oxidizing atmosphere. This suggests that oxygen deficiency has been introduced.
  • the allowable concentration of oxygen vacancies is defined under the condition that the target structure can exist stably.
  • the details are as follows.
  • the basic skeleton is in the category of the perovskite structure
  • the oxygen deficiency amount X is less to define than large and the value capable of maintaining the in Re0 3 structural stability than 0.
  • the introduction of oxygen vacancies increased the resistivity of the conductive oxide by up to an order of magnitude, but maintained the resistance low enough to use the oxide as an electrode.
  • SrRu0 3 - In x but the resistivity increased an order of magnitude near a small resistivity of several in Omega ⁇ cm was obtained as an absolute value.
  • the increase in resistivity was as small as about 2 times at the maximum. In other words, it was confirmed that even when the conductive oxide exemplified above was formed in a non-oxidizing atmosphere, sufficient resistivity was maintained for application to the electrode layer.
  • the increase in resistance due to the coexistence of decomposition products is within an allowable range as a conductive oxide layer or a semiconductor device using the conductive oxide layer.
  • means for achieving the first object of the present invention features of a semiconductor device using an oxide dielectric as a capacitor insulating film and using two conductive oxide layers as electrode components
  • Means for achieving the second object of the present invention and among the methods for manufacturing such a semiconductor device, a method for manufacturing a two-layer conductive oxide layer are described, and the third object of the present invention is described.
  • Means for achieving this the features of the two-layer conductive oxide layer capable of suppressing oxygen diffusion and oxidation reaction are described, and means for achieving the fourth object of the present invention, a two-layer conductive oxide The method of manufacturing the layer was also described.
  • the method for manufacturing a semiconductor device according to the present invention includes the steps of: Forming a lower electrode layer composed of a metal layer and a two-layer conductive oxide layer on the substrate.
  • the polycrystalline silicon layer is formed by chemical vapor deposition
  • the diffusion-preventing non-oxide conductive layer is formed by sputtering, vapor deposition, or CVD
  • the metal layer is formed by sputtering.
  • the formation method is not limited particularly.
  • the method for forming the two-layer conductive oxide layer is as described in detail above.
  • specific compounds of each layer constituting the lower electrode waste are as described in detail above.
  • An oxide dielectric layer is formed on the lower electrode layer, and an upper electrode layer is further formed thereon, so that the oxide dielectric layer has a structure in which the oxide dielectric layer is sandwiched between the upper and lower electrode layers.
  • a body capacitor is formed. Specific compounds constituting the oxide dielectric layer are as described in detail above.
  • the oxide dielectric layer can be formed by a sol-gel method using alkoxide as a raw material, a vapor deposition method, a chemical vapor deposition method, a sputtering method, or the like, and the forming method is not particularly limited.
  • the upper electrode layer has the same conductivity as that used for the lower electrode layer from the standpoint of respecting the symmetry of the current-voltage characteristics of the dielectric capacitor and the symmetry of the polarization hysteresis curve of the ferroelectric capacitor. Desirably, it is an oxide. However, even if a conductive oxide different from that of the lower electrode layer or a noble metal represented by platinum, ruthenium or iridium is used as the upper electrode layer, there is no problem in the function of the semiconductor device.
  • the conductive oxide used as the upper electrode layer can be formed by various thin film forming methods such as a sputtering method, an evaporation method, a sol-gel method, and a chemical vapor deposition method, and is not particularly limited.
  • the method of forming the noble metal is not particularly limited.
  • a portion of the MOS transistor is formed on the substrate.
  • the source or drain region of the MOS transistor and the lower electrode layer are electrically connected to each other through a conductive material buried in a contact hole formed in an insulating layer covering a semiconductor substrate on which the MOS transistor is formed. Connected.
  • the conductive material embedded in the contact hole polycrystalline silicon formed by chemical vapor deposition may be used. There are many, but again, the forming method and the filling material are not limited.
  • a semiconductor device includes, on a substrate, a lower electrode layer including a titanium aluminum nitride layer, an oxide dielectric layer provided thereon, An oxide dielectric capacitor comprising an upper electrode layer provided thereon is disposed.
  • FIGS. 5 and 6 show two cross-sectional schematic structures as the structure of the lower electrode layer. The figure does not show the detailed structure of the oxide dielectric capacity of the semiconductor device, but rather shows the stacking of each layer constituting the capacitor in an easy-to-understand manner.
  • the lower electrode layer 11 is composed of a titanium aluminum nitride layer 50 laminated on a polycrystalline silicon layer 20 and a metal layer 40 further laminated thereon.
  • the conductive polycrystalline silicon layer 20 corresponds to the first region described in the above concept.
  • the titanium aluminum nitride layer 50 corresponds to the second region described in the above concept.
  • the metal layer 40 corresponds to the third region described in the above concept.
  • a conductive oxide layer 60 is further laminated in addition to the components of the lower electrode layer 11 shown in FIG. This conductive oxide layer 60 corresponds to the region provided between the third region and the fourth region described in the above concept.
  • the lower electrode layer 11 is electrically connected to a desired region of the semiconductor element formed on the substrate, for example, a source or drain region of the MOS transistor.
  • titanium aluminum nitride layer 50 for preventing diffusion and oxidation reaction.
  • titanium nitride as a diffusion and oxidation reaction prevention layer, which has been studied so far, has low resistance to oxygen and requires an intervening metal layer such as platinum to compensate for this. And has been.
  • a platinum layer with a thickness of about 200 nm was required to secure the diffusion time of oxygen that diffuses at the grain boundaries in platinum.
  • titanium nitride which has high conductivity and functions as an antioxidant layer to some extent, has an indispensable appeal. Therefore, titanium nitride As a result of examining the possibility of improving the oxidation resistance by adding the metal element (2), remarkable oxidation resistance was found in titanium nitride to which aluminum was added.
  • the reaction that oxidizes nitride to oxide is due to the reaction of oxygen to replace nitrogen in nitride.
  • the height of the energy barrier between the nitride and the oxide can be considered to dominate this substitution reaction.
  • the improvement in the resistance to oxygen in the titanium aluminum nitride obtained by the present invention is due to the effect of increasing the energy barrier. Regardless of the chemical basis, it has been found that by substituting part of titanium of titanium nitride with aluminum, it can function sufficiently as an antioxidant layer.
  • X is 0.2 or more and y is 0.4 or more.
  • X is less than 0.2, no improvement in oxidation resistance is observed.
  • y is Pai0 2 is observed due to oxidation in the small X-ray diffraction measurement than 0.4.
  • the resistivity increases by replacing some of the titanium with aluminum.
  • the resistivity is desirably 10 m ⁇ ⁇ cm or less. Therefore, the chemical formula
  • X When represented by (Ti 1 ⁇ ) ( A1 X ) y N y , it is desirable that X is 0.5 or less and y is 0.4 or more and 0.6 or less. In addition, if a heterogeneous phase is deposited, non-uniformity as an electrode occurs, so that a fine memory cell cannot be constructed. From this point, X is desirably 0.6 or less, and y is desirably 0.2 or more and 0.6 or less.
  • Ti ⁇ xAlx-yN ⁇ titanium nitride aluminum represented by the chemical formula (Ti ⁇ xAlx-yN ⁇ )
  • X is desirably 0.2 or more and 0.5 or less
  • y is desirably 0.4 or more and 0.6 or less.
  • the metal layer 40 that covers the titanium aluminum nitride layer shown in FIGS. 5 and 6 is at least one kind selected from a group of noble metals having high oxidation resistance, platinum, iridium, and ruthenium. Is desirable.
  • Conventional structures using titanium nitride as an antioxidant layer required a metal layer close to 200 nm thick.
  • the thickness of the metal layer is such that it can sufficiently cover the surface of the titanium aluminum nitride, for example. 30 nm is enough.
  • the oxide dielectric layer 16 is formed on the metal layer 40, but as shown in FIG. 6, a conductive layer is formed between the oxide dielectric layer 16 and the metal layer 40.
  • Oxide layer 60 may be inserted as a component of the lower electrode.
  • the conditions for forming the conductive oxide layer in an oxidizing atmosphere are generally the same as the conditions for forming the oxide dielectric layer, so that the oxidation resistance required for the titanium aluminum nitride layer is also reduced. It may be considered equivalent.
  • the conductive oxide layer contains the same noble metal group element as that used for the metal layer to improve the bondability at the interface with the metal layer, Ir 0 2 , Ru 0 2 , S r R u 0 3, Re0 at least selected from 3 arbitrary desired to be a type.
  • oxide dielectric layer 16 Materials suitable for the oxide dielectric layer 16 will be described.
  • the oxide dielectric material there is no particular limitation on the oxide dielectric material.
  • the oxide dielectric having titanium as a central element include lead zirconate titanate in which part or all of titanium is replaced with zirconium, and zirconate titanate obtained by replacing part or all of this lead with barium.
  • Typical examples are barium lead and barium strontium titanate containing only alkaline earth elements.
  • the bismuth dielectric consisting of a layered structure, B i 4 T i 3 0 1 2, S rB i 2 Ta 2 0g bismuth layer-like dielectric such as is a typical example.
  • widely known oxide dielectrics, oxide ferroelectrics, and new oxide dielectrics and oxide ferroelectrics that may be discovered in the future, etc. It can be used as a body layer.
  • the upper electrode layer 17 is not limited to metals or oxides as long as it is a conductive substance. If it is a metal, a series of noble metals listed above in the description of the metal layer 40 in the lower electrode layer Available. As the oxide, a series of oxides listed above in the description of the conductive oxide layer 60 in the lower electrode layer can be used. However, the material of the upper electrode layer 17 is not limited.
  • a method of manufacturing a semiconductor device comprises the steps of: forming a lower electrode including a titanium aluminum nitride diffusion and oxidation prevention layer in a nitriding atmosphere by using a sputtering method; Forming a layer on the substrate.
  • the sputtering target includes a metal target made of a titanium-aluminum alloy, a composite target in which aluminum metal or aluminum nitride is arranged on the titanium target, or a titanium metal or nitride on the aluminum target.
  • Composite target with aluminum metal or aluminum nitride on top, composite metal with titanium metal or titanium nitride on aluminum nitride target, aluminum nitride target and titanium nitride A variety of evening targets can be used, such as dual targets, where each target is placed separately and sputtered simultaneously.
  • a sputtering discharge either direct current or alternating current may be used. Since aluminum nitride has a large resistance, an RF discharge is necessary when it is used as a target.
  • the atmosphere when forming the titanium aluminum nitride diffusion and oxidation prevention layer by the sputtering method needs to include at least a discharge gas and a nitrogen gas.
  • a rare gas is used as the discharge gas, and an argon gas is usually used in consideration of economy.
  • the nitrogen gas contained is characterized by sufficient nitridation and high throughput (high deposition rate).
  • the temperature at which the titanium aluminum nitride diffusion and oxidation preventing layer is formed by sputtering is between room temperature and 600 and below.
  • room temperature this does not mean that the temperature of the sample is maintained at room temperature, but in particular that it does not cool or heat the sample, and that the sample is exposed to natural temperature during sputtering.
  • X-ray diffraction measurement showed that aluminum nitride (A 1 N) was separated and formed.
  • a method of manufacturing a semiconductor device comprises the steps of sequentially seeding a metal layer or a metal layer and a conductive oxide layer on a titanium aluminum nitride diffusion and oxidation prevention layer. Including the step of completing the lower electrode layer. An oxide dielectric layer is formed on the lower electrode layer, and an upper electrode layer is further laminated, so that an oxide dielectric capacitor having a structure in which oxide dielectric dust is sandwiched between the upper and lower electrode layers is formed. It is formed.
  • the metal layer may be formed by any method such as a sputtering method and an evaporation method.
  • the formation method of the conductive oxide layer and the oxide dielectric layer is not particularly limited, such as a sputtering method, a reactive evaporation method, a laser abrasion, a chemical vapor deposition method, and a sol-gel method.
  • the upper electrode layer may also be formed by any of the methods listed here.
  • the bottom electrode layer Prior to forming the oxide dielectric capacitor, the bottom electrode layer, a portion of the MOS transistor is formed on the substrate.
  • the source or drain region of the MOS transistor and the lower electrode layer are electrically connected to each other via a conductive material embedded in a contact hole formed in an insulating layer covering a semiconductor substrate on which the MOS transistor is formed. Connected to.
  • the conductive material embedded in the contact hole polycrystalline silicon formed by a chemical vapor deposition method is often used, but the forming method and the embedded material are not limited.
  • a first region (semiconductor substrate or semiconductor thin film or the like) made of a conductive semiconductor material; a second region joined to the first region and made of the first conductive material; A third region joined to the second region and made of a second conductive material; A semiconductor device including a fourth region joined to the third region and made of an oxide dielectric material, and a fifth region joined to the fourth region and made of a conductive material;
  • the average value of the resistivity of the second region is substantially equal to the resistivity of the semiconductor material constituting the second region, and the average value of the resistivity of the second region is substantially equal to the resistivity of the first conductive material constituting the second region.
  • the electric resistance from the first region to the third region is the resistivity of the semiconductor or conductive material forming each region and the length of the flow path in each region (these regions are perpendicular to each other).
  • the thickness is uniquely determined by the thickness of each region). That is, by implementing the present invention, the formation of a high-resistance material in the first region or the second region, which is a problem in the conventional technology, can be substantially avoided, and the electric resistance value in these regions can be reduced.
  • the rise can be suppressed, and not only the resistivity of each region but also the average resistivity in the current path from the first to the third region can be set to 0.01 ⁇ ⁇ cm or less.
  • a polycrystalline silicon layer adjacent thereto and a diffusion preventing non-oxide conductive layer made of nitride or the like are formed.
  • a memory cell can be formed without oxidation.
  • the interface resistance and contact resistance of the electrodes can be reduced, and a semiconductor device having fine memory cells suitable for high integration can be obtained.
  • FIG. 1 is a diagram showing an oxide dielectric capacitor including a two-layer conductive oxide layer in a lower electrode layer.
  • FIG. 2 is a diagram showing an oxide dielectric capacitor in which a two-layer conductive oxide layer is formed on a polycrystalline silicon layer.
  • FIG. 3 is a view showing an oxide dielectric capacitor in which a two-layer conductive oxide layer is formed on a diffusion preventing non-oxide conductive layer.
  • FIG. 4 is a diagram showing an oxide dielectric capacity in which a two-layer conductive oxide layer is formed on a diffusion preventing non-oxide conductive layer via a metal layer.
  • FIG. 5 is a view showing an oxide dielectric capacitor having a titanium aluminum nitride layer in which an oxide dielectric layer is laminated on a metal layer.
  • FIG. 6 is a diagram showing an oxide dielectric capacitor having a titanium nitride aluminum layer in which an oxide compressing layer is laminated on a conductive oxide layer.
  • FIG. 7 is a view showing electric characteristics of an oxide dielectric capacitor in which a two-layer conductive oxide layer is formed on a polycrystalline silicon layer.
  • A shows the resistance of the electrode
  • (b) shows the polarization hysteresis curve.
  • FIG. 8 is a view showing the electrical characteristics of an oxide dielectric capacity in which a two-layer conductive oxide layer is formed on a nitride layer.
  • A shows the resistance of the electrode including the TiN layer
  • (b) shows the resistance of the electrode including the TaN layer
  • (c) shows the polarization hysteresis curve of the capacitor including the TiN layer.
  • FIG. 9 is a diagram showing a polarization hysteresis curve of an oxide dielectric capacitor in which a two-layer conductive oxide layer is formed on a TiN layer via a metal layer.
  • FIG. 10 is a diagram showing a composition range of titanium aluminum nitride.
  • (A) is.. (Ti, - X A1 ,) 0 5 N 0 of X in 5 allowance and
  • (b) is (Ti 0 6 Al 0 4. ) There allowable amount of y that put in y N y FIG.
  • FIG. 11 is a diagram showing a polarization hysteresis curve of an oxide dielectric capacitor having a titanium aluminum nitride layer.
  • (A) is a diagram showing a case where an oxide dielectric layer is laminated on a metal layer
  • (b) is a diagram showing a case where an oxide dielectric layer is laminated on a conductive oxide layer.
  • FIG. 12 is a diagram showing a manufacturing process of a semiconductor device according to an embodiment of the present invention. It is.
  • FIG. 13 is a diagram showing a manufacturing process diagram of the semiconductor device according to the embodiment of the present invention.
  • FIG. 14 is a view showing a manufacturing process of the semiconductor device according to the embodiment of the present invention.
  • FIG. 15 is a view showing a process chart until smoothing of the semiconductor device according to the embodiment of the present invention.
  • FIG. 16 is a diagram showing a manufacturing process of a semiconductor device in which a two-layer conductive oxide layer is formed on a polycrystalline silicon layer.
  • FIG. 17 is a diagram showing a manufacturing process of a semiconductor device in which a two-layer conductive oxide layer is formed on a diffusion preventing non-oxide conductive layer.
  • FIG. 18 is a diagram showing a manufacturing process of a semiconductor device in which a two-layer conductive oxide layer is formed on a diffusion preventing non-oxide conductive layer via a metal layer.
  • FIG. 19 is a diagram showing a manufacturing process of a semiconductor device having a titanium aluminum nitride layer for forming an oxide dielectric layer on a metal layer.
  • FIG. 20 is a view showing a manufacturing process of a semiconductor device having a titanium nitride nitride layer for forming an oxide dielectric layer on a conductive oxide layer.
  • FIG. 15 is a diagram showing a cross-sectional structure of a scribe region of a silicon wafer according to Example 8 of the present invention. BEST MODE FOR CARRYING OUT THE INVENTION
  • the best embodiment of the present invention is divided into a viewpoint of forming an electrode of a capacitor using an oxide dielectric and a viewpoint of forming this capacitor in an actual semiconductor device. I will explain separately. The explanation based on the former viewpoint will be further described according to the above-mentioned guideline for selecting the conductive material.
  • the conductive oxide layer 14 containing oxygen vacancies in the two-layer conductive oxide layer 12 shown in FIG. 2 is formed directly on the polycrystalline silicon layer 20. This is an example of measuring the resistance of the lower electrode dust and the polarization hysteresis curve of the oxide ferroelectric capacitor for the structure of the lower electrode layer 11.
  • an amorphous silicon film having a thickness of 150n m was de-loop re down using chemical vapor deposition on a conductive silicon substrate 1 0 15mm square, conductive and heat-treated them A polycrystalline silicon layer 20 was formed.
  • Two types of samples were formed on this substrate. One is a sample in which conductive oxide layers 14 and 15 are formed through a metal mask of 2 mm square and then processed to 100 ⁇ m square by an electron beam laser to measure the electrode resistance. was used.
  • the oxide dielectric layer 16 and the upper electrode layer 17 are each placed through a 4 mm square, 2 mm diameter metal mask. This is a sample for measuring capacitance characteristics in which the upper electrode layer 17 is formed into a 10 ⁇ m square by ion milling using a photomask using a photomask.
  • the method for forming each oxide layer is described below. However, the manufacturing method of each oxide described here is an example, and there is no problem even if the manufacturing methods are interchanged.
  • Ir0 2 alone was formed by electron beam evaporation.
  • an oxide powder of 0 2 after molding into a cylindrical shape with a diameter of 1 2 mm thickness 1 0 mm using a pressure molding machine, calcined for 2 hours in an oxygen stream 1100 hand, which as an electron beam evaporation source Using.
  • a substrate heater temperature of 600, a film forming speed of 2 minutes, and a pressure of 0.1 ⁇ Torr oxygen is introduced up to a pressure of 70 Torr.
  • the substrate heater temperature was set to 580 ° C., and two 50 nm IrO layers were laminated to form a two-layer conductive oxide layer 12.
  • Ir0 2 except the conductive oxide layer was formed using an RF magnetic preparative port Nsupa' evening-ring method using an oxide sintered body Target Tsu bets made of the cation composition.
  • Deposition conditions below substrate heater temperature 600, incident power 1.SWZcm 1 ⁇ Deposition rate 3 nm / min, purity 3 N discharge Ar gas pressure 3 mTorr, oxygen deficiency of thickness 5 to 50 nm
  • a conductive oxide layer containing was formed.
  • the two-layer conductive oxide layer 12 was formed.
  • a sintered body represented by the above cation composition was used.
  • the type and manufacturing method of the oxide dielectric layer only affected the essential physical characteristics of the capacitor, and did not affect the two-layer conductive oxide thin film.
  • Figure 7 (a) shows the resistance (vertical axis) of the entire lower electrode layer as a function of the thickness (horizontal axis) of the conductive oxide layer containing oxygen vacancies formed in a non-oxidizing atmosphere.
  • Resistance is a measurement between a conductive oxide layer formed in an oxidizing atmosphere and a conductive silicon substrate.
  • the electrode resistance is remarkably large, and it is clear that the polycrystalline silicon is oxidized and the resistance is increased. The resistance decreases rapidly from 5 nm to lOnm, and becomes almost constant above lOnra.
  • the effect of increasing the coverage of the polycrystalline silicon surface and at the same time suppressing the oxidation of the polycrystalline silicon is apparent.
  • the reason why the electrode resistance depends on the type of the oxide electrode is that the difference in the resistivity of the conductive oxide itself is reflected.
  • the resistivity of the conductive oxide material alone was measured with another single film, and found to be Ir0 2 , For RuO 2 and ReO 3 , the resistivity was as low as several tens of ⁇ ⁇ cm, and even in the oxygen deficient state, about 2 to 3 times lower than that.
  • SrRu0 3 it stayed increased up to several m Omega ⁇ cm from 200 Omega cm by the introduction of oxygen deficiency.
  • FIG. 7 (b) shows a polarization hysteresis curve of an oxide ferroelectric capacitor using each oxide electrode when the thickness of the oxygen-deficient layer is 30 nm . There is almost no difference in the hysteresis curve depending on the type of oxide electrode.
  • Fig. 7 (b) by forming the conductive oxide layer adjacent to the polycrystalline silicon in a non-oxidizing atmosphere, the oxidation reaction and the diffusion of oxygen are suppressed, and the polycrystalline silicon is supplied from the substrate. It has been established that different voltages can be effectively applied to the oxide dielectric layer.
  • the conductive oxide layer 14 containing oxygen vacancies in the two-layer conductive oxide layer 12 shown in FIG. This is an example of measuring the resistance of the lower electrode layer and the polarization hysteresis curve of the oxide ferroelectric capacitor for the structure of the lower electrode layer 11 formed on the nitride layer.
  • an amorphous silicon film with a thickness of I50 nm is formed by dropping a phosphorus on a 15 mm square conductive silicon substrate 10 by chemical vapor deposition. After the polycrystalline silicon layer 20 was formed, a conductive nitride layer was formed on the entire surface as a diffusion preventing non-oxide conductive layer 30. Two types of samples were formed on the substrate. One is a sample formed by forming conductive oxide layers 14 and 15 through a 2 mm square metal mask and then processing it into a 100 m square by electron beam lithography, which is used to measure the electrode resistance. Was.
  • the other is to form conductive oxide layers 14 and 15 on the entire surface of the substrate, and then connect the oxide dielectric layer 16 and the upper electrode layer 17 to each other through a metal mask of 4 mm square and 2 mm in diameter.
  • This is a sample for measuring capacitor characteristics in which the upper electrode layer 17 is processed into a 10 // m square by electron beam lithography.
  • TiN and TaN are used as the conductive nitride (diffusion preventing non-oxide conductive layer 30) will be described in detail.
  • the formation method and the obtained nitride of Zr, Nb, V, and W can also be obtained. The results were similar.
  • the conductive nitride layer was formed by a DC sputtering method using a metal target.
  • the conductive nitride layer may be formed by using an RF magnetron sputtering method using a nitride target instead of the metal target. After the film formation, crystallization was promoted by heat treatment at 800 in an ammonia gas atmosphere for 2 minutes using a rapid thermal annealing method (Rapid Thermal Annealing method).
  • the conductive oxide layer 1 4 and 1 5, Ir0 2, Ru0 2 , SrRu0 3, CaRu0 3, Ke0 3 were used, respectively (here, since using the formula for purposes of clarity of compounds, oxygen-deficient The description of the amount is omitted for convenience).
  • the method for forming each oxide layer is described below. However, the manufacturing method of each oxide described here is an example, and there is no problem even if the manufacturing methods are interchanged.
  • IrO 2 was formed in a slightly oxidizing atmosphere using the RF magnet port sputtering method.
  • SrRu0 3 and CaRu0 3 oxide sintered data - using a RF magnetic Toronsupa' Tari packaging method using rodents bets were formed in an Ar gas atmosphere.
  • the following deposition conditions, the substrate heating heat - Te motor temperature 600, discharge Ar gas pressure 3 mTorr under incident power 1.5 / cm 2 Purity 3 N, conductive oxide layer containing oxygen vacancies 50Fi m film thickness 5 was formed.
  • Ru0 2 and Re0 3 was formed in a fine oxidizing atmosphere by a reactive evaporation method. A metal lump was used as an evaporation source. Under the following deposition conditions, substrate heater temperature 600 ° (:, deposition rate 1 nm Z min., Oxygen pressure 5 ⁇ Torr, oxygen deficiency layer 5 to 50 nm under 5 ⁇ Torr, then oxygen up to 70 ⁇ Torr Simultaneously with the introduction, the substrate heater temperature was set to 580, and two Ru0 layers and three Re0 layers each having a thickness of 50 nm were laminated to form a two-layer conductive oxide layer 12. As the oxide dielectric layer 16, lead zirconate titanate (Pb (Zr. 5 Ti.
  • the resistance (vertical axis) of the entire lower electrode layer is represented by the oxygen-deficient layer.
  • the result is that the coverage of the nitride layer surface is low, and the interface is oxidized and the resistance is increased when the conductive oxide layer is formed in the subsequent oxidizing atmosphere.
  • the resistance decreases sharply from 5 nm to lOnm in thickness, and becomes almost constant above 10 nm . This is the result of suppressing the interfacial oxidation by increasing the coverage of the nitride layer surface. It's high resistance when using CaRu0 3 as the oxide electrode is a result of the contact resistance is increased in some CaO generates decomposition electrode interface, Confirmed by X-ray diffraction.
  • Figure 8 (c) shows the polarization hysteresis of the oxide ferroelectric capacitor when the thickness of the oxygen-deficient layer shown in Fig. 8 (a) is 10 nra when TiN is used as the nitride layer. 3 shows a cis curve.
  • the electrode containing CaRu0 3-layer, hysteresis curve is open in the horizontal axis direction than the other electrodes. This is probably due to the distribution of the CaO generated by the decomposition in the electric field applied to the dielectric, but there is no problem because sufficient characteristics are secured for the capacitor.
  • Fig. 8 (a) shows the polarization hysteresis of the oxide ferroelectric capacitor when the thickness of the oxygen-deficient layer shown in Fig. 8 (a) is 10 nra when TiN is used as the nitride layer. 3 shows a cis curve.
  • the electrode containing CaRu0 3-layer, hysteresis curve is open in the horizontal axis direction than
  • the formation of the conductive oxide layer adjacent to the nitride layer in a non-oxidizing atmosphere suppresses the oxidation reaction and diffusion of oxygen and is supplied from the substrate. It proves that a voltage can be effectively applied to the oxide dielectric layer.
  • a hysteresis curve essentially similar to that shown in Fig. 8 (c) was obtained.
  • the conductive oxide layer 14 containing oxygen vacancies in the two-layer conductive oxide layer 12 shown in FIG. This is an example of measuring the polarization hysteresis curve of the oxide ferroelectric capacitor for the structure of the lower electrode layer 11 formed on the layer 30.
  • the shape and forming method of the substrate 10, the polycrystalline silicon layer 20, the TiN layer as the diffusion-preventing non-oxide conductive eyebrow 30, the oxide dielectric layer 16, and the upper electrode layer 17 are described in the above embodiments of the present invention.
  • the contents are the same as those described in modes 1 and 2.
  • the selection of the oxide dielectric layer and the upper electrode layer is not essential.
  • TiN having a thickness of 40 ⁇ was formed as the diffusion preventing non-oxide conductive layer 30 according to the second embodiment of the present invention. Similar results were obtained for the other nitrides listed in the second embodiment of the present invention.
  • platinum was used as the metal layer 40, but the same effect was confirmed by using the same kind of noble metal such as iridium and ruthenium.
  • the metal layer was formed by DC sputtering under the following conditions. The incident power was 400 W ', the discharge gas was Ar, the gas pressure was 20 mTorr, and the substrate heater temperature was 500. A metal layer 40 having a thickness of 20 nm was formed on the entire surface of the substrate on the diffusion preventing non-oxide conductive layer 30.
  • the conductive oxide with Ir0 2, Ru0 2, SrRu0 3 , SrT i 0 3 which La was added 4 wt%, to form either using RF magnetic Bok port Nsupattari ring method in finely oxidizing atmosphere .
  • the targets used were oxide sintered compact targets.
  • FIG. 9 shows a polarization hysteresis curve of the oxide ferroelectric capacitor for each conductive oxide. Regardless of the type of oxygen-deficient layer, a highly symmetric open hysteresis loop is observed. Even if the metal layer is as thin as 20 nm and the adjacent conductive oxide layer is formed in a slightly oxidizing atmosphere, the oxygen deficiency layer intervenes to suppress oxidation reaction and oxygen diffusion, and supply from the substrate. It is demonstrated that the applied voltage can be effectively applied to the oxide dielectric layer.
  • a conductive oxide layer containing oxygen vacancies is formed in a non-oxidizing atmosphere, which is one of the features of the present invention, to form a two-layer conductive oxide layer.
  • a polycrystalline silicon (Embodiment 1) of the present invention, a diffusion preventing non-oxide conductive layer made of nitride or the like (Embodiment 2), or an adjacent metal layer The lower electrode layer and the oxide dielectric layer could be formed without oxidizing the diffusion preventing non-oxide conductive layer (Embodiment 3). As a result, the interfacial resistance and contact resistance of the electrodes can be reduced, and an oxide dielectric capacitor suitable for high integration can be formed.
  • a titanium aluminum nitride layer is provided on the semiconductor layer side of two conductive material layers provided between the semiconductor layer and the dielectric layer, and an oxidation-resistant is provided on the dielectric side.
  • the embodiment of the present invention is an example in which the allowable amounts of the aluminum content and the nitrogen content in the titanium aluminum nitride layer are examined from the viewpoint of phase uniformity, low resistivity, and oxidation resistance.
  • the phase homogeneity and oxidizing property were examined from the phase observed by the X-ray diffraction method, and the resistivity was measured from the direct current four-terminal method.
  • the natural oxide film is removed conductive silicon substrate, using a DC sputtering-ring method, titanium aluminum nitride ((T i ⁇ A l J have y N y) film was formed.
  • Ti aluminum nitride ((T i ⁇ A l J have y N y) film was formed.
  • On Target Tsu DOO A composite target in which aluminum metal pieces and titanium metal pieces were laid in a mosaic pattern on an aluminum metal plate was used.
  • the aluminum content X was adjusted based on the area ratio of the two metal pieces.
  • Argon discharge gas, and the flow rate ratio of Z nitrogen gas were adjusted in the range from 95 to 5 to 95.
  • the substrate heating temperature was 550.
  • Other forming conditions were: incident power of 400 W, total gas consumption. 20mTo from pressure 5 rr, growth rate 10 nm / min from 5, a thickness of 50nm.
  • FIG. 10 (a) shows the product phase and resistivity as a function of the aluminum content X for a sample with a nitrogen content y of 0.5.
  • X-ray diffraction results when X was 0.6 or less, only diffraction lines belonging to TiN were observed, but when X exceeded 0.6, a mixed phase containing a mixture of phases belonging to A1N was observed, and X increased. With the disappearance of the TiN phase, the A1N phase increased at the same time.
  • FIG. 10 (b) shows the product phase and resistivity as a function of the nitrogen content y for a sample with an aluminum content X of 0.4.
  • y was smaller than 0.2 or exceeded 0.6
  • diffraction lines other than TiN were remarkably observed.
  • the resistivity was examined only for those nitrogen contents where y, at which a single phase was observed in the X-ray diffraction pattern, was between 0.2 and 0.6.
  • the resistivity increases with y, and increases sharply from around 0.6. Normally, the influence of the different phases appears more sensitively in the resistivity than in the X-ray diffraction, so the threshold determined by the resistivity is considered to be narrow in both X and y.
  • a platinum layer having a thickness of 30 ⁇ was formed on the titanium aluminum nitride layer formed above by a DC sputtering method.
  • the formation conditions were: 400 W incident power, argon discharge gas, 20 mTorr gas pressure, and 500 ° C formation temperature. Further, by using the RF magnetic Bok port Nsuno Yyuri ring method on the platinum layer was laminated dielectric oxide layer having a thickness of lOOnm (Pb (Zr .. 5 Ti .. 5) 0 3).
  • rapid thermal annealing Rapid Thermal Annealing
  • the oxide dielectric layer once formed was completely removed by a dry etching process to expose the platinum layer again.
  • X-ray diffraction measurement was performed on this sample to determine whether or not the titanium aluminum nitride ((Ti ⁇ Alj! -YNy) layer was oxidized and changed in quality due to the formation of the oxide dielectric layer.
  • Fig. 10 (a) it was confirmed that when the aluminum content X was smaller than 0.2, the nitride layer was oxidized to form ⁇ .
  • Fig. 10 (b) As seen in, Ti0 2 also when the nitrogen content y is smaller than 0.4 were observed. The above threshold values were the same even when the aluminum content X and the nitrogen content y were fixed at different values.
  • titanium oxide nitride may be used for other oxide dielectrics, such as lead zirconate titanate, barium lead zirconate titanate, barium strontium titanate, and bismuth ferroelectrics having different titanium zirconium ratios. Film diffusion and antioxidant layers showed similar effects.
  • the embodiment of the present invention is an example in which an oxide dielectric capacitor including a titanium aluminum nitride diffusion and oxidation preventing layer is formed, and a polarization hysteresis curve is measured.
  • a Ru metal target was used as a target.
  • the formation conditions were: substrate heater temperature 500, incident power 1.5W / cm 2, deposition rate 3 nm , discharge Ar gas / oxygen gas flow ratio 50Z50, pressure 7 mTorr.
  • the oxide ⁇ layer using a titanate Jill Con lead thickness lOOnm formed using a sol-gel method (Pb (Zr 0. 5 Ti 0. 5) 0 3).
  • a solution obtained by reacting lead acetate, titanium isopropoxide and zirconium isopropoxide in methoxetanol was used. This is applied on the above platinum layer (sample (a)) or conductive oxide layer (sample (b)), and then heated and heated rapidly in an oxygen atmosphere at 650 for 2 minutes to form a crystal. It was made.
  • the upper electrode layer was formed by a DC sputtering method through a metal mask. A platinum layer with a diameter of 2 mm was used.
  • Fig. 11 shows a polarization hysteresis curve measured by applying a voltage between the upper electrode and the conductive silicon substrate.
  • the selection of the conductive oxide layer and the oxide dielectric layer is not essential.
  • Ir0 as the conductive oxide 2, SrRu0 3, the same effect using any Re0 3 were obtained.
  • X is a lead zirconate titanate other than 0.5
  • the thickness of the metal layer such as platinum adjacent thereto can be reduced. Even when the thickness was reduced to 30 nm, the lower electrode layer and the oxide dielectric layer could be formed without oxidizing the nitride layer. As a result, the interface resistance and contact resistance of the electrodes can be reduced, and at the same time, the capacitor's aspect ratio can be reduced. Thus, an oxide dielectric capacitor suitable for high integration can be formed. Was completed.
  • Embodiments 6 to 10 of the invention will be described with reference to the related drawings, taking a MOS transistor formed on a silicon substrate as an example. I will explain.
  • Embodiments 6 to 8 of the present invention are based on the above guideline 1 for selecting a conductive material
  • Embodiments 9 and 10 of the present invention are based on the guideline 2 for selecting a conductive material.
  • Embodiments of the present invention relate to the manufacture of a semiconductor device.
  • An example of a pre-process up to before formation of a nap is shown.
  • a MOS transistor is formed on a silicon substrate, then the surface is once smoothed, and finally, the formation of a polycrystalline silicon plug for electrical connection with the capacitor electrode is described.
  • a series of manufacturing steps will be described step by step with reference to FIG. 12 to FIG.
  • a switch transistor is formed by an existing MOSFET process.
  • 1 2 1 is a p-type semiconductor substrate
  • 1 2 2 is an element isolation insulating film
  • 1 2 3 is a gate oxide film
  • 1 2 4 is a word line serving as a gate electrode
  • 1 2 5 and 1 2 6 are Reference numeral 127 denotes an interlayer insulating film made of SiO L.
  • Si 3 N 4 layer 1 2 9 having a thickness of 600nm subsequently embedded the Si 3 N 4 layer 1 2 9 thickness equivalent amount etched was deposited insulating film between Wa word line,
  • the structure shown in FIG. 12 is formed.
  • Si 0 2 layer 1 2 8 is the foundation when machining the bit lines in a later step, and the anti-device role of exposure and the element isolation insulation ⁇ 1 2 2 of the substrate surface is damaged.
  • the next step is shown in FIG.
  • a portion of the Si 3 N 4 to be formed is opened by photolithography and dry etching.
  • Amorphous silicon having a thickness of 600 ⁇ containing n-type impurities is deposited on the entire surface including the perforated portion using a chemical vapor deposition method, and polycrystallized through a heat treatment. Further, a polycrystalline silicon equivalent to the film thickness is etched to form the structure shown in FIG. 13 in which the openings are filled with polycrystalline silicon 13 1 and 13 2.
  • bit lines forming shortly is electrically connected to the ⁇ -type impurity diffusion layer 1 2 5 of the substrate to the Si0 2 insulating film located on top of the polycrystalline silicon 1 3 1, Using photolithography and dry etching To make a hole. Si0 2 layer of the opening formed on the entire surface of the laminated film (1 4 2) of Shirisai de and the polycrystalline silicon of the metal serving as bit lines including, thickness 200nm on further the (1 4 3) Is deposited.
  • bit lines 1 4 2 and SiO 2 layer 1 4 3 are formed.
  • bit lines 1 4 2 and SiO 2 layer 1 4 3 are formed.
  • 150 nm thick Si 3 N 4 was deposited by chemical vapor deposition, and then this was etched by dry etching. Form a 3 N 4 side wall spacer 144.
  • the polycrystalline silicon 1 3 2 above section Si0 2 insulating film 1 4 1 positioned to opening by using the mined Li lithography method and dry etching method. This is a preparation for electrically connecting a capacitor electrode to be formed later and the n-type impurity diffusion layer 126.
  • an insulating film 15 1 having a thickness sufficient to flatten the substrate surface is deposited.
  • a 500-nm-thick boron silicate glass (BPSG) is used, but another silicon oxide film may be used.
  • CMP chemical mechanical polishing
  • a contact hole is formed by opening the insulating film 151 located above the n-type impurity diffusion layer 126 using photolithography and dry etching.
  • a 200-nm-thick phosphorus-doped amorphous silicon layer is deposited on the entire surface including the holes by chemical vapor deposition, and then heat-treated to polycrystallize it.
  • a polycrystalline silicon plug 152 embedded with silicon is formed.
  • an oxygen deficiency having a thickness of lOnm is contained in an Ar atmosphere using an RF magnetron sputtering method.
  • a conductive oxide layer 16 1 (RuO 2 ) is formed.
  • the two-layer conductive oxide layers 16 1 and 16 2 were patterned by sputter etching using the transferred pattern as a mask.
  • the oxide dielectric layer 163 was formed.
  • the forming method is as described in detail in the second and third embodiments of the invention.
  • a platinum plate electrode 164 was formed to complete the capacitor of the memory cell.
  • the choice of the oxide dielectric layer is not essential.
  • X 0.5 other than lead zirconate titanate (Pb (Zr x Ti, _ x 0 3)), titanate Bariumusu strontium ((Ba, Sr 1 _; i) Ti0 3 (x 0 to 1)),
  • a memory cell could be formed using a barium lead zirconate titanate or bismuth-based layered ferroelectric. Further, similar effects were obtained by using any of the compounds described in Embodiment 1 of the present invention as the conductive oxide layer.
  • a diffusion preventing non-oxide conductive layer 171 is formed.
  • TiN is used as the diffusion preventing non-oxide conductive layer
  • similar results can be obtained for nitrides of Ta, Zr, Nb, V, and W as semiconductor devices.
  • the nitride layer was formed by a direct current sputtering method using a metal target as described in detail in the second embodiment of the present invention.
  • the film thickness is 40 nm .
  • heat treatment was performed at 800 ° C for 2 minutes in an ammonia gas atmosphere using a rapid temperature heating method to promote crystallization.
  • the choice of the oxide dielectric layer is not essential.
  • X 0.5 other than lead zirconate titanate (Pb (Zr x Ti physician J0 3), titanate Bariumusu strontium ((Ba x Sr! _ X ) Ti0 3 (x 0 to 1)), zirconate titanate
  • a memory cell could be formed using a barium lead or bismuth-based layered ferroelectric material, and the conductive oxide layer described in Embodiments 1 to 3 of the present invention, l r 0 2, Ru0 2, CaRu0 3, SrTi0 was added La 3, the same effect using any Re0 3 were obtained.
  • FIG. 4 shows a structure in which the pre-process from the formation of the MOS transistor to the formation of the polycrystalline silicon plug, which is described in detail in the sixth embodiment of the present invention, is completed.
  • This is an example of a process for forming an oxide dielectric capacitor in which a two-layer conductive oxide layer is formed on a diffusion-preventing non-oxide conductive layer via a metal layer as shown.
  • a diffusion preventing non-oxide conductive layer 171 is formed.
  • TiN is used as the diffusion preventing non-oxide conductive layer.
  • the TiN layer is as described in the seventh embodiment of the present invention.
  • a 20 nm-thick metal layer 181 was formed by a DC sputtering method.
  • platinum was used in the embodiment of the present invention, the same effect was confirmed by using the same kind of noble metal such as iridium and ruthenium.
  • the conditions for forming the metal layer are as described in the third embodiment of the present invention.
  • IrO 2 As a two-layer conductive oxide layer, IrO 2 was formed in a slightly oxidizing atmosphere using an RF magnet port sputtering method. Of course, the same effect was obtained even when formed in Ar gas.
  • a conductive oxide layer 16 1 (IrO 2 ) containing oxygen vacancies with a thickness of 10 nm is formed at a gas flow ratio of ArZOz -100Z1, and then the gas flow ratio is reduced to Ar 0 2 9/1 to obtain a thickness.
  • 50 nm conductive oxide layers 16 2 (IrO 2 ) were laminated to form two-layer conductive oxide layers 16 1 and 16 2. Details of conditions such as temperature are described in the third embodiment of the present invention. As you did.
  • the choice of the oxide dielectric layer is not essential.
  • X 0.5 other than lead zirconate titanate (Pb (Zr x Ti 1- x) 0 3), titanate Bariumusu strontium ((Ba x Sr 1-x ) Ti0 3) (x 0 to 1)),
  • a memory cell could be formed using a barium lead zirconate titanate or bismuth-based layered ferroelectric.
  • Ru0 2, SrRu0 3, CaRu0 3, SrTi0 was added La 3, obtained the same effect using any Re0 3 of Was done.
  • titanium aluminum nitride is formed on a substrate on which the pre-process from the formation of the MOS transistor to the formation of the polycrystalline silicon plug, which is described in detail in the sixth embodiment of the present invention, is completed.
  • 5 is an example of a process for forming an oxide dielectric capacitor including a diffusion and oxidation preventing layer.
  • the structure of the lower electrode a structure in which a metal layer and an oxide dielectric layer are sequentially laminated on titanium aluminum nitride shown in FIG. 5 was adopted.
  • layer 1 9 RF magnetic Bok Ronsuno. It was formed using a sputtering method. As a target, a composite target in which an appropriate amount of aluminum nitride pieces were placed on a titanium nitride plate was used. The formation conditions were as follows: substrate heater temperature was 550, incident power was 400 W, total gas pressure was 8 mTorr, argon discharge gas / nitrogen gas flow ratio was 90/10, growth rate was lOnmZ, and film thickness was 50 nm. is there. The effect described below was the same for the other aluminum or nitrogen contents described in FIG.
  • a 30 nm-thick metal layer 18 1 was formed thereon by a DC sputtering method.
  • platinum was used in the embodiment of the present invention, the same effect was confirmed by using the same kind of noble metal, i.e., platinum.
  • the conditions for forming the metal layer are as described in the fourth embodiment of the present invention.
  • the choice of the oxide dielectric layer is not essential.
  • titanium aluminum nitride is formed on a substrate on which the pre-process from the formation of the MOS transistor to the formation of the polycrystalline silicon plug, which is described in detail in the sixth embodiment of the present invention, is completed.
  • 5 is an example of a process for forming an oxide dielectric capacitor including a diffusion and oxidation preventing layer.
  • a structure in which a metal IR, a conductive oxide layer, and an oxide dielectric layer are sequentially laminated on titanium aluminum nitride shown in FIG. 6 was adopted as the structure of the lower electrode.
  • nitriding titanium Arumini ⁇ beam (Ti 0 1. 5) 0 5. 5) layer 1 9 1 and metal Layer 18 1 was formed.
  • the following effects were similar for other aluminum or nitrogen contents. Similar effects were confirmed when using iridium, ruthenium, or rhenium as the metal layer.
  • IrO 2 having a thickness of 50 ⁇ formed by an RF magnet sputtering method was used. In the evening, an Ir metal target was used.
  • the formation conditions are: substrate heater temperature 500, incident power 1.5WZCDI 2 , film formation rate 3nm / min, discharge Ar gas Z oxygen gas flow ratio 50750, pressure 7mTorr.
  • a transfer pattern as a mask, the titanium aluminum nitride layer 191, the metal layer 181, and the conductive oxide layer 201 were patterned by a sputter etching method.
  • an oxide dielectric layer 163 was formed.
  • a bismuth layered ferroelectric, Bi 4 Ti 3 0 12 formed by a reactive evaporation method was used as the oxide dielectric.
  • titanium was evaporated using an electron gun and bismuth was evaporated using a effusion cell to form an amorphous oxide thin film having a thickness of 100 nm at room temperature. After the formation, it was heated at 700 ° C for 2 minutes in an oxygen atmosphere to be crystallized. Finally, a platinum plate The electrode 164 was formed and the patterning was completed to complete the capacity of the memory cell.
  • the application form of the oxide dielectric capacitor according to the present invention to the semiconductor device has been described by taking the MOS transistor formed on the silicon substrate as an example.
  • Concerning conductive material selection guideline 1 by forming a conductive oxide layer containing oxygen vacancies in a non-oxidizing atmosphere and forming a two-layer conductive oxide layer, the adjacent polycrystalline silicon (invention) Embodiment 6), a diffusion preventing non-oxide conductive layer made of nitride or the like (Embodiment 7), and a diffusion preventing non-oxide conductive layer adjacent via a metal layer (Embodiment 8)
  • a memory cell could be formed without oxidizing.
  • the application to the M0SFET is mainly described as an example, but the scope of application is not limited to the example.
  • Oxide dielectrics including oxide ferroelectrics
  • the present invention is also effective for other devices used as a pan, for example, a GaAs MM IC using an oxide dielectric as a so-called bypass capacitor.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Semiconductor Memories (AREA)

Abstract

Composant à semi-conducteur possédant un condensateur dans lequel on utilise un diélectrique à base d'oxyde. L'oxydation de la face de contact entre l'électrode inférieure et le diélectrique en oxyde est supprimée. Ce condensateur à diélectrique en oxyde est constitué par l'électrode inférieure (11), le diélectrique en oxyde (16) situé sur l'électrode (11) et l'électrode supérieure (17) située sur le diélectrique (16). L'électrode (11) comprend une couche conductrice en deux parties (12) en oxyde et les couches (14) et (15) constituant la couche (12) possèdent la même structure cristalline et contiennent le même élément. La couche (14) située côté substrat (10) est appauvrie en oxygène. Etant donné que la couche (14) sert de couche empêchant la diffusion de l'oxygène, l'oxydation de l'élément (13) de l'électrode inférieure (11) contigu à la couche (14) et à la face de contact entre l'élément (13) et la couche (14) est supprimée, ce qui garantit un contact électrique excellent entre l'élément (13) et la couche (14).
PCT/JP1996/002226 1996-08-07 1996-08-07 Composant a semi-conducteur et son procede de fabrication WO1998006131A1 (fr)

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PCT/JP1996/002226 WO1998006131A1 (fr) 1996-08-07 1996-08-07 Composant a semi-conducteur et son procede de fabrication
TW086110808A TW343376B (en) 1996-08-07 1997-07-29 Semiconductor device and its manufacture

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Cited By (2)

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JP2002141478A (ja) * 2000-11-06 2002-05-17 Matsushita Electric Ind Co Ltd 半導体装置及びその製造方法
US8368132B2 (en) 2008-03-31 2013-02-05 Fujitsu Semiconductor Limited Ferroelectric memory and manufacturing method thereof

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JPH0774313A (ja) * 1993-09-01 1995-03-17 Nec Corp 薄膜キャパシタおよびその製造方法
JPH0864786A (ja) * 1994-08-01 1996-03-08 Texas Instr Inc <Ti> マイクロ電子構造体とその製造法
JPH08162617A (ja) * 1994-12-01 1996-06-21 Nec Corp 薄膜キャパシタ及びその製造方法
JPH08213560A (ja) * 1994-09-30 1996-08-20 Samsung Electron Co Ltd 強誘電体キャパシタ及びその製造方法

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JPH0774313A (ja) * 1993-09-01 1995-03-17 Nec Corp 薄膜キャパシタおよびその製造方法
JPH0864786A (ja) * 1994-08-01 1996-03-08 Texas Instr Inc <Ti> マイクロ電子構造体とその製造法
JPH08213560A (ja) * 1994-09-30 1996-08-20 Samsung Electron Co Ltd 強誘電体キャパシタ及びその製造方法
JPH08162617A (ja) * 1994-12-01 1996-06-21 Nec Corp 薄膜キャパシタ及びその製造方法

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002141478A (ja) * 2000-11-06 2002-05-17 Matsushita Electric Ind Co Ltd 半導体装置及びその製造方法
US6590252B2 (en) 2000-11-06 2003-07-08 Matsushita Electric Industrial Co., Ltd. Semiconductor device with oxygen diffusion barrier layer termed from composite nitride
US6723637B2 (en) 2000-11-06 2004-04-20 Matsushita Electric Industrial Co., Ltd. Semiconductor device and method for fabricating the same
US6753566B2 (en) 2000-11-06 2004-06-22 Matsushita Electric Industrial Co., Ltd. Semiconductor device with an oxygen diffusion barrier layer formed from a composite nitride
US8368132B2 (en) 2008-03-31 2013-02-05 Fujitsu Semiconductor Limited Ferroelectric memory and manufacturing method thereof
US8633036B2 (en) 2008-03-31 2014-01-21 Fujitsu Semiconductor Limited Manufacturing method of ferroelectric capacitor

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