WO1997007464A1 - Anordnung zum anschluss peripherer speichergeräte - Google Patents
Anordnung zum anschluss peripherer speichergeräte Download PDFInfo
- Publication number
- WO1997007464A1 WO1997007464A1 PCT/DE1996/001365 DE9601365W WO9707464A1 WO 1997007464 A1 WO1997007464 A1 WO 1997007464A1 DE 9601365 W DE9601365 W DE 9601365W WO 9707464 A1 WO9707464 A1 WO 9707464A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- data
- ring
- data transmission
- memory
- storage devices
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4004—Coupling between buses
- G06F13/4022—Coupling between buses using switching circuits, e.g. switching matrix, connection or expansion network
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
- G06F15/163—Interprocessor communication
- G06F15/167—Interprocessor communication using a common memory, e.g. mailbox
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
- G06F3/0671—In-line storage system
- G06F3/0673—Single storage device
Abstract
Description
Claims
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/011,281 US6021465A (en) | 1995-08-11 | 1996-07-24 | Arrangement for the connecting peripheral storage devices |
EP96924769A EP0843856A1 (de) | 1995-08-11 | 1996-07-24 | Anordnung zum anschluss peripherer speichergeräte |
JP9508807A JPH11510929A (ja) | 1995-08-11 | 1996-07-24 | 周辺記憶装置を接続するための装置 |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE19529628 | 1995-08-11 | ||
DE19529628.1 | 1995-08-11 |
Publications (1)
Publication Number | Publication Date |
---|---|
WO1997007464A1 true WO1997007464A1 (de) | 1997-02-27 |
Family
ID=7769303
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/DE1996/001365 WO1997007464A1 (de) | 1995-08-11 | 1996-07-24 | Anordnung zum anschluss peripherer speichergeräte |
Country Status (4)
Country | Link |
---|---|
US (1) | US6021465A (de) |
EP (1) | EP0843856A1 (de) |
JP (1) | JPH11510929A (de) |
WO (1) | WO1997007464A1 (de) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1999017208A1 (en) * | 1997-09-30 | 1999-04-08 | Lsi Logic Corporation | Multiple data controllers with centralized cache |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7475174B2 (en) * | 2004-03-17 | 2009-01-06 | Super Talent Electronics, Inc. | Flash / phase-change memory in multi-ring topology using serial-link packet interface |
US8375146B2 (en) * | 2004-08-09 | 2013-02-12 | SanDisk Technologies, Inc. | Ring bus structure and its use in flash memory systems |
CN107851058B (zh) * | 2016-05-27 | 2021-02-12 | 华为技术有限公司 | 存储系统及设备扫描方法 |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0330475A2 (de) * | 1988-02-24 | 1989-08-30 | Fujitsu Limited | Konfigurationssteuerungssystem |
EP0410860A1 (de) * | 1989-07-27 | 1991-01-30 | Bull S.A. | Schnittstelle zur Verbindung von einem Rechnerbus mit einem faseroptischen Ringnetzwerk |
WO1991014229A1 (en) * | 1990-03-09 | 1991-09-19 | Sf2 Corporation | Apparatus and method for communication in a data processing system |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4183084A (en) * | 1977-06-06 | 1980-01-08 | Digital Equipment Corporation | Secondary storage facility with serial transfer of control messages |
US5077736A (en) * | 1988-06-28 | 1991-12-31 | Storage Technology Corporation | Disk drive memory |
DE4033464A1 (de) * | 1990-10-20 | 1992-04-23 | Fischer Gmbh Gert | Anordnung zur selektiven kopplung mehrerer module mit einem prozessor |
DE59108554D1 (de) * | 1991-08-13 | 1997-03-27 | Siemens Nixdorf Inf Syst | Verfahren zur Durchführung von Ein-/Ausgabeoperationen in Datenverarbeitungssystemen |
JP2777301B2 (ja) * | 1992-01-07 | 1998-07-16 | 三菱電機株式会社 | 記録装置 |
US5548711A (en) * | 1993-08-26 | 1996-08-20 | Emc Corporation | Method and apparatus for fault tolerant fast writes through buffer dumping |
-
1996
- 1996-07-24 EP EP96924769A patent/EP0843856A1/de not_active Withdrawn
- 1996-07-24 WO PCT/DE1996/001365 patent/WO1997007464A1/de not_active Application Discontinuation
- 1996-07-24 US US09/011,281 patent/US6021465A/en not_active Expired - Fee Related
- 1996-07-24 JP JP9508807A patent/JPH11510929A/ja active Pending
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0330475A2 (de) * | 1988-02-24 | 1989-08-30 | Fujitsu Limited | Konfigurationssteuerungssystem |
EP0410860A1 (de) * | 1989-07-27 | 1991-01-30 | Bull S.A. | Schnittstelle zur Verbindung von einem Rechnerbus mit einem faseroptischen Ringnetzwerk |
WO1991014229A1 (en) * | 1990-03-09 | 1991-09-19 | Sf2 Corporation | Apparatus and method for communication in a data processing system |
Non-Patent Citations (1)
Title |
---|
"40-MBYTE/S SERIAL LINK POSES AS AN ALTERNATIVE TO SCSI", ELECTRONIC DESIGN, vol. 42, no. 14, 11 July 1994 (1994-07-11), pages 46, 48, 50, XP000459836 * |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1999017208A1 (en) * | 1997-09-30 | 1999-04-08 | Lsi Logic Corporation | Multiple data controllers with centralized cache |
Also Published As
Publication number | Publication date |
---|---|
US6021465A (en) | 2000-02-01 |
JPH11510929A (ja) | 1999-09-21 |
EP0843856A1 (de) | 1998-05-27 |
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