WO1997001866A1 - Boitier a structure en reseau de billes mettant en oeuvre des spheres recouvertes de soudure - Google Patents

Boitier a structure en reseau de billes mettant en oeuvre des spheres recouvertes de soudure Download PDF

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Publication number
WO1997001866A1
WO1997001866A1 PCT/US1996/009982 US9609982W WO9701866A1 WO 1997001866 A1 WO1997001866 A1 WO 1997001866A1 US 9609982 W US9609982 W US 9609982W WO 9701866 A1 WO9701866 A1 WO 9701866A1
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WO
WIPO (PCT)
Prior art keywords
solder
package according
package
metal
coating
Prior art date
Application number
PCT/US1996/009982
Other languages
English (en)
Inventor
Randolph D. Schueller
Original Assignee
Minnesota Mining And Manufacturing Company
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Minnesota Mining And Manufacturing Company filed Critical Minnesota Mining And Manufacturing Company
Publication of WO1997001866A1 publication Critical patent/WO1997001866A1/fr

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/12Mountings, e.g. non-detachable insulating substrates
    • H01L23/13Mountings, e.g. non-detachable insulating substrates characterised by the shape
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • H01L23/3128Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation the substrate having spherical bumps for external connection
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
    • H01L23/49816Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
    • H05K3/3431Leadless components
    • H05K3/3436Leadless components having an array of bottom contacts, e.g. pad grid array or ball grid array components
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01078Platinum [Pt]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013Alloys
    • H01L2924/0132Binary Alloys
    • H01L2924/01322Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/095Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
    • H01L2924/097Glass-ceramics, e.g. devitrified glass
    • H01L2924/09701Low temperature co-fired ceramic [LTCC]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/02Fillers; Particles; Fibers; Reinforcement materials
    • H05K2201/0203Fillers and particles
    • H05K2201/0206Materials
    • H05K2201/0212Resin particles
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10227Other objects, e.g. metallic pieces
    • H05K2201/10234Metallic balls
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10431Details of mounted components
    • H05K2201/10439Position of a single component
    • H05K2201/10477Inverted
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10954Other details of electrical connections
    • H05K2201/10992Using different connection materials, e.g. different solders, for the same connection
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/04Soldering or other types of metallurgic bonding
    • H05K2203/041Solder preforms in the shape of solder balls
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

Definitions

  • the present invention relates generally to packaging for electronic devices and, more particularly, to packaging of the ball grid array type.
  • Ball grid array packages offer many advantages in the packaging of integrated circuit electronic devices and are rapidly becoming the package of choice for high input/output applications.
  • tin/lead solder spheres are attached to ceramic, epoxy glass, or flexible (i.e. polyimide) substrates to form ball grid array packages.
  • Integrated circuit die are attached to the package and the package is soldered by means of the solder balls to another substrate (typically an epoxy- glass printed circuit board) by locating the solder balls in solder paste and heating in an oven to reflow the paste (a standard surface mount practice) .
  • Eutectic solder balls are typically attached to the BGA package by fluxing and placing them onto a metal pad which is surrounded by a solder mask material and reflowing in an oven.
  • solder ball would absorb much of the stress induced during thermal cycling and thus provide a more durable package.
  • One common method of solving this problem is to replace the solder balls with long columns of solder which absorb the stresses by bending. However, these columns are quite fragile and the standoff of the package can be unacceptably high.
  • a thin coating of near eutectic solder is electroplated onto small metal spheres (300-800 ⁇ m in diameter) using a barrel plating process. Coating thicknesses ranging from 15 to 75 ⁇ m. Although most types of metal spheres could be solder electroplated, copper or high melting temperature solder spheres would be most useful for ball grid array applications. These high melting temperature spheres coated with low melt solder exhibit controlled collapse during reflow attachment to the board as do the solid 10/90 tin-lead solder spheres currently being used in the industry.
  • the coated spheres can be mass reflow attached to an organic substrate by dipping the sphere into flux or placing the sphere onto a fluxed pad followed by reflowing of the outer coating.
  • This method of attachment is more efficient than the current process of locally heating and attaching one ball at a time and there is no need to selectively deposit solder paste onto the pads, as is done with the solid 10/90 spheres.
  • this mass reflow can be accomplished without the need for a solder mask since the hard solder ball core prevents the ball from collapsing. If near eutectic solder is coated onto a higher lead containing solder alloy core, this construction can also be reworked in a similar manner as the 10/90 tin-lead ball.
  • solder paste which bonds the package to the board can be melted at a lower temperature than the coating on the sphere.
  • a coating of solder for example tin/lead is plated onto polymer spheres.
  • the polymer spheres are sputter coated or vapor coated with metal, and a surface layer of solder is then deposited onto the sphere using a barrel electroplating process. These coated spheres can be used in place of the solid solder balls currently being used for ball grid array packages.
  • the greater elasticity of the plastic core reduces the stress caused by thermal expansion mismatch between the package and the board, thus increasing the thermal cycle fatigue life of the solder joint.
  • this sphere is more environmentally acceptable since it uses significantly less lead containing solder than a solid ball.
  • Figure 1 is a cross-sectional view of a tape ball grid array device according to the invention and a printed circuit board before the tape ball grid array device is attached
  • Figure 2 is a view similar to Figure 1 after attachment of the tape ball grid array device to the printed circuit board
  • Figure 3 is a cross-sectional view of a first embodiment of a solder ball of the invention and a printed circuit board prior to attachment of the solder ball to the board
  • Figure 4 is a view similar to Figure 3 after the solder ball has been attached to the board
  • Figure 5 is a cross-sectional view of a alternate embodiment of a solder ball according to the invention.
  • a tape ball grid array package generally indicated a 10, which includes a polymeric substrate 12 and a layer of adhesive 14 attaching the substrate 12 to a stiffener 16. Attached to the stiffener 16 by means of an adhesive 18 is an integrated circuit chip 20. Electrical signals from the integrated circuit 20 are conducted to the metallized surface of the substrate 12 by wire bonding or other conventional means. The metallized traces 22 lead to solder balls 24 soldered to the traces 22 in an array. The solder balls are used to facilitate mechanical and electrical connection of the tape ball grid array package 10 to another electronic device such as a printed circuit board 26 by allowing the tape ball grid array package 10 to be reflow soldered to copper pads 28 disposed on the printed circuit board 26.
  • a solder ball 30 of the invention includes a thin coating of near eutectic solder 32 electroplated onto small metal spheres 34 (300-800 ⁇ m in diameter) using a barrel plating process. Coating thicknesses preferably range from 15 to 75 ⁇ m since thicker coating causes lumpiness of the coating and thinner coating do not produce reliable solder joints. Although most types of metal could be used for the spheres 34, copper or high melting temperature solder spheres 34 would be most useful for ball grid array applications. These high melting temperature spheres 34 coated with low melting temperature solder 32 exhibit controlled collapse during reflow attachment to the board 26 as do the solid 10/90 tin-lead solder spheres currently being used in the industry.
  • the coated spheres 30 can be mass reflow attached to an organic substrate by dipping the sphere 34 into flux or placing the sphere 34 onto a fluxed pad followed by reflowing of the outer coating.
  • This method of attachment is more efficient than the current process of locally heating and attaching one ball at a time and there is no need to selectively deposit solder paste onto the pads, as is necessary with the solid 10/90 spheres.
  • this mass reflow can be accomplished without the need for a solder mask since the hard solder ball core 34 prevents the ball from collapsing.
  • the tape ball grid array 10 can also be reworked in a similar manner as the 10/90 tin-lead ball.
  • the eutectic outer coating 32 melts and immediately bonds to the substrate pad 28.
  • the lead from the core 34 diffuses outward due to the concentration gradient. This higher concentration of lead effectively increases the melting temperature of the thin outer coating 32.
  • the solder paste which bonds the tape ball grid array package 10 to the board 26 can be melted at a lower temperature than the coating 32 on the sphere 34.
  • FIG 4 illustrates that with the above described construction, a solder mask is not necessary since only a limited amount of low melting temperature solder 32 is melted during reflow. This amount is sufficient to form the desired solder bond 36 but is not enough to flow beyond the desired area.
  • Figure 5 illustrates an alternate embodiment of the solder balls 40 of the invention wherein a polymeric core 42 is utilized instead of the metal core 34.
  • the Polymer spheres 42 are preferably vapor coated with metal in a vacuum and then electroplated with additional metals using a barrel process.
  • the final coating is a low melting temperature solder.
  • solder balls offer the advantages discussed above with respect to solid metal cores 34, and, in addition, the ductile polymer material absorbs stresses due to thermal mismatch thus increasing the thermal cycle fatigue life. Also, the spheres use 80-90% less lead than solid solder spheres and are thus more environmentally acceptable.
  • Plastic spheres 42 in the size range of 250-600 ⁇ m with a temperature resistance greater than 220°C are metallized by either sputtering or vapor coating in a vacuum chamber while being agitated. Polymer matrix composites with a coefficient of thermal expansion close to that of tin/lead or copper would be best suited for this application, for instance, Si0 2 filled epoxy.
  • spheres 42 made from cross linked polystyrene. These spheres 42 were vapor coated with copper 44 and then barrel electroplated to build further layers of metallurgy ending with a coating of low melting temperature solder 46. Best results are obtained with a final solder thickness of 20-60 ⁇ m. Coatings thicker than this resulted in lumpy spheres after reflow. An additional layer of nickel between the copper 44 and the solder 46 may be desirable to act as a diffusion barrier. These solder coated polymer spheres 40 can be reflow attached to metal traces 22 on the tape ball grid array package 10 with a mass reflow process.
  • solder 46 forms a metallurgical bond to the traces 22.
  • a solder mask is not required since the polymer core 42 prevents collapse of the ball 40.
  • the balls 40 on the package 10 are then soldered to the board 26 using solder paste, a standard process in the surface mount industry. These spheres 40 exhibit controlled collapse during reflow attachment to the board 26 due to the solid plastic core, providing a fixed standoff height. If desired, copper can be electrodeposited onto the sphere 42 and the sphere 42 soldered to the tape ball grid array package using a solder paste. The compliant elastic behavior of the polymer cored spheres 40, along with the fixed standoff height, prevents high stress build up in the solder joints during thermal cycling.
  • solder ball 40 construction significantly reduces the amount of lead in the package 10 by 80-90%, thus making it more environmentally friendly.
  • the inner cores of the solders balls 30 and 40 need not be spherical in shape.
  • the sphere could be truncated or could be such other shapes a cubical or cylindrical.
  • a cylindrical or other columnar structure could be very useful since a shape such as this would increase flexibility and compliancy between the tape ball grid array package and the device to which it is mounted, in much the same manner as the solder columns discussed above.
  • many metals other than the few described could be used in place of or in addition to those discussed.
  • any type of substrate such as ceramic or epoxy-glass could be used.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)

Abstract

Un dispositif (10) à structure en réseau de billes comprend des billes de soudure (24) constituées d'une partie centrale (34) dont la température de fusion est relativement élevée et d'un revêtement de soudure (30) à basse température de fusion. La partie centrale (34) peut être un métal, un polymère ou un polymère revêtu de métal.
PCT/US1996/009982 1995-06-29 1996-05-17 Boitier a structure en reseau de billes mettant en oeuvre des spheres recouvertes de soudure WO1997001866A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US49635495A 1995-06-29 1995-06-29
US08/496,354 1995-06-29

Publications (1)

Publication Number Publication Date
WO1997001866A1 true WO1997001866A1 (fr) 1997-01-16

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Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2321339A (en) * 1997-01-16 1998-07-22 Nec Corp External connections for semiconductor chips
EP0882384A1 (fr) * 1995-07-14 1998-12-09 Olin Corporation Boitier electronique a grille soudee
WO2000064625A1 (fr) * 1999-04-21 2000-11-02 Telefonaktiebolaget Lm Ericsson (Publ) Perles de soudure ameliorees et utilisations associees
US7989707B2 (en) 2005-12-14 2011-08-02 Shinko Electric Industries Co., Ltd. Chip embedded substrate and method of producing the same
WO2012056243A1 (fr) 2010-10-29 2012-05-03 Conpart As Particule de polymère
US9840762B2 (en) 2010-10-29 2017-12-12 Conpart As Process for the surface modification of a polymer particle
US10403594B2 (en) 2018-01-22 2019-09-03 Toyota Motor Engineering & Manufacturing North America, Inc. Hybrid bonding materials comprising ball grid arrays and metal inverse opal bonding layers, and power electronics assemblies incorporating the same
CN113395841A (zh) * 2021-05-25 2021-09-14 佛山市国星光电股份有限公司 一种模组加工方法、模组及器件

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62112355A (ja) * 1985-11-12 1987-05-23 Ngk Spark Plug Co Ltd チツプキヤリア−
US4807021A (en) * 1986-03-10 1989-02-21 Kabushiki Kaisha Toshiba Semiconductor device having stacking structure
JPH03291950A (ja) * 1990-04-09 1991-12-24 Ibiden Co Ltd 電子回路基板とその製造方法
JPH05129303A (ja) * 1991-10-31 1993-05-25 Nec Corp ハンダバンプ構造および形成方法
JPH07106750A (ja) * 1993-09-30 1995-04-21 Ibiden Co Ltd はんだボール及びその製造方法並びに接続構造
US5468995A (en) * 1994-07-05 1995-11-21 Motorola, Inc. Semiconductor device having compliant columnar electrical connections
FR2722916A1 (fr) * 1994-02-22 1996-01-26 Nec Corp Element de connexion et procede de connexion mettant en oeuvre cet element

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62112355A (ja) * 1985-11-12 1987-05-23 Ngk Spark Plug Co Ltd チツプキヤリア−
US4807021A (en) * 1986-03-10 1989-02-21 Kabushiki Kaisha Toshiba Semiconductor device having stacking structure
JPH03291950A (ja) * 1990-04-09 1991-12-24 Ibiden Co Ltd 電子回路基板とその製造方法
JPH05129303A (ja) * 1991-10-31 1993-05-25 Nec Corp ハンダバンプ構造および形成方法
JPH07106750A (ja) * 1993-09-30 1995-04-21 Ibiden Co Ltd はんだボール及びその製造方法並びに接続構造
FR2722916A1 (fr) * 1994-02-22 1996-01-26 Nec Corp Element de connexion et procede de connexion mettant en oeuvre cet element
US5468995A (en) * 1994-07-05 1995-11-21 Motorola, Inc. Semiconductor device having compliant columnar electrical connections

Non-Patent Citations (5)

* Cited by examiner, † Cited by third party
Title
KNICKERBOCKER J U ET AL: "CERAMIC BGA A PACKAGING ALTERNATIVE", 1 January 1995, ADVANCED PACKAGING, VOL. 4, NR. 1, PAGE(S) 20, 22, 25, XP000515413 *
PATENT ABSTRACTS OF JAPAN vol. 011, no. 325 (E - 551) 22 October 1987 (1987-10-22) *
PATENT ABSTRACTS OF JAPAN vol. 016, no. 130 (E - 1184) 2 April 1992 (1992-04-02) *
PATENT ABSTRACTS OF JAPAN vol. 017, no. 501 (E - 1429) 9 September 1993 (1993-09-09) *
PATENT ABSTRACTS OF JAPAN vol. 95, no. 004 *

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EP0882384A1 (fr) * 1995-07-14 1998-12-09 Olin Corporation Boitier electronique a grille soudee
EP0882384A4 (fr) * 1995-07-14 1999-03-24 Olin Corp Boitier electronique a grille soudee
GB2321339A (en) * 1997-01-16 1998-07-22 Nec Corp External connections for semiconductor chips
US6013953A (en) * 1997-01-16 2000-01-11 Nec Corporation Semiconductor device with improved connection reliability
GB2321339B (en) * 1997-01-16 2002-01-09 Nec Corp Semiconductor device with improved connection reliability
WO2000064625A1 (fr) * 1999-04-21 2000-11-02 Telefonaktiebolaget Lm Ericsson (Publ) Perles de soudure ameliorees et utilisations associees
US9768122B2 (en) 2005-12-14 2017-09-19 Shinko Electric Industries Co., Ltd. Electronic part embedded substrate and method of producing an electronic part embedded substrate
EP2290682A3 (fr) * 2005-12-14 2011-10-05 Shinko Electric Industries Co., Ltd. Boîtier avec une puce encastrée entre deux substrats et son procédé de fabrication
US8793868B2 (en) 2005-12-14 2014-08-05 Shinko Electric Industries Co., Ltd. Chip embedded substrate and method of producing the same
US9451702B2 (en) 2005-12-14 2016-09-20 Shinko Electric Industries Co., Ltd. Chip embedded substrate and method of producing the same
US7989707B2 (en) 2005-12-14 2011-08-02 Shinko Electric Industries Co., Ltd. Chip embedded substrate and method of producing the same
US10134680B2 (en) 2005-12-14 2018-11-20 Shinko Electric Industries Co., Ltd. Electronic part embedded substrate and method of producing an electronic part embedded substrate
WO2012056243A1 (fr) 2010-10-29 2012-05-03 Conpart As Particule de polymère
US9214250B2 (en) 2010-10-29 2015-12-15 Conpart As Polymer particle
US9840762B2 (en) 2010-10-29 2017-12-12 Conpart As Process for the surface modification of a polymer particle
US10403594B2 (en) 2018-01-22 2019-09-03 Toyota Motor Engineering & Manufacturing North America, Inc. Hybrid bonding materials comprising ball grid arrays and metal inverse opal bonding layers, and power electronics assemblies incorporating the same
CN113395841A (zh) * 2021-05-25 2021-09-14 佛山市国星光电股份有限公司 一种模组加工方法、模组及器件
CN113395841B (zh) * 2021-05-25 2023-08-15 佛山市国星光电股份有限公司 一种模组加工方法、模组及器件

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