WO1990003695A3 - Procede et dispositif pour convertir le signal de balayage d'un signal d'entree analogique - Google Patents

Procede et dispositif pour convertir le signal de balayage d'un signal d'entree analogique Download PDF

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Publication number
WO1990003695A3
WO1990003695A3 PCT/EP1989/001127 EP8901127W WO9003695A3 WO 1990003695 A3 WO1990003695 A3 WO 1990003695A3 EP 8901127 W EP8901127 W EP 8901127W WO 9003695 A3 WO9003695 A3 WO 9003695A3
Authority
WO
WIPO (PCT)
Prior art keywords
signal
value
scanning
converting
scanning signal
Prior art date
Application number
PCT/EP1989/001127
Other languages
German (de)
English (en)
Other versions
WO1990003695A2 (fr
Inventor
C David Bustance
Paul Lidbetter
John Lancaster
Original Assignee
Siemens Ag Oesterreich
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens Ag Oesterreich filed Critical Siemens Ag Oesterreich
Priority to DE58907474T priority Critical patent/DE58907474D1/de
Priority to EP89910865A priority patent/EP0436603B1/fr
Publication of WO1990003695A2 publication Critical patent/WO1990003695A2/fr
Publication of WO1990003695A3 publication Critical patent/WO1990003695A3/fr

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12—Analogue/digital converters
    • H03M1/18—Automatic control for modifying the range of signals the converter can handle, e.g. gain ranging
    • H03M1/181—Automatic control for modifying the range of signals the converter can handle, e.g. gain ranging in feedback mode, i.e. by determining the range to be selected from one or more previous digital output values
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12—Analogue/digital converters
    • H03M1/14—Conversion in steps with each step involving the same or a different conversion means and delivering more than one bit
    • H03M1/16—Conversion in steps with each step involving the same or a different conversion means and delivering more than one bit with scale factor modification, i.e. by changing the amplification between the steps
    • H03M1/164—Conversion in steps with each step involving the same or a different conversion means and delivering more than one bit with scale factor modification, i.e. by changing the amplification between the steps the steps being performed sequentially in series-connected stages
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12—Analogue/digital converters
    • H03M1/34—Analogue value compared with reference values
    • H03M1/36—Analogue value compared with reference values simultaneously only, i.e. parallel type
    • H03M1/361—Analogue value compared with reference values simultaneously only, i.e. parallel type having a separate comparator and reference value for each quantisation level, i.e. full flash converter type

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Analogue/Digital Conversion (AREA)

Abstract

Un signal audio analogique est retenu, après une limitation en fréquence, par un élément de garde de balayage (SH), en vue de sa conversion en une valeur de sortie de L-bit. Le signal de balayage est converti par un convertisseur A/N parallèle (FAD) en une valeur de référence numérique avec M < L bits utiles, laquelle représente les bits les plus valorisés de la valeur de sortie et est reconvertie par un convertisseur N/A de référence (RDA). Ce signal de référence est soustrait du signal de balayage, le signal de différence est amplifié et converti en une valeur partielle avec M < N < L bits utiles. La valeur partielle constitue les bits les moins valorisés de la valeur de sortie, et un bit qui chevauche la valeur de référence sert à la correction des erreurs.
PCT/EP1989/001127 1988-09-29 1989-09-26 Procede et dispositif pour convertir le signal de balayage d'un signal d'entree analogique WO1990003695A2 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
DE58907474T DE58907474D1 (de) 1988-09-29 1989-09-26 Verfahren und vorrichtung zur wandlung des abtastsignals eines analogen eingangssignals.
EP89910865A EP0436603B1 (fr) 1988-09-29 1989-09-26 Procede et dispositif pour convertir le signal de balayage d'un signal d'entree analogique

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP88309066A EP0360936A1 (fr) 1988-09-29 1988-09-29 Méthode de conversion d'un signal analogique d'entrée échantillonné
EP88309066.4 1988-09-29

Publications (2)

Publication Number Publication Date
WO1990003695A2 WO1990003695A2 (fr) 1990-04-05
WO1990003695A3 true WO1990003695A3 (fr) 1990-09-07

Family

ID=8200230

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/EP1989/001127 WO1990003695A2 (fr) 1988-09-29 1989-09-26 Procede et dispositif pour convertir le signal de balayage d'un signal d'entree analogique

Country Status (4)

Country Link
US (1) US5148169A (fr)
EP (2) EP0360936A1 (fr)
DE (1) DE58907474D1 (fr)
WO (1) WO1990003695A2 (fr)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0901058A1 (fr) * 1991-10-30 1999-03-10 Harris Corporation Miroir de courant à deux étages
US7492297B2 (en) * 2006-08-11 2009-02-17 Realtek Semiconductor Corp. Digital-to-analog converter and method thereof
US7545295B2 (en) * 2007-09-14 2009-06-09 Realtek Semiconductor Corp. Self-calibrating digital-to-analog converter and method thereof
CN107210752B (zh) * 2015-01-22 2020-12-25 约翰·霍华德·拉格 多阶通道数模转换器

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE958197C (de) * 1952-04-18 1957-02-14 Dr Siegfried Skraup Verfahren zur Herstellung von 2, 4-Diaminochinazolin
GB806772A (en) * 1956-03-29 1958-12-31 Wellcome Found Diaminoquinazolines and method of preparing
CH457460A (fr) * 1966-06-20 1968-06-15 Parke Davis & Co Procédé de préparation de quinazolines
US3635979A (en) * 1969-09-29 1972-01-18 Pfizer Certain 6- and/or 7-alkoxy-substituted-2 4-bis(disubstituted amino) quinazolines
GB1390014A (en) * 1971-05-07 1975-04-09 Koninklijke Pharma Fab Nv Process for the preparation of carbocyclic fused pyrimidine derivatives
US3956495A (en) * 1973-10-30 1976-05-11 Eli Lilly And Company 2,4-Diaminoquinazolines as antithrombotic agents
US4098788A (en) * 1977-06-20 1978-07-04 Bristol-Myers Company Process for preparing quinazolines
EP0028473A1 (fr) * 1979-11-01 1981-05-13 Pfizer Inc. Diamino-2,4 quinazolines substituées par un atome de chlore ou un groupe alkoxy et compositions pharmaceutiques les contenant

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3581304A (en) * 1967-05-16 1971-05-25 Singer General Precision Analog-to-digital cyclic forward feed successive approximation conversion equipment
DE2026643A1 (de) * 1970-06-01 1971-12-09 Licentia Gmbh Anordnung zur Analog-Digital-Umsetzung
US3710377A (en) * 1971-01-11 1973-01-09 Westinghouse Electric Corp High speed an analog-to-digital converter
JPS6058629B2 (ja) * 1976-09-27 1985-12-20 ソニー株式会社 映像信号のアナログ−デジタル変換回路
US4544917A (en) * 1982-09-16 1985-10-01 Westinghouse Electric Corp. A/D converter having digitally controlled subranging and self-alignment apparatus for use therein
US4686511A (en) * 1985-08-23 1987-08-11 Burr-Brown Corporation Subranging analog-to-digital converter with FET isolation circuit between subtraction node and LSB encoder
JP2690905B2 (ja) * 1987-08-28 1997-12-17 株式会社日立製作所 直並列形ａｄ変換器
JPS6467034A (en) * 1987-09-08 1989-03-13 Toshiba Corp Serial-parallel type a/d converting device

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE958197C (de) * 1952-04-18 1957-02-14 Dr Siegfried Skraup Verfahren zur Herstellung von 2, 4-Diaminochinazolin
GB806772A (en) * 1956-03-29 1958-12-31 Wellcome Found Diaminoquinazolines and method of preparing
CH457460A (fr) * 1966-06-20 1968-06-15 Parke Davis & Co Procédé de préparation de quinazolines
US3635979A (en) * 1969-09-29 1972-01-18 Pfizer Certain 6- and/or 7-alkoxy-substituted-2 4-bis(disubstituted amino) quinazolines
GB1390014A (en) * 1971-05-07 1975-04-09 Koninklijke Pharma Fab Nv Process for the preparation of carbocyclic fused pyrimidine derivatives
US3956495A (en) * 1973-10-30 1976-05-11 Eli Lilly And Company 2,4-Diaminoquinazolines as antithrombotic agents
US4098788A (en) * 1977-06-20 1978-07-04 Bristol-Myers Company Process for preparing quinazolines
EP0028473A1 (fr) * 1979-11-01 1981-05-13 Pfizer Inc. Diamino-2,4 quinazolines substituées par un atome de chlore ou un groupe alkoxy et compositions pharmaceutiques les contenant

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
Electronic Engineering, Band 57, Nr. 704, August 1985, (London, GB), L.M. RADHAKRISHNAN: "Two 8 Bit DAC's Make a 12 Bit DAC", seite 30 siehe das ganze dokument *

Also Published As

Publication number Publication date
EP0360936A1 (fr) 1990-04-04
EP0436603B1 (fr) 1994-04-13
DE58907474D1 (de) 1994-05-19
EP0436603A1 (fr) 1991-07-17
US5148169A (en) 1992-09-15
WO1990003695A2 (fr) 1990-04-05

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