US5684740A - Semiconductor memory and method for substituting a redundancy memory cell - Google Patents

Semiconductor memory and method for substituting a redundancy memory cell Download PDF

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Publication number
US5684740A
US5684740A US08/715,409 US71540996A US5684740A US 5684740 A US5684740 A US 5684740A US 71540996 A US71540996 A US 71540996A US 5684740 A US5684740 A US 5684740A
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United States
Prior art keywords
memory cell
substitution
redundant
main memory
defective
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
US08/715,409
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English (en)
Inventor
Masayoshi Hirata
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Renesas Electronics Corp
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NEC Corp
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Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Assigned to NEC CORPORATION reassignment NEC CORPORATION ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: HIRATA, MASAYOSHI
Application granted granted Critical
Publication of US5684740A publication Critical patent/US5684740A/en
Assigned to NEC ELECTRONICS CORPORATION reassignment NEC ELECTRONICS CORPORATION ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: NEC CORPORATION
Assigned to RENESAS ELECTRONICS CORPORATION reassignment RENESAS ELECTRONICS CORPORATION CHANGE OF NAME (SEE DOCUMENT FOR DETAILS). Assignors: NEC ELECTRONICS CORPORATION
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/76—Masking faults in memories by using spares or by reconfiguring using address translation or modifications
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
    • G11C29/80—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved layout
    • G11C29/816—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved layout for an application-specific layout
    • G11C29/82—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved layout for an application-specific layout for EEPROMs
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
    • G11C29/838—Masking faults in memories by using spares or by reconfiguring using programmable devices with substitution of defective spares
US08/715,409 1995-09-18 1996-09-18 Semiconductor memory and method for substituting a redundancy memory cell Expired - Lifetime US5684740A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP7238012A JP2710237B2 (ja) 1995-09-18 1995-09-18 半導体記憶装置およびその冗長メモリセル部の置換方法
JP7-238012 1995-09-18

Publications (1)

Publication Number Publication Date
US5684740A true US5684740A (en) 1997-11-04

Family

ID=17023844

Family Applications (1)

Application Number Title Priority Date Filing Date
US08/715,409 Expired - Lifetime US5684740A (en) 1995-09-18 1996-09-18 Semiconductor memory and method for substituting a redundancy memory cell

Country Status (5)

Country Link
US (1) US5684740A (de)
EP (1) EP0763794B1 (de)
JP (1) JP2710237B2 (de)
KR (1) KR100241838B1 (de)
DE (1) DE69627595T2 (de)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6065134A (en) * 1996-02-07 2000-05-16 Lsi Logic Corporation Method for repairing an ASIC memory with redundancy row and input/output lines
US6199177B1 (en) * 1998-08-28 2001-03-06 Micron Technology, Inc. Device and method for repairing a semiconductor memory
US20020019961A1 (en) * 1998-08-28 2002-02-14 Blodgett Greg A. Device and method for repairing a semiconductor memory
US8499207B2 (en) * 2003-06-17 2013-07-30 Micron Technology, Inc. Memory devices and method for error test, recordation and repair
US20210224636A1 (en) * 2020-01-21 2021-07-22 Pegah AARABI System and method for interfacing a biological neural network and an artificial neural network

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3241302B2 (ja) * 1997-08-21 2001-12-25 日本電気株式会社 半導体記憶装置
KR20020061193A (ko) * 2001-01-15 2002-07-24 (주)실리콘세븐 불량 메모리 블락을 리페어하는 반도체 메모리 장치의자동 리페어 방법
WO2005050665A1 (ja) * 2003-11-19 2005-06-02 Renesas Technology Corp. 半導体集積回路
JP2009004087A (ja) * 2008-08-22 2009-01-08 Renesas Technology Corp 半導体集積回路装置

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4392211A (en) * 1979-06-25 1983-07-05 Fujitsu Limited Semiconductor memory device technical field
JPS6329360A (ja) * 1986-07-23 1988-02-08 Kenwood Corp サ−ボ回路
US5410511A (en) * 1993-02-24 1995-04-25 Matsushita Electronics Corporation Methods of controlling the erasing and writing of information in flash memory
US5586075A (en) * 1994-04-27 1996-12-17 Nec Corporation Electrically erasable and programmable read-only memory having redundant memory cell row
US5619454A (en) * 1993-11-15 1997-04-08 Micron Technology, Inc. Programming method for healing over-erased cells for a flash memory device

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03104097A (ja) * 1989-09-18 1991-05-01 Fujitsu Ltd 半導体記憶装置
US5153880A (en) * 1990-03-12 1992-10-06 Xicor, Inc. Field-programmable redundancy apparatus for memory arrays
JP2755781B2 (ja) * 1990-04-23 1998-05-25 株式会社東芝 半導体記憶装置およびその製造方法

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4392211A (en) * 1979-06-25 1983-07-05 Fujitsu Limited Semiconductor memory device technical field
JPS6329360A (ja) * 1986-07-23 1988-02-08 Kenwood Corp サ−ボ回路
US5410511A (en) * 1993-02-24 1995-04-25 Matsushita Electronics Corporation Methods of controlling the erasing and writing of information in flash memory
US5619454A (en) * 1993-11-15 1997-04-08 Micron Technology, Inc. Programming method for healing over-erased cells for a flash memory device
US5586075A (en) * 1994-04-27 1996-12-17 Nec Corporation Electrically erasable and programmable read-only memory having redundant memory cell row

Cited By (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6065134A (en) * 1996-02-07 2000-05-16 Lsi Logic Corporation Method for repairing an ASIC memory with redundancy row and input/output lines
US7467334B2 (en) 1998-08-28 2008-12-16 Micron Technology, Inc. Method for repairing a semiconductor memory
US20090100291A1 (en) * 1998-08-28 2009-04-16 Micron Technology, Inc. Memory device and method for repairing a semiconductor memory
US6571352B2 (en) 1998-08-28 2003-05-27 Micron Technology, Inc. Device for repairing a Semiconductor memory
US20030154422A1 (en) * 1998-08-28 2003-08-14 Blodgett Greg A. Method for repairing a semiconductor memory
US6892318B2 (en) 1998-08-28 2005-05-10 Micron Technology, Inc. Method for repairing a semiconductor memory
US6910152B2 (en) 1998-08-28 2005-06-21 Micron Technology, Inc. Device and method for repairing a semiconductor memory
US20020019961A1 (en) * 1998-08-28 2002-02-14 Blodgett Greg A. Device and method for repairing a semiconductor memory
US6199177B1 (en) * 1998-08-28 2001-03-06 Micron Technology, Inc. Device and method for repairing a semiconductor memory
US20050193241A1 (en) * 1998-08-28 2005-09-01 Blodgett Greg A. Method for repairing a semiconductor memory
US7870435B2 (en) 1998-08-28 2011-01-11 Mosaid Technologies Incorporated Memory device and method for repairing a semiconductor memory
US20110099417A1 (en) * 1998-08-28 2011-04-28 Blodgett Greg A Memory Device and Method for Repairing a Semiconductor Memory
US8296606B2 (en) 1998-08-28 2012-10-23 Mosaid Technologies Incorporated Memory device and method for repairing a semiconductor memory
US8713374B2 (en) 1998-08-28 2014-04-29 Mosaid Technologies Incorporated Memory device and method for repairing a semiconductor memory
US8499207B2 (en) * 2003-06-17 2013-07-30 Micron Technology, Inc. Memory devices and method for error test, recordation and repair
US20210224636A1 (en) * 2020-01-21 2021-07-22 Pegah AARABI System and method for interfacing a biological neural network and an artificial neural network

Also Published As

Publication number Publication date
JPH0982099A (ja) 1997-03-28
EP0763794A3 (de) 1999-04-14
DE69627595T2 (de) 2004-03-25
EP0763794B1 (de) 2003-04-23
KR100241838B1 (ko) 2000-03-02
EP0763794A2 (de) 1997-03-19
JP2710237B2 (ja) 1998-02-10
DE69627595D1 (de) 2003-05-28
KR970017698A (ko) 1997-04-30

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