US5358809A - Methods of fabricating thin film structures by imaging through the substrate in different directions - Google Patents

Methods of fabricating thin film structures by imaging through the substrate in different directions Download PDF

Info

Publication number
US5358809A
US5358809A US08/019,530 US1953093A US5358809A US 5358809 A US5358809 A US 5358809A US 1953093 A US1953093 A US 1953093A US 5358809 A US5358809 A US 5358809A
Authority
US
United States
Prior art keywords
thin film
light shielding
shielding pattern
substrate
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
US08/019,530
Other languages
English (en)
Inventor
Cornelis Van Berkel
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
AT&T Corp
US Philips Corp
Original Assignee
US Philips Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by US Philips Corp filed Critical US Philips Corp
Assigned to U.S. PHILIPS CORP. reassignment U.S. PHILIPS CORP. ASSIGNMENT OF ASSIGNORS INTEREST. Assignors: BERKEL, CORNELIS VAN
Assigned to AT&T CORP. reassignment AT&T CORP. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: ALDEN, TOR ANDREW, BUSKMILLER, MICHAEL R., FONTANA, EDWARD CLARK
Application granted granted Critical
Publication of US5358809A publication Critical patent/US5358809A/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Classifications

    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/0005—Production of optical devices or components in so far as characterised by the lithographic processes or materials used therefor
    • G03F7/0007—Filters, e.g. additive colour filters; Components for display devices
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/20—Exposure; Apparatus therefor
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/20—Exposure; Apparatus therefor
    • G03F7/2002—Exposure; Apparatus therefor with visible light or UV light, through an original having an opaque pattern on a transparent support, e.g. film printing, projection printing; by reflection of visible or UV light from an original such as a printed image
    • G03F7/201—Exposure; Apparatus therefor with visible light or UV light, through an original having an opaque pattern on a transparent support, e.g. film printing, projection printing; by reflection of visible or UV light from an original such as a printed image characterised by an oblique exposure; characterised by the use of plural sources; characterised by the rotation of the optical device; characterised by a relative movement of the optical device, the light source, the sensitive system or the mask

Definitions

  • This invention relates to a method of fabricating on one surface of a transparent substrate a thin film structure comprising a plurality of thin film layers in predetermined patterns, which method comprises the steps of providing a light shielding pattern adjacent the opposing surface of the substrate and photolithographically patterning a first thin film layer deposited over the one surface according to the light shielding pattern using radiation directed onto the light shielding pattern.
  • the invention relates also to thin film structures fabricated thereby and display devices incorporating such structures.
  • Thin film structures fabricated on transparent substrates are used in a variety of products such as display devices, solar cells, light sensing devices, memory devices, and printing devices.
  • the invention is concerned with fabricating thin film structures suitable for such products and particularly, although not exclusively, with fabricating arrays of thin film switching elements for use in active matrix display devices, together with associated address conductors and picture element electrodes.
  • the thin film switching elements comprise two or three terminal devices such as MIM devices and TFTs respectively which are connected between address conductors and picture element electrodes on a common transparent substrate.
  • successive layers of insulating and conducting materials are deposited over the substrate surface and these layers are patterned by means of a photolithographic process which involves depositing a photoresist layer over the layers to be defined, applying a photomask to the rear surface of the substrate and illuminating the substrate from behind whereby the pattern of the superimposed insulating and conducting layers obtained is determined in part using a self alignment technique in which the metal strips serve as a mask to define a MIM structure and also in part by the photomask to define the length of the MIM structure and the area of the picture element electrode.
  • the fabrication of the MIM device and its associated picture element electrodes entails using a mask to define the metal strips, those strips then themselves being used as a mask, and also a photomask.
  • a method of the kind described in the opening paragraph is characterized by the step of patterning photolithographically a second thin film layer deposited over the one surface of the substrate using radiation directed onto the light shielding pattern in a direction with respect to the substrate different to that used for patterning said first thin film layer.
  • the invention involves the recognition that different layer patterns can be created by using one light shielding pattern, serving as a mask, and changing the direction of illumination when defining the different layers. It will be appreciated that as a result of using different directions between the exposure beam and the substrate the pattern obtained in the two thin film layers, while both being dependent on the light shielding pattern, will be different to one another. Consequently, two thin film layers can be defined into respective patterns using the same light shielding pattern, rather than using two separate masks.
  • the difference in patterns obtained in a simple case can be in the form of an offset between the defined regions of the two layers, the extent of offset being dependent on the difference in illumination directions and the distance between the light shielding pattern and the resist layer used in the photolithographic patterning process.
  • the patterned one layer may also play a part in the patterning of the second layer.
  • This method can be used to considerable advantage in simplifying the fabrication of thin film structures.
  • a third thin film layer may be deposited over the one surface of the substrate and patterned photolithographically using radiation directed onto the light shielding pattern in a direction different to that used in the photolithographical patterning of said first, and/or second thin film layers.
  • the pattern of the third layer will then be different to at least one of the other layers, and may in addition also be dependent on the pattern of the underlying layer(s).
  • a further one or more thin film layers may be deposited successively with one of said first, second or third layers and photolithographically patterned simultaneously with that layer. In this way, two or more layers of different materials are patterned substantially identically and a pattern of the combined, and superimposed, layers is formed on the substrate.
  • One or more of the deposited thin film layers may be patterned using radiation directed onto the light shielding pattern from more than one direction. This enables further differences in the patterning of an individual layer or layers to be obtained.
  • the one or more layers preferably are patterned using radiation in two substantially opposing directions which lie in a plane substantially perpendicularly of the one surface of the substrate. By suitably choosing these substantially opposing directions with respect to radiation opaque parts of the light shielding pattern which have comparatively small dimensions in relation to those directions, for example narrow strip regions, the definition of parts in the thus patterned layer corresponding therewith can be selectively excluded.
  • a temporary thin film layer pattern may be provided over the substrate surface by depositing a thin film layer and patterning the layer photolithographically using radiation directed onto the light shielding pattern, which temporary layer pattern is subsequently removed following the deposition of one of said thin film layers, for example by selecting etching, so as to lift off immediately overlying regions of that one thin film layer. In this way still further different layer patterns can be produced.
  • light shielding pattern used herein is intended to mean a pattern Which is opaque to the exposing radiation which preferably is U-V light, although visible light and possibly x-rays may be used, and the term should be construed accordingly.
  • the above techniques conveniently enable two or more thin film layers to be patterned separately using just one light shielding pattern and consequently they avoid the kind of problems experienced in known processes which use a plurality of separate masks, and in particular those problems associated with the need for accurately aligning each mask.
  • the techniques offer the advantage that by appropriate selective utilisation of one or more of them various thin film structures can be fabricated in a simple manner reliably and inexpensively by reducing the number of masks entailed compared with known processes for producing similar structures.
  • an array of MIMs or TFTs together with associated address conductors and pad electrodes can be fabricated on a transparent substrate suitable for use for example in active matrix liquid crystal display devices or other products such as memory devices.
  • the method requires in effect just one mask, constituted by the light shielding pattern, compared with the multiplicity of masks normally demanded. Problems with registration and the need for accurate alignment necessary in known multiple mask, multiple exposure fabrication processes used for such structures are thus avoided. Comparatively large, or high density, arrays can be achieved without the need to use very sophisticated photolithographic equipment.
  • the light shielding pattern may be arranged adjacent, but spaced from, the opposing surface of the substrate. Preferably, however, the light shielding pattern is carried on the opposing surface.
  • the light shielding pattern comprises a thin film pattern of radiation opaque material, for example, metal, formed on the opposing surface which pattern can readily be obtained by photolithographically defining a deposited layer using a master mask. Relative movement between the light shielding pattern and substrate is then prevented. As the light shielding pattern and the substrate can move together as one the need for high substrate rigidity is removed and greater freedom is allowed in the choice of substrate material.
  • the light shielding pattern is fixed to the substrate, and can bend and stretch with the substrate, problems due to the effects of thermal cycling in the fabrication operations, for example distortions in glass substrates, are avoided.
  • pliable substrates such as flexible foils, can be used as well as rigid glass substrates.
  • a liquid crystal display device comprising a thin film structure on a transparent substrate, including for example an array of two terminal non-linear devices or TFTs, fabricated in accordance with the one aspect of the invention.
  • FIG. 1a, 1b, 2a and 2b, and 3a and 3b schematically illustrate respectively three different patterning techniques employed in embodiments of the invention
  • FIG. 4 is a plan view of part of the rear surface of a substrate showing a light shielding pattern formed thereon for use in a first method of fabricating thin film substrates according to the invention
  • FIGS. 5a to 5e are plan views of part of the front surface of the substrate showing layer patterns at various stages in this first method
  • FIG. 6 is a plan view of part of the front surface of the the substrate showing a completed thin film structure fabricated by the first method
  • FIG. 7 is an enlarged view of part of the structure shown in FIG. 6;
  • FIGS. 8 and 9 are cross-sectional views along the lines A--A and B--B respectively in FIG. 7;
  • FIG. 10 illustrates the circuit configuration of a display device incorporating the thin film structure produced by this first method
  • FIG. 11 is a plan view of part of the rear surface of a substrate showing a light shielding pattern formed thereon for use in a second method of fabricating thin film structures according to the invention
  • FIGS. 12a to 12c are plan views of a part of the front surface of the substrate showing layer patterns at various stages in the second method of fabricating thin film structures
  • FIG. 13 is an enlarged plan view showing a part of the completed thin film structure produced by the second method
  • FIG. 14 is a sectional view along the line C--C of FIG. 13;
  • FIG. 15 illustrates the circuit configuration of a typical part of the thin film structure produced by the second method.
  • FIGS. 1 to 3 illustrate in simple manner three basic layer patterning techniques for producing respective, different patterns in a deposited layer, and ultimately desired thin film structures, in accordance with the invention.
  • the patterning obtained in each technique is determined by an identical light shielding pattern while the layer pattern produced thereby is different in each case.
  • These individual techniques can be employed selectively to produce layer patterns required in the fabrication of thin film structures as will be described subsequently.
  • FIGS. 1 to 3 there is shown schematically in cross-section a portion of a suitably transparent substrate, 10, for example of glass or plastics, having opposed, parallel, planar surfaces.
  • a pattern of metal or other radiation opaque material comprising comparatively narrow and wide regions 12 and 13 is provided using a conventional photolithographic process in which the material is deposited as a continuous layer over the lower surface and is then defined, by means of exposure through a mask, to leave the pattern regions 12 and 13.
  • This metal pattern constitutes a light shielding pattern which is then used in the photolithographic patterning of layers deposited on the other, upper, surface of the substrate using radiation directed toward the substrate from the side of the substrate remote from the deposited layers.
  • a layer 11 of material to be patterned is deposited over the upper surface of the substrate 10.
  • This layer 11 is then patterned by a photolithographic process which involves depositing thereover a layer of positive photoresist 14, and directing substantially parallel light, constituting an exposure beam perpendicularly towards the lower surface of the substrate 10, as shown by the arrows A, so as to expose regions of the photoresist layer 14 according to the light shielding pattern on the lower surface, removing exposed regions of the photoresist, etching the underlying regions of the layer 11, and thereafter removing the remaining unexposed regions of the photoresist to leave the structure as shown in FIG. 1b.
  • This structure comprises regions 15 and 16 corresponding respectively to the regions 12 and 13.
  • the layer pattern 15, 16 thus obtained corresponds directly to, and is registered with, the light shielding pattern.
  • a layer 11 is again deposited on the upper surface of the substrate and patterned using a similar photolithographic process.
  • the lower surface of the substrate 10 is illuminated with substantially parallel light, A, which is inclined with respect to that surface. Consequently, the layer pattern obtained on the upper surface, FIG. 2b, comprises regions 17 and 18 which substantially correspond to the regions 12 and 13 in terms of their size and relative disposition, but is laterally offset with respect to the light shielding pattern on the lower surface.
  • the technique illustrated in FIG. 3a and 3b is an extension of the above described technique.
  • the layer 11 is again photolithographically defined but in this case the photoresist layer is subjected to two exposures involving substantially parallel light directed onto the lower surface in different directions.
  • the radiation in both exposures is slanted with respect to the substrate surface, as indicated by the arrows A and B but from opposing directions. Because of the angles of illumination at which the two exposures are performed, the layer pattern obtained differs significantly from those of the previous two techniques.
  • the dimensions of the defined regions of the deposited layer in this plane are less than the corresponding dimensions of the regions of the light shielding pattern. If a region of the light shielding pattern is of sufficiently small dimension in the relevant direction the region of resist overlying that region will be completely exposed and consequently no corresponding region in the layer pattern is produced. Thus, as shown in FIG.
  • the layer 11 is patterned to produce a region 19 corresponding to the region 13 but with a reduced dimension in the plane of the section shown, whereas, as a result of the directions of the illumination in the two exposures with respect to the region 12, the layer pattern is devoid of any region corresponding to the region 12.
  • the patterning process may involve illumination from more than two directions.
  • the photolithographic definition of differing layer patterns on the surface of the substrate using a single light shielding pattern on the opposing surface and by varying the angle of illumination according to the above-described basic techniques can be used in conjunction with conventional processing and patterning techniques such as lift off and the employment of positive and negative type photoresists to fabricate various thin film structures.
  • FIGS. 4 to 9 illustrate various stages in one embodiment of a method of fabricating such a thin film structure according to the invention.
  • This structure consists of an array of electrodes each of which is connected to an associated address conductor via a MIM device and constitutes the active matrix substrate of the liquid crystal display device.
  • MIM addressed liquid crystal display devices are well known. Briefly, they comprise a row and column array of picture elements each formed by a pair of opposed electrodes carried on respective substrates with an intervening layer of liquid crystal material.
  • One substrate carries a row and column array of individual, generally rectangular, pad electrodes constituting the picture elements' first electrodes and a first set of parallel address conductors extending therebetween.
  • the pad electrodes of each row are connected to a respective address conductor via associated MIM devices.
  • the other substrate carries a second set of parallel address conductors which cross the first set of address conductors and portions thereof which overlie the pad electrodes constitute the second electrodes of the picture elements.
  • a light shielding pattern is first formed on the lower surface of the glass substrate 10 on which the thin film structure is to be built by depositing a metal layer and defining this layer photolithographically in conventional fashion using a mask so as to leave a metal pattern.
  • the metal pattern 20, a representative part which is shown in plan view of FIG. 4, comprises an array of rectangular areas 21, a set of lines 22 extending between adjacent rows of areas 21, and bridging portions 23 connecting each area 21 to a line 22.
  • the parts 21, 22 and 23 serve to determine the required thin film structure as will become apparent and their dimensions are chosen accordingly.
  • FIGS. 5a to 5e illustrate plan views of the upper surface of the substrate 10 at various stages in the fabrication of the thin film structure. For the sake of clarity, these figures illustrate the formation of an individual layer pattern of interest at a particular stage and, with regard to the later stages, layer patterns defined earlier have been deliberately omitted.
  • FIG. 6 shows in plan view the completed thin film structure.
  • the directions of the compass will be used to indicate the direction of slanted radiation exposures with the top, bottom, left and right sides of the drawing sheet corresponding respectively to North (N), South (S), East (E) and West (W).
  • a layer of positive photoresist is deposited over the upper surface of the substrate 10 and subjected to a double exposure from the rear of the substrate 10 onto the light shielding pattern 20 using the technique of FIGS. 3a and 3b with N and S slanted radiation exposures of substantially parallel light.
  • the resist layer is then developed with removal of exposed parts, to leave the layer pattern 25 shown by horizontal hatching in FIG. 5a.
  • the light shielding pattern is illustrated in this Figure, and similarly in FIGS. 5b to 5e, in dashed outline for reference.
  • the dimension of the defined photoresist pattern 25 in a direction parallel with the N-S axis is less than that of the light shielding pattern 20 while the dimension in a direction parallel with the E-W axis is substantially the same.
  • the difference in dimensions in the N-S direction is dependent on both the distance between the light shielding pattern and the layer of resist and the angle of slant of the exposing radiation. These parameters are appropriately selected such that, apart from at the region of the bridge portion 23, the resist material overlying the line 22 of the light shielding pattern is completely illuminated, and thus removed.
  • a layer of negative photoresist material is then deposited. This is exposed using substantially parallel radiation directed perpendicularly onto the rear side of the substrate 10 and then developed, according to the technique of Figures 1a and 1b.
  • a metal layer for example of aluminium or chromium, is evaporated over the upper surface of the substrate, following which the remaining portions of the positive and negative photoresist layers are removed, for example using acetone or fumic acid, with lift-off of the corresponding regions of the metal layer to leave regions 27, 28 and 29 of metal, as indicated by the slanted hatching in FIG. 5b, carried directly on the upper surface of the substrate 10 and determined by the light shielding pattern 20.
  • the width of the strip regions 28 and 29 thus obtained is therefore dictated by the aforementioned illumination parameters and can be controlled accordingly.
  • a layer of transparent conductive material such as ITO and a layer of positive photoresist material are then deposited in succession completely over the substrate.
  • the resulting structure is then subjected to a double exposure from the rear of the substrate 10 using substantially parallel radiation which is slanted in E and W directions respectively, again using the technique of FIGS. 3a and 3b.
  • the areas of the ITO layer which are not covered by the remaining resist material are etched away. Thereafter the remaining regions of the resist are removed to leave regions 30 and 31 of ITO material, as depicted by the slanting hatching in FIG. 5c, generally corresponding with the regions 22 and 21 of the light shielding pattern 20, it being understood that underlying regions 27, 28 and 29 of the metal layer have been omitted for clarity.
  • the dimension of the region 31 in the E-W direction is less than the corresponding dimension of the region 21 of the light shielding pattern 20, while the dimension of the regions 30 and 31 in the direction parallel to the N-S axis are substantially the same as those of the regions 21 and 22.
  • the parameters selected for the E and W exposures are such that the region of the resist overlying the bridging portion 23 is completely exposed whereby the subsequently defined regions 30 and 31 of ITO are physically separate.
  • a layer of positive photoresist material is deposited over the substrate.
  • This layer is subjected to a multiple exposure operation involving substantially parallel radiation slanted in four directions NE, SE, SW and NW, and preferably also intermediate directions.
  • the previously formed metal regions 27, 28 and 29 act as a further mask to the exposing radiation. Consequently, after the exposed resist has been developed, a resist pattern is obtained as shown by the vertical hatching in FIG. 5d comprising regions 34 and 35.
  • the region 34 corresponds to the strip 22 and metal region 27 except at the region of the bridging portion 23.
  • the region 35 corresponds to the region 21 but has a reduced dimension in the E-W direction apart from at its ends where the underlying metal regions 28 and 29 act as a mask. It is to be noted that at the area overlying the bridging portion 23 of the light shielding pattern opposing recesses are formed in the resist pattern.
  • a layer of negative photoresist material is deposited and subjected to exposure through the substrate with substantially parallel radiation directed perpendicularly onto the substrate surface, as in the technique of Figure 1a and 1b .
  • This resist layer is developed and then successive thin film layers of insulating material, in this example silicon nitride, and metal, for example aluminium or chromium, are deposited. Regions of the superimposed metal and insulating layers are then removed by lift-off through removal of the positive and negative resist materials. As a result, three portions of superimposed and co-extensive insulating and metal layers are left, as indicated at 36, 37 and 38 in FIG. 5e.
  • the complete thin film structure thus obtained is shown in plan view in FIG. 6, the materials of different parts of the structure being denoted by hatching and dotting according to the accompanying legend and corresponding to that used in FIG. 5a-5e.
  • the structure consists of a rectangular area 40 of ITO constituting the picture element's pad electrode whose top and bottom edges are bordered with metal strips and whose opposing sides are bordered with superimposed insulating and metal layer strips.
  • a strip 41 comprising superimposed metal and ITO layers extends adjacent the pad electrode 40 and constitutes a portion of an address conductor which is common to all picture element pad electrodes of the same row.
  • the pad electrode 40 is connected to the address conductor 41 via a MIM device 42 which bridges these two parts.
  • FIG. 7 is an enlarged plan view of the region of the MIM device 42 and FIGS. 8 and 9 are cross-sectional views along the lines A--A and B--B respectively of FIG. 7. The same hatching and dotting is used in FIGS. 7 to 9 as in FIG. 6.
  • the MIM device 42 has a bridge portion 36 of superimposed, and co-extensive, insulating and metal layers, here referenced 44 and 45 respectively, which bridges the gap between the pad electrode 40 and the address conductor 41 with respective end parts of the bridge portion 36 overlapping edge parts of the ITO electrode 40 and the ITO conductor 41.
  • each MIM element is created having an ITO-insulator-metal structure.
  • These two MIM elements referenced at 46 and 47, are connected by the metal layer of the bridge portion 36.
  • each MIM device consists of two MIM elements connected in series in a lateral configuration.
  • the light shielding pattern 20 is removed and the thin film structure on the substrate 10 is covered by a continuous liquid crystal orientation layer in conventional manner.
  • the component is then assembled together with a second substrate carrying the second set of parallel address conductors and liquid crystal material is disposed between the two substrates, for example as described in U.S. Pat. No. 4,683,183.
  • the circuit configuration of the display device thus formed is shown schematically in FIG. 10 in which the second set of address conductors and the picture elements are referenced at 49 and 50 respectively.
  • the device is driven by applying selection signals and data signals to the row and column address conductors respectively in conventional manner.
  • the MIM devices 42 demonstrate a switching characteristic.
  • This thin film structure comprises a TFT active matrix array suitable for use in a TFT type active matrix liquid crystal display device and consists of a row and column array of pad electrodes, crossing sets of row and column address conductors and TFTs connected between each pad electrode and a respective address conductor of each set, all carried on a single transparent substrate.
  • the circuit configuration follows conventional practice with the source, drain and gate terminals of a TFT being connected respectively to an associated column address conductor, the pad electrode and an associated row address conductor.
  • This method similarly employs a single light shielding pattern applied to the rear surface of the substrate and photolithographic processes involving illumination from different angles which together with lift off procedures create required individual layer patterns on the front surface of the substrate.
  • a light shielding pattern, 54 is formed on the rear surface of the substrate 10 by photolithographic definition of a deposited metal layer using a mask. A part of this light shielding pattern comprising an individual, and typical, cell is shown in FIG. 11 in plan view looking through the substrate 10.
  • the actual pattern 54 consists of a row and column array of such cells interconnected with one another, there being one cell for each of the picture elements required in the eventual active matrix array.
  • Each cell pattern consists of a rectangular area 55 which serves to determine a pad electrode of the required thin film structure, crossing strips 56 and 57 which serve to determine portions of column and row address conductors respectively, and also part of the TFT, and an extension strip portion 58 extending from the area 54 across the strip 57 which is used to determine another part of the TFT.
  • FIG. 12a, 12b and 12c are plan views of an area of the substrate corresponding to the cell pattern of FIG. 11 and illustrate various stages in the fabrication process.
  • the cell pattern is represented in dashed outline and each Figure depicts the formation of an individual layer pattern of interest at a particular stage with any previously formed layer pattern being omitted for the sake of clarity.
  • a layer of ITO is sputtered over the substrate surface followed by a sacrificial layer of a transparent material suitable for its intended purpose.
  • the sacrificial layer can be of a material such as silicon nitride, silicon oxide or silicon oxynitride deposited under conditions which give it a predetermined, and comparatively fast, etching characteristic for reasons which will become apparent.
  • Photoresist is then spun over the substrate and a multiple exposure photolithographic process is carried out in which substantially parallel radiation is directed onto the light shielding pattern with, using the same convention as before N, S, E and W slanted radiation and according to the technique of FIGS. 3a and 3b.
  • the resist is then developed with exposed regions being removed.
  • Exposed areas of the sacrificial and underlying ITO layers are then etched away, after which the remaining resist is removed to leave the multi-layer pattern shown by slanted hatching in FIG. 12a.
  • This pattern consists of rectangular area 58 of superimposed and co-extensive ITO and sacrificial layers, 59 and 60 respectively, generally corresponding to the area 55 of the light shielding pattern but whose dimensions in the N/S and E/W directions are smaller as a result of the slanting exposures employed. These exposures result in the regions of resist overlying the parts 56, 57 and 58 of the light shielding pattern 54 being completely exposed to radiation, and thus the removal of the underlying regions of the sacrificial and ITO layers.
  • a second layer of ITO followed directly by successive layers of silicon nitride and amorphous silicon (a-Si:H) are deposited over the substrate.
  • the silicon nitride is deposited under conditions which render its etching characteristics different to that of the sacrificial layer 60 when for example silicon nitride is also used for this layer.
  • the amorphous silicon layer is sufficiently thin to be transparent to exposing radiation.
  • Another layer of resist is spun over the substrate surface and the resulting structure subjected to a photolithographic process in which E and W slanted radiation is directed onto the rear of the substrate. After development of the resist the exposed regions of the amorphous silicon layer and the immediately underlying regions of silicon nitride and second layer of ITO are etched away.
  • FIG. 12b which consists of a strip region 62 and a rectangular region 63, both comprising superimposed and co-extensive layers of ITO, silicon nitride and amorphous silicon 64, 65 and 66 respectively.
  • Opposed edges of the region 63 in the E-W direction lie inwardly of the corresponding edges of the area 55 of the light shielding pattern 54 by virtue of the exposure parameters (c.f. FIGS. 3a and 3b). It will be understood that the region 63 overlies the previously formed area 58 of superimposed ITO and sacrificial layers 59 and 60 (not shown in Figure 12b). Because of the nature of the exposures, regions of the resist overlying the regions 56 and 58 of the light shielding pattern are completely exposed and consequently corresponding regions of the layers 64, 65 and 66 are removed.
  • a layer of negative photoresist is then applied and subjected to exposures using N and S slanted radiation through the substrate.
  • the existing, underlying, layer patterns are all transparent to the radiation.
  • layers of n+a-Si:H and a metal, such as aluminium or chromium, are deposited in succession. Regions of these two layers overlying the remaining regions of the resist layer are then removed by lift-off with those resist regions.
  • the resulting layer pattern comprising superimposed and co-extensive layers 68 and 69 of n+a-Si:H and metal, is indicated by slanting hatching in FIG. 12c.
  • This pattern consists of a rectangular region 70, determined by the area 55 of the light shielding pattern 54, which overlies the previously formed regions 58 and 63 and whose edges in the N-S direction lie inwardly of the corresponding edges of the area 55 and the underlying region 63 by virtue of the exposure parameters, an extension 71 determined by the extension 58 of the light shielding pattern which projects from the region 70 over the previously formed strip region 62 (not shown in FIG. 12c), and a strip region 72 which similarly crosses over the previously formed strip region 62. Because of the nature of the exposures, a region corresponding to the region 57 of the light shielding pattern is not defined.
  • the sacrificial layer 60 of the region 58 is then removed by etching, taking with it the immediately overlying areas of the second ITO layer 64, the silicon nitride layer 65 and the a-Si layer 66 of the region 63, and the immediately overlying areas of the n+a-Si:H layer 68 and the metal layer 69 of the region 70. Accordingly, the underlying area of the first ITO layer 59 of the region 58 is then exposed.
  • the material of the sacrificial layer 60 is chosen to be selectively etchable using an etchant which does not attack the materials of any of the other layers 59, 64, 65, 66, 68 and 69, and also such that it is not attacked by any etchants or solvents used in process stages subsequent to its deposition.
  • the deposition conditions used for the layers 60 and 65 in the case for example where silicon nitride is used for the sacrificial layer 60 are selected such that the latter layer etches away at a significantly faster rate than the layer 65 and the layer 65 is largely unaffected by this etching operation although there will be some cut-back at the edges of this layer.
  • the resulting thin film structure formed on the substrate comprises a row and column array of picture element electrodes consisting of the exposed regions of the ITO layer 59, each of which is connected to a configuration of layers constituting a TFT which in turn is connected to associated row and column address conductors.
  • FIG. 13 shows in enlarged plan view a part of the completed thin film structure at the region of a TFT. A cross-sectional view along the line C--C of FIG. 13 is shown in FIG. 14.
  • the row address conductor constituted by the strip region 62, or more particularly the lower ITO layer 64, serves as a gate line for all TFTs of picture elements in the same row.
  • This address conductor is crossed by both the strip region 72 and the extension region 71. Respective portions of these regions 72 and 71 at the cross-overs together with the immediate underlying and intervening portions of the region 62 form the TFT with the respective portions of the regions 72 and 71 serving as source and drain contacts 74 and 75, and portions of the ITO layer 64 and the SiN layer 65 respectively serving as the gate 76 and gate insulator layer 77.
  • a channel region 78 is formed in the a-Si:H layer 66 intermediate the source and drain regions.
  • a voltage signal present on the column address conductor 72 is transferred from the source region 74 to the drain region 75 of the TFT and then via the metal layer 69 of the extension region 71 to the ITO pad electrode 59 through the layer 68.
  • FIG. 15 The circuit configuration of a typical part of the thin film structure array is illustrated in FIG. 15, in which the TFTs are referenced at 80.
  • the sacrificial layer 60 may be omitted and instead use made of the resist material required in the definition of the first ITO layer 59 (and the sacrificial layer 60) to perform a similar function.
  • the resist is given a special treatment, for instance by baking at a substantially higher temperature than normal, to render it resistant to the solvent, such as acetone, used to remove subsequently deposited resist layers at later stages in the method.
  • the areas of specially treated resist unexposed to radiation and remaining after defining the ITO layer 59 are not removed but are left in situ so that the subsequently deposited layers 64, 65 and 66 overlie this area of resist, so that, in effect, the sacrificial layer 60 (FIG. 12a) is then comprised of this resist material rather than a separately deposited material.
  • a more aggressive agent such as fumic acid is employed to remove the areas of hardened resist.
  • the active matrix substrate 10 is completed by covering the structure with a liquid crystal orientation layer and removing the light shielding pattern 54. This substrate is assembled together with an opposing substrate carrying a continuous electrode and a similar orientation layer with LC material disposed therebetween in conventional manner to produce the display device.
  • the light shielding pattern is formed on the surface of the substrate it will move with the substrate so that problems such as those caused by the effects on the substrate of thermal cycling are avoided.
  • this enables flexible substrate materials such as plastics to be employed as well as rigid glass substrates.
  • insulating materials other than silicon nitride for example, silicon oxide, silicon oxy-nitride, aluminium oxide or tantalum pentoxide, may be used for the layer 44, the thickness of this insulating layer being suitably selected according to the material used to obtain the necessary MIM action.
  • the angle at which the illuminating radiation meets the substrate surface when performing a slanting radiation exposure can be varied.
  • the radiation is shown as having an angle of approximately 60 degrees with respect to the substrate surface. This angle of inclination of the incident radiation is important in that together with the distance between the light shielding pattern and the layer to be defined it determines the position of an edge of the defined layer pattern in relation to the corresponding edge of the light shielding pattern.
  • the extent of the dimensional differences can be dictated by appropriate choice of the angle of the incident radiation. For radiation meeting the substrate surface at more acute angles, for example 30 or 40 degrees, this difference will be greater, whilst the difference will be less for greater acute angles, for example 70 or 80 degrees.
  • the angle of inclination need not be the same for each exposure operation but can be changed for individual definition processes. However, a constant angle of illumination can lead to simplification of the necessary exposure equipment.
  • the invention has been described with reference particularly to the fabrication of active matrix arrays for liquid crystal display devices, it should be understood that the invention is applicable also to fabricating thin film structures for other applications.
  • the invention can be used to produce active matrix arrays similar to those described for use in touch sensing devices, memory devices and image sensing devices.
  • the invention may be used generally in the fabrication of thin film structures on transparent substrates for other purposes and is not limited to fabricating structures comprising arrays of elements.

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Mathematical Physics (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Optics & Photonics (AREA)
  • Liquid Crystal (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
  • Thin Film Transistor (AREA)
US08/019,530 1992-02-20 1993-02-19 Methods of fabricating thin film structures by imaging through the substrate in different directions Expired - Fee Related US5358809A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GB9203595.5 1992-02-20
GB929203595A GB9203595D0 (en) 1992-02-20 1992-02-20 Methods of fabricating thin film structures and display devices produced thereby

Publications (1)

Publication Number Publication Date
US5358809A true US5358809A (en) 1994-10-25

Family

ID=10710732

Family Applications (1)

Application Number Title Priority Date Filing Date
US08/019,530 Expired - Fee Related US5358809A (en) 1992-02-20 1993-02-19 Methods of fabricating thin film structures by imaging through the substrate in different directions

Country Status (5)

Country Link
US (1) US5358809A (de)
EP (1) EP0556904B1 (de)
JP (1) JP2541742B2 (de)
DE (1) DE69324717T2 (de)
GB (1) GB9203595D0 (de)

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5610736A (en) * 1993-12-24 1997-03-11 Kabushiki Kaisha Toshiba Active matrix type display device in which elongated electrodes underlie the signal lines to form capacitors with the pixel electrodes and manufacturing method
US6022645A (en) * 1998-06-25 2000-02-08 United Microelectronics Corp. Double-sided photomask
US6156126A (en) * 2000-01-18 2000-12-05 United Microelectronics Corp. Method for reducing or avoiding the formation of a silicon recess in SDE junction regions
US6197663B1 (en) * 1999-12-07 2001-03-06 Lucent Technologies Inc. Process for fabricating integrated circuit devices having thin film transistors
WO2006096904A1 (en) * 2005-03-16 2006-09-21 Newsouth Innovations Pty Limited Photolithography method for contacting thin-film semiconductor structures
US20080170112A1 (en) * 2007-01-17 2008-07-17 Hull Charles W Build pad, solid image build, and method for building build supports
US20100055401A1 (en) * 2007-03-30 2010-03-04 Lg Chem, Ltd. Manufacturing method of film having micro-pattern thereon and film manufactured thereby
US20140057082A1 (en) * 2012-08-24 2014-02-27 Beijing Boe Display Technology Co., Ltd. Mask Plate, Method For Fabricating Array Substrate Using The Same, And Array Substrate
US20160194197A1 (en) * 2015-01-05 2016-07-07 Edward Pakhchyan MEMS Display Manufacturing Method
WO2016173182A1 (zh) * 2015-04-30 2016-11-03 京东方科技集团股份有限公司 一种显示面板隔离柱及其制作方法、显示面板及显示装置
US10380308B2 (en) * 2018-01-10 2019-08-13 Qualcomm Incorporated Power distribution networks (PDNs) using hybrid grid and pillar arrangements

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1018772B1 (de) * 1997-07-31 2006-04-12 Sharp Kabushiki Kaisha Dünnschicht-zweipolelemente, herstellungsverfahren und flüssigkristall-anzeigevorrichtung
JP4498004B2 (ja) * 2003-05-27 2010-07-07 シチズンホールディングス株式会社 水晶振動子の製造方法
US8221964B2 (en) * 2007-11-20 2012-07-17 Eastman Kodak Company Integrated color mask
JP5405850B2 (ja) * 2009-02-17 2014-02-05 株式会社日立製作所 酸化物半導体を有する電界効果トランジスタの製造方法

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62132367A (ja) * 1985-12-04 1987-06-15 Nec Corp 薄膜電界効果型トランジスタ
JPS62160768A (ja) * 1986-01-10 1987-07-16 Hitachi Ltd 薄膜トランジスタの製造方法
US4683183A (en) * 1984-01-13 1987-07-28 Seiko Epson Kabushiki Kaisha Method of manufacturing MIM elements in liquid crystal displays
US4820612A (en) * 1984-12-26 1989-04-11 Semiconductor Energy Laboratory Co., Ltd. Electronic device and its manufacturing method
US5169737A (en) * 1988-11-04 1992-12-08 The General Electric Company, P.L.C. Deposition processes

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3504970A (en) * 1966-05-03 1970-04-07 Polaroid Corp Printing of lenticular films
CH586118A5 (de) * 1975-01-07 1977-03-31 Balzers Patent Beteilig Ag

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4683183A (en) * 1984-01-13 1987-07-28 Seiko Epson Kabushiki Kaisha Method of manufacturing MIM elements in liquid crystal displays
US4820612A (en) * 1984-12-26 1989-04-11 Semiconductor Energy Laboratory Co., Ltd. Electronic device and its manufacturing method
JPS62132367A (ja) * 1985-12-04 1987-06-15 Nec Corp 薄膜電界効果型トランジスタ
JPS62160768A (ja) * 1986-01-10 1987-07-16 Hitachi Ltd 薄膜トランジスタの製造方法
US5169737A (en) * 1988-11-04 1992-12-08 The General Electric Company, P.L.C. Deposition processes

Cited By (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5610736A (en) * 1993-12-24 1997-03-11 Kabushiki Kaisha Toshiba Active matrix type display device in which elongated electrodes underlie the signal lines to form capacitors with the pixel electrodes and manufacturing method
US6022645A (en) * 1998-06-25 2000-02-08 United Microelectronics Corp. Double-sided photomask
US6197663B1 (en) * 1999-12-07 2001-03-06 Lucent Technologies Inc. Process for fabricating integrated circuit devices having thin film transistors
US6156126A (en) * 2000-01-18 2000-12-05 United Microelectronics Corp. Method for reducing or avoiding the formation of a silicon recess in SDE junction regions
US20080276986A1 (en) * 2005-03-16 2008-11-13 Newsouth Innovations Pty Limited Photolithography Method For Contacting Thin-Film Semiconductor Structures
WO2006096904A1 (en) * 2005-03-16 2006-09-21 Newsouth Innovations Pty Limited Photolithography method for contacting thin-film semiconductor structures
US20080170112A1 (en) * 2007-01-17 2008-07-17 Hull Charles W Build pad, solid image build, and method for building build supports
US20100055401A1 (en) * 2007-03-30 2010-03-04 Lg Chem, Ltd. Manufacturing method of film having micro-pattern thereon and film manufactured thereby
US20140057082A1 (en) * 2012-08-24 2014-02-27 Beijing Boe Display Technology Co., Ltd. Mask Plate, Method For Fabricating Array Substrate Using The Same, And Array Substrate
US9423687B2 (en) * 2012-08-24 2016-08-23 Boe Technology Group Co., Ltd. Mask plate, method for fabricating array substrate using the same, and array substrate
US20160194197A1 (en) * 2015-01-05 2016-07-07 Edward Pakhchyan MEMS Display Manufacturing Method
WO2016173182A1 (zh) * 2015-04-30 2016-11-03 京东方科技集团股份有限公司 一种显示面板隔离柱及其制作方法、显示面板及显示装置
US9893140B2 (en) 2015-04-30 2018-02-13 Boe Technology Group Co., Ltd. Display panel separation pillar and method for manufacturing the same, display panel and display device
US10380308B2 (en) * 2018-01-10 2019-08-13 Qualcomm Incorporated Power distribution networks (PDNs) using hybrid grid and pillar arrangements

Also Published As

Publication number Publication date
DE69324717T2 (de) 1999-11-11
JP2541742B2 (ja) 1996-10-09
GB9203595D0 (en) 1992-04-08
DE69324717D1 (de) 1999-06-10
EP0556904B1 (de) 1999-05-06
EP0556904A1 (de) 1993-08-25
JPH06110086A (ja) 1994-04-22

Similar Documents

Publication Publication Date Title
US5358809A (en) Methods of fabricating thin film structures by imaging through the substrate in different directions
US7586551B2 (en) Array substrate of liquid crystal display device and manufacturing method thereof
JPH0568855B2 (de)
JP2003140189A (ja) 液晶ディスプレイ装置用アレー基板及びその製造方法
KR100364771B1 (ko) 액정표시장치의구조및제조방법
KR100325072B1 (ko) 고개구율및고투과율액정표시장치의제조방법
US6495386B2 (en) Method of manufacturing an active matrix device
US7122831B2 (en) Method of forming a reflective electrode and a liquid crystal display device
EP0449404A1 (de) Verfahren zur Herstellung eines Dünnschicht-Halbleiterbauteils auf einem transparenten, isolierenden Substrat
GB2144266A (en) Method of manufacture for ultra-miniature thin-film diodes
JPH03105324A (ja) マトリクス型液晶表示基板の製造方法
JPH02139972A (ja) 半導体装置の製造方法
JP2854025B2 (ja) 薄膜トランジスタの製造方法
JP2846682B2 (ja) アクテイブマトリクス表示装置の薄膜トランジスタアレーの製造方法
JP2629743B2 (ja) 薄膜トランジスタの製造方法
JPH03271720A (ja) アクティブマトリクス型表示装置の薄膜トランジスタアレイの製造方法
JPH03186820A (ja) マトリクス型液晶表示基板の製造方法
JP807H (ja) マトリクス型表示装置
JPH02273935A (ja) 薄膜トランジスタの製造方法
JP2931395B2 (ja) 薄膜トランジスタアレーの製造方法
KR20010024507A (ko) 박-막 회로 소자를 포함하는 전자장치의 제작
JP2846681B2 (ja) アクテイブマトリクス表示装置の薄膜トランジスタアレーの製造方法
JPH0570155B2 (de)
JP2931394B2 (ja) 薄膜トランジスタアレーの製造方法
CN113467181A (zh) 掩膜版、阵列基板的制造方法及阵列基板

Legal Events

Date Code Title Description
AS Assignment

Owner name: U.S. PHILIPS CORP., NEW YORK

Free format text: ASSIGNMENT OF ASSIGNORS INTEREST.;ASSIGNOR:BERKEL, CORNELIS VAN;REEL/FRAME:006429/0594

Effective date: 19921218

AS Assignment

Owner name: AT&T CORP., NEW YORK

Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:ALDEN, TOR ANDREW;BUSKMILLER, MICHAEL R.;FONTANA, EDWARD CLARK;REEL/FRAME:007023/0436;SIGNING DATES FROM 19940422 TO 19940608

FEPP Fee payment procedure

Free format text: PAT HLDR NO LONGER CLAIMS SMALL ENT STAT AS SMALL BUSINESS (ORIGINAL EVENT CODE: LSM2); ENTITY STATUS OF PATENT OWNER: LARGE ENTITY

FPAY Fee payment

Year of fee payment: 4

FPAY Fee payment

Year of fee payment: 8

REMI Maintenance fee reminder mailed
LAPS Lapse for failure to pay maintenance fees
LAPS Lapse for failure to pay maintenance fees

Free format text: PATENT EXPIRED FOR FAILURE TO PAY MAINTENANCE FEES (ORIGINAL EVENT CODE: EXP.); ENTITY STATUS OF PATENT OWNER: LARGE ENTITY

STCH Information on status: patent discontinuation

Free format text: PATENT EXPIRED DUE TO NONPAYMENT OF MAINTENANCE FEES UNDER 37 CFR 1.362

FP Lapsed due to failure to pay maintenance fee

Effective date: 20061025