US20200005980A1 - Stacked spiral inductor - Google Patents

Stacked spiral inductor Download PDF

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Publication number
US20200005980A1
US20200005980A1 US16/481,600 US201816481600A US2020005980A1 US 20200005980 A1 US20200005980 A1 US 20200005980A1 US 201816481600 A US201816481600 A US 201816481600A US 2020005980 A1 US2020005980 A1 US 2020005980A1
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United States
Prior art keywords
metal layer
inductive
inductive metal
spiral inductor
conductive coil
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Abandoned
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US16/481,600
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English (en)
Inventor
Congying DONG
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CSMC Technologies Fab2 Co Ltd
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CSMC Technologies Fab2 Co Ltd
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Assigned to CSMC TECHNOLOGIES FAB2 CO., LTD. reassignment CSMC TECHNOLOGIES FAB2 CO., LTD. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: DONG, Congying
Publication of US20200005980A1 publication Critical patent/US20200005980A1/en
Abandoned legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F17/00—Fixed inductances of the signal type 
    • H01F17/0006—Printed inductances
    • H01F17/0013—Printed inductances with stacked layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/12—Mountings, e.g. non-detachable insulating substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/5227—Inductive arrangements or effects of, or between, wiring layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F17/00—Fixed inductances of the signal type 
    • H01F17/0006—Printed inductances
    • H01F2017/0073—Printed inductances with a special conductive pattern, e.g. flat spiral
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F17/00—Fixed inductances of the signal type 
    • H01F17/0006—Printed inductances
    • H01F2017/008—Electric or magnetic shielding of printed inductances
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F17/00—Fixed inductances of the signal type 
    • H01F17/0006—Printed inductances
    • H01F2017/0086—Printed inductances on semiconductor substrate

Definitions

  • the present disclosure relates to semiconductor technology, and more particularly, to a stacked spiral inductor.
  • a conventional stacked spiral inductor is a stacked spiral inductor having three metal layers connected to each other, which is obtained by forming a planar spiral inductor on each metal layer and connecting the spiral inductors of two adjacent layers through a metal through hole.
  • the shape and the size of the planar spiral inductor in a first metal layer, a second metal layer, and a third metal layer are the same.
  • a parasitic capacitance of the planar spiral inductors between the metal layers is too large, and a parasitic coupling capacitance between the metal layer and a silicon substrate becomes larger as well, which seriously affects the performance of the stacked spiral inductor.
  • a stacked spiral inductor including: a substrate, and multiple stacked insulating layers and inductive metal layers formed on the substrate via a semiconductor process.
  • the inductive metal layer includes a conductive coil in a shape of a spiral and a through hole area used to connect two adjacent inductive metal layers.
  • the conductive coils of the inductive metal layers have a common coil center. In two adjacent inductive metal layers, the conductive coil of a lower inductive metal layer is retracted toward the coil center with respect to the conductive coil of an upper inductive metal layer.
  • FIG. 1 is a schematic view of a conventional stacked spiral inductor.
  • FIG. 2 is a top view of a stacked spiral inductor according to an embodiment.
  • FIG. 3 is another top view of a stacked spiral inductor according to an embodiment.
  • FIG. 4 is a partially enlarged view of an opening end in a stacked spiral inductor according to an embodiment.
  • FIG. 5 is a top view of a stacked spiral inductor according to another embodiment.
  • FIG. 6 is a top view of a patterned ground shield in a stacked spiral inductor according to an embodiment.
  • FIG. 7 is a top view of a stacked spiral inductor according to another embodiment.
  • a stacked spiral inductor includes a substrate, and multiple stacked insulating layers and inductive metal layers formed on the substrate by a semiconductor process.
  • the substrate may be a silicon substrate, or may also be a gallium arsenide substrate, a silicon germanium substrate, or other semiconductor substrates.
  • the insulating layer may be formed on the substrate by deposition or epitaxy.
  • the insulating layer may be a silicon dioxide layer, or a silicon nitride layer, or other insulating oxide layers.
  • a through hole is formed by etching the insulating layer.
  • the inductive metal layer is formed by sputtering on the insulating layer.
  • the multiple stacked insulating layers and inductive metal layers are formed on the substrate by repeating the afore-described semiconductor process.
  • a conductive coil in a shape of a spiral and a through hole area used to connect two adjacent inductive metal layers is formed on one of the inductive metal layers by selectively etching.
  • the through hole area of the inductive metal layer is arranged corresponding to the through hole of the insulating layer.
  • FIG. 2 a top view of a stacked spiral inductor is shown.
  • the conductive coils on the inductive metal layers formed by etching are similar in shape with a common coil center O, but are different in size.
  • a conductive coil L 2 of a lower inductive metal layer is retracted towards the coil center O with respect to a conductive coil L 1 of an upper inductive metal layer, that is, a distance between the conductive coil L 2 of the lower inductive metal layer and the coil center O is smaller than a distance between the conductive coil L 1 of the upper inductive metal layer and the coil center O.
  • a conventional stacked on-chip spiral inductor is directly translated to a lower layer, that is, the planar spiral inductors on the first metal layer m 1 , the second metal layer m 2 , and the third metal layer m 3 are all the same in shape and size.
  • the planar spiral inductors on the first metal layer m 1 , the second metal layer m 2 , and the third metal layer m 3 are all the same in shape and size.
  • the conductive coil on the lower inductive metal layer of two adjacent inductive metal layers is retracted toward the center with respect to the conductive coil on the upper inductive metal layer of the two adjacent inductive metal layers, which may reduce the parasitic capacitance between the two adjacent inductive metal layers and improve their own resonant frequencies under an circumstance in which the conditions of existing process technology are not required to be changed and the substrate areas are the same, which may further increase a quality factor Q of the spiral inductor and improve the performance of the spiral inductor.
  • the stacked spiral inductor includes two inductive metal layers, which are respectively a top inductive metal layer M 1 (i.e. a first inductive metal layer M 1 ) and a secondary top inductive metal layer (i.e. a second inductive metal layer M 2 ).
  • a distance of the conductive coil L 2 of the second inductive metal layer M 2 retracted towards the center O of the conductive coils with respect to the conductive coil L 1 of the first inductive metal layer M 1 ranges from 2 ⁇ m to 3 ⁇ m.
  • a distance D 2 of the conductive coil L 2 of the second inductive metal layer M 2 away from the coil center O is smaller than a distance D 1 of the conductive coil L 1 of the first inductive metal layer M 1 away from the coil center O.
  • the stacked spiral inductor includes n (n>2) inductive metal layers.
  • a first inductive metal layer, a second inductive metal layer, . . . , and an n-th inductive metal layer are sequentially included from a top inductive metal layer to a bottom metal layer.
  • the distances between the conductive coils of the inductive metal layers and the center are sequentially D 1 , D 2 , . . . , Dn.
  • the distances of ⁇ d 1 , ⁇ d 2 , . . . , ⁇ d n-1 for each retraction are equal to each other, which may be equal to any value varying between 2 ⁇ m an 3 ⁇ m.
  • the distances of ⁇ d 1 , ⁇ d 2 , . . . , ⁇ d n-1 for each retraction form an arithmetic progression.
  • the arithmetic progression may be with ⁇ d 1 ⁇ d 2 ⁇ . . . ⁇ d n-1 , or may be with ⁇ d 1 > ⁇ d 2 > . . . > ⁇ d n-1 .
  • the distance for each retraction may be set depending on actual needs, and the distance for each retraction is not limited to the retraction range described in the above embodiment.
  • the conductive coil of the same inductive metal layer has the same line width, and the line width of the conductive coil ranges from 6 ⁇ m to 15 ⁇ m.
  • the conductive coils of the inductive metal layers from the top inductive metal layer to the bottom metal layer may have the same line width, or have line widths changing in a gradually increasing trend or in a gradually decreasing trend, or changing alternatively.
  • the line width of the conductive coil of each inductive metal layer may be set depending on the actual needs.
  • the conductive coil of each inductive metal layer includes a lead end, and an opening end opposite to the lead end.
  • the inductive metal layers include the inductive metal layer M 1 (the first inductive metal layer) at the top thereof, and the secondary top inductive metal layer M 2 (the second inductive metal layer).
  • the conductive coil L 1 of the first inductive metal layer M 1 includes the lead end 10 , and the opening end 20 opposite to the lead end 10 .
  • the lead end 10 is a lead terminal of the spiral inductor.
  • the opening end 20 is provided with the through hole area (not shown).
  • the opening end 20 includes a first extending portion 210 and a second extending portion 220 , which are arranged oppositely and spaced from each other.
  • the through hole area 201 are arranged respectively at the ends of the first extending portion 210 and the second extending portion 220 .
  • a sum of line widths of the first extending portion 210 and the second extending portion 220 is less than the line width of the conductive coil L 1 (not shown).
  • the line width of the first extending portion 210 is equal to the line width of the second extending portion 220
  • the line widths of the first extending portion 210 and the second extending portion 220 are 1 ⁇ 3 of the line width of the conductive coil L 1 .
  • the through hole area is arranged in the first extending portion and the second extending portion that are opposite to each other and spaced from each other, a corner point is not required to be arranged in the through hole area, which simplifies complexity of the process of etching the conductive coil, improves efficiency, and reduces costs.
  • the conductive coil of the first inductive metal layer may be electrically connected to the conductive coil of the second inductive metal layer via the through hole area.
  • the stacked spiral inductor includes n (n>2) inductive metal layers.
  • the first inductive metal layer, the second inductive metal layer, . . . , and the n-th inductive metal layer are sequentially included from the top inductive metal layer to the bottom metal layer.
  • the conductive coil of the first inductive metal layer includes the lead end, and the opening end opposite to the lead end.
  • the lead end is the lead terminal of the spiral inductor.
  • the opening end is provided with the through hole area. Referring to FIG. 5 , the through hole area (not shown) in the second inductive metal layer M 2 , which is used to connect with an adjacent third metal layer M 3 at a lower side, is arranged at the same side as the lead end 10 of the first inductive metal layer M 1 .
  • the through hole area in the third inductive metal layer M 3 which is used to connect with an adjacent fourth metal layer at a lower side, is arranged at the same side as the lead end of the second inductive metal layer. Accordingly, if n is an odd number, the through hole area in the n ⁇ 1-th inductive metal layer, which is used to connect with an adjacent n-th metal layer at a lower side, is arranged at the same side as the lead end of the first inductive metal layer. If n is an even number, the through hole area in the n ⁇ 1-th inductive metal layer, which is used to connect with the adjacent n-th metal layer at a lower side, is arranged at the same side as the lead end of the second inductive metal layer.
  • the hexagonal spiral inductor is merely for description.
  • the shape of the spiral inductor is not limited thereto, and can be other types of spirals.
  • a quadrangle, an octagon, or a circle may be applied to the present disclosure.
  • the stacked spiral inductor further includes a patterned ground shield (PGS) arranged between the substrate and the bottommost inductive metal layer.
  • PGS patterned ground shield
  • the patterned ground shield is used to cut off a magnetic field from the inductor to the silicon substrate, reducing an electromagnetic consumption caused by the substrate, thereby increasing the Q value.
  • the patterned ground shield (not shown) is provided with a plurality of concentric metal rings (Q 1 , Q 2 ).
  • the (Q 1 , Q 2 ) are both provided with a plurality of metal strips T perpendicular to the metal rings.
  • a length of the metal strip T is less than a distance between two adjacent metal rings.
  • the plurality of metal strips are not connected to each other inside the plane but maintain fixed distances.
  • the plurality of metal strips are merely connected to each other at the outermost edge of the plane through the metal ring and are grounded, thereby reducing the electromagnetic consumption on the silicon substrate.
  • a number of the metal rings is equal to a number of the inductive metal layers, and the shape of the metal ring is similar to the shape of the conductive coil.
  • the patterned ground shield is provided with two concentric metal rings. Spatially, the metal strips on the outermost metal ring Q 1 are perpendicular to the conductive coil L 1 of the first inductive metal layer correspondingly. The metal strips on the innermost metal ring Q 2 are perpendicular to the conductive coil L 2 of the second inductive metal layer correspondingly.
  • the innermost metal ring Q 2 , the conductive coil L 2 of the second inductive metal layer, the outermost metal ring Q 1 , and the conductive coil L 1 of the first inductive metal layer are concentrically arranged sequentially from an inside to an outside thereof.
  • the patterned ground shield is then provided with n concentric metal rings.
  • the metal strips corresponding to the metal rings from the outermost to the innermost are sequentially perpendicular to the corresponding conductive coils of the inductive metal layers from the top inductive metal layer to the bottom inductive metal layer respectively.
  • the metal strips on the outermost metal ring are perpendicular to the conductive coil of the top inductive metal layer correspondingly.
  • the metal strips on the innermost metal ring are perpendicular to the conductive coil of the bottom inductive metal layer correspondingly.
  • the conductive coils of the inductive metal layers from the top inductive metal layer to the bottom inductive metal layer are projected on the patterned ground shield, the conductive coils in the inductive metal layers from the top inductive metal layer to the bottom inductive metal layer are arranged sequentially at the outer side of the concentric metal rings on the patterned ground shield from the outside to the inside thereof respectively.
  • the conductive coil of the top inductive metal layer is arranged at the outer side of the outermost metal ring of the patterned ground shield, and the conductive coil on the bottom inductive metal layer is arranged between the innermost metal ring and the secondary innermost metal ring of the patterned ground shield.
  • the patterned ground shield is provided with the plurality of concentric metal rings, and each metal ring is provided with the plurality of metal strips perpendicular to the metal ring.
  • the metal strips are perpendicular to the conductive coil of each inductive metal layer.
  • the hexagonal spiral inductor formed on the silicon substrate is merely for description.
  • the shape of the spiral inductor is not limited thereto, and can be other types of spirals.
  • a quadrangle, an octagon or a circle may be applied to the present disclosure.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Coils Or Transformers For Communication (AREA)
  • Semiconductor Integrated Circuits (AREA)
US16/481,600 2017-07-03 2018-07-03 Stacked spiral inductor Abandoned US20200005980A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
CN201710534700.2A CN109216316B (zh) 2017-07-03 2017-07-03 堆叠螺旋电感
CN201710534700.2 2017-07-03
PCT/CN2018/094241 WO2019007322A1 (zh) 2017-07-03 2018-07-03 堆叠螺旋电感

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US18/308,399 Division US12009129B2 (en) 2017-07-03 2023-04-27 Stacked spiral inductor

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Cited By (1)

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US11411068B2 (en) 2020-06-10 2022-08-09 Samsung Electronics Co., Ltd. Semiconductor packages including inductor structures

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CN109860148A (zh) * 2019-03-18 2019-06-07 西安电子科技大学 分层多端口螺旋电感器
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WO2019007322A1 (zh) 2019-01-10
US12009129B2 (en) 2024-06-11
US20230268111A1 (en) 2023-08-24
CN109216316A (zh) 2019-01-15
CN109216316B (zh) 2020-09-08

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