US20170287791A1 - Controlling dry etch process characteristics using waferless dry clean optical emission spectroscopy - Google Patents

Controlling dry etch process characteristics using waferless dry clean optical emission spectroscopy Download PDF

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US20170287791A1
US20170287791A1 US15/469,317 US201715469317A US2017287791A1 US 20170287791 A1 US20170287791 A1 US 20170287791A1 US 201715469317 A US201715469317 A US 201715469317A US 2017287791 A1 US2017287791 A1 US 2017287791A1
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plasma processing
dry cleaning
cleaning process
processing chamber
waferless dry
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Brian J. Coppa
Deepak Vedhachalam
Francois C. Dassapa
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Tokyo Electron Ltd
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Tokyo Electron Ltd
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Assigned to TOKYO ELECTRON LIMITED reassignment TOKYO ELECTRON LIMITED ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: VEDHACHALAM, Deepak, COPPA, BRIAN J.
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    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B08—CLEANING
    • B08B—CLEANING IN GENERAL; PREVENTION OF FOULING IN GENERAL
    • B08B7/00—Cleaning by methods not provided for in a single other subclass or a single group in this subclass
    • B08B7/0035—Cleaning by methods not provided for in a single other subclass or a single group in this subclass by radiant energy, e.g. UV, laser, light beam or the like
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32—Gas-filled discharge tubes
    • H01J37/32431—Constructional details of the reactor
    • H01J37/32798—Further details of plasma apparatus not provided for in groups H01J37/3244 - H01J37/32788; special provisions for cleaning or maintenance of the apparatus
    • H01J37/32853—Hygiene
    • H01J37/32862—In situ cleaning of vessels and/or internal parts
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    • H—ELECTRICITY
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    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/24—Dry etching; Plasma etching; Reactive-ion etching of semiconductor materials
    • H10P50/242—Dry etching; Plasma etching; Reactive-ion etching of semiconductor materials of Group IV materials
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B08—CLEANING
    • B08B—CLEANING IN GENERAL; PREVENTION OF FOULING IN GENERAL
    • B08B9/00—Cleaning hollow articles by methods or apparatus specially adapted thereto
    • B08B9/08—Cleaning containers, e.g. tanks
    • B08B9/0865—Cleaning containers, e.g. tanks by burning-out
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N21/00—Investigating or analysing materials by the use of optical means, i.e. using sub-millimetre waves, infrared, visible or ultraviolet light
    • G01N21/62—Systems in which the material investigated is excited whereby it emits light or causes a change in wavelength of the incident light
    • G01N21/71—Systems in which the material investigated is excited whereby it emits light or causes a change in wavelength of the incident light thermally excited
    • G01N21/73—Systems in which the material investigated is excited whereby it emits light or causes a change in wavelength of the incident light thermally excited using plasma burners or torches
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N21/00—Investigating or analysing materials by the use of optical means, i.e. using sub-millimetre waves, infrared, visible or ultraviolet light
    • G01N21/84—Systems specially adapted for particular applications
    • G01N21/88—Investigating the presence of flaws or contamination
    • G01N21/94—Investigating contamination, e.g. dust
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32—Gas-filled discharge tubes
    • H01J37/32009—Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
    • H01J37/32082—Radio frequency generated discharge
    • H01J37/32137—Radio frequency generated discharge controlling of the discharge by modulation of energy
    • H01J37/32146—Amplitude modulation, includes pulsing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32—Gas-filled discharge tubes
    • H01J37/32431—Constructional details of the reactor
    • H01J37/3266—Magnetic control means
    • H01J37/32669—Particular magnets or magnet arrangements for controlling the discharge
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32—Gas-filled discharge tubes
    • H01J37/32431—Constructional details of the reactor
    • H01J37/32697—Electrostatic control
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32—Gas-filled discharge tubes
    • H01J37/32917—Plasma diagnostics
    • H01J37/32935—Monitoring and controlling tubes by information coming from the object and/or discharge
    • H01J37/32972—Spectral analysis
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32—Gas-filled discharge tubes
    • H01J37/32917—Plasma diagnostics
    • H01J37/32935—Monitoring and controlling tubes by information coming from the object and/or discharge
    • H01J37/32981—Gas analysis
    • H01L21/67023—
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05H—PLASMA TECHNIQUE; PRODUCTION OF ACCELERATED ELECTRICALLY-CHARGED PARTICLES OR OF NEUTRONS; PRODUCTION OR ACCELERATION OF NEUTRAL MOLECULAR OR ATOMIC BEAMS
    • H05H1/00—Generating plasma; Handling plasma
    • H05H1/24—Generating plasma
    • H05H1/46—Generating plasma using applied electromagnetic fields, e.g. high frequency or microwave energy
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P70/00—Cleaning of wafers, substrates or parts of devices
    • H10P70/10—Cleaning before device manufacture, i.e. Begin-Of-Line process
    • H10P70/12—Cleaning before device manufacture, i.e. Begin-Of-Line process by dry cleaning only
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/04—Apparatus for manufacture or treatment
    • H10P72/0402—Apparatus for fluid treatment
    • H10P72/0404—Apparatus for fluid treatment for general liquid treatment, e.g. etching followed by cleaning
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    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/04—Apparatus for manufacture or treatment
    • H10P72/0402—Apparatus for fluid treatment
    • H10P72/0406—Apparatus for fluid treatment for cleaning followed by drying, rinsing, stripping, blasting or the like
    • H10P72/0408—Apparatus for fluid treatment for cleaning followed by drying, rinsing, stripping, blasting or the like for drying
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/04—Apparatus for manufacture or treatment
    • H10P72/0402—Apparatus for fluid treatment
    • H10P72/0418—Apparatus for fluid treatment for etching
    • H10P72/0421—Apparatus for fluid treatment for etching for drying etching
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P74/00—Testing or measuring during manufacture or treatment of wafers, substrates or devices
    • H10P74/20—Testing or measuring during manufacture or treatment of wafers, substrates or devices characterised by the properties tested or measured, e.g. structural or electrical properties
    • H10P74/203—Structural properties, e.g. testing or measuring thicknesses, line widths, warpage, bond strengths or physical defects
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J2237/00—Discharge tubes exposing object to beam, e.g. for analysis treatment, etching, imaging
    • H01J2237/32—Processing objects by plasma generation
    • H01J2237/33—Processing objects by plasma generation characterised by the type of processing
    • H01J2237/335—Cleaning

Definitions

  • One of the problems with dry etch processes for via and trench features is the variation in the etch profile during the processing of a full lot of wafers. This may be due to the build-up of carbon (C) and fluorine (F) (collectively referred to as CF)-based etch gas constituents used for passivation and etch selectivity, which are used to form specific etch profiles for patterned wafers in semiconductor processing. If these constituents are not effectively removed from the chamber to the same degree during dry clean cycles between wafers, polymer deposition can accumulate in a chamber leading to the build-up of a film layer which can lead to particle formation and peeling, and can generate defects and device failure on a wafer.
  • C carbon
  • F fluorine
  • WLDC waferless dry cleaning
  • This invention relates to the optimization of a waferless dry clean (WLDC) process in order to reduce the dry etch wafer-to-wafer process variation of patterned device wafers of a lot.
  • Optical Emission Spectroscopy is used to monitor light emission from a plasma, such as a dry cleaning process that is performed between each process wafer of a lot, to minimize deposition build-up in a plasma processing chamber.
  • the OES of various constituents, such as chlorine (C) and fluorine (F) being exhausted during a dry clean cycle is indicative of the effectiveness of the cleaning process.
  • the OES of the constituents can be used to gauge and optimize the WLDC process in order to improve etch wafer process control.
  • FIG. 1 is a cross-sectional view showing an example schematic configuration of a capacitively coupled plasma (CCP) processing system in accordance with embodiments herein.
  • CCP capacitively coupled plasma
  • FIG. 2 is an example schematic block diagram of an example plasma processing system implementing optical emission spectroscopy (OES) to determine OES spectra, as part of an overall monitoring system to monitor gas constituents inside the plasma chamber.
  • OES optical emission spectroscopy
  • FIG. 3 are example graphs that illustrate a peak in optical emission spectroscopy (OES) spectra of a residual constituent fluorine (F) by-product during a non-optimized WLDC clean process and the constant increase of the amount of the residual constituent over the time period of the dry clean process.
  • OES optical emission spectroscopy
  • FIG. 4 is an example flowchart that illustrates a particular dry clean process condition.
  • FIG. 5 is a process chart illustrating an example process flow for monitoring and controlling a waferless dry cleaning process in a plasma processing system based on optical emission spectroscopy (OES) as described herein.
  • OES optical emission spectroscopy
  • FIG. 6 is an example graph that illustrates optical emission spectroscopy (OES) detection of an endpoint for a residual fluorine (F) by-product constituent during an optimized waferless dry clean associated with clean chamber states.
  • OES optical emission spectroscopy
  • FIG. 7 is a process chart illustrating an example process flow for optical emission spectroscopy (OES) process control.
  • OES optical emission spectroscopy
  • Described herein are architectures, platforms and methods for analyzing residue constituents in a waferless dry clean (WLDC) process, and in particular analysis using Optical Emission Spectroscopy (OES).
  • a process control monitor/metric such as OES can be utilized to analyze the effectiveness of a WLDC process by evaluation of carbon (C) and fluorine (F) based wavelengths in the spectra for a batch of wafers.
  • a WLDC process can be optimized based on OES spectra of undesirable residue constituents being removed by the dry cleaning process following one particular device wafer process.
  • an ineffective WLDC process will never show the leveling out in OES intensity for the wavelength examined of a constituent that is intended to be removed by the WLDC.
  • the OES spectra of this constituent would show the leveling out in intensity once the endpoint was reached for the WLDC process; this endpoint time can be utilized for determining the ideal completion time for the WLDC process in order to optimize production throughput.
  • optimizing the WLDC process e.g., minimizing the time to perform the WLDC process
  • wet cleans of a plasma processing chamber may be routinely performed. By optimizing the WLDC process, the time or period between such wet cleans may be also be optimized. Optimization of the herein described parameters for a WLDC process can maximize the time between wet cleans. Furthermore, useful life of components in a plasma processing chamber or system may be prolonged with an optimized WLDC process.
  • the uniformity of the etch profile characteristics of the wafer lot can be improved.
  • Excess or inconsistent C and F constituents due to an inconsistent WLDC process can cause variations in the subsequent plasma etch performance for patterned device wafers that can lead to an insufficient critical dimension variation across patterned device wafers of a wafer lot.
  • OES can be used to optimize the consistency and effectiveness of a WLDC for removing undesirable remnant constituents resulting from a device wafer etch process.
  • OES of C and F based species in an OES spectra within a wafer lot are directly correlated to key metrics such as the etch profile uniformity of a device wafer lot.
  • bare silicon wafers exposed to the same etch process as a device wafer can be used to optimize the WLDC, since OES shows the same response and trends with respect to adjustment of WLDC process parameters.
  • process parameters include, but are not limited to radio frequency (RF) or microwave power supplied to a plasma processing chamber of a plasma processing system; RF or microwave power pulse frequency supplied to the plasma processing chamber; RF or microwave pulse duty cycle to the plasma processing chamber; RF power supplied to a substrate holder in the plasma processing chamber; magnetic field of one of more magnets proximate the substrate holder; DC bias of the substrate holder; DC bias voltage supplied to at least one electrode arranged proximate the substrate holder; dry cleaning gas flow rate; wafer chuck temperature, dry cleaning gas pressure; and duration of the waferless dry cleaning process.
  • RF radio frequency
  • microwave power pulse frequency supplied to the plasma processing chamber
  • RF or microwave pulse duty cycle to the plasma processing chamber
  • RF power supplied to a substrate holder in the plasma processing chamber magnetic field of one of more magnets proximate the substrate holder
  • DC bias of the substrate holder DC bias voltage supplied to at least one electrode arranged proximate the substrate holder
  • dry cleaning gas flow rate wafer chuck temperature, dry
  • Improvement in a WLDC process for removal of C and F such as using a higher oxygen plasma power may be found between either bare silicon or device wafers based on the resulting OES spectra; allowing optimization of a WLDC process without consuming high-cost device wafers.
  • a dummy substrate or wafer may be used as described herein. Therefore, an optimal time for a WLDC process may be achieved, where a minimal time is determined for such a WLDC process.
  • an optimal WLDC process can enhance etch profile wafer-to-wafer uniformity for wafer lots.
  • OES can be used to optimize the consistency and effectiveness of a WLDC for removing undesirable remnant constituents resulting from a device wafer etch process.
  • OES of C and F constituent spectra within a wafer lot are directly correlated to key metrics such as the wafer-to-wafer etch profile uniformity of a device wafer lot.
  • bare silicon wafers exposed to the same etch process as a device wafer can be used to optimize the WLDC since OES shows the same response and trend with respect to adjustment of WLDC process parameters including but not limited to gas pressures, gas flows, plasma exposure time, plasma power, bias voltage, and temperature.
  • improvement in a WLDC process for the removal of C and F and CF polymer deposition accomplished by using a higher oxygen plasma power may be found both in bare silicon and device wafers based on a resulting OES spectra; allowing optimization of a WLDC process without consuming high-cost device production wafers. Therefore, the use of higher oxygen plasma power accelerates the time (and subsequent wafer output) and lessens the cost for optimization of a WLDC based on OES analysis to determine the optimal WLDC process or device wafers to enhance the wafer-to-wafer etch profile uniformity within the wafer lot.
  • OES spectra analysis may also be found to be indicative of cleaning effectiveness for a wide variety of etch process conditions, as the variation in undesirable remnant species for a batch of wafers can be used to predict changes in the uniformity of subsequently formed etch profiles for multiple wafers within a wafer lot.
  • a more effective WLDC process reduces the need for additional bare silicon dummy wafers to be run between device wafers to achieve better etch process control to remove residue accumulating in a chamber or conditioning to stabilize the chamber environment; thus reducing overall process time and cost.
  • an optimal WLDC process that keeps the chamber cleaner long-term lessens the frequency of wet clean preventive maintenance cycles, which ultimately improves chamber utilization and productivity.
  • an etch process may introduce a wide variety of gas species into the chamber such as C and F, which ultimately lead to polymer deposition within the plasma processing chamber that can form particles within the plasma processing chamber and on the wafer surface.
  • OES spectra can be collected during the subsequent clean to evaluate the gas species removed from the chamber during a WLDC process that runs in the chamber after processing a device wafer.
  • the less effective WLDC process may not show a leveling out of OES intensity for the F wavelength examined over WLDC process time.
  • the more effective WLDC process can indicate an OES endpoint for this exact same F constituent for all WLDC processes occurring between each device wafer etch process for the lot that could be categorized as a clean condition for the chamber.
  • particle monitor wafers may be cycled through the plasma processing chamber before and after each wafer lot to analyze particle levels. A long-term benefit of a more effective WLDC process may be seen in reducing increasing trends of particle levels in a chamber, since polymer deposition can accumulate over time leading to peeling from chamber surfaces for an insufficient WLDC.
  • a wafer lot using this more effective WLDC may also have a lower within-wafer etch uniformity for various CDs such as a bottom via width CD. Particle levels may reduce for the more effective WLDC in addition to less added defects being measured for the wafer lot with the enhanced WLDC process.
  • a need for adding additional bare silicon dummy chamber conditioning wafers to be processed during overall wafer lot processing with a particular recipe may be eliminated, saving on overall wafer lot processing time.
  • OES analysis during the WLDC processes running between device wafers for wafer lots may show the more effective WLDC process operating at higher O2 pressure, higher O2 power and with DC bias voltage.
  • a more effective and consistent F removal from the plasma processing chamber, as the main constituent remaining after a device wafer etch process, generated from higher power oxygen radicals and ions, may create a cleaner and more consistent environment in the plasma processing chamber for successive wafers in the wafer lot.
  • the overall within-wafer and within-lot etch uniformity can improve.
  • a one to one correlation may be realized between the reduction of the within-lot F variation in the WLDC OES and the reduction in the standard deviation of the mean bottom CD per wafer in the lot.
  • OES WLDC processes can be used as an in-situ diagnostic to enhance etch process control, when OES WLDC processes are linked with process automation features of plasma processing systems/chambers to optimize etch uniformity in a manufacturing fab.
  • LIF laser induced fluorescence
  • mass spectrometry mass spectrometry
  • residual gas analysis FTIR, etc.
  • FIG. 1 shows a schematic cross-sectional view of an example of a capacitively coupled plasma (CCP) processing apparatus or plasma processing system 100 in accordance with embodiments herein.
  • CCP capacitively coupled plasma
  • RLSA radial line slot antenna
  • ICP inductively coupled plasma
  • the plasma processing system 100 is used for a WLDC process, which may implement an OES spectra analysis of residual constituents, such as C and F.
  • plasma analysis may be performed.
  • endpoint analysis may be performed.
  • Duration of the WLDC process can be a parameter that may be optimized during a WLDC process using OES data of residual constituents.
  • the plasma processing system 100 may be used for multiple operations including ashing, etching, deposition, cleaning, plasma polymerization, plasma-enhanced chemical vapor deposition (PECVD), plasma-enhanced atomic layer deposition (PEALD) and so forth.
  • Plasma processing can be executed within plasma processing chamber 102 , which can be a vacuum chamber made of a metal such as aluminum or stainless steel.
  • the plasma processing chamber 102 is grounded such to ground(s) 104 .
  • the plasma processing chamber 102 defines a processing vessel providing a process space PS 106 for plasma generation.
  • An inner wall of the plasma processing chamber 102 can be coated with alumina, yttria, or other protectant.
  • the plasma processing chamber 102 can be cylindrical in shape or have other geometric configurations.
  • a substrate holder or susceptor 108 (which can be disc-shaped) can serve as a mounting table on which, for example, a substrate W 110 to be processed (such as a semiconductor wafer) can be mounted.
  • Substrate W 110 can be moved into the plasma processing chamber 102 through loading/unloading port 112 and gate valve 114 .
  • Susceptor 108 forms part of a lower electrode 116 (lower electrode assembly) as an example of a second electrode acting as a mounting table for mounting substrate W 110 thereon.
  • the susceptor 108 is supported on a susceptor support 118 , which is provided at substantially a center of the bottom of plasma processing chamber 102 via an insulating plate 120 .
  • the susceptor support 118 can be cylindrical.
  • the susceptor 108 can be formed of, e.g., an aluminum alloy.
  • Susceptor 108 is provided thereon with an electrostatic chuck 122 (as part of the lower electrode assembly 116 ) for holding the substrate W 110 .
  • the electrostatic chuck 122 is provided with an electrode 124 .
  • Electrode 124 is electrically connected to DC power source 126 (direct current power source).
  • the electrostatic chuck 122 attracts the substrate W 110 thereto via an electrostatic force generated when DC voltage from the DC power source 126 is applied to the electrode 124 .
  • DC bias of the substrate holder or susceptor 108 , and DC bias voltage supplied to at least one of electrodes 116 and 124 can be parameters that may be optimized during a WLDC process using OES data of residual constituents.
  • the susceptor 108 can be electrically connected with a high-frequency power source 130 via a matching unit 132 .
  • This high-frequency power source 130 (a second power source) can output a high-frequency voltage in a range from, for example, 2 MHz to 20 MHz.
  • Applying high frequency bias power causes ions, in the plasma, generated in the plasma processing chamber 102 , to be attracted to substrate W 110 .
  • a focus ring 134 is provided on an upper surface of the susceptor 108 to surround the electrostatic chuck 122 .
  • RF or microwave power may be provided to the plasma processing chamber 102 .
  • RF or microwave power supplied to the plasma processing chamber can be parameters that may be optimized during a WLDC process using OES data of residual constituents.
  • An inner wall member 136 which can be cylindrical and formed of, e.g., quartz, is attached to the outer peripheral side of the electrostatic chuck 122 and the susceptor support 118 .
  • the susceptor support 118 includes a coolant flow path 138 .
  • the coolant flow path 138 communicates with a chiller unit (not shown), installed outside the plasma processing chamber 102 .
  • Coolant flow path 138 is supplied with coolant (cooling liquid or cooling water) circulating through corresponding lines. Accordingly, a temperature of the substrate W 110 mounted on/above the susceptor 108 can be accurately controlled.
  • a gas supply line 140 which passes through the susceptor 108 and the susceptor support 118 , is configured to supply heat transfer gas to an upper surface of the electrostatic chuck 122 .
  • a heat transfer gas also known as backside gas
  • helium He
  • An exhaust path 142 can be formed along an outer periphery of inner wall member 136 and an inner sidewall surface of the plasma processing chamber 102 .
  • An exhaust port 144 (or multiple exhaust ports) is provided in a bottom portion of the exhaust path 142 .
  • a gas exhaust unit 146 is connected to each exhaust port via gas exhaust line 148 .
  • the gas exhaust unit 146 can include a vacuum pump such as a turbo molecular pump configured to decompress the plasma processing space within the plasma processing chamber 102 to a desired vacuum condition.
  • the gas exhaust unit 146 evacuates the inside of the plasma processing chamber 102 to thereby depressurize an inner pressure thereof up to a desired degree of vacuum.
  • An upper electrode 150 (that is, an upper electrode assembly), is an example of a first electrode and is positioned vertically above the lower electrode 116 to face the lower electrode 116 in parallel.
  • the plasma generation space or process space PS 106 is defined between the lower electrode 116 and the upper electrode 150 .
  • the upper electrode 150 includes an inner upper electrode 152 having a disk shape, and an outer upper electrode 154 can be annular and surrounding a periphery of the inner upper electrode 152 .
  • the inner upper electrode 152 also functions as a processing gas inlet for injecting a specific amount of processing gas into the process space PS 106 above substrate W 110 mounted on the lower electrode 116 .
  • the inner upper electrode 152 includes electrode plate 156 (which is typically circular) having gas injection openings 158 .
  • Inner upper electrode 152 also includes an electrode support 160 detachably supporting an upper side of the electrode plate 156 .
  • the electrode support 160 can be formed in the shape of a disk having substantially a same diameter as the electrode plate 156 (when electrode plate 156 is embodied as circular in shape). In alternative embodiments, electrode plate 156 can be square, rectangular, polygonal, etc.
  • the electrode plate 156 can be formed of a conductor or semiconductor material, such as Si, SiC, doped Si, Aluminum, and so forth.
  • the electrode plate 156 can be integral with upper electrode 150 or detachably supported by electrode support 160 for convenience in replacing a given plate after surface erosion.
  • the upper electrode 150 can also include a cooling plate or cooling mechanism (not shown) to control temperature of the electrode plate 156 .
  • the electrode support 160 can be formed of, e.g., aluminum, and can include a buffer chamber 162 .
  • Buffer chamber 162 is used for diffusing process gas and can define a disk-shaped space.
  • Processing gas from a process gas supply system 164 supplies gas to the upper electrode 150 .
  • the process gas supply system 164 can be configured to supply a processing gas for performing specific processes, such as film-forming, etching, and the like, on the substrate W 110 .
  • the process gas supply system 164 is connected with a gas supply line 166 forming a processing gas supply path.
  • the gas supply line 166 is connected to the buffer chamber 162 of the inner upper electrode 152 .
  • the processing gas can then move from the buffer chamber 162 to the gas injection openings 158 at a lower surface thereof.
  • a flow rate of processing gas introduced into the buffer chamber 162 can be adjusted by, e.g., by using a mass flow controller. Further, the processing gas introduced is uniformly discharged from the gas injection openings 158 of the electrode plate 156 (showerhead electrode) to the process space PS 106 . The inner upper electrode 152 then functions in part to provide a showerhead electrode assembly.
  • Dry cleaning gas flow rate, and dry cleaning gas pressure can be parameters that may be optimized during a WLDC process using OES data of residual constituents. Dry cleaning gases can include oxygen, an oxygen-containing gas, HCl, F2, C12, hydrogen, nitrogen, argon, SF6, C2F6, NF3, CF4, or a mixture of two or more of such gases.
  • a dielectric 168 having a ring shape, can be interposed between the inner upper electrode 152 and the outer upper electrode 154 .
  • An insulator 170 which can be a shield member having a ring shape and being formed of, e.g., alumina, is interposed between the outer upper electrode 154 and an inner peripheral wall of the plasma processing chamber 102 in an air tight manner.
  • the outer upper electrode 154 is electrically connected with a high-frequency power source 172 (first high-frequency power source) via a power feeder 174 , an upper power feed rod 176 , and a matching unit 178 .
  • the high-frequency power source 172 can output a high-frequency voltage having a frequency of 13 MHz (megahertz) or higher (e.g. 60 MHz), or can output a very high frequency (VHF) voltage having a frequency of 30-300 MHz.
  • This power source 172 can be referred to as the main power supply as compared to a bias power supply.
  • the power feeder 174 can be formed into, e.g., a substantially cylindrical shape having an open lower surface.
  • the power feeder 174 can be connected to the outer upper electrode 154 at the lower end portion thereof.
  • the power feeder 174 is electrically connected with the lower end portion of the upper power feed rod 176 at the center portion of an upper surface thereof.
  • the upper power feed rod 176 is connected to the output side of the matching unit 178 at the upper end portion thereof.
  • the matching unit 178 is connected to the high-frequency power source 172 and can match load impedance with the internal impedance of the high-frequency power source 172 .
  • outer upper electrode 154 is optional and embodiments can function with a single upper electrode.
  • Power feeder 174 can be cylindrical having a sidewall whose diameter is substantially the same as that of the plasma processing chamber 102 .
  • the ground conductor 180 is connected to the upper portion of a sidewall of the plasma processing chamber 102 at the lower end portion thereof.
  • the upper power feed rod 176 passes through a center portion of the upper surface of the ground conductor 180 .
  • An insulating member 182 is interposed at the contact portion between the ground conductor 180 and the upper power feed rod 176 .
  • the electrode support 160 is electrically connected with a lower power feed rod 184 on the upper surface thereof.
  • the lower power feed rod 184 is connected to the upper power feed rod 176 via a connector.
  • the upper power feed rod 176 and the lower power feed rod 184 form a power feed rod for supplying high-frequency electric power from the high-frequency power source 172 to the upper electrode 150 .
  • a variable condenser 186 is provided in the lower power feed rod 184 . By adjusting the capacitance of the variable condenser 186 , when the high-frequency electric power is applied from the high-frequency power source 160 , the relative ratio of an electric field strength formed directly under the outer upper electrode 154 to an electric field strength formed directly under the inner upper electrode 172 can be adjusted.
  • the inner upper electrode 152 of the upper electrode 150 is electrically connected with a low pass filter (LPF) 188 .
  • the LPF 188 blocks high frequencies from the high-frequency power source 172 while passing low frequencies from the high-frequency power source 130 to ground.
  • a lower portion of the system, the susceptor 108 , forming part of the lower electrode 120 is electrically connected with a high pass filter (HPF) 190 .
  • the HPF 190 passes high frequencies from the high-frequency power source 172 to ground.
  • High-frequency electric power in a range from about 3 MHz to 150 MHz is applied from the high-frequency power source 172 to the upper electrode 150 . This results in a high-frequency electric field being generated between the upper electrode 150 and the susceptor 108 or lower electrode 116 .
  • Processing gas delivered to process space PS 106 can then be dissociated and converted into a plasma.
  • a low frequency electric power in a range from about 0.2 MHz to 20 MHz can be applied from the high-frequency power source 130 to the susceptor 108 forming the lower electrode 116 .
  • a dual frequency system can be used. As a result, ions in the plasma are attracted toward the susceptor 108 , and thus anisotropy of etching is increased by ion assistance.
  • FIG. 1 shows the high-frequency power source 172 supplying power to the upper electrode 150 .
  • the high-frequency power source 172 can be supplied to the lower electrode 116 .
  • both main power (energizing power) and the bias power (ion acceleration power) can be supplied to the lower electrode.
  • Components of the plasma processing system 100 can be connected to, and controlled by, a control unit 192 , which in turn can be connected to a corresponding storage unit 194 and user interface 196 .
  • Various plasma processing operations can be executed via the user interface 196 , and various plasma processing recipes and operations can be stored in storage unit 194 . Accordingly, a given substrate can be processed within the plasma processing chamber with various microfabrication techniques.
  • the plasma processing apparatus uses the upper and lower electrodes to generate a plasma in the processing space PS 106 .
  • This generated plasma can then be used for processing a target substrate (such as substrate W 110 or any material to be processed) in various types of treatments such as plasma etching, chemical vapor deposition, treatment of glass material and treatment of large panels such as thin-film solar cells, other photovoltaic cells, and organic/inorganic plates for flat panel displays, etc.
  • a dummy substrate which may be a non-production wafer may be used as wafer W 110 .
  • the control unit 192 may include one or more processors, microcomputers, computing units and the like.
  • the storage unit 194 may include memory, and is an example of non-transitory computer-readable storage media for storing instructions which are executed by the control unit 192 , to perform the various functions described herein.
  • the storage unit 194 may generally include both volatile memory and non-volatile memory (e.g., RAM, ROM, or the like).
  • Memory may be referred to as memory or computer-readable storage media herein.
  • Memory is capable of storing computer-readable, processor-executable program instructions as computer program code that may be executed by the control unit 190 as a particular machine configured for carrying out the operations and functions described in the implementations herein.
  • Memory may further store one or more applications (not shown).
  • the applications may include preconfigured/installed and downloadable applications.
  • memory may store the OES spectral data used for processes as described herein.
  • the plasma processing system 100 can further include a spectrometer 198 and a window 199 .
  • the spectrometer 196 is used for gathering light used for process endpoint analysis and OES spectra.
  • the spectrometer 198 may be connected to control unit 192 , or other controllers/systems.
  • FIG. 2 is an example schematic block diagram of an example plasma processing system implementing optical emission spectroscopy (OES) to determine OES spectra, and plasma monitoring.
  • OES optical emission spectroscopy
  • the plasma processing chamber 102 provides for the processing space PS 106 above the substrate W 110 mounted on the lower electrode 116 .
  • a production substrate W 110 may be absent.
  • a dummy or non-production substrate is in place for substrate W 110 .
  • the spectrometer 198 collects light, as represented by light volume 200 .
  • light volume 200 provides for the OES spectra data, which can include OES spectra of CF constituents.
  • the spectrometer 198 may be part of a monitoring system 202 .
  • the monitoring system may be part of the plasma processing system 100 .
  • the monitoring system 202 can be particularly used in plasma monitoring in the plasma processing chamber 102 .
  • Other example systems and components that can be part of monitoring system 202 include and are not limited to, an optical emission spectroscopy system 204 , laser induced fluorescence system 206 , laser interferometer 208 , mass spectrometer 210 , and Fourier transform infrared (FTIR) system 212 .
  • the spectrometer 196 can be part of the optical emission spectroscopy system 204 .
  • the optical emission spectroscopy system 204 may acquire OES during a WLDC process.
  • a metric such as OES spectra can be utilized to analyze the effectiveness of a WLDC process by evaluation of undesirable species or residual constituents, such as wavelengths of C and F constituents in an OES spectra for a batch or lot of wafers.
  • a WLDC process can be optimized based on OES spectra of undesirable residue constituents being removed by the dry cleaning process following one particular device wafer process (in situ process).
  • an ineffective WLDC process may not show the leveling out in OES intensity for the wavelength examined of a constituent that is intended to be removed by the WLDC process or even the feed-in dry cleaning gas such as oxygen.
  • the OES spectra of this constituent can show the leveling out in intensity once the endpoint was reached for the WLDC process; this endpoint time can be utilized for determining the ideal completion time for the WLDC in order to optimize throughput.
  • the uniformity of the etch profile characteristics of that lot can be improved such as the bottom via width (bottom critical dimension or CD).
  • Excess or inconsistent CF or carbon densities in a chamber or polymer deposition build-up remaining from an inconsistent WLDC process can cause variations in the subsequent plasma etch performance for patterned device wafers that could lead to critical dimension variation across a lot outside the control limits for manufacturing specifications.
  • FIG. 3 shows an example graph 300 that illustrate a peak in OES spectra of a residual constituent, and in particular fluorine (F).
  • the OES spectral peak of fluorine for a particular WLDC is represented by 302 in graph 300 .
  • a determination may be made as to if and when the residual constituent fluorine levels off or not in a plasma processing chamber.
  • Fluorine residual by-product background build-up within a chamber, as measured by OES, while processing wafers of a wafer lot involving polymer shrink based dry etching may cause an increasing trend in the etch profile width CD, as sidewall polymer is being removed to a higher degree for the same given etch process for consecutively processed device wafers of a lot.
  • An endpoint analysis that may be implemented may be found in U.S. Pat. No. 9,330,990 entitled “METHOD OF ENDPOINT DETECTION OF PLASMA ETCHING PROCESS USING MULTIVARIATE ANALYSIS” which is included in its entirety by reference.
  • the plasma processing chamber is not absolutely devoid of residual constituents, and an acceptable amount of constituents may reside in the plasma processing chamber.
  • FIG. 4 shows an example chart 400 that provides optimized values for a particular dry clean process, such as a WLDC.
  • OES spectra and endpoint analysis can be collected for residual constituent F.
  • Several acronyms noted include: radical gas-distribution control (RDC) referring to the center to edge gas zone flow ratio/percent, brine or chiller temperature for the plasma system, direct current (DC) electrode voltage, low-frequency (LF) power, high-frequency (HF) power, and advanced temperature controlled chuck (ATCC) temperature in proximity to the substrate or wafer holder.
  • RDC radical gas-distribution control
  • LF low-frequency
  • HF high-frequency
  • ATCC advanced temperature controlled chuck
  • a particular process is identified under the heading “Recipe” as represented by 402 .
  • a WLDC process is identified as represented by 404 .
  • Step 406 furthers identifies the process as an oxygen (O2) clean 408 .
  • a pre-set recipe time of 20 seconds 410 is identified as the maximum WLDC process time.
  • Other parameters as shown in chart 400 may be identified for this optimized process. Such parameters can include “gas pressure”, “power”, “DC bias”, etc.
  • FIG. 5 shows an example process 500 for monitoring and controlling a waferless dry cleaning process in a plasma processing system.
  • the order in which the method is described is not intended to be construed as a limitation, and any number of the described method blocks can be combined in any order to implement the method, or alternate method. Additionally, individual blocks may be deleted from the method without departing from the spirit and scope of the subject matter described herein. Furthermore, the method may be implemented in any suitable hardware, software, firmware, or a combination thereof, without departing from the scope of the invention.
  • flowing a dry cleaning gas into a plasma processing chamber is performed.
  • this block may be performed by the described components of plasma processing system 100 .
  • igniting a plasma in the plasma processing chamber to initiate a waferless dry cleaning (WLDC) process is performed.
  • this block may be performed by the described components of plasma processing system 100 .
  • optical emission spectra (OES) data is performed.
  • this block may be performed by the described components of plasma processing system 100 .
  • this block may be performed by the optical emission spectroscopy system 204 .
  • the acquiring may be a monitoring act that monitors the plasma in the plasma processing chamber 102 .
  • optimizing at least one parameter of the WLDC process based on the acquired OES data may be those described above. In addition, the parameters may be optimized in-situ or ex-situ.
  • FIG. 6 shows an example graph 600 of optical emission spectroscopy (OES) detection of a residual constituent for an optimized WLDC condition.
  • the residual constituent F is represented by the OES peak 602 .
  • OES analysis is performed on residual constituent F as described herein indicating an OES endpoint by virtue of the leveling in intensity over time for this by-product.
  • An array of OES endpoint time values 604 when the residual constituent F intensity stabilizes were found with steadily shorter times as the WLDC cleaned the chamber more and more of residual etch by-products such as fluorine over the course of wafer lot processing. These values may be used as the duration as to when a WLDC process (i.e., recipe) ends.
  • FIG. 7 shows an example process 700 for optical emission spectroscopy (OES) process control.
  • the process 700 may be used for dry etch process control.
  • Process 700 can be considered an in situ process, wherein in feedback may be sent to a plasma processing system, as described in reference to FIG. 1 . Adjustment may be performed based on the determined feedback data.
  • OES optical emission spectroscopy
  • a production process of a wafer lot is performed.
  • this block may be performed by the described components of plasma processing system 100 .
  • a WLDC and OES trace data collection as described herein is performed.
  • this block may be performed by the described components of plasma processing system 100 , and monitoring system 200 .
  • this block may be performed by the described components of plasma processing system 100 .
  • a WLDC and OES trace data collection as described herein is performed.
  • this block may be performed by the described components of plasma processing system 100 , and monitoring system 200 .
  • an in situ OES data analysis is performed.
  • this block may be performed by the described components of plasma processing system 100 .
  • data/signals are sent to the plasma processing system (i.e., controllers), to determine whether to adjust a WLDC process parameter based on OES intensity of the selected by-product (i.e., residual constituent) or cleaning feed gas wavelength.
  • this block may be performed by the described components of plasma processing system 100 .
  • an adjustment to the WLDC process parameters may be performed. Alternatively, the same parameters may be used. In reference to FIG. 1 above, this block may be performed by the described components of plasma processing system 100 .
  • this block may be performed by the described components of plasma processing system 100 .
  • the sequence is iterated until the wafer lot production is complete.
  • this block may be performed by the described components of plasma processing system 100 .

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US10773282B2 (en) 2020-09-15
TW201801179A (zh) 2018-01-01

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