US20160351532A1 - Alignment method, method for connecting electronic component, method for manufacturing connection body, connection body and anisotropic conductive film - Google Patents

Alignment method, method for connecting electronic component, method for manufacturing connection body, connection body and anisotropic conductive film Download PDF

Info

Publication number
US20160351532A1
US20160351532A1 US15/117,326 US201515117326A US2016351532A1 US 20160351532 A1 US20160351532 A1 US 20160351532A1 US 201515117326 A US201515117326 A US 201515117326A US 2016351532 A1 US2016351532 A1 US 2016351532A1
Authority
US
United States
Prior art keywords
alignment mark
side alignment
substrate
conductive particles
component
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
US15/117,326
Other languages
English (en)
Inventor
Yasushi Akutsu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Dexerials Corp
Original Assignee
Dexerials Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Dexerials Corp filed Critical Dexerials Corp
Assigned to DEXERIALS CORPORATION reassignment DEXERIALS CORPORATION ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: AKUTSU, YASUSHI
Publication of US20160351532A1 publication Critical patent/US20160351532A1/en
Abandoned legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • CCHEMISTRY; METALLURGY
    • C09DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09DCOATING COMPOSITIONS, e.g. PAINTS, VARNISHES OR LACQUERS; FILLING PASTES; CHEMICAL PAINT OR INK REMOVERS; INKS; CORRECTING FLUIDS; WOODSTAINS; PASTES OR SOLIDS FOR COLOURING OR PRINTING; USE OF MATERIALS THEREFOR
    • C09D163/00Coating compositions based on epoxy resins; Coating compositions based on derivatives of epoxy resins
    • CCHEMISTRY; METALLURGY
    • C09DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09JADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J7/00Adhesives in the form of films or foils
    • C09J7/10Adhesives in the form of films or foils without carriers
    • CCHEMISTRY; METALLURGY
    • C09DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09JADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J9/00Adhesives characterised by their physical nature or the effects produced, e.g. glue sticks
    • C09J9/02Electrically-conducting adhesives
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1345Conductors connecting electrodes to cell terminals
    • G02F1/13452Conductors connecting driver circuitry and terminals of panels
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/544Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0266Marks, test patterns or identification means
    • H05K1/0269Marks, test patterns or identification means for visual or optical inspection
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/321Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by conductive adhesives
    • H05K3/323Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by conductive adhesives by applying an anisotropic conductive adhesive layer over an array of pads
    • CCHEMISTRY; METALLURGY
    • C08ORGANIC MACROMOLECULAR COMPOUNDS; THEIR PREPARATION OR CHEMICAL WORKING-UP; COMPOSITIONS BASED THEREON
    • C08KUse of inorganic or non-macromolecular organic substances as compounding ingredients
    • C08K2201/00Specific properties of additives
    • C08K2201/001Conductive additives
    • CCHEMISTRY; METALLURGY
    • C09DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09JADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J171/00Adhesives based on polyethers obtained by reactions forming an ether link in the main chain; Adhesives based on derivatives of such polymers
    • C09J171/08Polyethers derived from hydroxy compounds or from their metallic derivatives
    • C09J171/10Polyethers derived from hydroxy compounds or from their metallic derivatives from phenols
    • C09J171/12Polyphenylene oxides
    • CCHEMISTRY; METALLURGY
    • C09DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09JADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J2203/00Applications of adhesives in processes or use of adhesives in the form of films or foils
    • C09J2203/326Applications of adhesives in processes or use of adhesives in the form of films or foils for bonding electronic components such as wafers, chips or semiconductors
    • CCHEMISTRY; METALLURGY
    • C09DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09JADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J2301/00Additional features of adhesives in the form of films or foils
    • C09J2301/40Additional features of adhesives in the form of films or foils characterized by the presence of essential components
    • C09J2301/408Additional features of adhesives in the form of films or foils characterized by the presence of essential components additives as essential feature of the adhesive layer
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/13306Circuit arrangements or driving methods for the control of single liquid crystal cells
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/133302Rigid substrates, e.g. inorganic substrates
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/133354Arrangements for aligning or assembling substrates
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1339Gaskets; Spacers; Sealing of cells
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1343Electrodes
    • G02F1/134309Electrodes characterised by their geometrical arrangement
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1343Electrodes
    • G02F1/13439Electrodes characterised by their electrical, optical, physical properties; materials therefor; method of making
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1345Conductors connecting electrodes to cell terminals
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2202/00Materials and properties
    • G02F2202/28Adhesive materials or arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544Marks applied to semiconductor devices or parts
    • H01L2223/5442Marks applied to semiconductor devices or parts comprising non digital, non alphanumeric information, e.g. symbols
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544Marks applied to semiconductor devices or parts
    • H01L2223/54426Marks applied to semiconductor devices or parts for alignment
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544Marks applied to semiconductor devices or parts
    • H01L2223/54473Marks applied to semiconductor devices or parts for use after dicing
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544Marks applied to semiconductor devices or parts
    • H01L2223/54473Marks applied to semiconductor devices or parts for use after dicing
    • H01L2223/54486Located on package parts, e.g. encapsulation, leads, package substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001Core members of the bump connector
    • H01L2224/13099Material
    • H01L2224/131Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/13144Gold [Au] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/16227Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/27Manufacturing methods
    • H01L2224/27001Involving a temporary auxiliary member not forming part of the manufacturing apparatus, e.g. removable or sacrificial coating, film or substrate
    • H01L2224/27003Involving a temporary auxiliary member not forming part of the manufacturing apparatus, e.g. removable or sacrificial coating, film or substrate for holding or transferring the layer preform
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/27Manufacturing methods
    • H01L2224/273Manufacturing methods by local deposition of the material of the layer connector
    • H01L2224/2733Manufacturing methods by local deposition of the material of the layer connector in solid form
    • H01L2224/27334Manufacturing methods by local deposition of the material of the layer connector in solid form using preformed layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29005Structure
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/2901Shape
    • H01L2224/29016Shape in side view
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29075Plural core members
    • H01L2224/2908Plural core members being stacked
    • H01L2224/29082Two-layer arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/2919Material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29199Material of the matrix
    • H01L2224/2929Material of the matrix with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298Fillers
    • H01L2224/29299Base material
    • H01L2224/293Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29301Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/29311Tin [Sn] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298Fillers
    • H01L2224/29299Base material
    • H01L2224/293Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29301Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/29316Lead [Pb] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298Fillers
    • H01L2224/29299Base material
    • H01L2224/293Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29317Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/29324Aluminium [Al] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298Fillers
    • H01L2224/29299Base material
    • H01L2224/293Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29338Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/29339Silver [Ag] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298Fillers
    • H01L2224/29299Base material
    • H01L2224/293Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29338Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/29344Gold [Au] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298Fillers
    • H01L2224/29299Base material
    • H01L2224/293Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29338Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/29347Copper [Cu] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298Fillers
    • H01L2224/29299Base material
    • H01L2224/293Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29338Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/29355Nickel [Ni] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298Fillers
    • H01L2224/29299Base material
    • H01L2224/293Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29338Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/29357Cobalt [Co] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298Fillers
    • H01L2224/29299Base material
    • H01L2224/293Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29338Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/2936Iron [Fe] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298Fillers
    • H01L2224/29299Base material
    • H01L2224/293Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29363Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298Fillers
    • H01L2224/29299Base material
    • H01L2224/293Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29363Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/29371Chromium [Cr] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298Fillers
    • H01L2224/29299Base material
    • H01L2224/29386Base material with a principal constituent of the material being a non metallic, non metalloid inorganic material
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298Fillers
    • H01L2224/29299Base material
    • H01L2224/29386Base material with a principal constituent of the material being a non metallic, non metalloid inorganic material
    • H01L2224/29387Ceramics, e.g. crystalline carbides, nitrides or oxides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298Fillers
    • H01L2224/29299Base material
    • H01L2224/29386Base material with a principal constituent of the material being a non metallic, non metalloid inorganic material
    • H01L2224/29388Glasses, e.g. amorphous oxides, nitrides or fluorides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298Fillers
    • H01L2224/29299Base material
    • H01L2224/2939Base material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298Fillers
    • H01L2224/29299Base material
    • H01L2224/29393Base material with a principal constituent of the material being a solid not provided for in groups H01L2224/293 - H01L2224/29391, e.g. allotropes of carbon, fullerene, graphite, carbon-nanotubes, diamond
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298Fillers
    • H01L2224/29399Coating material
    • H01L2224/294Coating material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73203Bump and layer connectors
    • H01L2224/73204Bump and layer connectors the bump connector being embedded into the layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/757Means for aligning
    • H01L2224/75753Means for optical alignment, e.g. sensors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8112Aligning
    • H01L2224/81121Active alignment, i.e. by apparatus steering, e.g. optical alignment using marks or sensors
    • H01L2224/8113Active alignment, i.e. by apparatus steering, e.g. optical alignment using marks or sensors using marks formed on the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8112Aligning
    • H01L2224/81121Active alignment, i.e. by apparatus steering, e.g. optical alignment using marks or sensors
    • H01L2224/81132Active alignment, i.e. by apparatus steering, e.g. optical alignment using marks or sensors using marks formed outside the semiconductor or solid-state body, i.e. "off-chip"
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8119Arrangement of the bump connectors prior to mounting
    • H01L2224/81191Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed only on the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/812Applying energy for connecting
    • H01L2224/81201Compression bonding
    • H01L2224/81203Thermocompression bonding, e.g. diffusion bonding, pressure joining, thermocompression welding or solid-state welding
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/819Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector with the bump connector not providing any mechanical bonding
    • H01L2224/81901Pressing the bump connector against the bonding areas by means of another connector
    • H01L2224/81903Pressing the bump connector against the bonding areas by means of another connector by means of a layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/831Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus
    • H01L2224/83101Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus as prepeg comprising a layer connector, e.g. provided in an insulating plate member
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8312Aligning
    • H01L2224/83121Active alignment, i.e. by apparatus steering, e.g. optical alignment using marks or sensors
    • H01L2224/8313Active alignment, i.e. by apparatus steering, e.g. optical alignment using marks or sensors using marks formed on the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8312Aligning
    • H01L2224/83121Active alignment, i.e. by apparatus steering, e.g. optical alignment using marks or sensors
    • H01L2224/83132Active alignment, i.e. by apparatus steering, e.g. optical alignment using marks or sensors using marks formed outside the semiconductor or solid-state body, i.e. "off-chip"
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319Arrangement of the layer connectors prior to mounting
    • H01L2224/83192Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/832Applying energy for connecting
    • H01L2224/83201Compression bonding
    • H01L2224/83203Thermocompression bonding, e.g. diffusion bonding, pressure joining, thermocompression welding or solid-state welding
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8338Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/83399Material
    • H01L2224/83486Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838Bonding techniques
    • H01L2224/8385Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • H01L2224/83851Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester being an anisotropic conductive adhesive
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838Bonding techniques
    • H01L2224/8385Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • H01L2224/83855Hardening the adhesive by curing, i.e. thermosetting
    • H01L2224/83862Heat curing
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838Bonding techniques
    • H01L2224/8385Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • H01L2224/83855Hardening the adhesive by curing, i.e. thermosetting
    • H01L2224/83874Ultraviolet [UV] curing
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838Bonding techniques
    • H01L2224/8385Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • H01L2224/83885Combinations of two or more hardening methods provided for in at least two different groups from H01L2224/83855 - H01L2224/8388, e.g. for hybrid thermoplastic-thermosetting adhesives
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92Specific sequence of method steps
    • H01L2224/921Connecting a surface with connectors of different types
    • H01L2224/9211Parallel connecting processes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10Bump connectors ; Manufacturing methods related thereto
    • H01L24/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L24/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10Bump connectors ; Manufacturing methods related thereto
    • H01L24/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L24/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/27Manufacturing methods
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/75Apparatus for connecting with bump connectors or layer connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/91Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L24/80 - H01L24/90
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/91Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L24/80 - H01L24/90
    • H01L24/92Specific sequence of method steps
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/16Inspection; Monitoring; Aligning
    • H05K2203/166Alignment or registration; Control of registration

Definitions

  • the present disclosure relates to an alignment method of an electronic component and a circuit substrate, and more particularly relates to an alignment method of an electronic component and a circuit substrate, a method for connecting an electronic component, a method for manufacturing a connection body, a connection body and an anisotropic conductive film for connecting the electronic component to the circuit substrate via an adhesive agent containing conductive particles.
  • the liquid crystal driver IC 103 has connecting terminals 104 corresponding to the transparent electrodes 102 formed onto the mounting surface thereof and is thermocompression-bonded onto the transparent substrate 101 via an anisotropic conductive film 105 , thereby connecting the connecting terminals 104 to the transparent electrodes 102 .
  • the anisotropic conductive film 105 contains a binder resin into which conductive particles are dispersed, and is film-formed, and by being thermocompression-bonded between two conductors, electrical conduction between the conductors is achieved by the conductive particles and mechanical connection between the conductors is ensured between the conductors by the binder resin.
  • the adhesive agent constituting the anisotropic conductive film 105 although typically a highly reliable thermosetting binder resin is used, may be a photosetting binder resin or a thermo/photosetting binder resin.
  • the anisotropic conductive film 105 is first temporarily bonded onto the transparent electrodes 102 of the transparent substrate 101 by a temporary pressure bonding means which is not illustrated in the drawings.
  • a thermocompression bonding means for example, a thermocompression bonding head 106 , is used to hot-press the liquid crystal driver IC 103 along with the anisotropic conductive film 105 towards the transparent substrate 102 .
  • Heat applied by the thermocompression bonding head 106 causes a thermosetting reaction in the anisotropic conductive film 105 , thereby connecting the liquid crystal driver IC 103 onto the transparent electrodes 102 .
  • a camera disposed on the back surface-side of the transparent substrate 101 is used to capture an image of alignment marks provided on both the transparent substrate 101 and the mounting surface of the liquid crystal driver IC 103 , positioning is determined on the basis of the captured image and the substrate and electronic component are moved on the basis of this determination.
  • image processing such as gray search or binary methods, it is possible to obtain positioning information.
  • PLT 1 Japanese Unexamined Patent Application Publication No. 2005-26577
  • the alignment mark is further from the connection positions of the electrode terminals and is insufficient for improvements in alignment accuracy for fine-pitched electrode terminal intervals; furthermore, providing the alignment mark outside of mounting areas on the circuit substrate constrains pattern designs.
  • an object of the present disclosure is to provide an alignment method, a method for connecting an electronic component, a method for manufacturing a connection body, a connection body, and an anisotropic conductive film for COG connection processes using anisotropic conductive film having conductive particles filled at a high density in which alignment marks are provided in areas overlapping pasting areas of the anisotropic conductive film while allowing high-accuracy alignment using images captured by a camera.
  • an alignment method comprises mounting an electronic component having a component-side alignment mark onto a surface of a transparent substrate having a substrate-side alignment mark via an adhesive agent containing conductive particles interposed therebetween; imaging the substrate-side alignment mark and the electronic component-side alignment mark from the back surface side of the transparent substrate; and adjusting a position of the substrate-side alignment mark and the component-side alignment mark by using a captured image obtained by imaging to adjust a mounting position of the electronic component with respect to the transparent substrate; wherein the adhesive agent has the conductive particles arranged regularly as viewed from a planar perspective; and wherein in the captured image, outside edges of the substrate-side alignment mark or the component-side alignment mark exposed between the conductive particles are intermittently visible as line segments along imaginary line segments of the outside edges of the substrate-side alignment mark or the component-side alignment mark.
  • a method for connecting an electronic component comprises mounting an electronic component having a component-side alignment mark onto a surface of a transparent substrate having a substrate-side alignment mark via an adhesive agent containing conductive particles interposed therebetween; imaging the substrate-side alignment mark and the electronic component-side alignment mark from the back surface side of the transparent substrate; and adjusting a position of the substrate-side alignment mark and the component-side alignment mark by using a captured image obtained by imaging to adjust a mounting position of the electronic component with respect to the transparent substrate before connecting the electronic component; wherein the adhesive agent has the conductive particles arranged regularly as viewed from a planar perspective; and wherein in the captured image, outside edges of the substrate-side alignment mark or the component-side alignment mark exposed between the conductive particles are intermittently visible as line segments along imaginary line segments of the outside edges of the substrate-side alignment mark or the component-side alignment mark.
  • a method for manufacturing a connection body comprises mounting an electronic component having a component-side alignment mark onto a surface of a transparent substrate having a substrate-side alignment mark via an adhesive agent containing conductive particles interposed therebetween; imaging the substrate-side alignment mark and the electronic component-side alignment mark from the back surface side of the transparent substrate; and adjusting a position of the substrate-side alignment mark and the component-side alignment mark by using a captured image obtained by imaging to adjust a mounting position of the electronic component with respect to the transparent substrate before connecting the electronic component to manufacture a connection body in which the electronic component is connected to the transparent substrate; wherein the adhesive agent has the conductive particles arranged in a regular pattern as viewed from a planar perspective; and wherein in the captured image, outside edges of the substrate-side alignment mark or the component-side alignment mark exposed between the conductive particles are intermittently visible as line segments along imaginary line segments of the outside edges of the substrate-side alignment mark or the component-side alignment mark.
  • connection body according to the present disclosure is manufactured by the method described above.
  • an anisotropic conductive film according to the present disclosure comprises conductive particles arranged regularly as viewed from a planar perspective; wherein area density of the conductive particles is less than 50% per unit area.
  • the conductive particles are arranged in a regular arrangement as viewed from a planar perspective, even in the case of the conductive particles overlapping the imaginary line segments, the alignment marks exposed between the conductive particles are intermittently visible as line segments on outside edges. Therefore, outside edges of the alignment mark can be accurately recognized from a contrast or color difference at boundaries of these intermittently appearing line segments and position coordinates of the electronic component with respect to the transparent substrate can be discerned with a high accuracy by using a selected image processing. Thereby, even in the case of imaging an alignment mark via an adhesive agent filled at a high density with the conductive particles, high-accuracy position detection is enabled.
  • FIG. 1 is a cross-sectional view illustrating one example of a connection body of a liquid crystal display panel.
  • FIG. 2 is a cross-sectional view illustrating an alignment step of a liquid crystal driver IC and a transparent substrate.
  • FIG. 3 is a view illustrating an IC-side alignment mark and a substrate-side alignment mark in a state in which alignment is correct.
  • FIG. 4 is a cross-sectional view illustrating an anisotropic conductive film.
  • FIG. 5 is a plan view illustrating an anisotropic conductive film in which conductive particles are regularly arranged in a grid pattern.
  • FIG. 6 is a view illustrating an image of an imaging camera in an alignment method according to the present disclosure.
  • FIG. 7 is a view illustrating an image of am imaging camera in an alignment method using an anisotropic conductive film in which conductive particles are randomly arranged.
  • FIG. 8 is a cross-sectional view illustrating a step in which an IC chip is connected to a transparent substrate of a liquid crystal display panel.
  • a liquid crystal display panel 10 in which two transparent substrates 11 , 12 made from a material such as a glass substrate are arranged in opposition and these transparent substrates 11 , 12 are joined together by a seal 13 which is frame-shaped.
  • a panel display component 15 is then formed by sealing a liquid crystal 14 within a space enclosed by the transparent substrates 11 , 12 .
  • a pair of transparent electrodes 16 , 17 are formed from, for example, ITO (indium tin oxide) in a stripe pattern in mutually intersecting directions. Both of the transparent electrodes 16 , 17 are configured so that a pixel, as the minimum unit of the liquid crystal display, is constituted by intersecting portions of both of the transparent electrodes 16 , 17 .
  • one transparent substrate 12 is formed to be larger than the other transparent substrate 11 in planar dimensions, and in an edge area 12 a of the transparent substrate 12 formed to be larger, a COG mounting portion 20 is provided on which a liquid crystal driver IC 18 is mounted as the electronic component.
  • a substrate-side alignment mark 21 is provided which is to be superimposed with an IC-side alignment mark 22 provided on the liquid crystal driver IC 18 .
  • the liquid crystal driver IC 18 by selectively applying a liquid crystal driving voltage to the pixel, can partially change liquid crystal orientation to perform a selected liquid crystal display.
  • the liquid crystal driver IC 18 has a mounting surface 18 a which faces the transparent substrate 12 and on which electrode terminals 19 are formed for electrically connecting to terminal portions 17 a of the transparent substrate 17 .
  • the IC-side alignment mark 22 is formed for performing alignment with respect to the transparent substrate 12 by superimposition with the substrate-side alignment mark 21 .
  • the substrate-side alignment mark 21 and the IC-side alignment mark 22 comprise, for example, an outer mark and an inner mark to be positioned within the outer mark.
  • an outer mark 21 a is formed as the substrate-side alignment mark 21 in a square shape having a square-shaped open area;
  • an inner mark 22 a is formed as the IC-side alignment mark 22 in a square shape capable of fitting within the square-shaped open area of the outer mark 21 a.
  • the liquid crystal driver IC 18 by moving the liquid crystal driver IC 18 so that the inner mark 22 a fits within the square-shaped open area of the outer mark 21 a , the terminal portions 17 a of the transparent electrodes 17 formed on the transparent substrate 12 and the electrode terminals 19 formed on the mounting surface 18 a of the liquid crystal driver IC 18 are aligned.
  • the substrate-side alignment mark 21 and the IC-side alignment mark 22 in addition to inner and outer marks, a variety of marks can be used which can be combined together to align the transparent substrate 12 and the liquid crystal driver IC 18 . Furthermore, dimensions of the substrate-side alignment mark 21 and the IC-side alignment mark 22 are without particular limitation and can be formed, for example, having 100 to 300 ⁇ m square dimensions.
  • the substrate-side alignment mark 21 and IC-side alignment mark 22 are without particular limitation and a variety of those known can be used. Still further, pluralities of both of the substrate-side alignment mark 21 and the IC-side alignment mark 22 may be provided to facilitate high-accuracy two-dimensional alignment. These pluralities of alignment marks may have different shapes. Differing shapes facilitate recognition. Moreover, visibility may be improved in the substrate-side alignment mark 21 and IC-side alignment mark 22 by applying color.
  • the terminal portion 17 a of the transparent electrode 17 is formed on the COG mounting portion 20 .
  • the liquid crystal driver IC 18 is connected by using an anisotropic conductive film 1 as a circuit connecting adhesive agent.
  • the anisotropic conductive film 1 contains conductive particles 4 and is for electrically connecting, via the conductive particles 4 , the electrode terminals 19 of the liquid crystal driver IC 18 to the terminal portions 17 a of the transparent electrodes 17 formed on the edge area 12 a of the transparent substrate 12 .
  • anisotropic conductive film 1 a binder resin flows due to thermocompression bonding with the thermocompression bonding head 33 and the conductive particles 4 are deformed between the terminal portions 17 a and the electrode terminals 19 of the liquid crystal driver IC 18 and the binder resin is cured in this state.
  • the anisotropic conductive film 1 thus mechanically and electrically connects the transparent substrate 12 and the liquid crystal driver IC 18 .
  • an orientation film 24 that is subjected to a predetermined rubbing treatment is formed and an initial orientation of the liquid crystal molecules is regulated by this orientation film 24 .
  • a pair of polarizing plates 25 , 26 are disposed on the outer surfaces of the transparent substrates 11 , 12 ; these polarizing plates 25 , 26 regulate the wave-direction of transmitted light from a light source such as a backlight (not illustrated).
  • anisotropic Conductive Film 1 In the anisotropic conductive film (ACF) 1 , as illustrated in FIG. 4 , typically, a binder resin layer (adhesive layer) 3 containing the conductive particles 4 is formed on a release-treated film 2 serving as a matrix material.
  • ACF anisotropic conductive film
  • the anisotropic conductive film 1 is an adhesive agent of a thermosetting-type or a photocurable-type such as by ultraviolet light and is pasted onto the transparent electrodes 17 , which are formed on the transparent substrate 12 of the liquid crystal display panel 10 , along with mounting the liquid crystal driver IC 18 ; flowing is caused by thermocompression-bonding by the thermocompression bonding head 33 and the conductive particles 4 are deformed between the terminal portions 17 a of the respectively opposing transparent electrodes 17 and the electrode terminals 19 of the liquid crystal driver IC 18 ; heat is then applied or ultraviolet light is irradiated in order to cure the resin in a state in which the conductive particles are deformed.
  • a thermosetting-type or a photocurable-type such as by ultraviolet light
  • the conductive particles 4 are arranged regularly in a predetermined pattern.
  • the release-treated film 2 for supporting the binder resin layer is formed by coating, for example, PET (polyethylene terephthalate), OPP (oriented polypropylene), PMP (poly-4-methylpentene-1), PTFE (polytetrafluoroethylene), among others, with a release agent such as silicone, and is for preventing drying of the anisotropic conductive film 1 and maintaining the shape of the anisotropic conductive film 1 .
  • PET polyethylene terephthalate
  • OPP oriented polypropylene
  • PMP poly-4-methylpentene-1
  • PTFE polytetrafluoroethylene
  • a resin having an average molecular weight of approximately 10,000 to 80,000 is preferably used as the film-forming resin contained by the binder resin layer 3 .
  • film forming resin include epoxy resin, modified epoxy resin, urethane resin and phenoxy resin, among a variety of other resins. Among these, in view of such properties as film-formed state and connection reliability, a phenoxy resin is particularly preferable.
  • thermosetting resins examples include commercially available epoxy resins and acrylic resins.
  • epoxy resin examples include, without particular limitation, naphthalene-type epoxy resin, biphenol-type epoxy resin, phenol-novolac type epoxy resin, bisphenol type epoxy resin, stilbene-type epoxy resin, triphenolmethane-type epoxy resin, phenol aralkyl-type epoxy resin, naphthol-type epoxy resin, dicyclopentadiene-type epoxy resin and triphenylmethane-type epoxy resin, among others. These may be used individually or in a combination of two or more.
  • Acrylic resin is without particular limitation and an acrylic compound and/or a liquid acrylate, among others, may be selected as appropriate according to purpose. Examples include methyl acrylate, ethyl acrylate, isopropyl acrylate, isobutyl acrylate, epoxy acrylate, ethylene glycol diacrylate, diethylene glycol diacrylate, trimethylol propane triacrylate, dimethylol tricyclodecane diacrylate, tetramethylene glycol tetraacrylate, 2-hydroxy-1,3-diacryloxy propane, 2,2-bis[4-(acryloxy) phenyl] propane, 2,2-bis[4-(acryloxy ethoxy) phenyl] propane, dicyclopentenyl acrylate, tricyclodecanyl acrylate, tris(acryloxyethyl) isocyanurate, urethane acrylate and epoxy acrylate, among others. It should be noted that methacrylate may be substituted for acrylate. These may be used individually or in
  • the latent curing agent is without particular limitation and examples include thermosetting and UV-curing types, among a variety of other types of curing agents.
  • the latent curing agent does not react under normal conditions and a trigger including heat, light and/or pressure, among others, for activation/initiating a reaction can be selected according to need.
  • Existing methods for activating a heat activated latent curing agent include methods in which active species (cations, anions and/or radicals) are generated by a dissociative reaction due to heat, methods in which the curing agent is stably dispersed in the epoxy resin, the curing agent becomes compatible with and dissolves in the epoxy resin at high temperatures and the curing reaction is initiated, methods in which a molecular sieve enclosed type curing agent is dissolved at a high temperature to initiate the curing reaction and methods in which microcapsules are dissolved to cure, among other methods.
  • latent curing agents examples include imidazole-type, hydrazide-type, boron trifluoride-amine complexes, sulfonium salt, aminimide, polyamine salt and dicyandiamide, among others, and modified compounds of these; these may be used individually or in a combination of two or more.
  • a microcapsule imidazole-type latent curing agent is particularly suitable.
  • the silane coupling agent is without particular limitation and examples include epoxy-type, amino-type, mercapto sulfide-type, and ureido-type, among others. By adding the silane coupling agent, adhesion properties at interfaces between organic and inorganic materials can be improved.
  • Examples of conductive particles 4 usable in the anisotropic conductive film 1 include known conductive particles used in anisotropic conductive films.
  • examples include particles of metals or metal alloys such as those of nickel, iron, copper, aluminum, tin, lead, chromium, cobalt, silver or gold and particles such as those of metal oxides, carbon, graphite, glass, ceramics and plastics coated with metal, or these particles having a further coating of a thin electrically-insulating film, among others.
  • examples of usable resin particles include phenol resin, acrylic resin, acrylonitrile-styrene (AS) resin, benzoguanamine resin, divinylbenzene-type resin and styrene-type resin particles, among others.
  • the conductive particles 4 are regularly arranged in a predetermined array pattern as viewed from a planar perspective which is, for example as illustrated in FIG. 5 , a uniformly spaced grid array.
  • a planar perspective which is, for example as illustrated in FIG. 5 , a uniformly spaced grid array.
  • the uniformly spaced array pattern arrangement of the conductive particles 4 can be selected from, for example, tetragonal lattice and hexagonal lattice patterns, among others. So as not to inhibit visibility, the conductive particles 4 may be dispersed within a single, same layer; however, in view of ensuring visibility, the conductive particles 4 are preferably arranged in an array.
  • the alignment step is described in detail further below.
  • the anisotropic conductive film 1 regularly arranging the conductive particles 4 prevents unevenness in density due to agglomeration of the conductive particles 4 , even in the case of filling the binder resin layer 3 at a high density. Therefore, in the anisotropic conductive film 1 , the conductive particles 4 can be trapped even in the case of the terminal portion 17 a and the electrode terminals 19 having reduced pitches, and short circuits caused by aggregation of the conductive particles 4 can be prevented between terminals even in the case of narrowed distances between adjacent electrodes.
  • an area density of the conductive particles 4 per unit area is less than 50%, more preferably 45% or less, still more preferably 40% or less, and yet more preferably 35% or less. If the density of the conductive particles 4 exceeds this area density, transmittance is lowered by the conductive particles 4 and visibility of the alignment marks 21 , 22 through the anisotropic conductive film 1 cannot be ensured.
  • Such an anisotropic conductive film 1 can be manufactured by, for example, arranging the conductive particles 4 in a selected array pattern on a substrate before transferring the conductive particles 4 to the binder resin layer 3 supported by the release-treated film 2 , or supplying the conductive particles 4 via an arrangement plate, on which openings are provided corresponding to the array pattern, to the binder resin layer 3 supported by the release-treated film 2 .
  • the shape of the anisotropic conductive film 1 is without particular limitation, and, for example, as illustrated in FIG. 4 , can be a long, tape shape windable in a winding reel 6 that can be used by cutting to a selected length.
  • the anisotropic conductive film 1 a film-formed adhesive film made of a thermosetting resin composition containing the binder resin layer 3 in which the conductive particles 4 are dispersed is described as an example; however, the adhesive agent according to the present disclosure is not limited thereto, and, for example, a configuration is possible in which an insulating adhesive agent layer containing only the binder resin layer 3 is laminated with a conductive particle-containing layer containing the binder resin layer 3 which contains the conductive particles 4 . Furthermore, in the anisotropic conductive film 1 , so long as the conductive particles 4 are arranged regularly as viewed from a planar perspective, in addition to being arranged regularly in a single layer as illustrated in FIG.
  • the conductive particles 4 may be arranged regularly in an array as viewed from a planar perspective in a plurality of binder resin layers 3 . Moreover, in at least one layer in a multilayer configuration of the anisotropic conductive film 1 , the conductive particles 4 may be dispersed at a single, selected distance.
  • the anisotropic conductive film 1 is temporarily pressure bonded onto the transparent electrodes 17 .
  • the anisotropic conductive film 1 is positioned on the transparent electrodes 17 of the transparent substrate 12 so that the binder resin layer 3 is on the transparent electrode 17 side.
  • thermocompression head After arranging the binder resin layer 3 on the transparent electrodes 17 , heat and pressure are applied to the binder resin layer 3 from the release-treated film 2 side by a temporary pasting-use thermocompression head, the thermocompression head is removed from the release-treated film 2 , and the release-treated film 2 is peeled from the binder resin layer 3 that is on the transparent electrodes 17 so that only the binder resin layer 3 is temporarily pasted on the transparent electrodes 17 .
  • Temporary pressure bonding with the thermocompression head is performed by applying a light pressure (for example approximately 0.1 to 2 MPa) to the top surface of the release-treated film 2 towards the transparent electrodes 17 while heating (for example at approximately 70 to 100° C.).
  • the transparent substrate 12 having the binder resin layer temporarily pasted thereon is placed onto a transparent stage 31 ; the transparent substrate 12 and the liquid crystal driver IC 18 are aligned so that the transparent electrodes 17 of the transparent substrate 12 and the electrode terminals 19 of the liquid crystal driver IC 18 face each other with the binder resin layer 3 interposing therebetween.
  • an imaging camera 30 disposed on the back surface-side of the transparent substrate 12 is used to capture an image of the alignment marks 21 , 22 provided respectively on the transparent substrate 12 and the mounting surface 18 a of the liquid crystal driver IC 18 , positioning is determined on the basis of the captured image and the liquid crystal driver IC 18 is moved on the basis of this determination.
  • image processing such as gray search or binary methods, it is possible to obtain positioning information.
  • the substrate-side alignment mark 21 is imaged through the transparent stage 31 and the transparent substrate 12
  • the IC-side alignment mark 22 is imaged through the transparent stage 31 , the transparent substrate 12 and the binder resin layer 3 in which the conductive particles 4 are arranged in an array at a high density.
  • a contrast difference is generated at boundaries of the outside edges between a side in which an alignment mark is provided and a side in which an alignment mark is not provided; alignment-mark position, and thus the position of the liquid crystal driver IC 18 with respect to the transparent substrate 12 , can be determined on the basis of this contrast difference.
  • the substrate-side alignment mark 21 and the IC-side alignment mark 22 exposed between the conductive particles 4 are intermittently visible as line segments S along imaginary line segments constituting the outside edges of the substrate-side alignment mark 21 or the IC-side alignment mark 22 .
  • the anisotropic conductive film 1 by area density of conductive particles 4 , which are arranged regularly, per unit area being less than 50%, transmittance of the anisotropic conductive film 1 and visibility of the alignment marks 21 , 22 can be ensured.
  • unit area per conductive particle is preferably 0.7 to 1,300 ⁇ m 2 , more preferably 1.8 to 750 ⁇ m 2 and still more preferably 4.2 to 350 ⁇ m 2 .
  • Number density of the conductive particles 4 is preferably 50 to 450,000 particles/mm 2 , more preferably 300 to 300,000 particles/mm 2 and still more preferably 500 to 120,000 particles/mm 2 .
  • unit area is preferably an area of approximately 0.7 ⁇ 0.7 mm, more preferably an area of approximately 1 ⁇ 1 mm and still more preferably an area of approximately 2 mm ⁇ 2 mm.
  • the imaginary line segments constituting the outside edges of each of the alignment marks 21 , 22 are line segments constituting the outside edges of the alignment marks 21 , 22 which are deduced from contrast appearing between locations in which the alignment marks 21 , 22 are formed and locations in which the alignment marks 21 , 22 are not formed.
  • the conductive particles 4 arranged at a high density overlapping each other above the imaginary line segments because the outlines of the relevant conductive particles 4 also generate a contrast difference, it is impossible to perceive the outside edge of the alignment mark 21 and 22 as a continuous line and it is impossible to correctly detect positioning using only the imaginary line segments. Particularly, as illustrated in FIG.
  • the conductive particles 4 agglomerate in portions and, in the case of these agglomerated particles overlapping the outside edges of the alignment marks 21 , 22 , recognizing the imaginary line segments is difficult.
  • the substrate-side alignment mark 21 and the IC-side alignment mark 22 exposed between the conductive particles 4 are intermittently visible as line segments S along imaginary line segments on the outside edges of the substrate-side alignment mark 21 or the IC-side alignment mark 22 .
  • the line segments S which appear intermittently can be accurately recognized, the outside edges of the substrate-side alignment mark 21 and the IC-side alignment mark 22 can be discerned and position coordinates of the liquid crystal driver IC 18 with respect to the transparent substrate 12 can be identified with a high accuracy using a desired image processing such as gray search or binary method. Subsequently, by referring to the coordinate data of the transparent electrodes 17 of the transparent substrate 12 and the electrode terminals 19 of the liquid crystal driver IC 18 , position of the liquid crystal driver IC 18 with respect to the transparent substrate 12 is adjusted.
  • the substrate-side alignment mark 21 is arranged at a position nearly overlapping the IC-side alignment mark 22 so that alignment can be performed with the both alignment marks 21 , 22 having a predetermined positional relationship. Therefore, the terminal portions 17 a of the transparent electrodes 17 and the electrode terminals 19 of the liquid crystal driver IC 18 having reduced pitches can be aligned with a high accuracy.
  • the line segments S exposed between the conductive particles 4 on outside edges of the alignment marks 21 , 22 are not required to each have the same length.
  • a solid state image sensor such as a CCD may be used.
  • the line segments of the outside edges exposed between the conductive particles 4 can be discerned.
  • lengths of the line segments S of the alignment marks 21 , 22 exposed between the conductive particles 4 have lengths of approximately several tens to several hundreds of micrometers. Furthermore, the line segments S exposed between the conductive particles 4 on outside edges of the alignment marks 21 , 22 have a length allowing recognition as line segments, and if total length of the line segments in the captured image is 25% or more and preferably 33% or more of the length of imaginary line segments, the outside edges of the alignment marks 21 , 22 can be discerned. This is because the conductive particles 4 arranged in an array make it possible to practically recognize the interrupted line segment as a line obtained by extending the line segment.
  • the conductive particles 4 being present in a single and same layer, in other words, within a single and same plane, at a selected single distance, can achieve an effect similar to the above; however, arrangement in an array makes the above recognition predictable, leading to an advantageous effect in simplifying software processing. Then, using the captured image, by performing a selected image processing, position coordinates of the liquid crystal driver IC 18 with respect to the transparent substrate 12 can be identified with high accuracy.
  • area between the conductive particles 4 is more than 50%, preferably 55% or more, more preferably 60% or more and still more preferably 65% or more; thus, area occupied by the conductive particles 4 is less than 50%, preferably 45% or less, more preferably 40% or less, and still more preferably 35% or less. If the particles 4 are arranged to exceed this density, in the image captured by the imaging camera 30 , recognizing the line segments S exposed between the conductive particles 4 from the contrast difference at boundaries and to discern them as the outside edges of the alignment marks 21 , 22 is difficult, thereby precluding high-accuracy position detection.
  • the liquid crystal driver IC 18 is thermocompression-bonded from above.
  • the binder resin of the anisotropic conductive film 1 thus exhibits flowability, and, while the binder resin flows from between the electrode terminals 19 of the liquid crystal driver IC 18 and the terminal portions 17 a of the transparent substrate 12 , the conductive particles 4 within the binder resin layer 3 are sandwiched and deformed between the electrode terminals 19 and the terminal portions 17 a.
  • the electrode terminals 19 of the liquid crystal driver IC 18 and the terminal portions 17 a of the transparent substrate 12 are electrically connected via the conductive particles 4 and, in this state, the binder resin 3 is cured by heating with a compression bonding tool.
  • the conductive particles 4 which are not between the electrode terminals 19 and the terminal portions 17 a are dispersed within the binder resin and are maintained in an electrically insulated state. Electrical conduction between only the electrode terminals 19 and the terminal portions 17 a is thus achievable.
  • the anisotropic conductive film 1 is not limited to thermosetting types and as long as pressure can be used in connection, a photosetting type or a thermo/photosetting type adhesive agent can be used.
  • anisotropic conductive films in which conductive particles were regularly arranged and anisotropic conductive films in which conductive particles were randomly arranged were used to manufacture sample connection bodies in which an evaluation-use IC was connected to an evaluation-use glass substrate, and inter-electrode positional deviation and short-circuit occurrence rates between electrodes intended for connection and adjacent electrodes were measured.
  • the binder resin layer of the anisotropic conductive film used to connect the evaluation-use IC 60 pts. mass of a phenoxy resin (trade name: YP-50, manufactured by NIPPON STEEL & SUMIKIN CHEMICAL CO., LTD.), 40 pts mass of an epoxy resin (trade name: jER828, manufactured by Mitsubishi Chemical Corporation) and 2 pts. mass of a curing agent (trade name: SI-60L, manufactured by SANSHIN CHEMICAL INDUSTRY CO., LTD.) were added to a solvent to prepare a binder resin composition, this binder resin composition was applied to a release-treated film and baked.
  • a phenoxy resin trade name: YP-50, manufactured by NIPPON STEEL & SUMIKIN CHEMICAL CO., LTD.
  • an epoxy resin trade name: jER828, manufactured by Mitsubishi Chemical Corporation
  • 2 pts. mass of a curing agent trade name: SI-60L, manufactured by
  • Examples 1 to 3 and Comparative Examples 1 and 2 conductive particles (trade name: AUL 704, manufactured by Sekisui Chemical Co., Ltd.) were regularly arranged in a grid array so as to occupy a selected occupation area before transferring the conductive particles to the binder resin layer supported by the release-treated film to obtain an anisotropic conductive film in which the conductive particles were arranged regularly. Additionally, in Comparative Example 3, conductive particles were dispersed in the binder resin composition and this was applied to a release-treated film and baked to obtain an anisotropic conductive film in which the conductive particles were arranged randomly.
  • an evaluation-use IC having outer dimensions of 1.5 ⁇ 13 mm, thickness of 0.5 mm, bump dimensions of 25 ⁇ 140 am, inter-bump space of 7.5 m, and bump height of 15 ⁇ m (Au-plated) was used.
  • a glass As an evaluation-use glass substrate to which the evaluation-use ICs were connected, a glass was used which had outer dimensions of 30 ⁇ 50 mm, a thickness of 0.5 mm and an ITO pattern formed in a comb-like shape thereon at a size and pitch equivalent to the bumps on the evaluation-use IC.
  • the anisotropic conductive film was temporarily pasted to the evaluation-use glass substrate before mounting the evaluation-use IC while keeping alignment between the bumps of the evaluation-use IC and the wiring electrodes of the evaluation-use glass substrate; by thermocompression-bonding with a thermocompression head under conditions of 180° C., 80 MPa and 5 seconds, connection body samples were manufactured. For each connection body sample, inter-electrode positional deviation and short-circuit occurrence-rates between electrodes intended for connection and adjacent electrodes were measured. In inter-electrode positional deviation, the amounts of deviation between bumps of the evaluation-use IC and electrodes of the evaluation-use glass substrate, which were formed to be same size, were measured. Additionally, in short-circuit occurrence rates between adjacent terminals, between all of the bumps of the evaluation-use IC and between all of the electrode terminals of the glass substrate, short-circuit occurrence rates between adjacent terminals were measured.
  • Example 1 an anisotropic conductive film was used in which conductive particles were arranged regularly so as to occupy an area of 1%. Furthermore, in Example 1, the IC-side alignment mark provided on the mounting surface of the evaluation-use IC and the substrate-side alignment mark provided on the evaluation-use glass substrate were formed in approximately the same position as viewed from a planar perspective.
  • Example 2 an anisotropic conductive film was used in which conductive particles were arranged regularly so as to occupy an area of 15% with other conditions being the same as in Example 1.
  • Example 3 an anisotropic conductive film was used in which conductive particles were arranged regularly so as to occupy an area of 35% with other conditions being the same as in Example 1.
  • the substrate-side alignment mark was arranged at a location that was outside of the transfer area of the anisotropic conductive film and separated from the position of the IC-side alignment mark with other conditions being the same as in Example 2.
  • Comparative Example 2 an anisotropic conductive film was used in which conductive particles were arranged regularly so as to occupy an area of 50% with other conditions being the same as in Example 1.
  • Comparative Example 3 an anisotropic conductive film was used in which conductive particles were randomly dispersed so as to occupy an area of 35% with other conditions being the same as in Example 1.
  • Examples 1 to 3 As represented in Table 1, in Examples 1 to 3, all positional deviation values were within 1 to 1.3 ⁇ m and high-accuracy alignment was achieved.
  • Examples 1 to 3 by using an anisotropic conductive film in which the conductive particles were arranged regularly so as to occupy an area of 35% or less as viewed from a planar perspective, the alignment marks were able to be imaged through the anisotropic conductive film and, even in the case of the conductive particles overlapping the outside edges of the alignment marks, line segments of the outside edges of the alignment marks were exposed between the conductive particles and, because contrast differences at boundaries of these line segments were discernible, positions of the alignment marks were detectable with a high accuracy.
  • Examples 1 to 3 short-circuit occurrence rates between electrodes were low at 30 to 70 ppm.
  • positional deviation between bumps of the evaluation-use IC and wiring electrodes of the evaluation-use glass substrate is minimized in edge-side areas so that unwanted contact between conductive particles in these areas and conductive particles in inter-bump areas is less likely to occur, thereby short circuits were prevented from occurring between adjacent terminals.
  • oppositional displacement occurs between opposing wiring electrodes and bumps, distance is reduced between bumps and terminals intended for connection and adjacent bumps and terminals.
  • the substrate-side alignment mark was arranged at a location outside of the transfer area of the anisotropic conductive film, the substrate-side alignment mark and the IC-side alignment mark were separated, thereby adversely affecting alignment precision. Consequently, positional deviation between the bumps of the evaluation-use IC and the electrodes of the evaluation-use glass substrate was large at 4 ⁇ m. Moreover, due to the misalignment, the short-circuit occurrence rate between adjacent electrodes was increased to 500 ppm.
  • Comparative Example 2 because the conductive particles occupied an area of 50%, the outside edges of the alignment marks were not discernible by the camera, thereby adversely affecting alignment precision. Consequently, positional displacement between the bumps of the evaluation-use IC and the electrodes of the evaluation-use glass substrate was large at 4 ⁇ m. Moreover, due to the misalignment, the short-circuit occurrence rate between adjacent electrodes was increased to 500 ppm.
  • Example 3 because the conductive particles were randomly dispersed, agglomerations of the conductive particles occurred and visibility of the outside edges was thus impaired, thereby adversely affecting alignment precision. Consequently, displacement between the bumps of the evaluation-use IC and the electrodes of the evaluation-use glass substrate was large at 3 ⁇ m. Moreover, due to the misalignment, the short-circuit occurrence rate between adjacent electrodes was increased to 400 ppm.

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Organic Chemistry (AREA)
  • General Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Wood Science & Technology (AREA)
  • Materials Engineering (AREA)
  • Mathematical Physics (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Optics & Photonics (AREA)
  • Wire Bonding (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Adhesive Tapes (AREA)
  • Adhesives Or Adhesive Processes (AREA)
  • Combinations Of Printed Boards (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Liquid Crystal (AREA)
US15/117,326 2014-02-07 2015-02-03 Alignment method, method for connecting electronic component, method for manufacturing connection body, connection body and anisotropic conductive film Abandoned US20160351532A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2014-022861 2014-02-07
JP2014022861A JP2015149451A (ja) 2014-02-07 2014-02-07 アライメント方法、電子部品の接続方法、接続体の製造方法、接続体、異方性導電フィルム
PCT/JP2015/052924 WO2015119093A1 (ja) 2014-02-07 2015-02-03 アライメント方法、電子部品の接続方法、接続体の製造方法、接続体、異方性導電フィルム

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2015/052924 A-371-Of-International WO2015119093A1 (ja) 2014-02-07 2015-02-03 アライメント方法、電子部品の接続方法、接続体の製造方法、接続体、異方性導電フィルム

Related Child Applications (1)

Application Number Title Priority Date Filing Date
US16/247,957 Division US11049842B2 (en) 2014-02-07 2019-01-15 Alignment method, method for connecting electronic component, method for manufacturing connection body, connection body and anisotropic conductive film

Publications (1)

Publication Number Publication Date
US20160351532A1 true US20160351532A1 (en) 2016-12-01

Family

ID=53777898

Family Applications (2)

Application Number Title Priority Date Filing Date
US15/117,326 Abandoned US20160351532A1 (en) 2014-02-07 2015-02-03 Alignment method, method for connecting electronic component, method for manufacturing connection body, connection body and anisotropic conductive film
US16/247,957 Active US11049842B2 (en) 2014-02-07 2019-01-15 Alignment method, method for connecting electronic component, method for manufacturing connection body, connection body and anisotropic conductive film

Family Applications After (1)

Application Number Title Priority Date Filing Date
US16/247,957 Active US11049842B2 (en) 2014-02-07 2019-01-15 Alignment method, method for connecting electronic component, method for manufacturing connection body, connection body and anisotropic conductive film

Country Status (6)

Country Link
US (2) US20160351532A1 (ja)
JP (1) JP2015149451A (ja)
KR (2) KR20220158082A (ja)
CN (2) CN113382556A (ja)
TW (1) TWI672543B (ja)
WO (1) WO2015119093A1 (ja)

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20170278820A1 (en) * 2014-10-28 2017-09-28 Dexerials Corporation Anisotropic conductive film and connection structure
US10026709B2 (en) * 2014-11-17 2018-07-17 Dexerials Corporation Anisotropic electrically conductive film
US20200196440A1 (en) * 2018-12-12 2020-06-18 Unimicron Technology Corp. Composite substrate structure and manufacturing method thereof
CN111326442A (zh) * 2018-12-14 2020-06-23 株式会社爱特林 基板接合装置
US10901277B2 (en) * 2016-09-28 2021-01-26 Lg Display Co., Ltd. Display device, display system, and method of installing electronic component
US11062964B2 (en) * 2016-09-29 2021-07-13 Shinkawa Ltd. Method for manufacturing semiconductor device, and mounting apparatus
US11112658B2 (en) 2016-09-28 2021-09-07 Lg Display Co., Ltd. Method of installing electronic component, display device and display system
US11179106B2 (en) 2018-03-16 2021-11-23 Cardiac Pacemakers, Inc. Wearable device to disposable patch connection via conductive adhesive
US20220059392A1 (en) * 2019-04-17 2022-02-24 Disco Corporation Thermocompression bonding method for workpiece

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107113984B (zh) * 2014-12-19 2019-06-04 富士胶片株式会社 多层配线基板
KR102513996B1 (ko) 2016-03-15 2023-03-24 삼성디스플레이 주식회사 표시 장치
CN108753177A (zh) * 2018-05-23 2018-11-06 武汉华星光电半导体显示技术有限公司 一种导电胶、显示面板的制造方法、显示面板及显示装置
CN111315109B (zh) * 2018-12-12 2021-12-21 欣兴电子股份有限公司 复合基板结构及其制作方法
JP7321792B2 (ja) * 2019-06-26 2023-08-07 株式会社ジャパンディスプレイ 異方性導電膜及び表示装置
CN110739238B (zh) * 2019-10-29 2021-03-19 颀中科技(苏州)有限公司 Cof封装方法
JP2022038109A (ja) * 2020-08-26 2022-03-10 セイコーエプソン株式会社 電気光学装置、及び電子機器

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2013089199A1 (ja) * 2011-12-16 2013-06-20 旭化成イーマテリアルズ株式会社 異方導電性フィルム付き半導体チップ、異方導電性フィルム付き半導体ウェハ、及び半導体装置

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005026577A (ja) 2003-07-04 2005-01-27 Matsushita Electric Ind Co Ltd 電子部品の実装方法
TWI307406B (en) * 2006-07-06 2009-03-11 Au Optronics Corp Misalignment detection devices
JP2008101962A (ja) * 2006-10-18 2008-05-01 Toray Ind Inc アライメントマークの認識方法
TWI328123B (en) * 2007-06-12 2010-08-01 Au Optronics Corp Method and device for inspecting a misalignment of an electronic element
JP4880533B2 (ja) * 2007-07-03 2012-02-22 ソニーケミカル&インフォメーションデバイス株式会社 異方性導電膜及びその製造方法、並びに接合体
JP5259211B2 (ja) * 2008-02-14 2013-08-07 ルネサスエレクトロニクス株式会社 半導体装置
JP5038191B2 (ja) * 2008-03-04 2012-10-03 有限会社共同設計企画 電子部品検査方法およびそれに用いられる装置
JP5836830B2 (ja) * 2012-02-14 2015-12-24 デクセリアルズ株式会社 接続体の製造方法、及び接続方法
JP6006955B2 (ja) * 2012-03-26 2016-10-12 デクセリアルズ株式会社 接続体の製造方法、接続方法

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2013089199A1 (ja) * 2011-12-16 2013-06-20 旭化成イーマテリアルズ株式会社 異方導電性フィルム付き半導体チップ、異方導電性フィルム付き半導体ウェハ、及び半導体装置

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
Nematsu, Tokihiro; "Semiconductor chip e.g. semiconductor wafer with anisotropically conductive film for manufacturing semiconductor device, has semiconductor chip having several circuit electrodes on surface, and anisotropically conductive film"; June 20, 2013, Derwent translation; Derwent Acct No 2013-L24557. *

Cited By (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10975267B2 (en) * 2014-10-28 2021-04-13 Dexerials Corporation Anisotropic conductive film and connection structure
US20170278820A1 (en) * 2014-10-28 2017-09-28 Dexerials Corporation Anisotropic conductive film and connection structure
US10026709B2 (en) * 2014-11-17 2018-07-17 Dexerials Corporation Anisotropic electrically conductive film
US10304796B2 (en) 2014-11-17 2019-05-28 Dexerials Corporation Anisotropic electrically conductive film having electrically conductive particles disposed in a lattice point region of a planar lattice pattern
US11923333B2 (en) 2014-11-17 2024-03-05 Dexerials Corporation Anisotropic electrically conductive film
US11112658B2 (en) 2016-09-28 2021-09-07 Lg Display Co., Ltd. Method of installing electronic component, display device and display system
US10901277B2 (en) * 2016-09-28 2021-01-26 Lg Display Co., Ltd. Display device, display system, and method of installing electronic component
US11062964B2 (en) * 2016-09-29 2021-07-13 Shinkawa Ltd. Method for manufacturing semiconductor device, and mounting apparatus
US11179106B2 (en) 2018-03-16 2021-11-23 Cardiac Pacemakers, Inc. Wearable device to disposable patch connection via conductive adhesive
US10863618B2 (en) * 2018-12-12 2020-12-08 Unimicron Technology Corp. Composite substrate structure and manufacturing method thereof
US20200196440A1 (en) * 2018-12-12 2020-06-18 Unimicron Technology Corp. Composite substrate structure and manufacturing method thereof
CN111326442A (zh) * 2018-12-14 2020-06-23 株式会社爱特林 基板接合装置
US20220059392A1 (en) * 2019-04-17 2022-02-24 Disco Corporation Thermocompression bonding method for workpiece
US11823942B2 (en) * 2019-04-17 2023-11-21 Disco Corporation Thermocompression bonding method for workpiece

Also Published As

Publication number Publication date
TW201535017A (zh) 2015-09-16
JP2015149451A (ja) 2015-08-20
WO2015119093A1 (ja) 2015-08-13
US20190206831A1 (en) 2019-07-04
CN105940486A (zh) 2016-09-14
KR20220158082A (ko) 2022-11-29
US11049842B2 (en) 2021-06-29
TWI672543B (zh) 2019-09-21
KR20160118238A (ko) 2016-10-11
CN113382556A (zh) 2021-09-10

Similar Documents

Publication Publication Date Title
US11049842B2 (en) Alignment method, method for connecting electronic component, method for manufacturing connection body, connection body and anisotropic conductive film
KR102637835B1 (ko) 접속체 및 접속체의 제조 방법
US10175544B2 (en) Connection body, method for manufacturing a connection body, connecting method and anisotropic conductive adhesive agent
US9960138B2 (en) Connection body
US10299382B2 (en) Connection body and connection body manufacturing method
CN108476591B (zh) 连接体、连接体的制造方法、检测方法
JP2019186577A (ja) 接続体、接続体の製造方法及び検査方法
JP2015170721A (ja) 接続体の製造方法、電子部品の接続方法、アライメント方法及び接続体
WO2016114381A1 (ja) 接続構造体
JP2017175015A (ja) 接続体の製造方法
JP2019140413A (ja) 接続体、接続体の製造方法、接続方法
JP2015153801A (ja) 接続体の製造方法、接続方法及び接続体

Legal Events

Date Code Title Description
AS Assignment

Owner name: DEXERIALS CORPORATION, JAPAN

Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:AKUTSU, YASUSHI;REEL/FRAME:039369/0866

Effective date: 20160630

STPP Information on status: patent application and granting procedure in general

Free format text: FINAL REJECTION MAILED

STCB Information on status: application discontinuation

Free format text: ABANDONED -- FAILURE TO RESPOND TO AN OFFICE ACTION