US20150132970A1 - Substrate processing apparatus and substrate processing method - Google Patents

Substrate processing apparatus and substrate processing method Download PDF

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Publication number
US20150132970A1
US20150132970A1 US14/396,032 US201314396032A US2015132970A1 US 20150132970 A1 US20150132970 A1 US 20150132970A1 US 201314396032 A US201314396032 A US 201314396032A US 2015132970 A1 US2015132970 A1 US 2015132970A1
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space
substrate processing
processing
plasma
gas
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Eiichi Nishimura
Akitaka Shimizu
Fumiko Yamashita
Daisuke Urayama
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Tokyo Electron Ltd
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Tokyo Electron Ltd
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Assigned to TOKYO ELECTRON LIMITED reassignment TOKYO ELECTRON LIMITED ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: SHIMIZU, AKITAKA, URAYAMA, DAISUKE, YAMASHITA, FUMIKO, NISHIMURA, EIICHI
Publication of US20150132970A1 publication Critical patent/US20150132970A1/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3065Plasma etching; Reactive-ion etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32Gas-filled discharge tubes
    • H01J37/32431Constructional details of the reactor
    • H01J37/32458Vessel
    • H01J37/32513Sealing means, e.g. sealing between different parts of the vessel
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32Gas-filled discharge tubes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32Gas-filled discharge tubes
    • H01J37/32009Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
    • H01J37/32357Generation remote from the workpiece, e.g. down-stream
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32Gas-filled discharge tubes
    • H01J37/32009Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
    • H01J37/32422Arrangement for selecting ions or species in the plasma
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32Gas-filled discharge tubes
    • H01J37/32431Constructional details of the reactor
    • H01J37/3244Gas supply means
    • H01J37/32449Gas control, e.g. control of the gas flow
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32Gas-filled discharge tubes
    • H01J37/32431Constructional details of the reactor
    • H01J37/32715Workpiece holder
    • H01J37/32724Temperature
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32Gas-filled discharge tubes
    • H01J37/32431Constructional details of the reactor
    • H01J37/32798Further details of plasma apparatus not provided for in groups H01J37/3244 - H01J37/32788; special provisions for cleaning or maintenance of the apparatus
    • H01J37/32816Pressure
    • H01J37/32834Exhausting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02296Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02299Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment
    • H01L21/02312Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment treatment by exposure to a gas or vapour
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67017Apparatus for fluid treatment
    • H01L21/67063Apparatus for fluid treatment for etching
    • H01L21/67069Apparatus for fluid treatment for etching for drying etching
    • H01L43/12
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N50/00Galvanomagnetic devices
    • H10N50/01Manufacture or treatment
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J2237/00Discharge tubes exposing object to beam, e.g. for analysis treatment, etching, imaging
    • H01J2237/32Processing objects by plasma generation
    • H01J2237/33Processing objects by plasma generation characterised by the type of processing
    • H01J2237/334Etching

Definitions

  • the present invention relates to a substrate processing apparatus and a substrate processing method.
  • Patent Document 1 discloses a substrate processing method for manufacturing a MRAM (Magnetic Random Access Memory) device by processing a multi-layered object including a Magnetic Tunnel Junction (MTJ) having a lower magnetic layer, an upper magnetic layer and an insulation layer interposed therebetween. More specifically, the MRAM device is manufactured by (a) forming a first mask on an upper electrode layer, (b) plasma-etching the upper electrode layer, the upper magnetic layer and the insulation layer, (c) removing the first mask and conductive reaction products which are generated in the etching and are deposited on a side wall and the like, (d) forming a second mask on the upper electrode layer, (e) etching a lower electrode layer, and (f) removing the second mask and conductive reaction products which are generated in the etching and are deposited on the side wall and the like.
  • a gas including fluorine containing gas, and H 2 O vapor or NH 3 is used as a gas for removing the conductive by-products.
  • the gas may be excited by a
  • the reaction product may contain not only metal but also metal oxide, metal halide or the like.
  • a gas as it is reacts with the conductive reaction product or a gas excited by a plasma reacts with the conductive reaction product, so that the reaction product may not be removed properly. Therefore, in the related art, there is a need to provide a substrate processing apparatus and a substrate processing method which are capable of properly removing reaction products generated when an etching target film is etched.
  • a substrate processing apparatus for treating reaction products deposited in etching an etching target layer included in a target object.
  • the substrate processing apparatus including: a processing chamber defining a space; a partition plate which is disposed in the processing chamber and partitions the space into a plasma generating space and a substrate processing space, the partition plate being configured to suppress transmission of ions and vacuum ultraviolet rays; a plasma source configured to generate a plasma in the plasma generating space; and a mounting table disposed in the substrate processing space for mounting the target object thereon.
  • the substrate processing apparatus further includes: a first processing gas supply unit configured to supply a first processing gas into the plasma generating space, the first processing gas to be dissociated by the plasma to generate radicals; and a second processing gas supply unit configured to supply a second processing gas into the substrate processing space, the second processing gas reacting with the reaction products without being exposed to the plasma.
  • the partition plate is disposed in the processing chamber whose space is partitioned into the plasma generating space and the substrate processing space by the partition plate.
  • the partition plate transmits neural radicals while suppressing transmission of ions and vacuum ultraviolet rays.
  • the first processing gas supply unit supplies the first processing gas into the plasma generating space. With this configuration, ions generated from the first processing gas are blocked by the partition plate and only radicals generated from the first processing gas are moved into the substrate processing space and react with the reaction products.
  • the second processing gas supply unit supplies the second processing gas into the substrate processing space.
  • the second processing gas reacts with the reaction products without being exposed to the plasma.
  • the radicals and the second reactant processing gas it is possible to properly remove the reaction products generated when the etching target layer is etched.
  • the substrate processing apparatus may further include a gas exhaust unit which is provided to the substrate processing space and depressurizes the space of the processing chamber.
  • the radicals generated from the first processing gas can be properly moved into the substrate processing space.
  • the generated reaction product can be exhausted without being decomposed by a plasma.
  • the partition plate may include at least two plate-shaped members arranged to overlap with each other from the plasma generating space toward the substrate processing space.
  • Each plate-shaped member may have a plurality of through-holes penetrating therethrough in the overlapping direction.
  • the through-holes of one of the at least two plate-shaped members preferably do not overlap with the through-holes of the other ones of the at least two plate-shaped members in the overlapping direction.
  • the radicals generated from the first processing gas can be moved into the substrate processing space while blocking ions and ultraviolet rays generated from the first processing gas by the partition plate.
  • the radicals may cause a reduction reaction, an oxidation reaction, a chloride reaction or a fluoride reaction.
  • the first processing gas may contain hydrogen atoms, oxygen atoms, chlorine atoms or fluorine atoms.
  • the reaction products can be changed into a substance which is easily react with the second processing gas.
  • the second processing gas may include a gas whose reaction with the reaction products is affected by a temperature of the mounting table.
  • the second processing gas may include an electron-donating gas.
  • the second processing gas can react with the reaction products without being dissociated.
  • a substrate processing method for treating reaction products deposited in etching an etching target layer included in a target object by using a substrate processing apparatus for treating reaction products deposited in etching an etching target layer included in a target object by using a substrate processing apparatus.
  • the substrate processing apparatus includes a processing chamber defining a space; a partition plate which is disposed in the processing chamber and partitions the space into a plasma generating space and a substrate processing space, the partition plate being configured to suppress transmission of ions and vacuum ultraviolet rays; a plasma source configured to generate a plasma in the plasma generating space; and a mounting table disposed in the substrate processing space for mounting the target object thereon.
  • the substrate processing apparatus further includes a first processing gas supply unit configured to supply a first processing gas into the plasma generating space, the first processing gas to be dissociated by the plasma to generate radicals; and a second processing gas supply unit configured to supply a second processing gas into the substrate processing space, the second processing gas reacting with the reaction products without being exposed to the plasma.
  • the substrate processing method includes: a first step of generating the radicals by supplying the first processing gas from the first processing gas supply unit into the plasma generating space in which a plasma is generated, and moving the generated radicals into the substrate processing space to cause a reaction with the reaction products; and a second step of supplying the second processing gas from the second processing gas supply unit into the substrate processing space to cause a reaction with the reaction products.
  • the partition plate is disposed in the processing chamber whose space is partitioned into the plasma generating space and the substrate processing space by the partition plate.
  • the partition plate transmits neural radicals while suppressing transmission of ions and vacuum ultraviolet rays.
  • the first processing gas supply unit supplies the first processing gas into the plasma generating space.
  • the second processing gas supply unit supplies the second processing gas into the substrate processing space.
  • the second processing gas can react with the reaction products without being exposed to plasma.
  • the radicals and the second reactant processing gas it is possible to properly remove the reaction products generated when the etching target layer is etched.
  • the first step and the second step may be performed in the same substrate processing apparatus.
  • the first step may be performed before or at the same time of the second step.
  • radicals can react with the reaction products so that the reaction products can be changed into a substance which is easily react with the second processing gas.
  • the etching target layer may include a metal-containing layer.
  • reaction products are so-called hardly-etched substances containing metal, metal oxide, metal halogen compounds or the like, it is possible to properly remove reaction products generated when the etching target layer is etched by interaction between the radicals and the second reactant processing gas.
  • FIG. 1 is a view schematically showing one example of a MRAM device manufactured by a substrate processing method in accordance with one embodiment.
  • FIG. 2 is a schematic view of a substrate processing system including a substrate processing apparatus in accordance with one embodiment.
  • FIG. 3 is a flowchart showing the substrate processing method in accordance with the embodiment.
  • FIGS. 4 to 9 are views for presenting a process of manufacturing the MRAM device shown in FIG. 3 .
  • FIG. 10 is a schematic view of a substrate processing apparatus in accordance with one embodiment.
  • FIG. 11 is a plan view of a high frequency antenna shown in FIG. 10 .
  • FIG. 12 is a schematic view for explaining second gas supply nozzles and the partition plate shown in FIG. 10 .
  • FIG. 13 is a flowchart for explaining details of a reaction product removing process.
  • FIGS. 14A and 14B are schematic views of cross-sectional SEM images of a target object obtained in a comparative example.
  • FIGS. 15A to 15C are schematic views of cross-sectional SEM images of a target object obtained in a first test example.
  • FIGS. 16A and 16B are schematic views of SEM images of the target object obtained in the first test example.
  • FIGS. 17A to 17C are schematic views of cross-sectional SEM images of a target object obtained in a second test example.
  • FIGS. 18A and 18B are schematic views of SEM images of the target object obtained in the second test example.
  • FIG. 1 is a cross sectional view of a MRAM device 100 manufactured by a substrate processing method in accordance with an embodiment.
  • the MRAM device 100 is formed on a substrate B and includes a lower electrode 101 , a pinning layer 102 , a second magnetic layer 103 , an insulation layer 104 , a first magnetic layer 105 , an upper electrode layer 106 and an etching mask 107 , which are laminated in that order from the bottom.
  • an insulation film 108 is formed on side walls of the first magnetic layer 105 , the upper electrode layer 106 and the etching mask 107 of the MRAM device 100 .
  • the lower electrode layer 101 is a conductive electrode member formed on the substrate B.
  • the thickness of the lower electrode layer 101 is, e.g., about 5 nm.
  • the pinning layer 102 is interposed between the lower electrode layer 101 and the second magnetic layer 103 .
  • the pinning layer 102 fixes a magnetization direction of the lower magnetic layer 101 by the pinning effect of an antiferromagnetic body.
  • the pinning layer 102 is formed of an antiferromagnetic material such as, e.g., iridium manganese (IrMn), platinum manganese (PtMn) or the like and its thickness is, e.g., about 7 nm.
  • the second magnetic layer 103 includes a ferromagnetic material layer formed on the pinning layer 102 .
  • the second magnetic layer 103 acts as a so-called pinned layer whose magnetization direction remains constant by the pinning effect of the pinning layer 102 without being affected by an external magnetic field.
  • the second magnetic layer 103 is formed of, e.g., CoFeB and its thickness is, e.g., about 2.5 nm.
  • the insulation layer 104 is interposed between the second magnetic layer 103 and the first magnetic layer 105 .
  • the interposition of the insulation layer 104 between the second magnetic layer 103 and the first magnetic layer 105 causes a tunnel magnetoresistance effect between the second magnetic layer 103 and the first magnetic layer 105 . That is, electric resistance corresponding to the relationship (parallelism or antiparallelism) between the magnetization direction of the second magnetic layer 103 and the magnetization direction of the first magnetic layer 105 is generated between the second magnetic layer 103 and the first magnetic layer 105 .
  • the insulation layer 104 is formed of Al 2 O 3 or MgO and its thickness is, e.g., 1.3 nm.
  • the first magnetic layer 105 includes a ferromagnetic layer formed on the insulation layer 104 .
  • the first magnetic layer 105 acts as a so-called free layer whose magnetization direction follows an external magnetic field which is magnetic information.
  • the first magnetic layer 105 is formed of CoFeB and its thickness is, e.g., about 2.5 nm.
  • the upper electrode layer 106 is a conductive electrode member formed on the first magnetic layer 105 .
  • the thickness of the upper electrode layer 106 is, e.g., about 5 nm.
  • the etching mask 107 is formed on the upper electrode layer 106 .
  • the etching mask 107 is shaped to correspond to a planar shape of the MRAM device 100 .
  • the etching mask 107 is formed of, e.g., Ta, TiN, Si, W, Ti or the like and its thickness is, e.g., 50 nm.
  • FIG. 2 is a plan view schematically showing a substrate processing system in accordance with an embodiment.
  • the substrate processing system 20 shown in FIG. 2 includes substrate stages 22 a to 22 d , containers 24 a to 24 d , a loader module LM, load-lock chambers LL 1 and LL 2 , process modules PM 1 to PM 3 and a transfer chamber 21 .
  • the substrate stages 22 a to 22 d are arranged along one side of the loader module LM.
  • the containers 24 a to 24 d are mounted on the substrate stages 22 a and 22 d , respectively.
  • Target objects W to be processed are accommodated in the containers 24 a to 24 d.
  • a transfer robot Rb 1 is provided within the loader module LM.
  • the transfer robot Rb 1 takes out a target object W accommodated in one of the containers 24 a to 24 d and transfers it to the load-lock chamber LL 1 or LL 2 .
  • the load-lock chambers LL 1 and LL 2 are arranged along another side of the loader module LM and serves as a preliminary vacuum chamber.
  • the load-lock chambers LL 1 and LL 2 are connected to the transfer chamber 21 through respective gate valves.
  • the transfer chamber 21 is a chamber of which inner space can be depressurized and a transfer robot Rb 2 is provided therein.
  • the transfer chamber 21 is connected with the process modules PM 1 to PM 3 through respective gate valves.
  • the transfer robot Rb 2 takes the target object W out of the load-lock chamber LL 1 or LL 2 and transfers it to the process modules PM 1 , PM 2 and PM 3 sequentially.
  • the process modules PM 1 , PM 2 and PM 3 of the substrate processing system 20 may be a substrate processing apparatus (a substrate processing apparatus for removing reaction products), a film forming apparatus and a plasma etching apparatus in accordance with the embodiment, respectively.
  • the film forming apparatus may be a CVD (Chemical Vapor Deposition) apparatus.
  • the process module PM 1 is employed for a substrate processing apparatus for removing reaction products
  • the process module PM 2 is employed for a film forming apparatus
  • the process module PM 3 is employed for a plasma etching apparatus.
  • FIG. 3 is a flowchart showing a substrate processing method in accordance with the embodiment.
  • a multi-layered target object W is manufactured by the process module PM 2 as the film forming apparatus at step S 1 .
  • the target object W is mounted on an electrostatic chuck in the process module PM 3 as the plasma etching apparatus.
  • FIG. 4 shows one example of the target object W manufactured in an intermediate step of the method for manufacturing the MRAM device 100 .
  • the target object W is a multi-layered material including the lower electrode layer 101 , the pinning layer 102 , the second magnetic layer 103 , the insulation layer 104 , the first magnetic layer 105 and the upper electrode layer 106 which are laminated on the substrate B.
  • An etching mask 107 having a predetermined planar shape is disposed on the upper electrode layer 106 .
  • the upper electrode layer 106 is etched first.
  • An etching gas used at this time is optional.
  • the etching gas may be Cl 2 , CH 4 , He, N 2 , Ar or the like.
  • a processing gas containing chlorine (Cl 2 ) is supplied and a plasma is generated to etch the target object W.
  • the processing gas may include an inert gas such as He, N 2 , Ar or the like, and H 2 .
  • a kind of gas to achieve sufficient selectivity of the first magnetic layer 105 and the insulation layer 104 is employed as the processing gas.
  • step S 2 a region of the first magnetic layer 105 , which is not covered by the etching mask 107 , reacts with and is etched by a first processing gas, but the insulation layer 104 is not etched. Thus, in step S 2 , the etching is completed at a surface of the insulation layer 104 .
  • step S 2 when the first magnetic layer 105 is etched using the processing gas, a material to be etched reacts with the processing gas and a reaction product is generated.
  • the reaction product may include metal which is contained in the mask 107 and the first magnetic layer 105 , oxide, chloride, nitride or halide of the metal, a C or Si-containing compound or the like.
  • the reaction product is adhered, as a residue Z, to side walls of the first magnetic layer 105 , the upper electrode layer 106 and the etching mask 107 , as shown in FIG. 5 .
  • the residue Z may cause a leak current in the MRAM because it contains a conductive substance.
  • step S 3 in order to remove the residue Z, the target object W is transferred to the process module PM 1 as the substrate processing apparatus in accordance with the embodiment. Step S 3 will be described in detail later. After the residue Z is removed from the side walls of the first magnetic layer 105 , the upper electrode layer 106 and the etching mask 107 as shown in FIG. 6 , the process proceeds to step S 4 .
  • the target object W is transferred to the process module PM 2 as the film forming apparatus (e.g., CVD apparatus) in which the surface of the target object W is coated with the insulation film 108 as shown in FIG. 7 .
  • the insulation film 108 is formed of, e.g., SiN or SiO 2 .
  • the target object W is returned to the process module PM 3 as a plasma etching apparatus in which the insulation film 108 is etched such that the insulation film 108 is left at the side walls of the first magnetic layer 105 , the upper electrode layer 106 and the etching mask 107 .
  • a processing gas such as a methane (CH 4 )-containing gas is supplied to generate a plasma to etch the insulation layer 104 , the second magnetic layer 103 , and the pinning layer 102 .
  • the target object W etched in step S 5 is shown in FIG. 8 .
  • the processing gas may include an inert gas such as He, N 2 , Ar or the like, a carbonyl group-containing gas, H 2 and the like, in addition to the methane gas.
  • step S 5 regions of the insulation layer 104 , the second magnetic layer 103 and the pinning layer 102 , which are not covered by the etching mask 107 and the insulation film 108 , are etched.
  • the pinning layer 102 , the second magnetic layer 103 and the insulation layer 104 are formed to be wider than the width of the first magnetic layer 105 , the upper electrode layer 106 and the etching mask 107 by the width of the insulation film 108 formed at the side walls of the first magnetic layer 105 , the upper electrode layer 106 and the etching mask 107 .
  • a processing gas is supplied to generate a plasma to etch the lower electrode layer 101 .
  • the target object W etched in step S 6 is shown in FIG. 9 .
  • the processing gas may include an inert gas such as He, N 2 , Ar or the like, a carbonyl group-containing gas, CH 4 , H 2 and the like.
  • a region of the lower electrode layer 101 which is not covered by the etching mask 107 and the insulation film 108 , is etched.
  • the lower electrode 101 is formed to be wider than the width of the first magnetic layer 105 , the upper electrode layer 106 and the etching mask 107 by the width of the insulation film 108 formed at the side walls of the first magnetic layer 105 , the upper electrode layer 106 and the etching mask 107 .
  • step S 6 the plasma processing shown in FIG. 3 is completed.
  • a MRAM device having a desired shape is formed from the target object W having a multi-layer structure.
  • FIG. 10 is a schematic view showing a plasma processing apparatus 10 which can be used as the process module PM 1 shown in FIG. 2 , in accordance with the embodiment.
  • FIG. 11 is a plan view of a high frequency antenna 140 shown in FIG. 10 when viewed from the top.
  • the plasma processing apparatus 10 includes e.g., cylindrical processing chamber 192 formed of a metal (e.g., aluminum).
  • the processing chamber 192 has a space in its inside.
  • the processing chamber 192 is not limited to the cylindrical shape.
  • the processing chamber 192 may have a square column shape (e.g., a box shape).
  • a mounting table 110 for mounting a wafer W is provided on the bottom of the processing chamber 192 .
  • the mounting table 110 has a columnar shape (e.g., a cylindrical columnar shape) and is formed of aluminum or the like.
  • the mounting table 110 is not limited to the cylindrical shape.
  • the mounting table 110 may have a square columnar shape (e.g., polygonal columnar shape).
  • the mounting table 110 may include an electrostatic chuck for attracting and holding the wafer W by a Coulomb force, a temperature adjustment mechanism such as a heater and a coolant passage, and the like to provide various functions, as necessary. Modifications of the mounting table 110 will be described in detail later.
  • a plate-shaped dielectric body 194 formed of, e.g., quartz glass, ceramics or the like is provided at a ceiling of the processing chamber 192 to face the mounting table 110 .
  • the plate-shaped dielectric body 194 has a circular plate shape and is air-tightly attached to the ceiling of the processing chamber 192 so that it closes an opening formed at the ceiling.
  • a partition plate 230 for partitioning a space into a plasma generating space S 1 and a substrate processing space S 2 is provided inside the processing chamber 192 .
  • the plasma generating space S 1 is a space where a plasma is generated by a plasma source.
  • the substrate processing space S 2 is a space in which the wafer W is mounted.
  • the partition plate 230 includes at least two plate-shaped members 230 A and 230 C. The two plate-shaped members 230 A and 230 C are arranged to overlap with each other from the plasma generating space S 1 to the substrate processing space S 2 .
  • a spacer 230 B is interposed between the plate-shaped member 230 A and the plate-shaped member 230 C for maintaining a gap between the plate-shaped member 230 A and the plate-shaped member 230 C at a predetermined value.
  • FIG. 12 is a schematic view of the partition plate 230 .
  • the plate-shaped members 230 A and 230 C respectively includes a plurality of slits 231 A and a plurality of slits 231 C penetrating therethrough in the overlapping direction. These slits are through-holes. Slits 231 A in the plate-shaped member 230 A are arranged not to overlap with slits 231 C in the plate-shaped member 230 C when viewed from the overlapping direction.
  • the plate-shaped members 230 A and 230 C are made of, e.g., quartz glass.
  • the spacer 230 B is made of, e.g., Al.
  • the partition plate 230 for partitioning the plasma generating space S 1 and the substrate processing space S 2 functions as a so-called ion trap for suppressing transmission of ions and vacuum ultraviolet ray.
  • a first gas supply unit 120 A for supplying a first processing gas is connected to the processing chamber 192 .
  • the first gas supply unit 120 A supplies the first processing gas into the plasma generating space S 1 .
  • a gas inlet 121 is provided in a side wall of the processing chamber 192 and a gas supply source 122 A is connected to the gas inlet 121 through a gas supply line 123 A.
  • a flow rate controller e.g., a mass flow controller
  • 124 A for controlling a flow rate of the first processing gas and an on-off valve 126 A are disposed in the midway of the gas supply line 123 A.
  • the first processing gas from the gas supply source 122 A is controlled to have a specific flow rate by the mass flow controller 124 A and is supplied into the plasma generating space S 1 of the processing chamber 192 through the gas inlet 121 .
  • the first processing gas is decomposable and, thus, it is dissociated to generate radicals by a plasma generated by the plasma source.
  • the radicals may cause reduction reaction, oxidation reaction, chloride reaction or fluoride reaction.
  • the first processing gas may be a gas containing hydrogen atoms, oxygen atoms, chlorine atoms or fluorine atoms.
  • the first processing gas may be Ar, N 2 , O 2 , H 2 , He, BCl 3 , Cl 2 , CF 4 , NF 3 , CH 4 or SF 6 .
  • the first processing gas which generates radicals for reduction reaction may be H 2 or the like.
  • the first processing gas which generates radicals for oxidation reaction may be O 2 or the like.
  • the first processing gas which generates radicals for chloride reaction may be BCl 3 , Cl 2 or the like.
  • the first processing gas which generates radicals of fluoride reaction may be CF 4 , NF 3 , SF 6 or the like.
  • a second gas supply unit 120 B for supplying a second processing gas or the like is connected to the processing chamber 192 .
  • the second gas supply unit 120 B supplies the second processing gas into the substrate processing space S 2 .
  • a gas supply head 240 is disposed in the substrate processing space S 2 of the processing chamber 192 and a gas supply source 122 B is connected to the gas supply head 240 through a gas supply line 123 B.
  • FIG. 12 shows the gas supply head 240 disposed below the partition plate 230 .
  • the gas supply head 240 includes a plurality of gas holes 240 A opened downward (i.e., toward the mounting table 110 ). In this manner, as the gas flows downward, the second reactant processing gas can be appropriately supplied onto the wafer W.
  • the gas holes 240 A may be opened upward (i.e., toward the partition plate 230 ).
  • radicals transmitting through the partition plate 230 can be appropriately mixed with the second processing gas.
  • a flow rate controller e.g., a mass flow controller (MFC)
  • MFC mass flow controller
  • an on-off valve 126 B are disposed in the midway of the gas supply line 123 B.
  • the second processing gas from the gas supply source 122 B is controlled to have a specific flow rate by the mass flow controller 124 B and is supplied into the substrate processing space S 2 of the processing chamber 192 through the gas supply head 240 .
  • the second processing gas is a reactant gas which reacts with a reaction product without being exposed to a plasma.
  • the second processing gas may include a gas whose reaction with the reaction product is affected by a temperature of the mounting table 110 , such as HF, Cl 2 , HCl, H 2 O, PF 3 , F 2 , ClF 3 , COF 2 , cyclopentadiene, amidinate or the like.
  • the second processing gas may also include an electron-donating gas.
  • the electron-donating gas refers generally to a gas composed of atoms having a large difference in terms of electronegativity or ionization potential or a gas composed of atoms having unshared electron pairs.
  • the electron-donating gas has a property of easily donating electrons to other compounds.
  • the electron-donating gas has a property of bonding as a ligand with a metal compound.
  • the electron-donating gas may include SF 6 , PH 3 , PF 3 , PCl 3 , PBr 3 , Pl 3 , CF 4 , AsH 3 , SbH 3 , SO 3 , SO 2 , H 2 S, SeH 2 , TeH 2 , Cl 3 F, H 2 O, H 2 O 2 , a carbonyl group-containing gas or the like.
  • the gas supply units 120 A and 120 B are presented by a gas line of a single system for the purpose of simplification of description, the gas supply units 120 A and 120 B are not limited to supply of a processing gas of a single gas species but may supply a plurality of gas species as processing gases. In this case, a plurality of gas supply sources may be provided with gas lines of multiple systems.
  • the gas supply unit 120 A is configured to supply a gas from the side wall of the processing chamber 192
  • the gas supply unit 120 A is not limited thereto.
  • a gas may be supplied from the ceiling of the processing chamber 192 .
  • a gas inlet may be formed in the center of the plate-shaped dielectric body 194 and the gas may be supplied from the gas inlet.
  • a gas exhaust unit 130 for exhausting the internal atmosphere of the processing chamber 192 is connected to the bottom of the processing chamber 192 through a gas exhaust passage 132 .
  • the gas exhaust unit 130 is formed with, e.g., a vacuum pump and can depressurizes the interior of the processing chamber 192 to a predetermined pressure.
  • radicals generated in the plasma generating space S 1 move into the substrate processing space S 2 through the partition plate 230 by a difference in pressure between the plasma generating space S 1 and the substrate processing space S 2 which is caused by the gas exhaust unit 130 .
  • a wafer loading/unloading port 134 is provided at the side wall of the processing chamber 192 and a gate valve 136 is provided at the wafer loading/unloading port 134 .
  • the gate valve 136 is opened to mount the wafer W on the mounting table 110 in the processing chamber 192 by a transfer mechanism (not shown) such as a transfer arm or the like and the gate valve 136 is closed to process the wafer W.
  • the planar high frequency antenna 140 and a shield member 160 covering the high frequency antenna 140 are disposed on a top surface (outer surface) of the plate-shaped dielectric body 194 .
  • the high frequency antenna 140 in accordance with the present embodiment is configured with, roughly, an inner antenna element 142 A disposed to correspond to the central portion of the plate-shaped dielectric body 194 and an outer antenna element 142 B disposed to surround the periphery of the inner antenna element 142 A.
  • Each of the antenna elements 142 A and 142 B is formed in a spiral coil made of a conductor such as steel, aluminum, stainless steel or the like.
  • the antenna elements 142 A and 142 B are embedded between a plurality of clamping bodies 144 to be one unit.
  • Each of the clamping bodies 144 has a columnar shape as shown in FIG. 11 and the clamping bodies 144 are radially disposed and extend from the vicinity of center of the inner antenna element 142 A to the outside of the outer antenna element 142 B.
  • FIG. 11 shows an example where each of the antenna elements 142 A and 142 B is embedded between three clamping bodies 144 .
  • the shield member 160 includes a cylindrical inner shield wall 162 A disposed between the antenna elements 142 A and 142 B to surround the inner antenna element 142 a and a cylindrical outer shield wall 162 B disposed to surround the outer antenna element 142 B.
  • the top surface of the plate-shaped dielectric body 194 is divided into a central portion (center zone) inside the inner shield wall 162 A and a peripheral portion (peripheral zone) between the shield walls 162 A and 162 B.
  • a disc-shaped inner shield plate 164 A is disposed on the inner antenna element 142 A to close an opening of the inner shield wall 162 A.
  • a doughnut-shaped outer shield plate 164 B is disposed on the outer antenna element 142 B to close an opening between the shield walls 162 A and 162 B.
  • the shield member 160 is not limited to the cylindrical shape.
  • the shield member 160 may have other shapes such as a square column shape, preferably a shape corresponding to the shape of the processing chamber 192 .
  • the shield member 160 since the processing chamber 192 has a cylindrical shape, the shield member 160 also has a cylindrical shape accordingly. If the processing chamber 192 has a square column shape, the shield member 160 may also have a square column shape.
  • RF power supplies 150 A and 150 B are respectively connected to the antenna elements 142 A and 142 B. Accordingly, RF powers of the same frequency or different frequencies can be applied to the antenna elements 142 A and 142 B. For example, when a specific RF power of a predetermined frequency (e.g., 40 MHz) is applied from the RF power supply 150 A to the inner antenna element 142 A, a processing gas introduced into the processing chamber 192 is excited by an induced magnetic field formed in the processing chamber 192 to generate a doughnut-like plasma in the central portion of the wafer W.
  • a predetermined frequency e.g. 40 MHz
  • a specific RF power of a predetermined frequency (e.g., 60 MHz) is applied from the RF power supply 150 B to the outer antenna element 142 B, a processing gas introduced into the processing chamber 192 is excited by an induced magnetic field formed in the processing chamber 192 to generate another doughnut-like plasma in the peripheral portion of the wafer W.
  • Radicals are generated from the first processing gas by the plasma.
  • the RF powers outputted from the RF power supplies 150 A and 150 B are not limited to the above-mentioned frequencies. For example, RF powers of frequencies such as 13.56 MHz, 27 MHz, 40 MHz, 60 MHz and the like may be applied. However, there is a need to adjust an electrical length of each of the antenna elements 142 A and 142 B depending on the RF powers outputted from the RF power supplies 150 A and 150 B. In addition, heights of the inner shield plate 164 A and the outer shield plate 164 B can be adjusted by actuators 168 A and 168 B, respectively.
  • the plasma processing apparatus 10 is connected with a control unit 200 to control the components of the plasma processing apparatus 10 .
  • the control unit 200 is connected with an operation unit 210 including a keyboard that is used for an operator to input commands to manage the plasma processing apparatus 10 , a display for visually displaying an operation status of the plasma processing apparatus 10 and the like.
  • the control unit 200 is also connected with a storage unit 220 that stores programs for realizing various processes executed in the plasma processing apparatus 10 under control of the control unit 200 , recipe data for executing the programs, and the like.
  • the storage unit 220 stores process recipes for executing processes of the wafer W, recipes for executing required processes, e.g., cleaning of the processing chamber 192 and the like. These recipes are an integration of various parameters including control parameters for control of the components of the plasma processing apparatus 10 , setting parameters and the like.
  • the process recipes include parameters such as flow rates of processing gases, an internal pressure of the processing chamber 192 , frequencies and powers of RF signals applied to the antenna elements 142 A and 142 B, and the like.
  • These recipes may be stored in a hard disk or a semiconductor memory, or may also be stored in a portable computer-readable storage medium such as CD-ROM, DVD or the like and set in a predetermined location of the storage unit 220 .
  • the control unit 200 executes a desired process in the plasma processing apparatus 10 by reading out a desired processing recipe from the storage unit 220 in accordance with an instruction from the operation unit 210 and controlling the components of the apparatus 10 .
  • the recipes can be edited according to a manipulation by an operator through the operation unit 210 .
  • FIG. 13 is a flowchart for explaining details of step S 3 shown in FIG. 3 .
  • the reaction products may include metal contained in the mask 107 and the first magnetic layer 105 , oxide, chloride, nitride or halide of the metal, a C or Si-containing compound or the like, as described earlier, the reaction products cannot be removed only with radicals or reactant gases. Therefore, the reaction products are pre-treated to be easily removed in step S 30 (first processing step) and, subsequently or simultaneously, the reaction products are removed in step S 32 (second processing step). That is, the pre-treatment is a process of treating surfaces of the reaction products with radicals so that the reaction products can be easily removed in step S 32 .
  • the first processing gas described above is used. The first processing gas is determined depending on the reaction products and a gas to remove the reaction products in step S 32 .
  • PF 3 may be used as the second processing gas to remove the reaction products.
  • PF 3 is coordinate bonded to metal or a compound, peeled off, evaporated and exhausted.
  • PF 3 has a property of coordinate bonding to neutral metal and evaporating. Therefore, in order to efficiently remove the reaction products using PF 3 , pre-treatment for reducing the metal oxide is performed.
  • H 2 is used as the first processing gas. H 2 is supplied into the plasma generating space S 1 and hydrogen radicals are generated by a plasma.
  • the hydrogen radicals thus generated pass through the partition plate 230 to move into the substrate processing space S 2 and reduce the metal oxide to metal. Subsequently or simultaneously, PF 3 is supplied to be coordinate bonded to metal, evaporated and exhausted.
  • cyclopentadiene may be used as the second processing gas to remove the reaction products.
  • Cyclopentadiene reacts with ionized metal (substitution reaction) to produce a compound, evaporated and exhausted. Therefore, in order to efficiently remove the reaction products using cyclopentadiene, pre-treatment for ionizing metal is performed.
  • a gas which generates radicals for chloride reaction such as Cl 2
  • Cl 2 is supplied into the plasma generating space S 1 and generates chloride radicals by a plasma.
  • the chloride radicals thus generated pass through the partition plate 230 to move into the substrate processing space S 2 and react with metal to produce metal chloride.
  • cyclopentadiene is supplied to react with metal chloride, evaporated and exhausted.
  • HF may be used as the second processing gas to remove the reaction products.
  • HF is suitable to ash SiO 2 .
  • pre-treatment for oxidizing Si is performed.
  • a gas which generates radicals for oxidation reaction such as O 2
  • O 2 is supplied into the plasma generating space Si and generates oxygen radicals by a plasma.
  • the oxygen radicals thus generated pass through the partition plate 230 to move into the substrate processing space S 2 and react with Si to produce SiO 2 .
  • HF is supplied to ash SiO 2 .
  • Steps S 30 and S 32 By repeating the above-described steps S 30 and S 32 , the surfaces of the reaction products are treated by radicals and the reaction products are removed. Steps S 30 and S 32 may be performed simultaneously.
  • the partition plate 230 is placed within the processing chamber 192 to partition the internal space of the processing chamber 192 into the plasma generating space S 1 and the substrate processing space S 2 .
  • the partition plate 230 transmits neutral radicals while preventing transmission of ions and vacuum ultraviolet rays.
  • the first processing gas supply unit 122 A supplies the first processing gas into the plasma generating space S 1 .
  • the second processing gas supply unit 122 A supplies the second processing gas into the substrate processing space S 2 . Therefore, the second processing gas reacts with the reaction products without being exposed to a plasma. Thus, owing to interaction between the radicals and the second reactant processing gas, it is possible to properly remove reaction products generated when an etching target film is etched. Since the compound coordinate bonded with the above-mentioned PF 3 or cyclopentadiene is dissociated when it is exposed to a plasma, it is difficult to efficiently peel metal off by using an electron-donating gas under a plasma irradiation environment.
  • step S 30 by performing the pre-treatment of step S 30 , only radicals generated from the first processing gas can be moved into the substrate processing space S 2 to react with the reaction products.
  • step S 32 the second processing gas can react with the reaction products without being exposed to a plasma.
  • reactions of the radicals and the second processing gas can be consistently performed in a vacuum, it is possible to prevent new reaction products from being formed by processing.
  • radicals react with the reaction products so that the reaction products can be changed into a substance which is easily react with the second processing gas.
  • any of the lower electrode layer 101 , the pinning layer 102 , the second magnetic layer 103 , the insulation layer 104 , the first magnetic layer 105 , the upper electrode layer 106 and the etching mask 107 may have a multi-layer structure.
  • the pre-treatment step S 30 need not be necessarily performed. That is, the pre-treatment may not be performed depending on the type of reaction products and/or the type of the second processing gas.
  • the reaction products are assumed to contain C or metal such as Ti or W.
  • O 2 may be used as the second processing gas for removing C
  • Cl 2 or BCl 2 may be used as the second processing gas for removing Ti
  • NF 3 , SF 6 or CF 4 may be used as the second processing gas for removing W.
  • step S 32 may be performed without performing the pre-treatment.
  • the subsequent steps such as recovery and observation may be properly performed.
  • ICP Inductively Coupled Plasma
  • the plasma source is not limited thereto, and a plasma source of an electron density of an order of 10 10 to 10 12 , e.g., ECR (Electron Cyclotron Resonance) or a microwave, may be used.
  • a plasma source such as CCP (Capacitively Coupled Plasma) may be also used.
  • FIG. 14A is a schematic view of a SEM (Scanning Electron Microscope) image before removal of the reaction products (the initial state) and FIG. 14B is a schematic view of a SEM image after supplying the HF/CH 3 gas. As shown in FIGS.
  • bottom widths (Btm CD (Critical Dimension)) of the MRAM element were 40 nm with no change before and after processing with the HF/CH 4 gas. That is, it was confirmed that the reaction products generated by etching of a metal-containing layer could not be removed only with the reaction gas.
  • Test Example 1 the wafer W in FIG. 4 as an initial state was etched from the top surface of the wafer W to the top surface of the insulation layer 104 and was observed with an electron microscope. In addition, a state after removing reaction products by the plasma processing apparatus 10 shown in FIG. 10 was observed with the electron microscope.
  • BCl 3 and Ar were used as the first processing gas and HF was used as the second processing gas. Details are as shown below.
  • Substrate temperature 150° C.
  • FIG. 15A shows a schematic view of a cross-sectional SEM image of the initial state of Test Example 1.
  • FIG. 15B illustrates a schematic view of a cross-sectional SEM image of a state of etching from the top surface of the wafer W to the top surface of the insulation layer 104 .
  • FIG. 15C presents a schematic view of a cross-sectional SEM image of a state after removing reaction products by the plasma processing apparatus 10 shown in FIG. 10 .
  • FIG. 16A is a schematic view of a SEM image of a state of etching from the top surface of the wafer W to the top surface of the insulation layer 104 .
  • FIG. 16B is a schematic view of a cross-sectional SEM image of a state after removing the reaction products by the plasma processing apparatus 10 shown in FIG. 10 .
  • Test Example 2 the wafer W in FIG. 4 as an initial state was etched from the top surface of the wafer W to the top surface of the insulation layer 104 and was observed with an electron microscope. In addition, a state after removing reaction products with a liquid of HF (5%) and PF 3 was observed with the electron microscope. Details are as shown below.
  • Substrate temperature 250° C.
  • FIG. 17A is a schematic view of a cross-sectional SEM image of the initial state of Test Example 2.
  • FIG. 17B is a schematic view of a cross-sectional SEM image of a state of etching from the top surface of the wafer W to the top surface of the insulation layer 104 .
  • FIG. 17C is a schematic view of a cross-sectional SEM image of a state after removing reaction products.
  • FIG. 18A is a schematic view of a SEM image of a state of etching from the top surface of the wafer W to the top surface of the insulation layer 104 .
  • FIG. 18B is a schematic view of a cross-sectional SEM image of a state after removing reaction products.
  • plasma processing apparatus substrate processing apparatus
  • substrate processing system 100 MRAM device 101 lower electrode layer 102 pinning layer 103 second magnetic layer 104 insulation layer 105 first magnetic layer 106 upper electrode layer 107 etching mask 108 insulation film 110 mounting table 120A first gas supply unit 120B second gas supply unit 192 processing chamber S1 plasma generation space S2 substrate processing space W target object Z residue

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Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20160148789A1 (en) * 2013-08-07 2016-05-26 Beijing Nmc Co., Ltd Pre-cleaning chamber and a semiconductor processing apparatus containing the same
TWI602238B (zh) * 2016-11-30 2017-10-11 財團法人工業技術研究院 氣相蝕刻反應裝置與氣相蝕刻方法
CN107941757A (zh) * 2016-09-28 2018-04-20 朗姆研究公司 原位检测衬底处理系统的衬底区域中的氧的系统和方法
US20180151380A1 (en) * 2016-11-28 2018-05-31 Tokyo Electron Limited Substrate processing apparatus and heat shield plate
US10734201B2 (en) 2016-03-04 2020-08-04 Tokyo Electron Limited Substrate processing apparatus
CN111566786A (zh) * 2017-12-14 2020-08-21 应用材料公司 蚀刻金属氧化物而蚀刻残留物较少的方法
US20210005431A1 (en) * 2017-06-09 2021-01-07 Mattson Technology, Inc. Plasma Processing Apparatus With Post Plasma Gas Injection
US11694911B2 (en) * 2016-12-20 2023-07-04 Lam Research Corporation Systems and methods for metastable activated radical selective strip and etch using dual plenum showerhead

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104350584B (zh) * 2012-05-23 2017-04-19 东京毅力科创株式会社 基板处理装置及基板处理方法
JP6516542B2 (ja) * 2015-04-20 2019-05-22 東京エレクトロン株式会社 被エッチング層をエッチングする方法
KR101720620B1 (ko) * 2015-04-21 2017-03-28 주식회사 유진테크 기판처리장치 및 챔버 세정방법
EP3104418B8 (de) * 2015-06-08 2018-04-04 Meyer Burger (Germany) GmbH Verfahren und vorrichtung zum texturieren einer siliziumoberfläche
KR102449182B1 (ko) * 2015-10-15 2022-10-04 삼성전자주식회사 배선 형성 방법 및 이를 이용한 자기 기억 소자의 제조방법
JP2017152531A (ja) * 2016-02-24 2017-08-31 東京エレクトロン株式会社 基板処理方法
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CN108242504A (zh) * 2016-12-27 2018-07-03 上海磁宇信息科技有限公司 一种磁性隧道结的修剪方法及其制备方法
KR102096700B1 (ko) * 2017-03-29 2020-04-02 도쿄엘렉트론가부시키가이샤 기판 처리 장치 및 기판 처리 방법
JP6929148B2 (ja) * 2017-06-30 2021-09-01 東京エレクトロン株式会社 エッチング方法およびエッチング装置
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JP7244447B2 (ja) * 2020-02-20 2023-03-22 株式会社日立ハイテク プラズマ処理装置
JP7404119B2 (ja) * 2020-03-19 2023-12-25 住友重機械工業株式会社 負イオン生成装置
JP7486398B2 (ja) 2020-10-19 2024-05-17 東京エレクトロン株式会社 エッチング方法およびエッチング装置
KR20220052286A (ko) 2020-10-20 2022-04-27 도쿄엘렉트론가부시키가이샤 기판 처리 장치
KR20230014339A (ko) * 2021-07-21 2023-01-30 세메스 주식회사 기판 처리 방법 및 기판 처리 장치
JP2024048167A (ja) 2022-09-27 2024-04-08 東京エレクトロン株式会社 プラズマ処理装置及びプラズマ励起用アンテナのコイルホルダ

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5811022A (en) * 1994-11-15 1998-09-22 Mattson Technology, Inc. Inductive plasma reactor
US20040137749A1 (en) * 2003-01-13 2004-07-15 Applied Materials, Inc. Method for removing conductive residue
US20090029564A1 (en) * 2005-05-31 2009-01-29 Tokyo Electron Limited Plasma treatment apparatus and plasma treatment method
US20100206846A1 (en) * 2009-02-17 2010-08-19 Tokyo Electron Limited Substrate processing apparatus and substrate processing method

Family Cites Families (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6486521A (en) * 1987-09-29 1989-03-31 Toshiba Corp Dry etching
JPH01211920A (ja) * 1988-02-19 1989-08-25 Toshiba Corp 光化学反応装置
JPH0740569B2 (ja) 1990-02-27 1995-05-01 エイ・ティ・アンド・ティ・コーポレーション Ecrプラズマ堆積方法
US5221424A (en) 1991-11-21 1993-06-22 Applied Materials, Inc. Method for removal of photoresist over metal which also removes or inactivates corosion-forming materials remaining from previous metal etch
JPH07245193A (ja) * 1994-03-02 1995-09-19 Nissin Electric Co Ltd プラズマ発生装置及びプラズマ処理装置
JP3353514B2 (ja) * 1994-12-09 2002-12-03 ソニー株式会社 プラズマ処理装置、プラズマ処理方法及び半導体装置の作製方法
TW473857B (en) * 1996-04-26 2002-01-21 Hitachi Ltd Method of manufacturing semiconductor device
JP3317209B2 (ja) * 1997-08-12 2002-08-26 東京エレクトロンエイ・ティー株式会社 プラズマ処理装置及びプラズマ処理方法
JP2003158127A (ja) 2001-09-07 2003-05-30 Arieesu Gijutsu Kenkyu Kk 成膜方法、成膜装置、及び半導体装置
JP4633425B2 (ja) * 2004-09-17 2011-02-16 東京エレクトロン株式会社 プラズマ処理装置およびプラズマ処理方法
JP4653470B2 (ja) * 2004-12-02 2011-03-16 株式会社アルバック エッチング方法
US20070281106A1 (en) 2006-05-30 2007-12-06 Applied Materials, Inc. Process chamber for dielectric gapfill
US20070281105A1 (en) * 2006-06-02 2007-12-06 Nima Mokhlesi Atomic Layer Deposition of Oxides Using Krypton as an Ion Generating Feeding Gas
JP2008288281A (ja) * 2007-05-15 2008-11-27 Hitachi Kokusai Electric Inc 半導体装置の製造方法および基板処理装置
JP2009016453A (ja) * 2007-07-02 2009-01-22 Tokyo Electron Ltd プラズマ処理装置
JP4971930B2 (ja) * 2007-09-28 2012-07-11 東京エレクトロン株式会社 プラズマ処理装置
US20090277587A1 (en) * 2008-05-09 2009-11-12 Applied Materials, Inc. Flowable dielectric equipment and processes
US8043434B2 (en) * 2008-10-23 2011-10-25 Lam Research Corporation Method and apparatus for removing photoresist
JP5253237B2 (ja) * 2009-03-05 2013-07-31 芝浦メカトロニクス株式会社 プラズマ処理装置およびプラズマ処理方法
KR101080604B1 (ko) 2010-02-09 2011-11-04 성균관대학교산학협력단 원자층 식각 장치 및 이를 이용한 식각 방법
US8999856B2 (en) * 2011-03-14 2015-04-07 Applied Materials, Inc. Methods for etch of sin films
JP5823160B2 (ja) 2011-05-11 2015-11-25 東京エレクトロン株式会社 堆積物除去方法
CN104350584B (zh) * 2012-05-23 2017-04-19 东京毅力科创株式会社 基板处理装置及基板处理方法

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5811022A (en) * 1994-11-15 1998-09-22 Mattson Technology, Inc. Inductive plasma reactor
US20040137749A1 (en) * 2003-01-13 2004-07-15 Applied Materials, Inc. Method for removing conductive residue
US20090029564A1 (en) * 2005-05-31 2009-01-29 Tokyo Electron Limited Plasma treatment apparatus and plasma treatment method
US20100206846A1 (en) * 2009-02-17 2010-08-19 Tokyo Electron Limited Substrate processing apparatus and substrate processing method

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20160148789A1 (en) * 2013-08-07 2016-05-26 Beijing Nmc Co., Ltd Pre-cleaning chamber and a semiconductor processing apparatus containing the same
US10734201B2 (en) 2016-03-04 2020-08-04 Tokyo Electron Limited Substrate processing apparatus
US11328904B2 (en) 2016-03-04 2022-05-10 Tokyo Electron Limited Substrate processing apparatus
CN107941757A (zh) * 2016-09-28 2018-04-20 朗姆研究公司 原位检测衬底处理系统的衬底区域中的氧的系统和方法
US20180151380A1 (en) * 2016-11-28 2018-05-31 Tokyo Electron Limited Substrate processing apparatus and heat shield plate
TWI602238B (zh) * 2016-11-30 2017-10-11 財團法人工業技術研究院 氣相蝕刻反應裝置與氣相蝕刻方法
US11694911B2 (en) * 2016-12-20 2023-07-04 Lam Research Corporation Systems and methods for metastable activated radical selective strip and etch using dual plenum showerhead
US20210005431A1 (en) * 2017-06-09 2021-01-07 Mattson Technology, Inc. Plasma Processing Apparatus With Post Plasma Gas Injection
CN111566786A (zh) * 2017-12-14 2020-08-21 应用材料公司 蚀刻金属氧化物而蚀刻残留物较少的方法

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CN104350584B (zh) 2017-04-19
JP6228694B2 (ja) 2017-11-08
EP2854160A1 (de) 2015-04-01
CN104350584A (zh) 2015-02-11
JP6082391B2 (ja) 2017-02-15
KR20150016490A (ko) 2015-02-12
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EP2854160B1 (de) 2020-04-08
KR102107256B1 (ko) 2020-05-06

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