US20060040510A1 - Semiconductor device with silicon dioxide layers formed using atomic layer deposition - Google Patents
Semiconductor device with silicon dioxide layers formed using atomic layer deposition Download PDFInfo
- Publication number
- US20060040510A1 US20060040510A1 US11/225,999 US22599905A US2006040510A1 US 20060040510 A1 US20060040510 A1 US 20060040510A1 US 22599905 A US22599905 A US 22599905A US 2006040510 A1 US2006040510 A1 US 2006040510A1
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- US
- United States
- Prior art keywords
- reactant
- catalyst
- chamber
- silicon dioxide
- semiconductor device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 title claims abstract description 172
- 239000000377 silicon dioxide Substances 0.000 title claims abstract description 86
- 238000000231 atomic layer deposition Methods 0.000 title claims abstract description 69
- 235000012239 silicon dioxide Nutrition 0.000 title claims abstract description 46
- 239000004065 semiconductor Substances 0.000 title claims abstract description 37
- 238000000034 method Methods 0.000 claims abstract description 154
- 239000000376 reactant Substances 0.000 claims abstract description 105
- 239000003054 catalyst Substances 0.000 claims abstract description 104
- 239000000758 substrate Substances 0.000 claims abstract description 81
- 238000010926 purge Methods 0.000 claims abstract description 31
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical group [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 23
- 150000003510 tertiary aliphatic amines Chemical class 0.000 claims abstract description 17
- 150000003377 silicon compounds Chemical class 0.000 claims abstract description 8
- 230000008569 process Effects 0.000 claims description 79
- 239000010409 thin film Substances 0.000 claims description 51
- 239000010410 layer Substances 0.000 claims description 45
- 238000006243 chemical reaction Methods 0.000 claims description 43
- 239000006227 byproduct Substances 0.000 claims description 30
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 claims description 23
- 239000011261 inert gas Substances 0.000 claims description 22
- 229910052710 silicon Inorganic materials 0.000 claims description 21
- -1 silicon halide compound Chemical class 0.000 claims description 21
- 238000000151 deposition Methods 0.000 claims description 19
- 230000008021 deposition Effects 0.000 claims description 19
- 229910007245 Si2Cl6 Inorganic materials 0.000 claims description 18
- 238000005086 pumping Methods 0.000 claims description 18
- 239000010703 silicon Substances 0.000 claims description 18
- LXEXBJXDGVGRAR-UHFFFAOYSA-N trichloro(trichlorosilyl)silane Chemical compound Cl[Si](Cl)(Cl)[Si](Cl)(Cl)Cl LXEXBJXDGVGRAR-UHFFFAOYSA-N 0.000 claims description 18
- GETQZCLCWQTVFV-UHFFFAOYSA-N trimethylamine Chemical group CN(C)C GETQZCLCWQTVFV-UHFFFAOYSA-N 0.000 claims description 14
- 239000002356 single layer Substances 0.000 claims description 12
- 150000001412 amines Chemical class 0.000 claims description 11
- 229910021529 ammonia Inorganic materials 0.000 claims description 9
- 150000001875 compounds Chemical class 0.000 claims description 9
- 239000000203 mixture Substances 0.000 claims description 8
- CBENFWSGALASAD-UHFFFAOYSA-N Ozone Chemical compound [O-][O+]=O CBENFWSGALASAD-UHFFFAOYSA-N 0.000 claims description 6
- 229910052736 halogen Inorganic materials 0.000 claims description 6
- 239000000463 material Substances 0.000 claims description 6
- 125000001931 aliphatic group Chemical group 0.000 claims description 4
- 238000000137 annealing Methods 0.000 claims description 4
- 125000004432 carbon atom Chemical group C* 0.000 claims description 4
- 125000005843 halogen group Chemical group 0.000 claims description 4
- 238000009832 plasma treatment Methods 0.000 claims description 2
- 238000007669 thermal treatment Methods 0.000 claims description 2
- 238000012163 sequencing technique Methods 0.000 abstract description 2
- 229910052681 coesite Inorganic materials 0.000 description 40
- 229910052906 cristobalite Inorganic materials 0.000 description 40
- 229910052682 stishovite Inorganic materials 0.000 description 40
- 229910052905 tridymite Inorganic materials 0.000 description 40
- FDNAPBUWERUEDA-UHFFFAOYSA-N silicon tetrachloride Chemical compound Cl[Si](Cl)(Cl)Cl FDNAPBUWERUEDA-UHFFFAOYSA-N 0.000 description 28
- 229910003910 SiCl4 Inorganic materials 0.000 description 19
- JUJWROOIHBZHMG-UHFFFAOYSA-N Pyridine Chemical compound C1=CC=NC=C1 JUJWROOIHBZHMG-UHFFFAOYSA-N 0.000 description 18
- 239000002585 base Substances 0.000 description 11
- ZMANZCXQSJIPKH-UHFFFAOYSA-N Triethylamine Chemical compound CCN(CC)CC ZMANZCXQSJIPKH-UHFFFAOYSA-N 0.000 description 10
- 239000007789 gas Substances 0.000 description 10
- 239000002243 precursor Substances 0.000 description 10
- 229910008051 Si-OH Inorganic materials 0.000 description 9
- 229910006358 Si—OH Inorganic materials 0.000 description 9
- 125000000524 functional group Chemical group 0.000 description 9
- UMJSCPRVCHMLSP-UHFFFAOYSA-N pyridine Natural products COC1=CC=CN=C1 UMJSCPRVCHMLSP-UHFFFAOYSA-N 0.000 description 9
- ROSDSFDQCJNGOL-UHFFFAOYSA-N Dimethylamine Chemical compound CNC ROSDSFDQCJNGOL-UHFFFAOYSA-N 0.000 description 8
- 238000013459 approach Methods 0.000 description 7
- 230000008901 benefit Effects 0.000 description 7
- 230000015572 biosynthetic process Effects 0.000 description 7
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 6
- 238000004519 manufacturing process Methods 0.000 description 6
- 239000010408 film Substances 0.000 description 5
- 229910052760 oxygen Inorganic materials 0.000 description 5
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 4
- 229910002808 Si–O–Si Inorganic materials 0.000 description 4
- 239000002253 acid Substances 0.000 description 4
- 125000004429 atom Chemical group 0.000 description 4
- 229910052799 carbon Inorganic materials 0.000 description 4
- 238000003795 desorption Methods 0.000 description 4
- 150000002367 halogens Chemical class 0.000 description 4
- 229910052739 hydrogen Inorganic materials 0.000 description 4
- 239000002245 particle Substances 0.000 description 4
- 150000003839 salts Chemical class 0.000 description 4
- 125000006850 spacer group Chemical group 0.000 description 4
- 230000004913 activation Effects 0.000 description 3
- 229910052786 argon Inorganic materials 0.000 description 3
- 238000011109 contamination Methods 0.000 description 3
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- 125000004435 hydrogen atom Chemical class [H]* 0.000 description 3
- 125000002887 hydroxy group Chemical group [H]O* 0.000 description 3
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- 239000001257 hydrogen Substances 0.000 description 2
- 238000004518 low pressure chemical vapour deposition Methods 0.000 description 2
- 238000001819 mass spectrum Methods 0.000 description 2
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 2
- 230000009467 reduction Effects 0.000 description 2
- 229910021332 silicide Inorganic materials 0.000 description 2
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
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- AMNKDUNQYCISBW-UHFFFAOYSA-N CS1(C)S(C)(C)S1(C)C Chemical compound CS1(C)S(C)(C)S1(C)C AMNKDUNQYCISBW-UHFFFAOYSA-N 0.000 description 1
- 239000005046 Chlorosilane Substances 0.000 description 1
- 239000002841 Lewis acid Substances 0.000 description 1
- 239000002879 Lewis base Substances 0.000 description 1
- 229910007991 Si-N Inorganic materials 0.000 description 1
- 229910008045 Si-Si Inorganic materials 0.000 description 1
- 229910006294 Si—N Inorganic materials 0.000 description 1
- 229910006411 Si—Si Inorganic materials 0.000 description 1
- UMVBXBACMIOFDO-UHFFFAOYSA-N [N].[Si] Chemical compound [N].[Si] UMVBXBACMIOFDO-UHFFFAOYSA-N 0.000 description 1
- 230000002411 adverse Effects 0.000 description 1
- 238000004458 analytical method Methods 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 229910052794 bromium Inorganic materials 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 229910052801 chlorine Inorganic materials 0.000 description 1
- KOPOQZFJUQMUML-UHFFFAOYSA-N chlorosilane Chemical class Cl[SiH3] KOPOQZFJUQMUML-UHFFFAOYSA-N 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000002596 correlated effect Effects 0.000 description 1
- 238000005137 deposition process Methods 0.000 description 1
- ZBCBWPMODOFKDW-UHFFFAOYSA-N diethanolamine Chemical compound OCCNCCO ZBCBWPMODOFKDW-UHFFFAOYSA-N 0.000 description 1
- 230000008030 elimination Effects 0.000 description 1
- 238000003379 elimination reaction Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 229910052731 fluorine Inorganic materials 0.000 description 1
- 150000002391 heterocyclic compounds Chemical class 0.000 description 1
- 238000011065 in-situ storage Methods 0.000 description 1
- 239000013067 intermediate product Substances 0.000 description 1
- 229910052740 iodine Inorganic materials 0.000 description 1
- 150000002500 ions Chemical group 0.000 description 1
- 150000007517 lewis acids Chemical class 0.000 description 1
- 150000007527 lewis bases Chemical group 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 238000004377 microelectronic Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- CXWXDKQTDFOTBT-UHFFFAOYSA-N n,n-dimethylmethanamine;n-methylmethanamine Chemical compound CNC.CN(C)C CXWXDKQTDFOTBT-UHFFFAOYSA-N 0.000 description 1
- 238000006386 neutralization reaction Methods 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 125000004433 nitrogen atom Chemical group N* 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 238000012856 packing Methods 0.000 description 1
- 239000002574 poison Substances 0.000 description 1
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- 238000002360 preparation method Methods 0.000 description 1
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- 238000000682 scanning probe acoustic microscopy Methods 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
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- 231100000331 toxic Toxicity 0.000 description 1
- 230000002588 toxic effect Effects 0.000 description 1
- 231100000419 toxicity Toxicity 0.000 description 1
- 230000001988 toxicity Effects 0.000 description 1
- ILWRPSCZWQJDMK-UHFFFAOYSA-N triethylazanium;chloride Chemical compound Cl.CCN(CC)CC ILWRPSCZWQJDMK-UHFFFAOYSA-N 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/314—Inorganic layers
- H01L21/316—Inorganic layers composed of oxides or glassy oxides or oxide based glass
- H01L21/31604—Deposition from a gas or vapour
- H01L21/31608—Deposition of SiO2
- H01L21/31612—Deposition of SiO2 on a silicon body
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- C—CHEMISTRY; METALLURGY
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- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
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- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
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- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02205—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition
- H01L21/02208—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si
- H01L21/02211—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound being a silane, e.g. disilane, methylsilane or chlorosilane
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02205—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition
- H01L21/02208—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si
- H01L21/02219—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound comprising silicon and nitrogen
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
- H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
- H01L21/02274—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
Definitions
- the present invention relates generally to improved methods for growing silicon dioxide layers on substrates, such as in semiconductor manufacture, using atomic layer deposition processes.
- the methods of this invention facilitate exercising extremely precise control over the properties of a silicon dioxide layer applied, for example, to a gate oxide or a dielectric layer.
- the methods of this invention have particular utility in fabricating gate spacers, gate oxides, silicide blocking layers, bit line spacers, inter-level dielectric layers, etch stoppers, and related final or intermediate products in semiconductor fabrication.
- a silicon dioxide layer is typically formed on a substrate surface by such conventional techniques as chemical vapor deposition (CVD), low-pressure CVD (LPCVD), or plasma-enhanced CVD (PECVD). These techniques are recognized as providing a good step coverage at a comparatively low temperature. As the density of a semiconductor device increases, however, so too do the heights of the respective elements which comprise the device. As a result, a problem arises due to increased pattern density variation and a corresponding decrease in uniformity.
- CVD chemical vapor deposition
- LPCVD low-pressure CVD
- PECVD plasma-enhanced CVD
- Klaus '442 provides a method for growing atomic layer thin films on functionalized substrates at room temperatures utilizing catalyzed binary reaction sequence chemistry. More particularly, according to the Klaus '442 patent, a two-step atomic layer deposition (ALD) process, using two catalyst-assisted “half-reactions” carried out at room temperature, can be used to grow a silicon dioxide film on an OH terminated substrate.
- ALD atomic layer deposition
- Klaus '442 utilizes SiCl 4 as a “first molecular precursor” and pyridine as a catalyst.
- the substrate is functionalized with OH ⁇ as a “first functional group,” for example using H 2 O.
- the functionalized substrate is exposed to a catalyst that is a Lewis base or Lewis acid (e.g., pyridine) and a first molecular precursor which includes the primary element of the film to be grown as well as a second functional group (e.g., SiCl 4 ).
- a catalyst that is a Lewis base or Lewis acid (e.g., pyridine) and a first molecular precursor which includes the primary element of the film to be grown as well as a second functional group (e.g., SiCl 4 ).
- the catalyst interacts with the first functional group of the functionalized substrate; then, the first molecular precursor reacts with the first functional group (which has been activated by the catalyst) resulting in a displacement of the catalyst and a bond between the first functional group of the substrate and the primary element of the first molecular precursor.
- these two reactions comprise the first “half-reaction” and represent the beginning of film formation with the second functional group now located across the surface of the film.
- the second molecular precursor reacts with the bond between the primary element of the first molecular precursor and the catalyst resulting in a displacement of the catalyst and the deposition of the first functional group on the newly-grown surface layer, thereby completing a full growth/deposition cycle and restoring the substrate surface to a functionalized state in preparation for the next cycle.
- the Klaus '442 patent represents that: “Strong amine bases like triethylamine ((C 2 H 5 ) 3 N) have been shown to form salt compounds like triethylammonium chloride (NH+(C 2 H 5 )3Cl—) in the presence of chlorosilanes. These salts could poison the surface and degrade the reaction efficiency as they build up.” (column 9, line 24 ⁇ 28). Thus, Klaus '442 appears to teach away from the presence of triethylamine, i.e. tertiary aliphatic amine, in ALD applications. But, in this invention, control of process conditions coupled with a variety of purge methods have been found to solve the above problems.
- a general object of this invention is to provide improved methods for using atomic layer deposition (ALD) to grow highly uniform thin films having superior surface density, extremely high purity, and with highly precise control of surface properties.
- ALD atomic layer deposition
- a further object of this invention is to provide ALD methods for forming silicon dioxide layers on a semiconductor substrate using silicon compounds having at least two silicon atoms as one of the reactant materials.
- Still another object of this invention is to provide ALD methods for forming silicon dioxide layers on a semiconductor substrate using tertiary aliphatic amine compounds as a catalyst material.
- Yet another object of this invention is to provide optimum temperature and pressure ranges for carrying out the methods of this invention.
- Another object of this invention is to provide reaction/purging process sequences, and timing and techniques for carrying out such deposition cycles, to enhance the benefits of the methods of this invention.
- Still another object of this invention is to provide methods for hardening a silicon dioxide thin film formed on a substrate by the methods of this invention.
- Yet another object of this invention is to provide improved semiconductor devices having a substrate with a silicon dioxide layer which has superior surface density and is of extremely high purity and uniformity deposited along a surface of the substrate for use in such applications as gate spacers, gate oxides, silicide blocking layers, bit line spacers, interlevel dielectric layers, etch stoppers, and the like.
- a specific object of this invention is to provide catalyst-assisted ALD methods for forming silicon dioxide layers on a semiconductor substrate using Si 2 Cl 6 as the first reactant, or using a tertiary aliphatic amine as the catalyst, or both.
- the invention consists of improved methods for using catalyst-assisted atomic layer deposition (ALD) to form silicon dioxide thin films having enhanced properties and purity on semiconductor substrates.
- a silicon compound having at least two silicon atoms e.g., Si 2 Cl 6
- a tertiary aliphatic amine compound e.g., trimethyl amine
- a silicon compound having at least two silicon atoms is used as the first reactant and a tertiary aliphatic amine is used as the catalyst in an ALD process.
- methods for hardening the deposited silicon dioxide thin films are provided, optimum temperature and pressure conditions for carrying out the methods of this invention are established, and alternative reaction/purging process sequences for the methods of this invention are described.
- FIG. 1 is a flow chart that schematically illustrates the steps of the ALD methods of this invention for forming a silicon dioxide thin film on a substrate.
- FIG. 2 is a schematic illustration of the several chemical reaction steps, showing what is theorized to be the underlying chemistry, on which the improved ALD methods of this invention are based.
- FIG. 3 compares the silicon dioxide deposition rate on a substrate for an ALD method according to this invention with that for a prior art ALD process.
- FIG. 4 compares the silicon “richness” of a thin film SiO 2 layer formed on a substrate using an ALD method according to this invention with that for a prior art ALD process.
- FIG. 5A compares the silicon bonding status of silicon in a SiO 2 monolayer formed using an ALD method according to this invention with that for a prior art ALD process.
- FIG. 5B schematically illustrates what is theorized to be the different silicon chemical bonding arrangements which account for the differences in bonding status established by FIG. 5A .
- FIG. 6 compares the wet etch rate of a SiO 2 thin film formed using an ALD method according to this invention with that for a prior art ALD process.
- FIG. 7 is a chromatograph confirming the formation of unwanted particulate byproducts having Si—N bonds when an ALD process is carried out according to prior art teachings using a catalyst containing one or more N—H bonds.
- FIG. 8 illustrates a gas pulsing method of supplying reactant and catalyst feeds to the reactant chamber in accordance with one embodiment of this invention.
- FIG. 9-12 illustrate alternative possible representative “recipes” or sequencing cycles for gas pulsing/pumping and/or purging to be used in carrying out ALD methods in accordance with this invention.
- FIG. 13 illustrates how the SiO 2 deposition rate on a substrate using an ALD method in accordance with this invention varies in relation to process temperature.
- FIG. 14 illustrates how the impurity content (as measured by carbon present) of a SiO 2 thin film formed using an ALD method in accordance with this invention varies in relation to process temperature.
- FIG. 15 illustrates how the SiO 2 deposition rate on a substrate using an ALD method in accordance with this invention varies in relation to process pressure.
- FIG. 16 illustrates how the non-uniformity of a SiO 2 thin film formed using an ALD method in accordance with this invention varies in relation to process pressure.
- Table 1 below is a summary comparing the theoretical chemical reactions underlying the prior art high-temperature ALD technique and the catalyst-assisted ALD technique of the Klaus '442 patent with three illustrative embodiments of the present invention, as described hereinafter.
- TABLE 1 High-Temperature ALD Si—OH* + SiCl 4 ⁇ Si—O—Si—Cl 3 * + HCl Si—Cl* + H 2 O ⁇ Si—OH* + HCl Klaus ′442 patent Si—OH* + C 5 H 5 N + SiCl 4 ⁇ Si—O—Si—Cl 3 * + HCL + C 5 H 5 N Si—O—Si—Cl 3 * + C 5 H 5 N + H 2 O ⁇ Si—O—OH* + HCl + C 5 H 5 N
- Present Invention Si—OH* + Si 2 Cl 6 + C 5 H 5 N 1st ex.
- Table 2 is a summary of illustrative combinations of catalyst, first reactant and second reactant corresponding to different illustrative embodiments of the present invention as described hereinafter.
- TABLE 2 2 nd Catalyst 1 st reactant reactant 1st ex. Ammonia, amine Si 2 Cl 6 H 2 O, embodiment H 2 O 2, ozone 2nd ex. Tertiary aliphatic amine SiCl 4 H 2 O, embodiment (R 3 N) H 2 O 2, ozone 3rd ex. Tertiary aliphatic amine Si 2 Cl 6 H 2 O, embodiment (R 3 N) H 2 O 2, ozone
- FIG. 1 is a flow chart that schematically illustrates the several steps, procedures and sequential chemical reactions which apply generically to the methods of this invention for forming silicon dioxide thin films on a substrate by means of a catalyzed atomic layer deposition (ALD) procedure. The steps illustrated in the flow chart of FIG. 1 are discussed below.
- ALD atomic layer deposition
- a suitable functionalized substrate is loaded into a reaction chamber.
- the substrate is preheated until the temperature of the substrate reaches a suitable temperature for starting the silicon dioxide ALD process, typically about 25°-150° C.
- the reaction chamber is exhausted either at the same time as or immediately following the preheating. Evacuating the chamber might typically take under 60 seconds.
- Step 130 is comprised of substeps 132 - 138 , which are discussed individually below.
- a mixture of the first reactant and catalyst is supplied to the reaction chamber.
- the catalyst acts by lowering reaction activation energy of the first reactant on the substrate. As a result, the process temperature is lowered to about room temperature or slightly above room temperature.
- the process temperature in the chamber is typically about 25°-150° C., preferably about 90°-110° C.
- the process pressure in the chamber is typically about 0.1 ⁇ 100 torr, preferably about 0.5 ⁇ 5 torr.
- An inert gas, for example, argon (Ar) may be supplied to the chamber along with first reactant and catalyst.
- the H of the —OH reaction sites reacts with a halogen atom of the first reactant in the presence of the first base catalyst to form halogen acid.
- the halogen acid is neutralized with the first base catalyst, and a salt is produced.
- Si atoms of the first reactant react with the 0 on a reaction site on the substrate to form a chemisorbed layer of the first reactant.
- step 132 By-products of the first reaction process (step 132 ), for example, salt, unreacted first reactant, etc. are removed.
- a mixture of the second reactant (which contains O and H) and a second base catalyst is now supplied to the chamber causing the chemisorbed layer of the first reactant to chemically react with the second reactant.
- the second reactant is H 2 O, H 2 O 2 , or ozone.
- the second base catalyst is the same as the first base catalyst.
- the ranges of temperature and pressure in the chamber are typically substantially the same as the ranges of temperature and pressure used in step 132 .
- the O element of the second reactant reacts with Si which is chemisorbed on the substrate surface.
- the H element of the second reactant reacts with the halogen atom, so halogen acid is produced. Salt is then produced by neutralization between such halogen acid and the base catalyst.
- the by-products of the second reaction process (step 136 ) are removed.
- the reaction chamber is exhausted to remove any remaining deposition by-products in the chamber, a step desirably completed in about 90 seconds.
- step 140 no gas is supplied to the chamber.
- the substrate with an SiO 2 thin film along its surface is unloaded from the chamber.
- This step involves hardening the newly deposited SiO 2 thin film.
- Hardening methods 2 and 3 above have been found to work especially well.
- silicon dioxide thin films are grown on the functionalized surface of a substrate having hydroxyl groups using Si 2 Cl 6 or a comparable compound, e.g., a silicon halide having two or more silicon atoms, as the first reactant; a compound containing 0 and H elements, e.g., H 2 O and/or H 2 O 2 , as the second reactant; and a base compound, e.g., ammonia or an amine, as the catalyst.
- Si 2 Cl 6 or a comparable compound, e.g., a silicon halide having two or more silicon atoms, as the first reactant
- a compound containing 0 and H elements e.g., H 2 O and/or H 2 O 2
- a base compound e.g., ammonia or an amine
- the first reactant is a silicon compound having at least two silicon atoms, for example a silicon-halide compound selected from the group consisting of: Si 2 X 6 , Si 3 X 8 , Si 4 X 10 , and Si 3 X 6 (Triangle), which has the following chemical structure: wherein X is a halogen such as F, Cl, Br, I.
- the first reactant is selected from the group consisting of Si 2 Cl 6 , Si 3 Cl 8 , Si 4 Cl 10 and Si 3 Cl 6 (Triangle).
- the second reactant is a compound containing oxygen (O) and hydrogen (H) components selected from the group consisting of H 2 O; H 2 O 2 ; and ozone.
- a chemisorbed layer of the first reactant is formed along the substrate surface. Unreacted first reactant and byproducts are then removed from the region of the substrate.
- the chemisorbed layer of the first reactant is reacted with the second reactant in the presence of a base compound as the catalyst, which may be the same catalyst used in reacting the first reactant or a different base compound catalyst. Unreacted second reactant and byproducts of this second reaction step are removed from the substrate region.
- the surface of the substrate, now containing a new SiO 2 monolayer, is restored to the hydroxyl group functionalized state ready to begin a new ALD cycle.
- SiCl 4 when a Si atom reacts with the O—H site on the substrate and forms a single bond with O, SiCl 4 is rotated. Due to the steric hindrance of Cl (which does not participate in the reaction), the next O—H site cannot react with another SiCl 4 . By contrast, a Si 2 Cl 6 monolayer can react with two Si atoms at the same time and thus speeds up the ALD process. Furthermore, the quality of the resulting silicon dioxide layer is better because the molecular packing along the surface is denser.
- FIGS. 3-6 compare the properties and performance of SiO 2 monolayers grown on a substrate using the hexachlorodisilicon (HCD) method of this invention with SiO 2 monolayers grown using the tetrachlorosilicon (TCS) method of Klaus '442.
- HCD hexachlorodisilicon
- TCS tetrachlorosilicon
- the graph in FIG. 3 compares the deposition rates of SiO 2 monolayers on a substrate utilizing the prior art SiCl 4 approach with those obtained utilizing the Si 2 Cl 6 technique of this invention at varying process temperatures.
- FIG. 3 shows that, at every process temperature, the deposition rate utilizing Si 2 Cl 6 (circular points) is approximately double the deposition rate using SiCl 4 (square points).
- FIG. 4 compares the “silicon richness” of a thin film layer grown on a substrate using the prior art TCS (SiCl 4 ) approach with that of a thin film grown using the HCD (Si 2 Cl 6 ) approach of this invention.
- TCS Spin-Coupled Source
- HCD Hexadiene-dioxide
- FIG. 4 shows that the ratio of Si to O using the TCS technique is 1:1.95 while the Si to O ratio using the HCD technique is 1:1.84.
- the thin film SiO 2 layer which is formed using the HCD approach is desirably “richer” in silicon.
- FIG. 5A uses XPS data to compare the silicon bonding status of silicon in a SiO 2 monolayer grown using the HCD approach of this invention with the bonding status of silicon in a monolayer grown using the prior art TCS method.
- the difference in bonding status seen in the graph of FIG. 5A , as well as the difference in silicon “richness” shown by FIG. 4 is believed to be explained by the different type of silicon bonds formed when the SiO 2 monolayer is grown by the HCD method instead of the TCS method.
- FIG. 5A uses XPS data to compare the silicon bonding status of silicon in a SiO 2 monolayer grown using the HCD approach of this invention with the bonding status of silicon in a monolayer grown using the prior art TCS method.
- the TCS method is believed to result in adjacent silicon atoms in a SiO 2 monolayer being bonded to each other only through an intermediate oxygen atom, whereas the HCD method of this invention is believed to result in at least some direct Si—Si bonding in the SiO 2 monolayer.
- FIG. 6 compares the wet etch rate of SiO 2 thin films formed using the HCD method of this invention with the wet etch rate for SiO 2 thin films formed using the prior art TCS method. (The vertical scale of the bar graph of FIG. 6 has been made discontinuous to accommodate the data.) FIG. 6 shows that the wet etch rate of SiO 2 thin films formed using the HCD method of this invention is about six times better than for SiO 2 thin films formed using the TCS method.
- silicon dioxide thin films are grown on a functionalized surface of a substrate using a silicon halide as the first reactant; a second reactant containing O and H atoms, e.g., H 2 O and/or H 2 O 2 ; and a tertiary aliphatic amine catalyst.
- a chemisorbed layer of the first reactant is formed along the substrate surface. Unreacted first reactant and byproducts are then removed from the region of the substrate.
- the chemisorbed layer of the first reactant is reacted with the second reactant in the presence of the tertiary aliphatic amine catalyst. Byproducts of this second reaction step are removed from the substrate region.
- FIG. 7 and Table 3 as discussed below demonstrate the validity and the enormous importance of this finding.
- FIG. 7 is a result of RGA analysis that confirms the formation of solid particulate byproducts when an ALD process is carried out using an amine catalyst that is not a tertiary aliphatic amine.
- FIG. 7 is based on a catalyzed ALD process as taught by Klaus '442 using SiCl 4 as the first reactant with dimethylamine ((H 3 C) 2 NH), an amine with a single N—H bond, as the catalyst.
- a residual mass spectrum apparatus was connected to the ALD reaction chamber to analyze byproducts coming from the reaction. The mass spectrum of FIG.
- Table 3 compares the number of undesired particles (having a size of at least 0.16 ⁇ m) which were deposited on substrate surfaces of the same area when catalyzed ALD was carried out using SiCl 4 as a first reactant with different amines as the catalyst.
- Table 3 shows that using ammonia (NH 3 ) as the ALD catalyst, a molecule with three vulnerable N—H bonds, the ALD process resulted in tens of thousands of byproduct particles on the surface of the SiO 2 thin film. This very high level of particulate contamination on an SiO 2 thin film adversely affects performance of the semiconductor device and is completely unacceptable for many of the most demanding modern semiconductor applications.
- NH 3 ammonia
- Table 3 also shows that the use of dimethylamine as the ALD catalyst, a molecule with only one vulnerable N—H bond, is effective in somewhat reducing the production of particulate byproduct by about one order of magnitude. Even particulate production in the thousands range on an SiO 2 thin film, as obtained with dimethylamine catalyst, is still far in excess of acceptable limits for very high performance semiconductor devices.
- Table 3 further shows, however, that the use of trimethylamine as the ALD catalyst, thereby eliminating all vulnerable N—H bonds, has the dramatic and unexpected result of reducing the production of particles of byproduct to only several tens, a three order of magnitude reduction relative to ammonia, and a two order of magnitude reduction even relative to dimethylamine.
- this invention embodiment uses a tertiary aliphatic amine catalyst instead of the pyridine which is the preferred catalyst for example in the Klaus '442 patent.
- Pyridine is a heterocyclic compound containing a ring of five carbon atoms and one nitrogen atom having the formula C 5 H 5 N. It exists at room temperature as a toxic liquid having a pungent, characteristic odor, which must be carefully handled.
- pyridine When used as a catalyst in an ALD process, pyridine must be vaporized to the gaseous state (the boiling point of pyridine is 115.5° C.). Thus, the equipment for treating pyridine is complicated, and a pyridine supply line is easily contaminated.
- a low molecular weight tertiary aliphatic amine for example trimethylamine
- trimethylamine is a gas at ambient conditions, which makes it easier to use than a catalyst prone to undergo a phase change at normal reaction conditions.
- the toxicity of trimethylamine is much lower than that of pyridine and the boiling point of trimethylamine is only 3 ⁇ 4° C.
- silicon dioxide thin films are grown on a functionalized surface of a substrate using a silicon compound having at least two or more silicon atoms, e.g., a silicon halide such as Si 2 Cl 6 , as the first reactant; a compound containing O and H atoms, e.g., H 2 O and/or H 2 O 2 , as the second reactant; and, a tertiary aliphatic amine catalyst.
- a silicon compound having at least two or more silicon atoms e.g., a silicon halide such as Si 2 Cl 6
- a compound containing O and H atoms e.g., H 2 O and/or H 2 O 2
- the functionalized surface of the substrate is exposed to a mixture of the first reactant and the tertiary aliphatic amine catalyst in a first process step to form a chemisorbed layer of the first reactant along the substrate surface. Unreacted first reactant and any byproducts are then removed from the region of the substrate. In the next process step, the chemisorbed layer of the first reactant is reacted with the second reactant in the presence of the tertiary aliphatic amine catalyst. Byproducts of this second reaction step are removed from the substrate region.
- FIG. 8 illustrates a gas pulsing method for carrying out steps 132 - 138 of FIG. 1 , as described below.
- a first reactant and a suitable catalyst are flowed into the reaction chamber through separate respective supply lines.
- inert gas for example, argon gas
- Inert gas for purging flows into the chamber through each of the first reactant supply line, the second reactant supply line, and the catalyst supply line.
- a second reactant which contains O and H, and a suitable catalyst are flowed into the chamber through separate respective supply lines.
- inert gas for example, argon gas
- inert gas can be flowed into the chamber through the first reactant supply line to purge the first reactant supply line.
- Inert gas for purging flows into the chamber through each of the first reactant supply line, the second reactant supply line, and the catalyst supply line.
- FIGS. 9-12 Some representative “recipes” or sequences for gas pulsing/pumping or purging the various feed lines and the reactant chamber in accordance with steps 132 - 138 of FIG. 1 over 10 second process time intervals are illustrated in FIGS. 9-12 .
- FIG. 9 illustrates a process purge sequence comprising the following steps per cycle being conducted at and over selected process time periods using an inert gas to purge and remove byproducts: 0-2 seconds process time—HCD feeding; 2-4 seconds process time—purging; 4-7.5 seconds process time-H 2 O feeding; and 7.5-10 seconds—purging.
- FIG. 9 illustrates a process purge sequence comprising the following steps per cycle being conducted at and over selected process time periods using an inert gas to purge and remove byproducts: 0-2 seconds process time—HCD feeding; 2-4 seconds process time—purging; 4-7.5 seconds process time-H 2 O feeding; and 7.5-10 seconds—purging.
- FIG. 9 illustrates a process purge sequence comprising the following
- FIG. 10 illustrates a process pumping sequence, wherein the pumping pressure is lower than the first and second reactant supply pressures, comprising the sequenced steps per cycle of: 0-2 seconds process time—HCD feeding; 2-4 seconds process time—pumping; 4-7.5 seconds process time—H 2 O feeding; and 7.5-10 seconds process time—pumping.
- FIG. 11 illustrates a process purge-pumping sequence, wherein pumping is used after purging, comprising the sequences steps per cycle of: 0-2 seconds process time—HCD feeding; 2-3 seconds process time—purging; 3-4 seconds process time—pumping; 4-7.5 seconds process time—H 2 O feeding; 7.5-8.5 seconds process time—purging; and 8.5-10 seconds process time—pumping.
- FIG. 11 illustrates a process purge-pumping sequence, wherein pumping is used after purging, comprising the sequences steps per cycle of: 0-2 seconds process time—HCD feeding; 2-3 seconds process time—purging; 3-4 seconds process time—pumping; 4-
- process pumping—purge sequence wherein purging is used after pumping, comprising the sequenced steps per cycle of: 0-2 seconds process time—HCD feeding; 2-3 seconds process time—pumping; 3-4 seconds process time—purging; 4-7.5 seconds process time—pumping; 7.5-8.5 seconds process time pumping; and 8.5-10 seconds process time—purging.
- temperature conditions for carrying out catalyst-assisted ALD for growing SiO 2 thin films on substrates according to this invention are optimized by balancing two competing process parameters.
- the deposition rate for forming SiO 2 thin films using catalyst-assisted ALD and a multiple-silicon atom compound (e.g., Si 2 Cl 6 ) as the first reactant is inversely proportional to temperature.
- FIG. 13 shows that, in general, the higher the process temperature, the slower the deposition rate. This appears to be due to desorption rate, and it is a distinctive feature of an ALD process because ALD is a surface reaction.
- a SIMS (secondary ion mass spectrometer) graph of carbon content over time at three different process temperatures the carbon content of an ALD-deposited SiO 2 thin film also varies according to process temperature.
- process temperature In general, at lower process temperatures, carbon-containing byproducts of the ALD reaction processes are not fully removed from the substrate surface during processing and become trapped in the SiO 2 thin films being deposited. The resulting increase in the impurity level of the thin films results in a lower quality semiconductor device.
- pressure conditions for carrying out catalyst-assisted ALD for growing SiO 2 thin films on substrates according to this invention are optimized by balancing two competing process parameters.
- the deposition rate for forming SiO 2 thin films using catalyst-assisted ALD is directly proportional to process condition pressure, i.e., the higher the pressure, the thicker the layer of SiO 2 deposited over a given time period/number of ALD cycles.
- FIG. 16 illustrates that a non-linear relationship exists between process pressure and non-uniformity of the SiO 2 thin film.
- FIG. 16 shows that, up to a point, higher process pressure reduces non-uniformity of the layers deposited; but, beyond that point, higher pressure is correlated with higher non-uniformity.
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Abstract
Improved methods are disclosed for catalyst-assisted atomic layer deposition (ALD) to form a silicon dioxide layer having superior properties on a semiconductor substrate by using a first reactant component consisting of a silicon compound having at least two silicon atoms, or using a tertiary aliphatic amine as the catalyst component, or both in combination, together with related purging methods and sequencing.
Description
- This application is a divisional of U.S. application Ser. No. 10/459,943, filed on Jun. 12, 2003, which relies for priority upon Korean Patent Application No. 02-39428, filed on Jul. 8, 2002 and Korean Patent Application No. 03-6370, filed Jan. 30, 2003, the contents of which are herein incorporated by reference in their entirety.
- 1. Field of the Invention
- The present invention relates generally to improved methods for growing silicon dioxide layers on substrates, such as in semiconductor manufacture, using atomic layer deposition processes. The methods of this invention facilitate exercising extremely precise control over the properties of a silicon dioxide layer applied, for example, to a gate oxide or a dielectric layer. The methods of this invention have particular utility in fabricating gate spacers, gate oxides, silicide blocking layers, bit line spacers, inter-level dielectric layers, etch stoppers, and related final or intermediate products in semiconductor fabrication.
- 2. Description of the Related Art
- In manufacturing a semiconductor device, a silicon dioxide layer is typically formed on a substrate surface by such conventional techniques as chemical vapor deposition (CVD), low-pressure CVD (LPCVD), or plasma-enhanced CVD (PECVD). These techniques are recognized as providing a good step coverage at a comparatively low temperature. As the density of a semiconductor device increases, however, so too do the heights of the respective elements which comprise the device. As a result, a problem arises due to increased pattern density variation and a corresponding decrease in uniformity.
- As taught in U.S. Pat. No. 6,090,442 (Klaus '442), which patent is incorporated herein by reference, one approach to these recognized problems was to use an atomic layer deposition (ALD) technique. Klaus '442 teaches, however, that the big drawback to ALD techniques was that they typically required temperatures greater than 600° K. and reactant exposures of greater than 109 L (where 1 L=10−6 Torr sec) for the surface reactions to reach completion. Such high temperature and high exposure procedures are not desirable for ultra-thin film deposition applications for various reasons including the difficulty of carrying out such procedures.
- An improved approach to such problems was taught by the Klaus '442 patent. Klaus '442 provides a method for growing atomic layer thin films on functionalized substrates at room temperatures utilizing catalyzed binary reaction sequence chemistry. More particularly, according to the Klaus '442 patent, a two-step atomic layer deposition (ALD) process, using two catalyst-assisted “half-reactions” carried out at room temperature, can be used to grow a silicon dioxide film on an OH terminated substrate.
- In a specific embodiment, Klaus '442 utilizes SiCl4 as a “first molecular precursor” and pyridine as a catalyst. First, the substrate is functionalized with OH− as a “first functional group,” for example using H2O. Next, the functionalized substrate is exposed to a catalyst that is a Lewis base or Lewis acid (e.g., pyridine) and a first molecular precursor which includes the primary element of the film to be grown as well as a second functional group (e.g., SiCl4). As described by Klaus '442, in the first “half-reaction,” the catalyst interacts with the first functional group of the functionalized substrate; then, the first molecular precursor reacts with the first functional group (which has been activated by the catalyst) resulting in a displacement of the catalyst and a bond between the first functional group of the substrate and the primary element of the first molecular precursor. Taken together, these two reactions comprise the first “half-reaction” and represent the beginning of film formation with the second functional group now located across the surface of the film.
- At this point in the Klaus '442 process, excess first molecular precursor and any byproducts are purged from the reaction chamber, and the partially-reacted substrate is exposed to additional catalyst and a second molecular precursor. The catalyst activates the exposed second functional group along the surface of the film by reacting with it and with a second molecular precursor, resulting in a displacement of the second functional group and also resulting in a bond to the primary element of the first molecular precursor. Now, the second molecular precursor reacts with the bond between the primary element of the first molecular precursor and the catalyst resulting in a displacement of the catalyst and the deposition of the first functional group on the newly-grown surface layer, thereby completing a full growth/deposition cycle and restoring the substrate surface to a functionalized state in preparation for the next cycle.
- Although the catalyst-assisted deposition processes of the Klaus '442 patent represent substantial advances in ALD technology, and do make possible room-temperature ALD, it has been found that the surface density, uniformity and quality of thin films grown using the Klaus '442 technique will not meet increasingly demanding standards in the semiconductor industry. With the seemingly never-ending evolution toward ever-smaller microelectronic components, ever-more precise control is required over the properties of semiconductor devices. Such precision control requires increasingly highly uniform surface properties and pattern density. It has now been found that novel improvements in ALD techniques in accordance with this invention produce thin films for semiconductor devices having superior surface density and significantly more uniform surface properties than could be achieved with prior art methods resulting in surprisingly more precise control over the properties of a thin film layer and in higher quality semiconductor devices suitable for modern miniaturization applications.
- The Klaus '442 patent represents that: “Strong amine bases like triethylamine ((C2H5)3N) have been shown to form salt compounds like triethylammonium chloride (NH+(C2H5)3Cl—) in the presence of chlorosilanes. These salts could poison the surface and degrade the reaction efficiency as they build up.” (column 9, line 24˜28). Thus, Klaus '442 appears to teach away from the presence of triethylamine, i.e. tertiary aliphatic amine, in ALD applications. But, in this invention, control of process conditions coupled with a variety of purge methods have been found to solve the above problems.
- Accordingly, a general object of this invention is to provide improved methods for using atomic layer deposition (ALD) to grow highly uniform thin films having superior surface density, extremely high purity, and with highly precise control of surface properties.
- A further object of this invention is to provide ALD methods for forming silicon dioxide layers on a semiconductor substrate using silicon compounds having at least two silicon atoms as one of the reactant materials.
- Still another object of this invention is to provide ALD methods for forming silicon dioxide layers on a semiconductor substrate using tertiary aliphatic amine compounds as a catalyst material.
- Yet another object of this invention is to provide optimum temperature and pressure ranges for carrying out the methods of this invention.
- Another object of this invention is to provide reaction/purging process sequences, and timing and techniques for carrying out such deposition cycles, to enhance the benefits of the methods of this invention.
- Still another object of this invention is to provide methods for hardening a silicon dioxide thin film formed on a substrate by the methods of this invention.
- Yet another object of this invention is to provide improved semiconductor devices having a substrate with a silicon dioxide layer which has superior surface density and is of extremely high purity and uniformity deposited along a surface of the substrate for use in such applications as gate spacers, gate oxides, silicide blocking layers, bit line spacers, interlevel dielectric layers, etch stoppers, and the like.
- A specific object of this invention is to provide catalyst-assisted ALD methods for forming silicon dioxide layers on a semiconductor substrate using Si2Cl6 as the first reactant, or using a tertiary aliphatic amine as the catalyst, or both.
- These and other objects, advantages and improvements of the present invention will be better understood by the following description which is to be read in conjunction with the several Figures and Drawings as discussed hereinafter.
- The invention consists of improved methods for using catalyst-assisted atomic layer deposition (ALD) to form silicon dioxide thin films having enhanced properties and purity on semiconductor substrates. In one invention embodiment, a silicon compound having at least two silicon atoms, e.g., Si2Cl6, is used as the first reactant in an ALD process. In a second invention embodiment, a tertiary aliphatic amine compound, e.g., trimethyl amine, is used as the catalyst in an ALD process. In a third invention embodiment, a silicon compound having at least two silicon atoms is used as the first reactant and a tertiary aliphatic amine is used as the catalyst in an ALD process. In other invention embodiments, methods for hardening the deposited silicon dioxide thin films are provided, optimum temperature and pressure conditions for carrying out the methods of this invention are established, and alternative reaction/purging process sequences for the methods of this invention are described.
-
FIG. 1 is a flow chart that schematically illustrates the steps of the ALD methods of this invention for forming a silicon dioxide thin film on a substrate. -
FIG. 2 is a schematic illustration of the several chemical reaction steps, showing what is theorized to be the underlying chemistry, on which the improved ALD methods of this invention are based. -
FIG. 3 compares the silicon dioxide deposition rate on a substrate for an ALD method according to this invention with that for a prior art ALD process. -
FIG. 4 compares the silicon “richness” of a thin film SiO2 layer formed on a substrate using an ALD method according to this invention with that for a prior art ALD process. -
FIG. 5A compares the silicon bonding status of silicon in a SiO2 monolayer formed using an ALD method according to this invention with that for a prior art ALD process.FIG. 5B schematically illustrates what is theorized to be the different silicon chemical bonding arrangements which account for the differences in bonding status established byFIG. 5A . -
FIG. 6 compares the wet etch rate of a SiO2 thin film formed using an ALD method according to this invention with that for a prior art ALD process. -
FIG. 7 is a chromatograph confirming the formation of unwanted particulate byproducts having Si—N bonds when an ALD process is carried out according to prior art teachings using a catalyst containing one or more N—H bonds. -
FIG. 8 illustrates a gas pulsing method of supplying reactant and catalyst feeds to the reactant chamber in accordance with one embodiment of this invention. -
FIG. 9-12 illustrate alternative possible representative “recipes” or sequencing cycles for gas pulsing/pumping and/or purging to be used in carrying out ALD methods in accordance with this invention. -
FIG. 13 illustrates how the SiO2 deposition rate on a substrate using an ALD method in accordance with this invention varies in relation to process temperature. -
FIG. 14 illustrates how the impurity content (as measured by carbon present) of a SiO2 thin film formed using an ALD method in accordance with this invention varies in relation to process temperature. -
FIG. 15 illustrates how the SiO2 deposition rate on a substrate using an ALD method in accordance with this invention varies in relation to process pressure. -
FIG. 16 illustrates how the non-uniformity of a SiO2 thin film formed using an ALD method in accordance with this invention varies in relation to process pressure. - Table 1 below is a summary comparing the theoretical chemical reactions underlying the prior art high-temperature ALD technique and the catalyst-assisted ALD technique of the Klaus '442 patent with three illustrative embodiments of the present invention, as described hereinafter.
TABLE 1 High-Temperature ALD Si—OH* + SiCl4 → Si—O—Si—Cl3* + HCl Si—Cl* + H2O→ Si—OH* + HCl Klaus ′442 patent Si—OH* + C5H5N + SiCl4 → Si—O—Si—Cl3* + HCL + C5H5N Si—O—Si—Cl3* + C5H5N + H2O → Si—O—OH* + HCl + C5H5N Present Invention: Si—OH* + Si2Cl6 + C5H5N 1st ex. embodiment → Si—O—Si(Cl2)—Si—Cl3* + HCl + C5H5N Si—O—Si(Cl2)—Si—Cl3* + C5H5N + H2O → Si—O—Si—O—Si—OH* + HCl + C5H5N Present Invention: Si—OH* + SiCl4 + R3N 2nd ex. embodiment → Si—O—Si—Cl3* + HCl + C5H5N Si—O—Si—Cl3* + R3N + H2O → Si—O—Si—OH* + HCl + C5H5N Present Invention: Si—OH* + Si2Cl6+ R3N 3rd ex. embodiment → Si—O—Si(Cl2)—Si—Cl3* + HCL + R3N Si—O—Si(Cl2)—Si—Cl3* + R3N + H2O → Si—O—Si—O—Si—OH* + HCl + R3N
(Wherein the asterisk* designates the surface species)
- Table 2 below is a summary of illustrative combinations of catalyst, first reactant and second reactant corresponding to different illustrative embodiments of the present invention as described hereinafter.
TABLE 2 2nd Catalyst 1st reactant reactant 1st ex. Ammonia, amine Si2Cl6 H2O, embodiment H2O2, ozone 2nd ex. Tertiary aliphatic amine SiCl4 H2O, embodiment (R3N) H2O2, ozone 3rd ex. Tertiary aliphatic amine Si2Cl6 H2O, embodiment (R3N) H2O2, ozone -
FIG. 1 is a flow chart that schematically illustrates the several steps, procedures and sequential chemical reactions which apply generically to the methods of this invention for forming silicon dioxide thin films on a substrate by means of a catalyzed atomic layer deposition (ALD) procedure. The steps illustrated in the flow chart ofFIG. 1 are discussed below. -
Step 110 - A suitable functionalized substrate is loaded into a reaction chamber.
-
Step 120 - The substrate is preheated until the temperature of the substrate reaches a suitable temperature for starting the silicon dioxide ALD process, typically about 25°-150° C. The reaction chamber is exhausted either at the same time as or immediately following the preheating. Evacuating the chamber might typically take under 60 seconds.
-
Step 130 - A new silicon dioxide layer is formed on the substrate surface by ALD. The cycle is repeated until a desired thickness of a silicon dioxide thin film is grown on the substrate. Step 130 is comprised of substeps 132-138, which are discussed individually below.
-
Step 132 - A mixture of the first reactant and catalyst is supplied to the reaction chamber. The catalyst acts by lowering reaction activation energy of the first reactant on the substrate. As a result, the process temperature is lowered to about room temperature or slightly above room temperature.
- When the first reactant is supplied, the process temperature in the chamber is typically about 25°-150° C., preferably about 90°-110° C. The process pressure in the chamber is typically about 0.1˜100 torr, preferably about 0.5˜5 torr. An inert gas, for example, argon (Ar), may be supplied to the chamber along with first reactant and catalyst.
- The H of the —OH reaction sites reacts with a halogen atom of the first reactant in the presence of the first base catalyst to form halogen acid. The halogen acid is neutralized with the first base catalyst, and a salt is produced. At the same time, Si atoms of the first reactant react with the 0 on a reaction site on the substrate to form a chemisorbed layer of the first reactant.
-
Step 134 - By-products of the first reaction process (step 132), for example, salt, unreacted first reactant, etc. are removed.
-
Step 136 - A mixture of the second reactant (which contains O and H) and a second base catalyst is now supplied to the chamber causing the chemisorbed layer of the first reactant to chemically react with the second reactant.
- An example of the second reactant is H2O, H2O2, or ozone. In one preferred embodiment, the second base catalyst is the same as the first base catalyst.
- When the second reactant is supplied to the reaction chamber, the ranges of temperature and pressure in the chamber are typically substantially the same as the ranges of temperature and pressure used in
step 132. - In this step, the O element of the second reactant reacts with Si which is chemisorbed on the substrate surface. In the presence of the second base catalyst, the H element of the second reactant reacts with the halogen atom, so halogen acid is produced. Salt is then produced by neutralization between such halogen acid and the base catalyst.
-
Step 138 - The by-products of the second reaction process (step 136) are removed.
-
Step 140 - The reaction chamber is exhausted to remove any remaining deposition by-products in the chamber, a step desirably completed in about 90 seconds. During
step 140, no gas is supplied to the chamber. -
Step 150 - The substrate with an SiO2 thin film along its surface is unloaded from the chamber.
-
Step 160 - This step involves hardening the newly deposited SiO2 thin film. There are three alternative methods which may be used for hardening the silicon dioxide layer deposited in accordance with this invention.
-
- 1. Thermal treatment: Annealing the substrate at about 300° C.-900° C. in the presence of a substantially inert gas (i.e., inert relative to the substrate surface), e.g., N2, O2, H2, Ar, etc.
- 2. Plasma treatment: Annealing the substrate at about 200° C.-700° C. in the presence of O2 or H2.
- 3. O3 treatment, typically at about 25° C.-700° C.
- Any of the three foregoing hardening methods may be used in situ with SiO2 thin films grown using a catalyzed ALD process in accordance with this invention.
Hardening methods - According to a first exemplary embodiment of the present invention, silicon dioxide thin films are grown on the functionalized surface of a substrate having hydroxyl groups using Si2Cl6 or a comparable compound, e.g., a silicon halide having two or more silicon atoms, as the first reactant; a compound containing 0 and H elements, e.g., H2O and/or H2O2, as the second reactant; and a base compound, e.g., ammonia or an amine, as the catalyst. For this embodiment of the invention, the first reactant is a silicon compound having at least two silicon atoms, for example a silicon-halide compound selected from the group consisting of: Si2X6, Si3X8, Si4X10, and Si3X6 (Triangle), which has the following chemical structure:
wherein X is a halogen such as F, Cl, Br, I. In a preferred embodiment, the first reactant is selected from the group consisting of Si2Cl6, Si3Cl8, Si4Cl10 and Si3Cl6(Triangle). For this embodiment of the invention, the second reactant is a compound containing oxygen (O) and hydrogen (H) components selected from the group consisting of H2O; H2O2; and ozone. - As schematically illustrated in
FIG. 2 , by exposing the hydroxyl group functionalized surface of the substrate to a mixture of the first reactant and the catalyst in a first step, a chemisorbed layer of the first reactant is formed along the substrate surface. Unreacted first reactant and byproducts are then removed from the region of the substrate. In the next process step, also illustrated inFIG. 2 , the chemisorbed layer of the first reactant is reacted with the second reactant in the presence of a base compound as the catalyst, which may be the same catalyst used in reacting the first reactant or a different base compound catalyst. Unreacted second reactant and byproducts of this second reaction step are removed from the substrate region. The surface of the substrate, now containing a new SiO2 monolayer, is restored to the hydroxyl group functionalized state ready to begin a new ALD cycle. - Although the foregoing process is generally similar to the catalyst-assisted ALD technique described in the Klaus '442 patent, the selection of different reactants and catalyst(s) has been found to have dramatic and surprising impacts on the nature and quality of the thin film surface layer of the substrate. One important difference is that whereas the Klaus '442 patent teaches the use of SiCl4, a silicon halide having only a single silicon atom, the above-described embodiment of the present invention utilizes a silicon halide, e.g., Si2Cl6, that has at least two silicon atoms. It has been found in accordance with this invention that this difference results in a significant improvement in the growth rate. In particular, it has been found that a SiCl4 monolayer has large spaces between the molecules. In the case of SiCl4, when a Si atom reacts with the O—H site on the substrate and forms a single bond with O, SiCl4 is rotated. Due to the steric hindrance of Cl (which does not participate in the reaction), the next O—H site cannot react with another SiCl4. By contrast, a Si2Cl6 monolayer can react with two Si atoms at the same time and thus speeds up the ALD process. Furthermore, the quality of the resulting silicon dioxide layer is better because the molecular packing along the surface is denser.
-
FIGS. 3-6 , as discussed further below, compare the properties and performance of SiO2 monolayers grown on a substrate using the hexachlorodisilicon (HCD) method of this invention with SiO2 monolayers grown using the tetrachlorosilicon (TCS) method of Klaus '442. - For example, the graph in
FIG. 3 compares the deposition rates of SiO2 monolayers on a substrate utilizing the prior art SiCl4 approach with those obtained utilizing the Si2Cl6 technique of this invention at varying process temperatures.FIG. 3 shows that, at every process temperature, the deposition rate utilizing Si2Cl6 (circular points) is approximately double the deposition rate using SiCl4 (square points). -
FIG. 4 compares the “silicon richness” of a thin film layer grown on a substrate using the prior art TCS (SiCl4) approach with that of a thin film grown using the HCD (Si2Cl6) approach of this invention. Using Auger electron spectroscopy to measure atomic concentrations of Si and 0 on the substrate surface at varying sputter times,FIG. 4 shows that the ratio of Si to O using the TCS technique is 1:1.95 while the Si to O ratio using the HCD technique is 1:1.84. In other words, the thin film SiO2 layer which is formed using the HCD approach is desirably “richer” in silicon. -
FIG. 5A uses XPS data to compare the silicon bonding status of silicon in a SiO2 monolayer grown using the HCD approach of this invention with the bonding status of silicon in a monolayer grown using the prior art TCS method. The difference in bonding status seen in the graph ofFIG. 5A , as well as the difference in silicon “richness” shown byFIG. 4 , is believed to be explained by the different type of silicon bonds formed when the SiO2 monolayer is grown by the HCD method instead of the TCS method. As schematically illustrated inFIG. 5B , the TCS method is believed to result in adjacent silicon atoms in a SiO2 monolayer being bonded to each other only through an intermediate oxygen atom, whereas the HCD method of this invention is believed to result in at least some direct Si—Si bonding in the SiO2 monolayer. -
FIG. 6 compares the wet etch rate of SiO2 thin films formed using the HCD method of this invention with the wet etch rate for SiO2 thin films formed using the prior art TCS method. (The vertical scale of the bar graph ofFIG. 6 has been made discontinuous to accommodate the data.)FIG. 6 shows that the wet etch rate of SiO2 thin films formed using the HCD method of this invention is about six times better than for SiO2 thin films formed using the TCS method. - According to a second exemplary embodiment of this present invention, silicon dioxide thin films are grown on a functionalized surface of a substrate using a silicon halide as the first reactant; a second reactant containing O and H atoms, e.g., H2O and/or H2O2; and a tertiary aliphatic amine catalyst. In this embodiment of the invention, by exposing the functionalized surface of the substrate to a mixture of the first reactant and the catalyst in a first process step, a chemisorbed layer of the first reactant is formed along the substrate surface. Unreacted first reactant and byproducts are then removed from the region of the substrate. In the next process step, the chemisorbed layer of the first reactant is reacted with the second reactant in the presence of the tertiary aliphatic amine catalyst. Byproducts of this second reaction step are removed from the substrate region.
- In accordance with this invention embodiment, it has been found that the use of a tertiary aliphatic amine as the reaction catalyst produces novel and entirely unexpected benefits in terms of process efficiency, the elimination or minimization of unwanted byproducts, and in the purity and quality of resultant SiO2 thin films deposited on the substrate. More particularly, it has been found that if an amine which has even one nitrogen-hydrogen (N—H) bond, for example ammonia (NH3) or a unitary or binary aliphatic amine (NR, H2 or NR2H), is used as the catalyst, there will be a tendency to form unwanted byproducts having silicon-nitrogen (Si—N) bonds, as illustrated in equations (1) and (2) below:
SiCl4+NR2H→Cl3Si—NR2+HCl
SiCl4+NH3→Cl3Si—NH4 +Cl−(salt) (2)
wherein R is an aliphatic group (CxHy) having between about 1 and 5 carbon atoms, and further wherein the aliphatic groups R may be the same or different. - It has been found, however, that byproducts having Si—N bonds (for example, as illustrated on the right sides of equations (1) and (2) above) are main causes of particulate formation which leads to surface layer impurities and degrades the quality of the deposited SiO2 thin films. By contrast, if a tertiary aliphatic amine catalyst having the general formula NR3, where R is an aliphatic group (CxHy) having between about 1 and 5 carbon atoms, is used as the reaction catalyst, it has been found that substantially no particulate byproducts having Si—N bonds are formed. As a result, much purer SiO2 thin films having higher quality and superior uniformity are deposited by the methods of this invention.
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FIG. 7 and Table 3 as discussed below demonstrate the validity and the enormous importance of this finding.FIG. 7 is a result of RGA analysis that confirms the formation of solid particulate byproducts when an ALD process is carried out using an amine catalyst that is not a tertiary aliphatic amine.FIG. 7 is based on a catalyzed ALD process as taught by Klaus '442 using SiCl4 as the first reactant with dimethylamine ((H3C)2NH), an amine with a single N—H bond, as the catalyst. A residual mass spectrum apparatus was connected to the ALD reaction chamber to analyze byproducts coming from the reaction. The mass spectrum ofFIG. 7 confirmed the formation of Cl3Si—N(CH3)2 as an unwanted byproduct of the reaction. Such byproduct formation means that some of the Si from the SiCl4 first reactant is being wasted in forming the byproduct instead of being deposited on the substrate surface as SiO2. - Further evidence of the advantage of this invention embodiment relative to the prior art is shown in Table 3 below.
TABLE 3 Triethylamine Catalyst Trimethylamine Dimethylamine NH3 Particle Several tens Several thousands Tens of thousands (size .16 μm) @Tencor - Table 3 compares the number of undesired particles (having a size of at least 0.16 μm) which were deposited on substrate surfaces of the same area when catalyzed ALD was carried out using SiCl4 as a first reactant with different amines as the catalyst. Table 3 shows that using ammonia (NH3) as the ALD catalyst, a molecule with three vulnerable N—H bonds, the ALD process resulted in tens of thousands of byproduct particles on the surface of the SiO2 thin film. This very high level of particulate contamination on an SiO2 thin film adversely affects performance of the semiconductor device and is completely unacceptable for many of the most demanding modern semiconductor applications.
- Table 3 also shows that the use of dimethylamine as the ALD catalyst, a molecule with only one vulnerable N—H bond, is effective in somewhat reducing the production of particulate byproduct by about one order of magnitude. Even particulate production in the thousands range on an SiO2 thin film, as obtained with dimethylamine catalyst, is still far in excess of acceptable limits for very high performance semiconductor devices. Table 3 further shows, however, that the use of trimethylamine as the ALD catalyst, thereby eliminating all vulnerable N—H bonds, has the dramatic and unexpected result of reducing the production of particles of byproduct to only several tens, a three order of magnitude reduction relative to ammonia, and a two order of magnitude reduction even relative to dimethylamine.
- Another advantage of this embodiment of the invention relative to the prior art is that this invention embodiment uses a tertiary aliphatic amine catalyst instead of the pyridine which is the preferred catalyst for example in the Klaus '442 patent. Pyridine is a heterocyclic compound containing a ring of five carbon atoms and one nitrogen atom having the formula C5H5N. It exists at room temperature as a toxic liquid having a pungent, characteristic odor, which must be carefully handled. When used as a catalyst in an ALD process, pyridine must be vaporized to the gaseous state (the boiling point of pyridine is 115.5° C.). Thus, the equipment for treating pyridine is complicated, and a pyridine supply line is easily contaminated.
- By contrast, a low molecular weight tertiary aliphatic amine, for example trimethylamine, is a gas at ambient conditions, which makes it easier to use than a catalyst prone to undergo a phase change at normal reaction conditions. Furthermore, the toxicity of trimethylamine is much lower than that of pyridine and the boiling point of trimethylamine is only 3˜4° C.)
- According to a third particularly preferred embodiment of the present invention, many if not all of the advantages and benefits of both of the earlier-described embodiments of this invention can be realized. In this embodiment, silicon dioxide thin films are grown on a functionalized surface of a substrate using a silicon compound having at least two or more silicon atoms, e.g., a silicon halide such as Si2Cl6, as the first reactant; a compound containing O and H atoms, e.g., H2O and/or H2O2, as the second reactant; and, a tertiary aliphatic amine catalyst.
- Thus, in accordance with this invention embodiment, the functionalized surface of the substrate is exposed to a mixture of the first reactant and the tertiary aliphatic amine catalyst in a first process step to form a chemisorbed layer of the first reactant along the substrate surface. Unreacted first reactant and any byproducts are then removed from the region of the substrate. In the next process step, the chemisorbed layer of the first reactant is reacted with the second reactant in the presence of the tertiary aliphatic amine catalyst. Byproducts of this second reaction step are removed from the substrate region.
- In still another embodiment of the present invention, it has been found that the use of a gas pulsing/purging method for one or more of the several process steps 132-138 of
FIG. 1 can improve the efficiency of the methods of this invention, reduce process contamination, as well as improve the quality of resulting SiO2 thin films grown on substrates.FIG. 8 illustrates a gas pulsing method for carrying out steps 132-138 ofFIG. 1 , as described below. -
Step 132 - A first reactant and a suitable catalyst are flowed into the reaction chamber through separate respective supply lines. At this time, inert gas, for example, argon gas, can be flowed into the chamber through a second reactant supply line to prevent the contamination from the mixture gas of first reactant and a catalyst.
-
Step 134 - Inert gas for purging flows into the chamber through each of the first reactant supply line, the second reactant supply line, and the catalyst supply line.
-
Step 136 - A second reactant which contains O and H, and a suitable catalyst are flowed into the chamber through separate respective supply lines. At this time, inert gas, for example, argon gas, can be flowed into the chamber through the first reactant supply line to purge the first reactant supply line.
-
Step 138 - Inert gas for purging flows into the chamber through each of the first reactant supply line, the second reactant supply line, and the catalyst supply line.
- Some representative “recipes” or sequences for gas pulsing/pumping or purging the various feed lines and the reactant chamber in accordance with steps 132-138 of
FIG. 1 over 10 second process time intervals are illustrated inFIGS. 9-12 .FIG. 9 illustrates a process purge sequence comprising the following steps per cycle being conducted at and over selected process time periods using an inert gas to purge and remove byproducts: 0-2 seconds process time—HCD feeding; 2-4 seconds process time—purging; 4-7.5 seconds process time-H2O feeding; and 7.5-10 seconds—purging.FIG. 10 illustrates a process pumping sequence, wherein the pumping pressure is lower than the first and second reactant supply pressures, comprising the sequenced steps per cycle of: 0-2 seconds process time—HCD feeding; 2-4 seconds process time—pumping; 4-7.5 seconds process time—H2O feeding; and 7.5-10 seconds process time—pumping.FIG. 11 illustrates a process purge-pumping sequence, wherein pumping is used after purging, comprising the sequences steps per cycle of: 0-2 seconds process time—HCD feeding; 2-3 seconds process time—purging; 3-4 seconds process time—pumping; 4-7.5 seconds process time—H2O feeding; 7.5-8.5 seconds process time—purging; and 8.5-10 seconds process time—pumping.FIG. 12 illustrates a process pumping—purge sequence, wherein purging is used after pumping, comprising the sequenced steps per cycle of: 0-2 seconds process time—HCD feeding; 2-3 seconds process time—pumping; 3-4 seconds process time—purging; 4-7.5 seconds process time—pumping; 7.5-8.5 seconds process time pumping; and 8.5-10 seconds process time—purging. - In yet another embodiment of the present invention, temperature conditions for carrying out catalyst-assisted ALD for growing SiO2 thin films on substrates according to this invention are optimized by balancing two competing process parameters. On the one hand, as illustrated in
FIG. 13 , the deposition rate for forming SiO2 thin films using catalyst-assisted ALD and a multiple-silicon atom compound (e.g., Si2Cl6) as the first reactant is inversely proportional to temperature.FIG. 13 shows that, in general, the higher the process temperature, the slower the deposition rate. This appears to be due to desorption rate, and it is a distinctive feature of an ALD process because ALD is a surface reaction. The higher the process temperature, the higher the surface desorption activation energy of atoms participating in the reaction. As a result, the “staying time” at the surface becomes shorter than the necessary minimum time for the reaction to take place, in accordance with the following equation:
k d =Ae −Ed /RT -
- kd: Desorption Rate
- A: Arrhenius Constant
- Ed: Desorption Activation Energy
- R: Gas Constant
- T: Temperature
- The higher the process temperature, the more easily the O—H chain at the substrate surface is dehydroxylated. Thus, the number of reaction sites along the surface is reduced, and the deposition rate is reduced.
- On the other hand, as illustrated in
FIG. 14 , a SIMS (secondary ion mass spectrometer) graph of carbon content over time at three different process temperatures, the carbon content of an ALD-deposited SiO2 thin film also varies according to process temperature. In general, at lower process temperatures, carbon-containing byproducts of the ALD reaction processes are not fully removed from the substrate surface during processing and become trapped in the SiO2 thin films being deposited. The resulting increase in the impurity level of the thin films results in a lower quality semiconductor device. - Accordingly, these two process parameters must be balanced against one another to optimize the process temperature conditions. Based on the foregoing considerations, it has been determined in accordance with this embodiment of the invention that the optimum process temperature range is about 90°-110° C.
- In still another embodiment of the present invention, pressure conditions for carrying out catalyst-assisted ALD for growing SiO2 thin films on substrates according to this invention are optimized by balancing two competing process parameters. On the one hand, as illustrated in
FIG. 15 , the deposition rate for forming SiO2 thin films using catalyst-assisted ALD is directly proportional to process condition pressure, i.e., the higher the pressure, the thicker the layer of SiO2 deposited over a given time period/number of ALD cycles. - On the other hand,
FIG. 16 illustrates that a non-linear relationship exists between process pressure and non-uniformity of the SiO2 thin film. Thus,FIG. 16 shows that, up to a point, higher process pressure reduces non-uniformity of the layers deposited; but, beyond that point, higher pressure is correlated with higher non-uniformity. - Accordingly, these process parameters must be balanced against each other to optimize the process pressure conditions. Based on the foregoing considerations, it has been determined in accordance with this embodiment of the invention that the optimum process pressure range is about 500 mmtorr-5 torr.
- It will be apparent to those skilled in the art that other changes and modifications may be made in the above-described improved catalyst-assisted ALD formation of SiO2 thin layers on substrate surfaces for use in high performance semiconductor devices without departing from the scope of the invention described herein, and it is intended that all matter contained in the above description shall be interpreted in an illustrative and not a limiting sense.
Claims (21)
1-36. (canceled)
37. A semiconductor device comprising a substrate having a highly uniform, substantially impurity-free silicon dioxide thin film having enhanced silicon richness along at least a surface thereof, wherein said silicon dioxide thin film was formed by the steps of:
(a) loading the substrate into a chamber;
(b) supplying a first reactant, a catalyst, and optionally an inert gas to the chamber, wherein said first reactant is a silicon halide compound having at least two silicon atoms and said catalyst is selected from the group consisting of ammonia and amine;
(c) purging reaction byproducts and unreacted first reactant and catalyst from the chamber;
(d) supplying a second reactant, a catalyst, and optionally an inert gas to the chamber, wherein said second reactant is a compound having 0 components and said catalyst is selected from the group consisting of ammonia and amine;
(e) purging reaction byproducts and unreacted second reactant and catalyst from the chamber; and,
(f) repeating steps (a)-(e) until the silicon dioxide thin film reaches the desired thickness.
38. A semiconductor device according to claim 37 wherein the method of forming the silicon dioxide thin film further included the step of using a tertiary aliphatic amine as the catalyst.
39. A semiconductor device according to claim 37 wherein the first reactant was Si2Cl6.
40. A method according to claim 37 wherein said first reactant is one selected from the group consisting of Si2X6, Si3X8, Si4X10, and Si3X6 (Triangle), wherein X is a halogen.
41. A semiconductor device according to claim 37 wherein said catalyst is trimethyl amine.
42. A semiconductor device according to claim 37 comprising carrying out steps (b) through (e) according to the following sequence: feeding said first reactant and catalyst to said chamber during a process time period t1; purging the chamber with an inert gas during a time period t2 immediately following period t1; pumping the chamber to at least partially evacuate inert gas and other gaseous materials from the chamber during a time period t3 immediately following period t2; feeding said second reactant and catalyst to the chamber during a time period t4 immediately following period t3; purging the chamber with an inert gas during a time period t5 immediately following period t4; and, pumping the chamber to at least partially evacuate inert gas and other gaseous materials from the chamber during a time period t6 immediately following period t5.
43. A semiconductor device according to claim 37 comprising carrying out steps (b) through (e) according to the following sequence: feeding said first reactant and catalyst to said chamber during a process time period t1; pumping the chamber to at least partially evacuate gaseous materials from the chamber during a time period t2 immediately following period t1; purging the chamber with an inert gas during a time period t3 immediately following period t2; feeding said second reactant and catalyst to the chamber during a time period t4 immediately following period t3; pumping the chamber to at least partially evacuate gaseous materials from the chamber during a time period t5 immediately following period t4; and, purging the chamber with an inert gas during a time period t6 immediately following period t5.
44. A semiconductor device comprising at least a substrate having a silicon dioxide layer deposited on a surface of said substrate using a catalyst-assisted atomic layer deposition process comprising the sequential steps of exposing a functionalized surface of the substrate to a first mixture consisting essentially of first reactant and first catalyst and thereafter exposing that surface to a second mixture consisting essentially of second reactant and second catalyst to form a silicon dioxide monolayer on the substrate surface, and further comprising one or more of the following:
(a) using a first reactant consisting essentially of at least one member selected from the group consisting of silicon compounds having at least two silicon atoms;
(b) using a first catalyst consisting essentially of at least one member selected from the group consisting of tertiary aliphatic amine compounds; and,
(c) using a first reactant consisting essentially of at least one member selected from the group consisting of silicon compounds having at least two silicon atoms in combination with using a first catalyst consisting essentially of at least one member selected from the group consisting of tertiary aliphatic amine compounds.
45. A semiconductor device according to claim 44 wherein said first reactant used in forming said silicon dioxide layer consists essentially of a silicon-halide compound.
46. A semiconductor device according to claim 44 wherein said first catalyst used in forming said silicon dioxide layer consists essentially of a tertiary aliphatic amine compound having the general formula NR3, where each R represents the same or a different aliphatic group having from 1 to 5 carbon atoms.
47. A semiconductor device according to claim 44 wherein said first reactant used in forming said silicon dioxide layer consists essentially of Si2Cl6 and said first catalyst used in forming said silicon dioxide layer consists essentially of trimethyl amine.
48. A semiconductor device formed according to claim 44 wherein the silicon dioxide layer deposition is carried out at a temperature ranging from about 90°-110° C.
49. A semiconductor device formed according to claim 44 wherein the silicon dioxide layer deposition is carried out at a pressure ranging from about 500 mmtorr-5 torr.
50. A semiconductor device formed according to claim 44 wherein the silicon dioxide layer deposition further includes removing unreacted reactant, catalyst and reaction byproducts from the region of the substrate surface following each reaction step.
51. A semiconductor device formed according to claim 44 wherein the silicon dioxide layer deposition further includes: (a) a first reaction period during which first reactant and catalyst are fed through respective first reactant and catalyst feed lines to the substrate surface along with inert gas fed through a second reactant feed line; (b) a first purge period during which the feeds of first reactant and catalyst are stopped and, instead, inert gas is fed through the first and second reactant and catalyst feed lines; (c) a second reaction period during which second reactant and catalyst are fed through their respective feed lines to the substrate surface along with inert gas fed through the first reactant feed line; and, (d) a second purge period during which the feeds of second reactant and catalyst are stopped and, instead, inert gas is fed through the first and second reactant and catalyst feed lines.
52. A semiconductor device formed according to claim 44 , further comprising repeating the silicon dioxide layer deposition multiple times on the same substrate to obtain a silicon dioxide thin film of a desired thickness greater than one monolayer.
53. A semiconductor device formed according to claim 44 , further comprising hardening the deposited silicon dioxide layer.
54. A semiconductor device formed according to claim 53 wherein said hardening step is selected from one of the following:
(a) a thermal treatment comprising annealing the silicon dioxide layer at about 300° C.-900° C. in the presence of an inert gas selected from the group consisting of N2, O2, H2 and Ar;
(b) a plasma treatment comprising annealing the silicon dioxide layer at about 200° C.-700° C. in the presence of O2 or H2; or,
(c) an ozone treatment comprising exposing the silicon dioxide layer to O3 at a temperature of about 25° C.-700° C.
55. A substrate having a silicon dioxide thin film deposited on a surface of said substrate by the steps of:
(a) loading the substrate into a chamber;
(b) supplying a first reactant, a catalyst, and optionally an inert gas to the chamber, wherein said first reactant is a silicon-halide compound having at least two silicon atoms and said catalyst is selected from the group consisting of ammonia and amine;
(c) purging reaction byproducts and unreacted first reactant and catalyst from the chamber;
(d) supplying a second reactant, a catalyst, and optionally an inert gas to the chamber, wherein said second reactant is a compound having O components and said catalyst is selected from the group consisting of ammonia and amine;
(e) purging reaction byproducts and unreacted second reactant and catalyst from the chamber; and,
(f) repeating steps (a)-(e) until the silicon dioxide thin film reaches a desired thickness greater than one monolayer.
56. A substrate formed according to claim 55 wherein said first reactant is Si2Cl6.
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US7964441B2 (en) * | 2007-03-30 | 2011-06-21 | Tokyo Electron Limited | Catalyst-assisted atomic layer deposition of silicon-containing films with integrated in-situ reactive treatment |
US7923373B2 (en) | 2007-06-04 | 2011-04-12 | Micron Technology, Inc. | Pitch multiplication using self-assembling materials |
JP5341358B2 (en) * | 2008-02-01 | 2013-11-13 | 株式会社日立国際電気 | Semiconductor device manufacturing method, substrate processing apparatus, and substrate processing method |
US7659158B2 (en) | 2008-03-31 | 2010-02-09 | Applied Materials, Inc. | Atomic layer deposition processes for non-volatile memory devices |
JP5384852B2 (en) * | 2008-05-09 | 2014-01-08 | 株式会社日立国際電気 | Semiconductor device manufacturing method and semiconductor manufacturing apparatus |
US8298628B2 (en) | 2008-06-02 | 2012-10-30 | Air Products And Chemicals, Inc. | Low temperature deposition of silicon-containing films |
US20110104901A1 (en) * | 2008-06-13 | 2011-05-05 | Tokyo Electron Limited | Semiconductor device manufacturing method |
JP5518499B2 (en) | 2009-02-17 | 2014-06-11 | 株式会社日立国際電気 | Semiconductor device manufacturing method and substrate processing apparatus |
JP5385001B2 (en) * | 2009-05-08 | 2014-01-08 | 株式会社日立国際電気 | Semiconductor device manufacturing method and substrate processing apparatus |
US20110008972A1 (en) * | 2009-07-13 | 2011-01-13 | Daniel Damjanovic | Methods for forming an ald sio2 film |
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US8460753B2 (en) * | 2010-12-09 | 2013-06-11 | Air Products And Chemicals, Inc. | Methods for depositing silicon dioxide or silicon oxide films using aminovinylsilanes |
US20130023129A1 (en) | 2011-07-20 | 2013-01-24 | Asm America, Inc. | Pressure transmitter for a semiconductor processing environment |
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US10403504B2 (en) | 2017-10-05 | 2019-09-03 | Asm Ip Holding B.V. | Method for selectively depositing a metallic film on a substrate |
US10923344B2 (en) | 2017-10-30 | 2021-02-16 | Asm Ip Holding B.V. | Methods for forming a semiconductor structure and related semiconductor structures |
WO2019103610A1 (en) | 2017-11-27 | 2019-05-31 | Asm Ip Holding B.V. | Apparatus including a clean mini environment |
JP7214724B2 (en) | 2017-11-27 | 2023-01-30 | エーエスエム アイピー ホールディング ビー.ブイ. | Storage device for storing wafer cassettes used in batch furnaces |
US10872771B2 (en) | 2018-01-16 | 2020-12-22 | Asm Ip Holding B. V. | Method for depositing a material film on a substrate within a reaction chamber by a cyclical deposition process and related device structures |
TWI799494B (en) | 2018-01-19 | 2023-04-21 | 荷蘭商Asm 智慧財產控股公司 | Deposition method |
CN111630203A (en) | 2018-01-19 | 2020-09-04 | Asm Ip私人控股有限公司 | Method for depositing gap filling layer by plasma auxiliary deposition |
US11081345B2 (en) | 2018-02-06 | 2021-08-03 | Asm Ip Holding B.V. | Method of post-deposition treatment for silicon oxide film |
JP7124098B2 (en) | 2018-02-14 | 2022-08-23 | エーエスエム・アイピー・ホールディング・ベー・フェー | Method for depositing a ruthenium-containing film on a substrate by a cyclical deposition process |
US10896820B2 (en) | 2018-02-14 | 2021-01-19 | Asm Ip Holding B.V. | Method for depositing a ruthenium-containing film on a substrate by a cyclical deposition process |
KR102636427B1 (en) | 2018-02-20 | 2024-02-13 | 에이에스엠 아이피 홀딩 비.브이. | Substrate processing method and apparatus |
US10975470B2 (en) | 2018-02-23 | 2021-04-13 | Asm Ip Holding B.V. | Apparatus for detecting or monitoring for a chemical precursor in a high temperature environment |
US11473195B2 (en) | 2018-03-01 | 2022-10-18 | Asm Ip Holding B.V. | Semiconductor processing apparatus and a method for processing a substrate |
KR102646467B1 (en) | 2018-03-27 | 2024-03-11 | 에이에스엠 아이피 홀딩 비.브이. | Method of forming an electrode on a substrate and a semiconductor device structure including an electrode |
US12025484B2 (en) | 2018-05-08 | 2024-07-02 | Asm Ip Holding B.V. | Thin film forming method |
US12057310B2 (en) | 2018-05-22 | 2024-08-06 | Versum Materials Us, Llc | Functionalized cyclosilazanes as precursors for high growth rate silicon-containing films |
KR102596988B1 (en) | 2018-05-28 | 2023-10-31 | 에이에스엠 아이피 홀딩 비.브이. | Method of processing a substrate and a device manufactured by the same |
US11718913B2 (en) | 2018-06-04 | 2023-08-08 | Asm Ip Holding B.V. | Gas distribution system and reactor system including same |
US10797133B2 (en) | 2018-06-21 | 2020-10-06 | Asm Ip Holding B.V. | Method for depositing a phosphorus doped silicon arsenide film and related semiconductor device structures |
KR102568797B1 (en) | 2018-06-21 | 2023-08-21 | 에이에스엠 아이피 홀딩 비.브이. | Substrate processing system |
WO2020003000A1 (en) | 2018-06-27 | 2020-01-02 | Asm Ip Holding B.V. | Cyclic deposition methods for forming metal-containing material and films and structures including the metal-containing material |
TW202409324A (en) | 2018-06-27 | 2024-03-01 | 荷蘭商Asm Ip私人控股有限公司 | Cyclic deposition processes for forming metal-containing material |
US10388513B1 (en) | 2018-07-03 | 2019-08-20 | Asm Ip Holding B.V. | Method for depositing silicon-free carbon-containing film as gap-fill layer by pulse plasma-assisted deposition |
US10755922B2 (en) | 2018-07-03 | 2020-08-25 | Asm Ip Holding B.V. | Method for depositing silicon-free carbon-containing film as gap-fill layer by pulse plasma-assisted deposition |
US20200040454A1 (en) * | 2018-08-06 | 2020-02-06 | Lam Research Corporation | Method to increase deposition rate of ald process |
US11430674B2 (en) | 2018-08-22 | 2022-08-30 | Asm Ip Holding B.V. | Sensor array, apparatus for dispensing a vapor phase reactant to a reaction chamber and related methods |
KR102707956B1 (en) | 2018-09-11 | 2024-09-19 | 에이에스엠 아이피 홀딩 비.브이. | Method for deposition of a thin film |
US11024523B2 (en) | 2018-09-11 | 2021-06-01 | Asm Ip Holding B.V. | Substrate processing apparatus and method |
JP6946248B2 (en) * | 2018-09-26 | 2021-10-06 | 株式会社Kokusai Electric | Semiconductor device manufacturing methods, substrate processing devices and programs |
TWI844567B (en) | 2018-10-01 | 2024-06-11 | 荷蘭商Asm Ip私人控股有限公司 | Substrate retaining apparatus, system including the apparatus, and method of using same |
KR102592699B1 (en) | 2018-10-08 | 2023-10-23 | 에이에스엠 아이피 홀딩 비.브이. | Substrate support unit and apparatuses for depositing thin film and processing the substrate including the same |
KR102546322B1 (en) | 2018-10-19 | 2023-06-21 | 에이에스엠 아이피 홀딩 비.브이. | Substrate processing apparatus and substrate processing method |
US11087997B2 (en) | 2018-10-31 | 2021-08-10 | Asm Ip Holding B.V. | Substrate processing apparatus for processing substrates |
KR20200051105A (en) | 2018-11-02 | 2020-05-13 | 에이에스엠 아이피 홀딩 비.브이. | Substrate support unit and substrate processing apparatus including the same |
US11572620B2 (en) | 2018-11-06 | 2023-02-07 | Asm Ip Holding B.V. | Methods for selectively depositing an amorphous silicon film on a substrate |
US10818758B2 (en) | 2018-11-16 | 2020-10-27 | Asm Ip Holding B.V. | Methods for forming a metal silicate film on a substrate in a reaction chamber and related semiconductor device structures |
US11211243B2 (en) | 2018-11-21 | 2021-12-28 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method of filling gaps with carbon and nitrogen doped film |
CN111211088B (en) * | 2018-11-21 | 2023-04-25 | 台湾积体电路制造股份有限公司 | Semiconductor device and method of forming the same |
US12040199B2 (en) | 2018-11-28 | 2024-07-16 | Asm Ip Holding B.V. | Substrate processing apparatus for processing substrates |
KR102636428B1 (en) | 2018-12-04 | 2024-02-13 | 에이에스엠 아이피 홀딩 비.브이. | A method for cleaning a substrate processing apparatus |
US11158513B2 (en) | 2018-12-13 | 2021-10-26 | Asm Ip Holding B.V. | Methods for forming a rhenium-containing film on a substrate by a cyclical deposition process and related semiconductor device structures |
JP7504584B2 (en) | 2018-12-14 | 2024-06-24 | エーエスエム・アイピー・ホールディング・ベー・フェー | Method and system for forming device structures using selective deposition of gallium nitride - Patents.com |
TWI819180B (en) | 2019-01-17 | 2023-10-21 | 荷蘭商Asm 智慧財產控股公司 | Methods of forming a transition metal containing film on a substrate by a cyclical deposition process |
US20200263297A1 (en) * | 2019-02-14 | 2020-08-20 | Asm Ip Holding B.V. | Deposition of oxides and nitrides |
JP2020136678A (en) | 2019-02-20 | 2020-08-31 | エーエスエム・アイピー・ホールディング・ベー・フェー | Method for filing concave part formed inside front surface of base material, and device |
KR20200102357A (en) | 2019-02-20 | 2020-08-31 | 에이에스엠 아이피 홀딩 비.브이. | Apparatus and methods for plug fill deposition in 3-d nand applications |
TWI845607B (en) | 2019-02-20 | 2024-06-21 | 荷蘭商Asm Ip私人控股有限公司 | Cyclical deposition method and apparatus for filling a recess formed within a substrate surface |
TWI842826B (en) | 2019-02-22 | 2024-05-21 | 荷蘭商Asm Ip私人控股有限公司 | Substrate processing apparatus and method for processing substrate |
KR20200108242A (en) | 2019-03-08 | 2020-09-17 | 에이에스엠 아이피 홀딩 비.브이. | Method for Selective Deposition of Silicon Nitride Layer and Structure Including Selectively-Deposited Silicon Nitride Layer |
US11742198B2 (en) | 2019-03-08 | 2023-08-29 | Asm Ip Holding B.V. | Structure including SiOCN layer and method of forming same |
KR20200116033A (en) | 2019-03-28 | 2020-10-08 | 에이에스엠 아이피 홀딩 비.브이. | Door opener and substrate processing apparatus provided therewith |
KR20200116855A (en) | 2019-04-01 | 2020-10-13 | 에이에스엠 아이피 홀딩 비.브이. | Method of manufacturing semiconductor device |
KR20200123380A (en) | 2019-04-19 | 2020-10-29 | 에이에스엠 아이피 홀딩 비.브이. | Layer forming method and apparatus |
KR20200125453A (en) | 2019-04-24 | 2020-11-04 | 에이에스엠 아이피 홀딩 비.브이. | Gas-phase reactor system and method of using same |
EP3947769A4 (en) | 2019-04-25 | 2023-01-11 | Versum Materials US, LLC | Organoaminodisilazanes for high temperature atomic layer deposition of silicon oxide thin films |
KR20200130121A (en) | 2019-05-07 | 2020-11-18 | 에이에스엠 아이피 홀딩 비.브이. | Chemical source vessel with dip tube |
KR20200130652A (en) | 2019-05-10 | 2020-11-19 | 에이에스엠 아이피 홀딩 비.브이. | Method of depositing material onto a surface and structure formed according to the method |
JP2020188254A (en) | 2019-05-16 | 2020-11-19 | エーエスエム アイピー ホールディング ビー.ブイ. | Wafer boat handling device, vertical batch furnace, and method |
JP2020188255A (en) | 2019-05-16 | 2020-11-19 | エーエスエム アイピー ホールディング ビー.ブイ. | Wafer boat handling device, vertical batch furnace, and method |
USD947913S1 (en) | 2019-05-17 | 2022-04-05 | Asm Ip Holding B.V. | Susceptor shaft |
USD975665S1 (en) | 2019-05-17 | 2023-01-17 | Asm Ip Holding B.V. | Susceptor shaft |
WO2020236994A1 (en) | 2019-05-21 | 2020-11-26 | Versum Materials Us, Llc | Compositions and methods using same for thermal deposition silicon-containing films |
KR20200141003A (en) | 2019-06-06 | 2020-12-17 | 에이에스엠 아이피 홀딩 비.브이. | Gas-phase reactor system including a gas detector |
KR20200143254A (en) | 2019-06-11 | 2020-12-23 | 에이에스엠 아이피 홀딩 비.브이. | Method of forming an electronic structure using an reforming gas, system for performing the method, and structure formed using the method |
US12082395B2 (en) | 2019-06-14 | 2024-09-03 | Samsung Electronics Co., Ltd. | Semiconductor memory devices and methods of fabricating the same |
KR20200143109A (en) | 2019-06-14 | 2020-12-23 | 삼성전자주식회사 | Semiconductor memory device and method of fabricating the same |
KR20210005515A (en) | 2019-07-03 | 2021-01-14 | 에이에스엠 아이피 홀딩 비.브이. | Temperature control assembly for substrate processing apparatus and method of using same |
JP7499079B2 (en) | 2019-07-09 | 2024-06-13 | エーエスエム・アイピー・ホールディング・ベー・フェー | Plasma device using coaxial waveguide and substrate processing method |
CN112216646A (en) | 2019-07-10 | 2021-01-12 | Asm Ip私人控股有限公司 | Substrate supporting assembly and substrate processing device comprising same |
KR20210010307A (en) | 2019-07-16 | 2021-01-27 | 에이에스엠 아이피 홀딩 비.브이. | Substrate processing apparatus |
KR20210010816A (en) | 2019-07-17 | 2021-01-28 | 에이에스엠 아이피 홀딩 비.브이. | Radical assist ignition plasma system and method |
KR20210010820A (en) | 2019-07-17 | 2021-01-28 | 에이에스엠 아이피 홀딩 비.브이. | Methods of forming silicon germanium structures |
US11643724B2 (en) | 2019-07-18 | 2023-05-09 | Asm Ip Holding B.V. | Method of forming structures using a neutral beam |
KR20210010817A (en) | 2019-07-19 | 2021-01-28 | 에이에스엠 아이피 홀딩 비.브이. | Method of Forming Topology-Controlled Amorphous Carbon Polymer Film |
CN112309843A (en) | 2019-07-29 | 2021-02-02 | Asm Ip私人控股有限公司 | Selective deposition method for achieving high dopant doping |
CN112309899A (en) | 2019-07-30 | 2021-02-02 | Asm Ip私人控股有限公司 | Substrate processing apparatus |
CN112309900A (en) | 2019-07-30 | 2021-02-02 | Asm Ip私人控股有限公司 | Substrate processing apparatus |
US11587814B2 (en) | 2019-07-31 | 2023-02-21 | Asm Ip Holding B.V. | Vertical batch furnace assembly |
US11227782B2 (en) | 2019-07-31 | 2022-01-18 | Asm Ip Holding B.V. | Vertical batch furnace assembly |
US11587815B2 (en) | 2019-07-31 | 2023-02-21 | Asm Ip Holding B.V. | Vertical batch furnace assembly |
CN118422165A (en) | 2019-08-05 | 2024-08-02 | Asm Ip私人控股有限公司 | Liquid level sensor for chemical source container |
USD965044S1 (en) | 2019-08-19 | 2022-09-27 | Asm Ip Holding B.V. | Susceptor shaft |
USD965524S1 (en) | 2019-08-19 | 2022-10-04 | Asm Ip Holding B.V. | Susceptor support |
JP2021031769A (en) | 2019-08-21 | 2021-03-01 | エーエスエム アイピー ホールディング ビー.ブイ. | Production apparatus of mixed gas of film deposition raw material and film deposition apparatus |
USD979506S1 (en) | 2019-08-22 | 2023-02-28 | Asm Ip Holding B.V. | Insulator |
KR20210024423A (en) | 2019-08-22 | 2021-03-05 | 에이에스엠 아이피 홀딩 비.브이. | Method for forming a structure with a hole |
KR20210024420A (en) | 2019-08-23 | 2021-03-05 | 에이에스엠 아이피 홀딩 비.브이. | Method for depositing silicon oxide film having improved quality by peald using bis(diethylamino)silane |
US11286558B2 (en) | 2019-08-23 | 2022-03-29 | Asm Ip Holding B.V. | Methods for depositing a molybdenum nitride film on a surface of a substrate by a cyclical deposition process and related semiconductor device structures including a molybdenum nitride film |
KR20210029090A (en) | 2019-09-04 | 2021-03-15 | 에이에스엠 아이피 홀딩 비.브이. | Methods for selective deposition using a sacrificial capping layer |
KR20210029663A (en) | 2019-09-05 | 2021-03-16 | 에이에스엠 아이피 홀딩 비.브이. | Substrate processing apparatus |
US11562901B2 (en) | 2019-09-25 | 2023-01-24 | Asm Ip Holding B.V. | Substrate processing method |
CN112593212B (en) | 2019-10-02 | 2023-12-22 | Asm Ip私人控股有限公司 | Method for forming topologically selective silicon oxide film by cyclic plasma enhanced deposition process |
KR20210042810A (en) | 2019-10-08 | 2021-04-20 | 에이에스엠 아이피 홀딩 비.브이. | Reactor system including a gas distribution assembly for use with activated species and method of using same |
TWI846953B (en) | 2019-10-08 | 2024-07-01 | 荷蘭商Asm Ip私人控股有限公司 | Substrate processing device |
KR20210043460A (en) | 2019-10-10 | 2021-04-21 | 에이에스엠 아이피 홀딩 비.브이. | Method of forming a photoresist underlayer and structure including same |
US12009241B2 (en) | 2019-10-14 | 2024-06-11 | Asm Ip Holding B.V. | Vertical batch furnace assembly with detector to detect cassette |
TWI834919B (en) | 2019-10-16 | 2024-03-11 | 荷蘭商Asm Ip私人控股有限公司 | Method of topology-selective film formation of silicon oxide |
US11637014B2 (en) | 2019-10-17 | 2023-04-25 | Asm Ip Holding B.V. | Methods for selective deposition of doped semiconductor material |
KR20210047808A (en) | 2019-10-21 | 2021-04-30 | 에이에스엠 아이피 홀딩 비.브이. | Apparatus and methods for selectively etching films |
KR20210050453A (en) | 2019-10-25 | 2021-05-07 | 에이에스엠 아이피 홀딩 비.브이. | Methods for filling a gap feature on a substrate surface and related semiconductor structures |
US11646205B2 (en) | 2019-10-29 | 2023-05-09 | Asm Ip Holding B.V. | Methods of selectively forming n-type doped material on a surface, systems for selectively forming n-type doped material, and structures formed using same |
KR20210054983A (en) | 2019-11-05 | 2021-05-14 | 에이에스엠 아이피 홀딩 비.브이. | Structures with doped semiconductor layers and methods and systems for forming same |
US11501968B2 (en) | 2019-11-15 | 2022-11-15 | Asm Ip Holding B.V. | Method for providing a semiconductor device with silicon filled gaps |
KR20210062561A (en) | 2019-11-20 | 2021-05-31 | 에이에스엠 아이피 홀딩 비.브이. | Method of depositing carbon-containing material on a surface of a substrate, structure formed using the method, and system for forming the structure |
KR20210065848A (en) | 2019-11-26 | 2021-06-04 | 에이에스엠 아이피 홀딩 비.브이. | Methods for selectivley forming a target film on a substrate comprising a first dielectric surface and a second metallic surface |
CN112951697A (en) | 2019-11-26 | 2021-06-11 | Asm Ip私人控股有限公司 | Substrate processing apparatus |
CN112885693A (en) | 2019-11-29 | 2021-06-01 | Asm Ip私人控股有限公司 | Substrate processing apparatus |
CN112885692A (en) | 2019-11-29 | 2021-06-01 | Asm Ip私人控股有限公司 | Substrate processing apparatus |
JP7527928B2 (en) | 2019-12-02 | 2024-08-05 | エーエスエム・アイピー・ホールディング・ベー・フェー | Substrate processing apparatus and substrate processing method |
KR20210070898A (en) | 2019-12-04 | 2021-06-15 | 에이에스엠 아이피 홀딩 비.브이. | Substrate processing apparatus |
TW202125596A (en) | 2019-12-17 | 2021-07-01 | 荷蘭商Asm Ip私人控股有限公司 | Method of forming vanadium nitride layer and structure including the vanadium nitride layer |
US11527403B2 (en) | 2019-12-19 | 2022-12-13 | Asm Ip Holding B.V. | Methods for filling a gap feature on a substrate surface and related semiconductor structures |
TW202140135A (en) | 2020-01-06 | 2021-11-01 | 荷蘭商Asm Ip私人控股有限公司 | Gas supply assembly and valve plate assembly |
KR20210089079A (en) | 2020-01-06 | 2021-07-15 | 에이에스엠 아이피 홀딩 비.브이. | Channeled lift pin |
US11993847B2 (en) | 2020-01-08 | 2024-05-28 | Asm Ip Holding B.V. | Injector |
KR102675856B1 (en) | 2020-01-20 | 2024-06-17 | 에이에스엠 아이피 홀딩 비.브이. | Method of forming thin film and method of modifying surface of thin film |
TW202130846A (en) | 2020-02-03 | 2021-08-16 | 荷蘭商Asm Ip私人控股有限公司 | Method of forming structures including a vanadium or indium layer |
TW202146882A (en) | 2020-02-04 | 2021-12-16 | 荷蘭商Asm Ip私人控股有限公司 | Method of verifying an article, apparatus for verifying an article, and system for verifying a reaction chamber |
US11776846B2 (en) | 2020-02-07 | 2023-10-03 | Asm Ip Holding B.V. | Methods for depositing gap filling fluids and related systems and devices |
US11781243B2 (en) | 2020-02-17 | 2023-10-10 | Asm Ip Holding B.V. | Method for depositing low temperature phosphorous-doped silicon |
TW202203344A (en) | 2020-02-28 | 2022-01-16 | 荷蘭商Asm Ip控股公司 | System dedicated for parts cleaning |
KR20210116240A (en) | 2020-03-11 | 2021-09-27 | 에이에스엠 아이피 홀딩 비.브이. | Substrate handling device with adjustable joints |
KR20210116249A (en) | 2020-03-11 | 2021-09-27 | 에이에스엠 아이피 홀딩 비.브이. | lockout tagout assembly and system and method of using same |
CN113394086A (en) | 2020-03-12 | 2021-09-14 | Asm Ip私人控股有限公司 | Method for producing a layer structure having a target topological profile |
KR20210124042A (en) | 2020-04-02 | 2021-10-14 | 에이에스엠 아이피 홀딩 비.브이. | Thin film forming method |
TW202146689A (en) | 2020-04-03 | 2021-12-16 | 荷蘭商Asm Ip控股公司 | Method for forming barrier layer and method for manufacturing semiconductor device |
TW202145344A (en) | 2020-04-08 | 2021-12-01 | 荷蘭商Asm Ip私人控股有限公司 | Apparatus and methods for selectively etching silcon oxide films |
KR20210127620A (en) | 2020-04-13 | 2021-10-22 | 에이에스엠 아이피 홀딩 비.브이. | method of forming a nitrogen-containing carbon film and system for performing the method |
US11821078B2 (en) | 2020-04-15 | 2023-11-21 | Asm Ip Holding B.V. | Method for forming precoat film and method for forming silicon-containing film |
KR20210128343A (en) | 2020-04-15 | 2021-10-26 | 에이에스엠 아이피 홀딩 비.브이. | Method of forming chromium nitride layer and structure including the chromium nitride layer |
US11996289B2 (en) | 2020-04-16 | 2024-05-28 | Asm Ip Holding B.V. | Methods of forming structures including silicon germanium and silicon layers, devices formed using the methods, and systems for performing the methods |
TW202146831A (en) | 2020-04-24 | 2021-12-16 | 荷蘭商Asm Ip私人控股有限公司 | Vertical batch furnace assembly, and method for cooling vertical batch furnace |
JP2021172884A (en) | 2020-04-24 | 2021-11-01 | エーエスエム・アイピー・ホールディング・ベー・フェー | Method of forming vanadium nitride-containing layer and structure comprising vanadium nitride-containing layer |
KR20210132600A (en) | 2020-04-24 | 2021-11-04 | 에이에스엠 아이피 홀딩 비.브이. | Methods and systems for depositing a layer comprising vanadium, nitrogen, and a further element |
KR20210134226A (en) | 2020-04-29 | 2021-11-09 | 에이에스엠 아이피 홀딩 비.브이. | Solid source precursor vessel |
KR20210134869A (en) | 2020-05-01 | 2021-11-11 | 에이에스엠 아이피 홀딩 비.브이. | Fast FOUP swapping with a FOUP handler |
TW202147543A (en) | 2020-05-04 | 2021-12-16 | 荷蘭商Asm Ip私人控股有限公司 | Semiconductor processing system |
KR20210141379A (en) | 2020-05-13 | 2021-11-23 | 에이에스엠 아이피 홀딩 비.브이. | Laser alignment fixture for a reactor system |
TW202146699A (en) | 2020-05-15 | 2021-12-16 | 荷蘭商Asm Ip私人控股有限公司 | Method of forming a silicon germanium layer, semiconductor structure, semiconductor device, method of forming a deposition layer, and deposition system |
KR20210143653A (en) | 2020-05-19 | 2021-11-29 | 에이에스엠 아이피 홀딩 비.브이. | Substrate processing apparatus |
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Citations (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3313792A (en) * | 1962-03-16 | 1967-04-11 | Shell Oil Co | Process for polymerizing conjugated dienes with a catalyst comprising an aluminum halide, a salt of cobalt or nickel, and a compound of the formula sihxy (4-x) |
US5037514A (en) * | 1986-01-06 | 1991-08-06 | Semiconductor Energy Laboratory Co., Ltd. | Silicon oxide depositing method |
US5470800A (en) * | 1992-04-03 | 1995-11-28 | Sony Corporation | Method for forming an interlayer film |
US6037275A (en) * | 1998-08-27 | 2000-03-14 | Alliedsignal Inc. | Nanoporous silica via combined stream deposition |
US6090442A (en) * | 1997-04-14 | 2000-07-18 | University Technology Corporation | Method of growing films on substrates at room temperatures using catalyzed binary reaction sequence chemistry |
US6231989B1 (en) * | 1998-11-20 | 2001-05-15 | Dow Corning Corporation | Method of forming coatings |
US6270572B1 (en) * | 1998-08-07 | 2001-08-07 | Samsung Electronics Co., Ltd. | Method for manufacturing thin film using atomic layer deposition |
US20020001974A1 (en) * | 2000-06-30 | 2002-01-03 | Lim Chan | Method for manufacturing zirconium oxide film for use in semiconductor device |
US20020018849A1 (en) * | 2000-06-29 | 2002-02-14 | George Steven M. | Method for forming SIO2 by chemical vapor deposition at room temperature |
US20020047151A1 (en) * | 2000-10-19 | 2002-04-25 | Kim Yeong-Kwan | Semiconductor device having thin film formed by atomic layer deposition and method for fabricating the same |
US6391803B1 (en) * | 2001-06-20 | 2002-05-21 | Samsung Electronics Co., Ltd. | Method of forming silicon containing thin films by atomic layer deposition utilizing trisdimethylaminosilane |
US20020068466A1 (en) * | 2000-12-06 | 2002-06-06 | Seung-Hwan Lee | Methods of forming thin films by atomic layer deposition |
US20020164890A1 (en) * | 2001-05-01 | 2002-11-07 | Kwan Kim Yeong | Method of forming silicon containing thin films by atomic layer deposition utilizing s12cl6 and nh3 |
US20030015764A1 (en) * | 2001-06-21 | 2003-01-23 | Ivo Raaijmakers | Trench isolation for integrated circuit |
US6534395B2 (en) * | 2000-03-07 | 2003-03-18 | Asm Microchemistry Oy | Method of forming graded thin films using alternating pulses of vapor phase reactants |
US20030188682A1 (en) * | 1999-12-03 | 2003-10-09 | Asm Microchemistry Oy | Method of growing oxide films |
US6664156B1 (en) * | 2002-07-31 | 2003-12-16 | Chartered Semiconductor Manufacturing, Ltd | Method for forming L-shaped spacers with precise width control |
US20040096582A1 (en) * | 2002-11-14 | 2004-05-20 | Ziyun Wang | Composition and method for low temperature deposition of silicon-containing films such as films including silicon nitride, silicon dioxide and/or silicon-oxynitride |
Family Cites Families (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01143221A (en) * | 1987-11-27 | 1989-06-05 | Nec Corp | Manufacture of insulating thin film |
JPH02138471A (en) * | 1988-11-18 | 1990-05-28 | Matsushita Electric Ind Co Ltd | Production of thin film |
JPH04196321A (en) * | 1990-11-28 | 1992-07-16 | Hitachi Ltd | Method and device for forming film |
JPH06132276A (en) | 1992-10-22 | 1994-05-13 | Kawasaki Steel Corp | Method for forming semiconductor film |
JPH09181074A (en) * | 1995-12-27 | 1997-07-11 | Fujitsu Ltd | Formation of silicon oxynitride film and manufacture of semiconductor device |
JPH1060649A (en) * | 1996-08-22 | 1998-03-03 | Showa Denko Kk | Formation of silica coating film |
JP3836553B2 (en) | 1996-12-26 | 2006-10-25 | 独立行政法人科学技術振興機構 | Method for manufacturing silicon insulating film |
JP2001002990A (en) | 1999-06-21 | 2001-01-09 | Jsr Corp | Composition for forming film, formation of film and low- density film |
TW468212B (en) | 1999-10-25 | 2001-12-11 | Motorola Inc | Method for fabricating a semiconductor structure including a metal oxide interface with silicon |
JP3549193B2 (en) | 2000-03-31 | 2004-08-04 | キヤノン販売株式会社 | Method for modifying surface on which film is formed and method for manufacturing semiconductor device |
US6984591B1 (en) * | 2000-04-20 | 2006-01-10 | International Business Machines Corporation | Precursor source mixtures |
TWI262960B (en) * | 2003-02-27 | 2006-10-01 | Samsung Electronics Co Ltd | Method for forming silicon dioxide film using siloxane |
-
2003
- 2003-01-30 KR KR10-2003-0006370A patent/KR100505668B1/en active IP Right Grant
- 2003-06-12 US US10/459,943 patent/US6992019B2/en not_active Expired - Lifetime
- 2003-06-17 TW TW092116363A patent/TWI237311B/en not_active IP Right Cessation
- 2003-06-24 EP EP03253968A patent/EP1383163B1/en not_active Expired - Lifetime
- 2003-06-30 CN CNB031330193A patent/CN100343960C/en not_active Expired - Lifetime
- 2003-07-07 JP JP2003271607A patent/JP4422445B2/en not_active Expired - Fee Related
-
2005
- 2005-09-14 US US11/225,999 patent/US20060040510A1/en not_active Abandoned
Patent Citations (19)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3313792A (en) * | 1962-03-16 | 1967-04-11 | Shell Oil Co | Process for polymerizing conjugated dienes with a catalyst comprising an aluminum halide, a salt of cobalt or nickel, and a compound of the formula sihxy (4-x) |
US5037514A (en) * | 1986-01-06 | 1991-08-06 | Semiconductor Energy Laboratory Co., Ltd. | Silicon oxide depositing method |
US5470800A (en) * | 1992-04-03 | 1995-11-28 | Sony Corporation | Method for forming an interlayer film |
US6090442A (en) * | 1997-04-14 | 2000-07-18 | University Technology Corporation | Method of growing films on substrates at room temperatures using catalyzed binary reaction sequence chemistry |
US6270572B1 (en) * | 1998-08-07 | 2001-08-07 | Samsung Electronics Co., Ltd. | Method for manufacturing thin film using atomic layer deposition |
US6037275A (en) * | 1998-08-27 | 2000-03-14 | Alliedsignal Inc. | Nanoporous silica via combined stream deposition |
US6231989B1 (en) * | 1998-11-20 | 2001-05-15 | Dow Corning Corporation | Method of forming coatings |
US20030188682A1 (en) * | 1999-12-03 | 2003-10-09 | Asm Microchemistry Oy | Method of growing oxide films |
US6534395B2 (en) * | 2000-03-07 | 2003-03-18 | Asm Microchemistry Oy | Method of forming graded thin films using alternating pulses of vapor phase reactants |
US20020018849A1 (en) * | 2000-06-29 | 2002-02-14 | George Steven M. | Method for forming SIO2 by chemical vapor deposition at room temperature |
US6465371B2 (en) * | 2000-06-30 | 2002-10-15 | Hyundai Electronics Industries Co., Ltd. | Method for manufacturing zirconium oxide film for use in semiconductor device |
US20020001974A1 (en) * | 2000-06-30 | 2002-01-03 | Lim Chan | Method for manufacturing zirconium oxide film for use in semiconductor device |
US20020047151A1 (en) * | 2000-10-19 | 2002-04-25 | Kim Yeong-Kwan | Semiconductor device having thin film formed by atomic layer deposition and method for fabricating the same |
US20020068466A1 (en) * | 2000-12-06 | 2002-06-06 | Seung-Hwan Lee | Methods of forming thin films by atomic layer deposition |
US20020164890A1 (en) * | 2001-05-01 | 2002-11-07 | Kwan Kim Yeong | Method of forming silicon containing thin films by atomic layer deposition utilizing s12cl6 and nh3 |
US6391803B1 (en) * | 2001-06-20 | 2002-05-21 | Samsung Electronics Co., Ltd. | Method of forming silicon containing thin films by atomic layer deposition utilizing trisdimethylaminosilane |
US20030015764A1 (en) * | 2001-06-21 | 2003-01-23 | Ivo Raaijmakers | Trench isolation for integrated circuit |
US6664156B1 (en) * | 2002-07-31 | 2003-12-16 | Chartered Semiconductor Manufacturing, Ltd | Method for forming L-shaped spacers with precise width control |
US20040096582A1 (en) * | 2002-11-14 | 2004-05-20 | Ziyun Wang | Composition and method for low temperature deposition of silicon-containing films such as films including silicon nitride, silicon dioxide and/or silicon-oxynitride |
Cited By (35)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8216857B2 (en) | 2005-09-01 | 2012-07-10 | Fujitsu Semiconductor Limited | Ferroelectric memory device and fabrication process thereof, fabrication process of a semiconductor device |
US20090280578A1 (en) * | 2005-09-01 | 2009-11-12 | Fujitsu Microelectronics Limited | Ferroelectric memory device and fabrication process thereof, fabrication process of a semiconductor device |
US7579641B2 (en) | 2005-09-01 | 2009-08-25 | Fujitsu Microelectronics Limited | Ferroelectric memory device |
US8815612B2 (en) | 2005-09-01 | 2014-08-26 | Fujitsu Semiconductor Limited | Ferroelectric memory device and fabrication process thereof, fabrication process of a semiconductor device |
US20070045688A1 (en) * | 2005-09-01 | 2007-03-01 | Fujitsu Limited | Ferroelectric memory device and fabrication process thereof, fabrication process of a semiconductor device |
US20070293055A1 (en) * | 2006-06-14 | 2007-12-20 | Peter Baumann | Method for self-limiting deposition of one or more monolayers |
DE102006027932A1 (en) * | 2006-06-14 | 2007-12-20 | Aixtron Ag | Method for the deposition of layers in a process chamber used in the production of electronic components comprises using a first starting material containing two beta-diketones and a diene coordinated with a ruthenium atom |
US8114480B2 (en) | 2006-06-14 | 2012-02-14 | Aixtron Inc. | Method for self-limiting deposition of one or more monolayers |
US7897208B2 (en) | 2006-11-14 | 2011-03-01 | Applied Materials, Inc. | Low temperature ALD SiO2 |
US20080113096A1 (en) * | 2006-11-14 | 2008-05-15 | Maitreyee Mahajani | Method of depositing catalyst assisted silicates of high-k materials |
US20100227061A1 (en) * | 2006-11-14 | 2010-09-09 | Maitreyee Mahajani | LOW TEMPERATURE ALD Si02 |
US7749574B2 (en) | 2006-11-14 | 2010-07-06 | Applied Materials, Inc. | Low temperature ALD SiO2 |
US7776395B2 (en) | 2006-11-14 | 2010-08-17 | Applied Materials, Inc. | Method of depositing catalyst assisted silicates of high-k materials |
US20080254204A1 (en) * | 2007-04-16 | 2008-10-16 | Infineon Technologies Ag | Dielectric apparatus and associated methods |
US7635634B2 (en) * | 2007-04-16 | 2009-12-22 | Infineon Technologies Ag | Dielectric apparatus and associated methods |
US7858535B2 (en) * | 2008-05-02 | 2010-12-28 | Micron Technology, Inc. | Methods of reducing defect formation on silicon dioxide formed by atomic layer deposition (ALD) processes and methods of fabricating semiconductor structures |
US20110081786A1 (en) * | 2008-05-02 | 2011-04-07 | Micron Technology, Inc. | Methods of reducing defect formation on silicon dioxide formed by atomic layer deposition (ald) processes |
US8119543B2 (en) | 2008-05-02 | 2012-02-21 | Micron Technology, Inc. | Methods of reducing defect formation on silicon dioxide formed by atomic layer deposition (ALD) processes |
US20090275214A1 (en) * | 2008-05-02 | 2009-11-05 | Micron Technology, Inc. | Methods of reducing defect formation on silicon dioxide formed by atomic layer deposition (ald) processes and methods of fabricating semiconductor structures |
US20100029072A1 (en) * | 2008-07-31 | 2010-02-04 | Park Jae-Eon | Methods of Forming Electrical Interconnects Using Thin Electrically Insulating Liners in Contact Holes |
US9011601B2 (en) | 2008-10-29 | 2015-04-21 | Hitachi Kokusai Electric Inc. | Substrate processing apparatus |
US20100105192A1 (en) * | 2008-10-29 | 2010-04-29 | Naonori Akae | Method of Manufacturing Semiconductor Device and Substrate Processing Apparatus |
US8367557B2 (en) * | 2008-10-29 | 2013-02-05 | Hitachi Kokosai Electric, Inc. | Method of forming an insulation film having low impurity concentrations |
US8809204B2 (en) | 2008-10-29 | 2014-08-19 | Hitachi Kokusai Electric Inc. | Method of manufacturing semiconductor device and substrate processing apparatus |
US9269566B2 (en) | 2008-10-29 | 2016-02-23 | Hitachi Kokusai Electric Inc. | Substrate processing apparatus |
WO2010101756A3 (en) * | 2009-03-02 | 2011-01-06 | Veeco Instruments Inc. | Web substrate deposition system |
US20100221426A1 (en) * | 2009-03-02 | 2010-09-02 | Fluens Corporation | Web Substrate Deposition System |
WO2010101756A2 (en) * | 2009-03-02 | 2010-09-10 | Veeco Instruments Inc. | Web substrate deposition system |
WO2011042882A3 (en) * | 2009-10-07 | 2011-09-01 | L'air Liquide, Societe Anonyme Pour L'etude Et L'exploitation Des Procedes Georges Claude | HIGH DEPOSITION RATE OF SiO2 USING ATOMIC LAYER DEPOSITION AT EXTRA LOW TEMPERATURE |
US8993063B2 (en) | 2010-06-08 | 2015-03-31 | President And Fellows Of Harvard College | Low-temperature synthesis of silica |
JP2014183218A (en) * | 2013-03-19 | 2014-09-29 | Hitachi Kokusai Electric Inc | Method for manufacturing semiconductor device, substrate processing device, and program |
JP2014183219A (en) * | 2013-03-19 | 2014-09-29 | Hitachi Kokusai Electric Inc | Method for manufacturing semiconductor device, substrate processing device, and program |
US10319696B1 (en) | 2018-05-10 | 2019-06-11 | Micron Technology, Inc. | Methods for fabricating 3D semiconductor device packages, resulting packages and systems incorporating such packages |
US10797018B2 (en) | 2018-05-10 | 2020-10-06 | Micron Technology, Inc. | Methods for fabricating 3D semiconductor device packages, resulting packages and systems incorporating such packages |
US11456278B2 (en) | 2018-05-10 | 2022-09-27 | Micron Technology, Inc. | Methods for fabricating 3D semiconductor device packages, resulting packages and systems incorporating such packages |
Also Published As
Publication number | Publication date |
---|---|
EP1383163A2 (en) | 2004-01-21 |
TWI237311B (en) | 2005-08-01 |
US20040018694A1 (en) | 2004-01-29 |
US6992019B2 (en) | 2006-01-31 |
TW200407981A (en) | 2004-05-16 |
JP2004040110A (en) | 2004-02-05 |
CN100343960C (en) | 2007-10-17 |
KR20040005568A (en) | 2004-01-16 |
CN1480998A (en) | 2004-03-10 |
JP4422445B2 (en) | 2010-02-24 |
KR100505668B1 (en) | 2005-08-03 |
EP1383163A3 (en) | 2004-07-07 |
EP1383163B1 (en) | 2012-03-28 |
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