TWM497402U - Multilayer circuit board - Google Patents

Abstract

A multilayer circuit board including a core board, at least one heat-dissipation element and at least one outer build-up structure is provided. The core board includes a first dielectric layer and two first circuit layer conducted to each other through a first conductive hole penetrated into the first dielectric layer. The heat-dissipation element includes a heat-dissipation layer and at least one adhesive layer, and the heat-dissipation element is disposed on the core board by the adhesive layer. The outer build-up structure includes a second dielectric layer and a second circuit layer. The outer build-up structure is disposed on the core board by the second dielectric layer, so that the heat-dissipation element is embedded between the core board and the outer build-up structure, and the second circuit layer is conducted to the first circuit layer through a second conductive hole penetrated into the second dielectric layer.

Description

Multi-layer circuit board

The present invention relates to a circuit board, and more particularly to a multilayer circuit board.

In recent years, in order to increase the application of printed circuit boards (PCBs), many techniques have been made to fabricate printed circuit boards into a multi-layered circuit structure to increase the space for wiring layout therein. The multilayer circuit board is formed by repeatedly stacking and laminating a laminate structure of a copper foil and a prepreg (pp) on a core board to increase the internal wiring of the circuit board. Space, and using a plating process, a conductive material is filled in the through holes or blind holes of each laminated structure to conduct the layers. In addition, many different types of components, such as wafers, connectors, optoelectronic components, or heat dissipating components, can also be placed in a multi-layer circuit board as needed to increase the use of the multi-layer circuit board.

The multi-layer circuit board generates heat energy correspondingly during use, for example, electronic components disposed on the multi-layer circuit board generate heat energy by operating electric power. Therefore, it has been practiced to provide a heat dissipation function for a multilayer circuit board. For example, a layer of a laminated structure of a multilayer wiring board (consisting of a copper foil through an etching process) The thickness can be made thicker than the thickness of other circuit layers to increase the heat dissipation efficiency of the multilayer circuit board to transfer heat energy to the outside. However, when the wiring layer of the multilayer wiring board is made thick, the other laminated layer structure on the outer side of the laminated structure is not easily pressed thereon, that is, the laminated structure of the semi-cured film is not easily filled into the thick-thickness line. In the layer, which in turn affects the process yield. Furthermore, when the wiring layer of the multilayer wiring board is made thick, the entire board of the multilayer wiring board will be affected.

The novel creation provides a multilayer circuit board which has a heat dissipation function by embedding a heat sink, and the arrangement of the heat sink does not affect the overall thickness and process yield of the multilayer circuit board.

The novel multilayer circuit board comprises a core board, at least one heat sink and at least one outer layer structure. The core board includes a first dielectric layer and two first circuit layers on opposite sides of the first dielectric layer, and the two first circuit layers are electrically connected to each other through a first conductive hole penetrating the first dielectric layer . The heat dissipating component comprises a heat dissipating layer and at least one adhesive layer disposed on the heat dissipating layer, and the heat dissipating component is disposed on the core plate by an adhesive layer. The outer buildup structure includes a second dielectric layer and a second circuit layer on the second dielectric layer. The outer build-up structure is disposed on the core board with the second dielectric layer facing the core board, so that the heat sink is buried between the core board and the outer build-up structure, and the second circuit layer is penetrated through the second dielectric layer A second conductive via of the layer is electrically connected to the first wiring layer.

In an embodiment of the present invention, the multi-layer circuit board further includes at least one inner build-up structure, including a third dielectric layer and a layer on the third dielectric layer. The third circuit layer. The inner build-up structure is disposed on the core board with the third dielectric layer facing the core board, and the third circuit layer is electrically connected to the first circuit layer through a third conductive via extending through the third dielectric layer The structure is disposed on the inner build-up structure with the second dielectric layer facing the inner build-up structure, and the second circuit layer is electrically connected to the third circuit layer by the second conductive via.

In an embodiment of the present invention, the heat dissipating member is disposed between the core plate and the inner build-up structure by being disposed on the core plate by an adhesive layer.

In an embodiment of the present invention, the heat dissipating member is disposed between the inner build-up structure and the outer build-up structure by an adhesive layer disposed on the inner build-up structure.

In an embodiment of the present invention, the number of the heat dissipating members described above includes a plurality. At least one of the heat dissipating members is disposed between the core plate and the inner build-up structure by a corresponding adhesive layer disposed on the core plate, and at least one of the heat dissipating members is disposed by the corresponding adhesive layer The inner buildup layer is embedded in the inner build up structure and the outer build up layer structure.

In an embodiment of the present invention, the heat dissipating member further includes two adhesive layers respectively disposed on opposite sides of the heat dissipation layer, and respectively facing the core plate and the outer layer structure.

In an embodiment of the present invention, the vertical projection area of the heat sink on the core board is smaller than the vertical projection area of the first circuit layer on the core board.

In an embodiment of the present invention, the thickness of the heat sink is less than the thickness of the second dielectric layer.

In an embodiment of the present invention, the thickness of the heat dissipation layer is between 10 micrometers (μm) and 30 micrometers, and the thickness of the adhesive layer is Between 5 microns and 10 microns.

In an embodiment of the present invention, the material of the heat dissipation layer comprises a copper foil, and the material of the adhesive layer comprises a high thermal conductivity pure glue.

Based on the above, in the multilayer circuit board created by the present invention, the outer build-up structure is disposed on the core board, and the heat sink is disposed on the core board and buried between the core board and the outer build-up structure. As such, the outer build-up structure is covered by the second dielectric layer around the heat sink and disposed on the core board. It can be seen that the arrangement of the heat dissipating members does not increase the overall thickness of the multi-layer circuit board, and does not affect the manufacturing steps of disposing the outer build-up structure on the core board. Accordingly, the multilayer circuit board created by the present invention has a heat dissipation function by embedding a heat sink, and the arrangement of the heat sink does not affect the overall thickness and process yield of the multilayer circuit board.

The above described features and advantages of the present invention will become more apparent and understood from the following description.

100, 100a‧‧‧multilayer circuit board

110‧‧‧ core board

112‧‧‧First dielectric layer

114a, 114b‧‧‧ first line layer

116‧‧‧First conductive hole

120‧‧‧ Heat sink

122‧‧‧heat layer

124a, 124b‧‧‧ adhesive layer

130‧‧‧Outer layer structure

132‧‧‧Second dielectric layer

134‧‧‧second circuit layer

136‧‧‧Second conductive hole

140‧‧‧Incremental structure

142‧‧‧ Third dielectric layer

144‧‧‧ third circuit layer

146‧‧‧Three conductive holes

150‧‧‧ solder mask

T1, T2, t1, t2‧‧‧ thickness

W1, W2‧‧‧ width

BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a schematic view showing a multilayer wiring board of an embodiment of the present invention.

2 is a schematic view of the heat sink of FIG. 1.

3 is a schematic view of a multilayer wiring board of another embodiment of the present invention.

BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a schematic view showing a multilayer wiring board of an embodiment of the present invention. figure 2 It is a schematic view of the heat sink of Figure 1. Referring to FIG. 1 and FIG. 2 , in the embodiment, the multilayer circuit board 100 includes a core board 110 , two heat dissipating members 120 , and two outer build-up structures 130 . The core board 110 includes a first dielectric layer 112 and two first circuit layers 114a and 114b on opposite sides of the first dielectric layer 112, and the two first circuit layers 114a and 114b pass through the first dielectric layer. The first conductive vias 116 of 112 are electrically connected to each other. Each of the heat dissipating members 120 includes a heat dissipating layer 122 and two adhesive layers 124a and 124b disposed on the heat dissipating layer 122, and each of the heat dissipating members 120 is disposed on the core board 110 with an adhesive layer 124a. Each of the outer buildup structures 130 includes a second dielectric layer 132 and a second trace layer 134 on the second dielectric layer 132. Each of the external build-up structures 130 is disposed on the core board 110 with the second dielectric layer 132 facing the core board 110 such that the heat sink 120 is buried between the core board 110 and the outer build-up structure 130, and the second The wiring layer 134 is conducted to the first wiring layer 114a or 114b by the second conductive via 136 penetrating the second dielectric layer 132. Accordingly, the multilayer wiring board 100 of the present embodiment is, for example, a four-layer wiring board having four wiring layers (two first wiring layers 114a and 114b and two second wiring layers 134), and the four wiring layers are A three-layer dielectric layer (a first dielectric layer 112 and two second dielectric layers 132) is separated and passed through three conductive vias corresponding to the three dielectric layers (one first conductive via 116 and two first) The two conductive holes 136) are electrically connected to each other. However, the novel creation does not limit the number of outer build-up structures 130. The multilayer circuit board, not shown, may also have only one outer build-up structure 130.

Specifically, in the core board 110 of the embodiment, the material of the first dielectric layer 112 is, for example, a dielectric material including a film (prepreg, pp) and a glass fiber, and two first circuit layers. The material of 114a and 114b is, for example, copper foil (copper foil). As such, the core board 110 may be a double-sided copper clad laminate (CCL), but the present invention does not limit the type of the core board 110 and the materials of the first dielectric layer 112 and the first circuit layers 114a and 114b. Moreover, although the first circuit layers 114a and 114b of FIG. 1 are illustrated as a full-layer structure, the first circuit layers 114a and 114b may be patterned according to a desired line layout by an etching process or other applicable processes. Line pattern not shown. The first conductive via 116 can be penetrated through the first dielectric layer 112 by a drilling process (for example, laser drilling or mechanical drilling) or other suitable process, and The first circuit layers 114a and 114b are turned on by a plating process or other suitable process by filling a conductive material not shown. However, the novel creation does not limit the fabrication of the first circuit layers 114a and 114b and the first conductive vias 116, which can be adjusted as needed.

Furthermore, in the outer build-up structure 130 of the present embodiment, the material of the second dielectric layer 132 is, for example, a dielectric material including film and glass fiber, and the material of the second circuit layer 134 is, for example, copper foil. The novel creation does not limit the materials of the second dielectric layer 132 and the second wiring layer 134. Similarly, although the second circuit layer 134 of FIG. 1 is illustrated as a full-layer structure, the second circuit layer 134 may be patterned into an unillustrated line pattern according to a desired line layout by an etching process or other suitable process. The second conductive vias 136 may be penetrated through the second dielectric layer 132 by a drilling process (such as laser drilling or mechanical drilling) or other suitable processes, and filled in by an electroplating process or other applicable processes. The conductive material is shown to conduct the second circuit layer 134 and the corresponding first circuit layers 114a and 114. However, the novel creation does not limit the second circuit layer 134 and the second The manufacturing method of the conductive hole 136 can be adjusted according to requirements.

The first conductive via 116 and the second conductive via 136 of the present embodiment are preferably fabricated on the first dielectric layer 112 and the second dielectric layer 132 respectively before the outer build-up structure 130 is disposed on the core board 110. In addition, after the outer build-up structure 130 is disposed on the core board 110, the conductive holes penetrating through the first dielectric layer 112 and the second dielectric layer 132 are directly formed, thereby reducing the difficulty of the process. The process difficulty is, for example, that the outer build-up structure 130 and the core plate 110 are disposed together to prevent direct formation of conductive holes through the first dielectric layer 112 and the second dielectric layer 132 through the drilling process, or is disadvantageous for The conductive material is uniformly filled in the conductive holes that penetrate the first dielectric layer 112 and the second dielectric layer 132 at the same time. In addition, each of the external build-up structures 130 may be disposed on the core board 110 and the heat sink 120 before forming the second circuit layer 134 and the second conductive vias 136 by the above process, or may be formed by the above process. After the two circuit layers 134 and the second conductive holes 136 are disposed on the core board 110 and the heat sink 120, the novel creation does not limit the manufacturing steps of the outer build-up structure 130.

Therefore, since the heat dissipation member 120 is first disposed on the core board 110 by the adhesive layer 124a before the outer build-up structure 130 is disposed on the core board 110, the outer build-up structure 130 faces the core board with the second dielectric layer 132. When disposed on the core board 110, the second dielectric layer 132 of the outer build-up structure 130 covers the heat sink 120 so that the heat sink 120 is buried between the core board 110 and the outer build-up structure 130. In addition, although the multilayer circuit board 100 of FIG. 1 is exemplified by disposing a heat dissipating member 120 between each outer build-up structure 130 and the core board 110, actually between each outer build-up structure 130 and the core board 110 Multiple heat sinks 120 can also be configured, that is, multiple heat sinks The pieces 120 may each be disposed at portions of the core board 110 such that the outer build-up structure 130 may cover the plurality of heat sinks 120 while being disposed on the core board 110. It can be seen that the present invention does not limit the number and position of the heat dissipating members 120, and can be disposed in the multi-layer circuit board 100 where heat dissipation is required according to requirements.

In addition, in the embodiment, each of the heat dissipating members 120 includes two adhesive layers 124a and 124b respectively disposed on opposite sides of the heat dissipation layer 122 and facing the core plate 110 and the corresponding outer buildup structure 130, respectively. The material of the heat dissipation layer 122 is a metal having good thermal conductivity, such as a copper foil, and the material of the adhesive layers 124a and 124b is, for example, a gel made of an insulating material, such as a high thermal conductivity pure rubber, and The ground material also has good thermal conductivity, but the material of the heat dissipation layer 122 and the adhesive layers 124a and 124b created by the present invention is not limited to the above materials. As such, when each of the heat dissipating members 120 is disposed on the core board 110 with the corresponding adhesive layer 124a, the adhesive layer 124a can separate the heat dissipation layer 122 and the first circuit layer 114a or 114b of the core board 110 by its insulating property. It is avoided that the heat dissipation layer 122 made of a metal such as a copper foil contacts the first wiring layer 114a or 114b made of a copper foil to cause a short circuit. Similarly, the adhesive layer 124b can separate the heat dissipation layer 122 and the second wiring layer 134 of the corresponding outer buildup line 130 by its insulating properties to avoid contact of the heat dissipation layer 122 made of metal (for example, copper foil). The second wiring layer 134 made of copper foil causes a short circuit. In detail, in the embodiment, the thickness T1 of each heat sink 120 is less than or equal to the thickness T2 of the second dielectric layer 132. When the thickness T1 of the heat sink 120 is less than the thickness T2 of the corresponding second dielectric layer 132, the adhesive layer 124b of the heat sink 120 should not contact the second circuit layer 134. However, after the outer build-up structure 130 is disposed on the core board 110, the bit The second dielectric layer 132 between the second circuit layer 134 and the heat sink 120 is blocked by the heat sink 120 and flows around the heat sink 120, possibly exposing the second circuit layer 134. At this time, the adhesive layer 124b can prevent the second circuit layer 134 from contacting the heat dissipation layer 122 to cause a short circuit. Therefore, in this embodiment, each of the heat dissipating members 120 is preferably provided with two adhesive layers 124a and 124b, but the novel creation does not limit the configuration of the adhesive layer 124b, and can be selected according to requirements. Configured or omitted.

Further, as described above, the thickness T1 of each of the heat dissipation members 120 of the present embodiment is less than or equal to the thickness T2 of the second dielectric layer 132. For example, in the present embodiment, each second dielectric layer 132 has a thickness T2 of about 40 microns, and each heat sink 120 has a thickness T1 of between about 20 microns and 40 microns. Therefore, in each of the heat dissipation members 120 of the embodiment, the thickness t1 of the heat dissipation layer 122 may be between 10 micrometers and 30 micrometers, and the thickness t2 of each of the adhesive layers 124a and 124b may be between 5 micrometers and Between 10 microns. That is, in the above numerical range, the thickness T1 of the heat dissipation member 120 can be adjusted according to the thickness T2 of the second dielectric layer 132, and the thickness t1 of the heat dissipation layer 122 and the thickness t2 of the adhesive layers 124a and 124b can be based on heat dissipation. The thickness T1 of the member 120 is adjusted, and the creation of the present invention is not limited to the above embodiment. In addition, in the embodiment, the vertical projected area of each heat sink 120 on the core board 110 is smaller than the vertical projected area of the corresponding first circuit layers 114a and 114b on the core board 110. The vertical projected area of each member on the core panel 110 can be represented by the width of each member depicted in FIG. Therefore, in the present embodiment, the width W1 of the heat sink 120 is smaller than the width W2 of each of the first wiring layers 114a or 114b. As such, the thickness T1 of the heat sink 120 of the embodiment is less than or equal to the thickness of the corresponding second dielectric layer 132. The width T2, and the width W1 of the heat sink 120 is smaller than the first circuit layers 114a and 114b. When the outer build-up structure 130 is disposed on the core board 110, the second dielectric layer 132 of the outer build-up structure 130 covers the heat sink. The periphery of 120 is filled in the line pattern of the first wiring layers 114a and 114b to cover the first wiring layers 114a and 114b.

Therefore, the overall thickness of the multilayer circuit board 100 of the present embodiment is not increased by the provision of the heat dissipation member 120, and the external build-up line 130 can also be smoothly disposed on the core board 110 without being disposed on the heat sink 120 disposed on the core board 110. Impact. That is, the arrangement of the heat sink 120 does not increase the overall thickness of the multilayer wiring board 100, and does not affect the fabrication steps of arranging the outer build-up structure 130 on the core board 110. In addition, since the overall thickness of the multilayer circuit board 100 is not affected by the heat sink 120, the multilayer circuit board 100 of the present embodiment does not need to use a thin dielectric material as the second dielectric layer in order to maintain the overall thickness. 132, in turn, can eliminate the increased manufacturing cost of using a thinner dielectric material. Accordingly, the multilayer circuit board 100 of the present embodiment has a heat dissipation function by embedding the heat sink 120, and the arrangement of the heat dissipation member 120 does not affect the overall thickness and process yield of the multilayer circuit board 110, and the thickness can be omitted. The increased cost of the thinner dielectric material as the second dielectric layer 132.

3 is a schematic view of a multilayer wiring board of another embodiment of the present invention. Referring to FIG. 3, in the present embodiment, the main difference between the multilayer wiring board 100a and the foregoing multilayer wiring board 100 is that the multilayer wiring board 100a further includes a plurality of inner build-up structures 140. As such, the related content of the core board 110 and the outer layer structure 130 can be referred to the description of the previous embodiment, and details are not described herein. In this embodiment, each of the inner build-up structures 140 includes a third dielectric layer 142 and a third dielectric layer 142. Three circuit layers 144. The inner build-up structure 140 is disposed on the core board 110 with the third dielectric layer 142 facing the core board 110, and the third circuit layer 144 is electrically connected to the first through the third conductive via 146 of the third dielectric layer 142. Circuit layers 114a and 114b. Thereafter, the outer build-up structure 130 is disposed on the inner build-up structure 140 with the second dielectric layer 132 facing the corresponding inner build-up structure 140, and the second circuit layer 134 is electrically connected to the third via the second conductive via 136. Circuit layer 144. In the present embodiment, four inner build-up structures 140 (a total of eight inner build-up structures 140) are disposed between the core plate 110 and each of the outer build-up structures 130. Thus, the multilayer wiring board 100a of the present embodiment is, for example, a twelve-layer wiring board having twelve wiring layers (two first wiring layers 114a and 114b, two second wiring layers 134, and eight third wiring layers). 144), and the twelve-layer circuit layer is separated by eleven dielectric layers (a first dielectric layer 112, two second dielectric layers 132, and eight third dielectric layers 142), and through the corresponding ten Eleven conductive holes (one first conductive via 116, two second conductive vias 136, and eight third conductive vias 146) of one dielectric layer are electrically connected to each other. However, the novel creation does not limit the number of inner build-up structures 140. The multilayer circuit board, not shown, may also have only one inner build-up structure 140.

Specifically, in the inner build-up structure 140 of the embodiment, the material of the third dielectric layer 142 is, for example, a dielectric material including film and glass fiber, and the material of the third circuit layer 144 is, for example, copper foil. However, the novel creation does not limit the materials of the third dielectric layer 142 and the third wiring layer 144. Similarly, although the third circuit layer 144 of FIG. 3 is illustrated as a full-layer structure, the third circuit layer 144 may be patterned into an unillustrated line pattern according to a desired line layout by an etching process or other suitable process. The third conductive via 146 can be drilled by a drilling process (such as laser drilling or mechanical drilling) or The applicable process is through the third dielectric layer 142, and the third circuit layer 144 and the corresponding first circuit layers 114a and 114 are turned on by using an electroplating process or other suitable process to fill the conductive material (not shown). The inner buildup structure 140 adjacent to the core panel 110 is taken as an example). However, the novel creation does not limit the method of fabricating the third circuit layer 144 and the third conductive via 146, which can be adjusted as needed. The first conductive via 116, the second conductive via 136, and the third conductive via 146 of the present embodiment are preferably fabricated separately before the inner build-up structure 140 and the outer build-up structure 130 are disposed on the core board 110. The first dielectric layer 112, the second dielectric layer 132, and the third dielectric layer 142 are formed on the core board 110 instead of the inner build-up structure 140 and the outer build-up structure 130. The conductive holes of the layer 112, the second dielectric layer 132 and the third dielectric layer 142, thereby reducing the difficulty of the process. In addition, each of the inner build-up structures 140 may be formed after the core board 110 to form the third circuit layer 144 and the third conductive vias 146 by the above process, or may be formed by the third circuit layer 144 by the above process. After the third conductive vias 146 are disposed on the core board 110, the novel creation does not limit the fabrication steps of the inner build-up structure 140.

Furthermore, in this embodiment, since the core layer 110 and each of the outer build-up structures 130 are respectively disposed with four inner build-up structures 140 (a total of eight inner build-up structures 140), the core plate 110 is adjacent to the core plate 110. The two inner build-up structures 140 are respectively disposed on opposite sides of the core board 110, and the third circuit layer 144 is electrically connected to the first circuit layer 114a or 114b through the corresponding conductive holes 146, and the remaining inner build-up structure 140 The first inner build-up structure 140 is sequentially stacked on the first inner build-up structure 140, and the third conductive layer 144 is electrically connected to the previous third circuit layer 144 through the corresponding conductive vias 146. In addition, although this embodiment is at the core The same number of inner build-up structures 140 are disposed between the board 110 and each of the outer build-up structures 130 (in this embodiment, three layers are taken as an example), but the novel creation is not limited to the core board 110 and each outer layer. The number of inner buildup structures 140 between structures 130 must be the same. Similarly, although the first conductive via 116, the second conductive via 136, and the third conductive via 146 of the present embodiment are exemplified by each other, the novel creation is not limited thereto, as long as the first conductive via 116, The two conductive holes 136 and the third conductive holes 146 may correspond to the adjacent two circuit layers (ie, the first circuit layers 114a and 114b, the second circuit layer 134, and the third circuit layer 144). In addition, in the embodiment, the multilayer circuit board 100a may also be provided with a solder resist layer 150 on the outer build-up structure 130 according to requirements. The solder resist layer 150 of FIG. 3 is illustrated as a whole layer structure, but the solder resist layer 150 may be An opening, not shown, is provided to expose the second wiring layer 134 on the outer build-up structure 130 for electrical connection to the electronic components. Similarly, the foregoing multilayer circuit board 100 may also be provided with a solder resist layer 150 on the outer build-up structure 130 as needed. However, this embodiment does not limit the configuration of the solder resist layer 150, which can be adjusted according to requirements.

On the other hand, in the present embodiment, the heat dissipating member 120 is disposed on the innermost build-up structure 140 of the outermost layer by the adhesive layer 124a and is buried between the inner build-up structure 140 and the outer build-up structure 130. Thus, since the heat dissipating member 120 is first disposed on the inner build-up structure 140 by the adhesive layer 124a before the outer build-up structure 130 is disposed on the inner build-up structure 140, when the outer build-up structure 130 is in the second dielectric layer When the inner build-up structure 140 is disposed on the inner build-up structure 140, the second dielectric layer 132 of the outer build-up structure 130 covers the heat sink 120 to bury the heat sink 120 in the inner build-up layer. Between structure 140 and outer build up structure 130. In addition, although this embodiment is not painted As shown in the previous embodiment, the heat dissipating member 120 can also be disposed on the core board 110 by the adhesive layer 124a and buried between the core board 110 and the innermost layered structure 140 of the innermost layer. It can be seen that the number of the heat dissipation members 120 of the embodiment may include a plurality of. At least one of the heat dissipating members 120 is disposed on the core board 110 by the corresponding adhesive layer 124a and embedded between the core board 110 and the inner build-up structure 140, and at least one of the heat sinks 120 is correspondingly disposed. The adhesive layer 124a is disposed on the inner build-up structure 140 and is buried between the inner build-up structure 140 and the outer build-up structure 130. Similarly, when the multilayer circuit board of the present invention is configured with a plurality of inner build-up structures 140 (as in this embodiment) between the core board 110 and each of the outer build-up structures 130, between the inner build-up structures 140 The heat dissipating member 120 can also be disposed, that is, the heat dissipating member 120 is disposed on one of the inner build-up structures 140 by the adhesive layer 124a and buried between the two inner build-up structures 140 stacked on each other.

It can be seen that the heat dissipating members 120 can be disposed between the respective layer structures (the core plate 110, the inner build-up structure 140, and the outer build-up structure 130) of the multilayer wiring board 100a of the present embodiment. In addition, although the multilayer wiring board 100a of FIG. 3 is exemplified by disposing a heat dissipating member 120 between each of the outer build-up structure 130 and the adjacent inner build-up structure 140, actually each outer build-up structure 130 is A plurality of heat dissipating members 120 may be disposed between the adjacent inner build-up structures 140, that is, the plurality of heat dissipating members 120 may be disposed in a plurality of portions of the inner build-up structure 140, so that the outer build-up structure 130 may be disposed therein. The plurality of heat sinks 120 are simultaneously covered on the build-up structure 140. It can be seen that the novel creation does not limit the number and position of the heat dissipating members 120, and can be disposed in the multi-layer circuit board 100a as needed to enhance the heat dissipation function.

On the other hand, in the present embodiment, the main difference between the multilayer wiring board 100a and the aforementioned multilayer wiring board 100 is the inner build-up structure 140, and the remaining structures are substantially similar. Therefore, in the embodiment, when the heat dissipation member 120 is disposed between the outer build-up structure 130 and the inner build-up structure 140, the thickness T1 of each heat sink 120 is less than or equal to the thickness T2 of the second dielectric layer 132. When the heat dissipating member 120 is disposed between the inner build-up structure 140 and the core plate 110, or between the two inner build-up structures 140, the thickness T1 of each heat sink 120 is less than or equal to the thickness of the third dielectric layer 142. . Thus, by way of example, the thickness T2 of each of the second dielectric layers 132 of the present embodiment and the thickness of each of the third dielectric layers 142 are about 40 micrometers, and the thickness of the first dielectric layer 112 is about 50 micrometers. . Further, the first wiring layers 114a and 114b, each of the second wiring layers 134 and each of the third wiring layers 144 have a thickness of about 20 μm, and each solder resist layer 150 has a thickness of about 20 μm. Thus, the multilayer wiring board 100a (twelf layer wiring board) of the present embodiment has an overall thickness of about 730 μm. At this time, the thickness T1 of each heat sink 120 is between about 20 micrometers and 40 micrometers. Therefore, when the heat sink 120 is disposed between the core board 110 and the inner build-up structure 140, and disposed between the two inner build-up structures 140, Or disposed between the inner build-up structure 140 and the outer build-up structure 130, the heat sink 120 may be covered by the corresponding third dielectric layer 142 or the second dielectric layer 132 and embedded in the core board 110 and the inner build-up layer. Between structure 140 and outer build up structure 130.

Therefore, the overall thickness of the multilayer circuit board 100a of the present embodiment is not increased by the provision of the heat dissipation member 120, and the inner build-up structure 140 and the outer build-up layer 130 can also be smoothly disposed on the core board 110 or the previous inner build-up structure. The 140 is not affected by the heat sink 120 disposed on the core board 110 or the previous inner build-up structure 140. That is, scattered The arrangement of the heat members 120 does not increase the overall thickness of the multilayer wiring board 100a, and does not affect the arrangement of the inner build-up structure 140 on the core board 110, and the inner build-up structure 140 on the previous inner build-up structure 140 or The fabrication step of arranging the outer buildup structure 130 on the inner buildup structure 140. In addition, since the overall thickness of the multilayer circuit board 100a is not affected by the disposed heat sink 120, the multilayer circuit board 100a of the present embodiment does not need to use a thin dielectric material as the second dielectric layer in order to maintain the overall thickness. 132 and the third dielectric layer 142, in turn, can eliminate the increased manufacturing cost of using a thinner dielectric material. Accordingly, the multilayer circuit board 100a of the present embodiment has a heat dissipation function by embedding the heat sink 120, and the arrangement of the heat dissipation member 120 does not affect the overall thickness and process yield of the multilayer circuit board 100a, and the thickness can be omitted. The thinner dielectric material adds cost to the second dielectric layer 132 and the third dielectric layer 142.

In summary, in the multilayer circuit board created by the present invention, the inner build-up structure and the outer build-up structure are disposed on the core board, and the heat sink is disposed on the core board or the inner build-up structure and is buried in the core board. Between the inner layer structure and the outer layer structure. In this way, the inner build-up structure is covered by the third dielectric layer around the heat sink and disposed on the core board or another inner build-up structure, or the outer build-up structure is covered by the second dielectric layer on the heat sink. It is arranged around the core board or the inner layer structure. It can be seen that the arrangement of the heat dissipating members does not increase the overall thickness of the multi-layer circuit board, and does not affect the manufacturing steps of disposing the inner build-up structure or the outer build-up structure on the core board. In addition, the multilayer wiring board does not need to use a thin dielectric material as the dielectric layer in order to maintain the overall thickness, thereby eliminating the manufacturing cost of selecting a thinner dielectric material. Accordingly, the multilayer circuit board created by the present invention has a heat dissipation function by means of a buried heat sink, and heat dissipation The configuration of the components does not affect the overall thickness and process yield of the multilayer circuit board, and the manufacturing cost increased by using a thinner dielectric material as the dielectric layer can be omitted.

Although the present invention has been disclosed in the above embodiments, it is not intended to limit the novel creation, and any person skilled in the art can make some changes without departing from the spirit and scope of the novel creation. Retouching, the scope of protection of this new creation is subject to the definition of the scope of the patent application attached.

100‧‧‧Multilayer circuit board

110‧‧‧ core board

112‧‧‧First dielectric layer

114a, 114b‧‧‧ first line layer

116‧‧‧First conductive hole

120‧‧‧ Heat sink

122‧‧‧heat layer

124a, 124b‧‧‧ adhesive layer

130‧‧‧Outer layer structure

132‧‧‧Second dielectric layer

134‧‧‧second circuit layer

136‧‧‧Second conductive hole

150‧‧‧ solder mask

T1, T2‧‧‧ thickness

W1, W2‧‧‧ width

Claims (10)

A multi-layer circuit board comprising: a core board comprising a first dielectric layer and two first circuit layers on opposite sides of the first dielectric layer, and the two first circuit layers are a first conductive hole of a dielectric layer is electrically connected to each other; at least one heat dissipating member includes a heat dissipation layer and at least one adhesive layer disposed on the heat dissipation layer, and the heat dissipation member is disposed on the core plate with the adhesive layer And an at least one external build-up structure comprising a second dielectric layer and a second circuit layer on the second dielectric layer, the external build-up structure having the second dielectric layer a plate is disposed on the core plate such that the heat sink is buried between the core plate and the outer build-up structure, and the second circuit layer is through a second conductive hole penetrating the second dielectric layer Conduction to the first circuit layer. The multi-layer circuit board of claim 1, further comprising: at least one inner build-up structure comprising a third dielectric layer and a third circuit layer on the third dielectric layer, wherein the inner layer The build-up structure is disposed on the core board by the third dielectric layer, and the third circuit layer is electrically connected to the first line through a third conductive via extending through the third dielectric layer. a layer, the outer layer structure is disposed on the inner build up structure by the second dielectric layer, and the second circuit layer is electrically connected to the third line through the second conductive via Floor. The multi-layer circuit board of claim 2, wherein the heat dissipating member is embedded between the core plate and the inner build-up structure by the adhesive layer being disposed on the core plate. The multi-layer circuit board of claim 2, wherein the heat dissipating member is embedded between the inner build-up structure and the outer build-up structure by the adhesive layer being disposed on the inner build-up structure. The multi-layer circuit board of claim 2, wherein the number of the heat dissipating members comprises a plurality, and at least one of the heat dissipating members is embedded in the core plate by a corresponding one of the adhesive layers. Between the core plate and the inner build-up structure, and at least one of the heat dissipating members is embedded in the inner build-up structure by the corresponding adhesive layer and embedded in the inner build-up structure and the Between the outer layer structures. The multi-layer circuit board of claim 1, wherein the heat dissipating member further comprises two adhesive layers respectively disposed on opposite sides of the heat dissipation layer and facing the core plate and the outer build-up structure respectively. The multi-layer circuit board of claim 1, wherein a vertical projected area of the heat sink on the core board is smaller than a vertical projected area of the first circuit layer on the core board. The multilayer circuit board of claim 1, wherein the heat sink has a thickness smaller than a thickness of the second dielectric layer. The multilayer circuit board of claim 1, wherein the heat dissipation layer has a thickness of between 10 micrometers (μm) and 30 micrometers, and the thickness of the adhesive layer is from 5 micrometers to 10 micrometers. between. The multilayer circuit board of claim 1, wherein the material of the heat dissipation layer comprises a copper foil, and the material of the adhesive layer comprises a high thermal conductivity pure glue.