TWI403244B - Method for manufacturing multilayer printed circuit board - Google Patents

Description

Multilayer circuit board manufacturing method

The present invention relates to circuit board fabrication techniques, and more particularly to a method of fabricating a multilayer circuit board having recesses.

With the advancement of science and technology, printed circuit boards are widely used in electronic products. For application of the circuit board, please refer to the literature Takahashi, A. Ooki, N. Nagai, A. Akahoshi, H. Mukoh, A. Wajima, M. Res. Lab, High density multilayer printed circuit board for HITAC M-880, IEEE Trans On Components, Packaging, and Manufacturing Technology, 1992, 15(4): 418-425.

With the miniaturization of electronic products, challenges have also been placed on printed circuit boards. One current technology trend is to embed electronic components in a multi-layer circuit board so that electronic components mounted on the multi-layer circuit board do not occupy space in the electronic product. This method requires a groove to be formed in the multilayer circuit board in advance, a circuit is provided at the bottom of the groove, and the electronic component is assembled in the groove and electrically connected to the line at the bottom of the groove. However, in the process of manufacturing a multi-layer circuit board, various kinds of syrups are easily entered in the grooves, which may cause breakage of the circuit at the bottom of the groove, and finally affect the assembly of the electronic components.

In view of this, it is necessary to provide a method for fabricating a multilayer printed circuit board having a high yield.

A method of fabricating a multilayer circuit board will be described below by way of example.

A method for fabricating a multilayer circuit board, comprising the steps of: providing a circuit substrate comprising a substrate and a circuit layer formed on a surface of the substrate, the circuit layer having an adjacent assembly area and a nip area; The assembly area forms a first solder resist layer; the protective film is attached to the surface of the first solder resist layer; the first adhesive sheet and the first copper foil are provided, and the first adhesive sheet has a first corresponding to the protective film Opening, pressing the first adhesive sheet with the first copper foil on the circuit substrate, and placing the protective film in the first opening; forming the first copper pattern into the first line pattern, the first line pattern having the protective film Corresponding first window; providing a second adhesive sheet and a second copper foil, and pressing the second adhesive sheet and the second copper foil on the circuit substrate, wherein the second adhesive sheet is located on the first line pattern and Between the two copper foils; forming a second wiring pattern on the second copper foil, the second wiring pattern having a second window, the second window corresponding to a boundary of the protective film; forming a second protection on the surface of the second wiring pattern a solder layer, the second solder mask is exposed a second window; a second opening corresponding to the protective film is formed in the second adhesive sheet from the second window, wherein the second window, the second opening, the first window and the first opening are sequentially connected to form a common a recess, the protective film is exposed to the recess; and the protective film is removed to form a multi-layer circuit board having a recess.

The manufacturing method of the multi-layer circuit board of the technical solution has the following advantages: first, in the process of pressing the first adhesive sheet, the first copper foil, the second adhesive sheet and the second copper foil, the first in the assembly area The surface of the solder resist layer forms a protective film, so that the circuit layer of the assembly area can be protected and the circuit layer of the assembly area is damaged; secondly, an opening corresponding to the protective film is formed in the first adhesive sheet, and then the first part is pressed. An adhesive sheet, in this way, avoids the phenomenon that the surface of the first copper foil is uneven after the pressing of the protective film, so that the surface of the first copper foil after pressing is very flat, which is favorable for etching to form a precise first line pattern; Again, since the removal of the copper material is relatively difficult, and the adhesive sheet is relatively soft, the removal of the material is relatively easy. In the technical solution, in the process of forming the first copper foil and the second copper foil into a circuit pattern, a Protecting the first window and the second window corresponding to the film, so that only the material of the second adhesive sheet above the protective film needs to be removed, so that the second opening can be easily formed, thereby exposing The protective film is taken out to facilitate the protection of the film removal; finally, the technical solution adopts the process of forming the first window and the second window in the process of forming the circuit pattern without additional steps, that is, the manufacturing of the technical solution has a concave shape. The method steps of the multi-layer circuit board of the slot are relatively simple, the process time is short, and the production and yield can be high in mass production.

The method for fabricating the multilayer circuit board provided by the technical solution will be further described in detail below with reference to the accompanying drawings and embodiments.

The manufacturing method of the multilayer circuit board provided by the embodiment of the technical solution includes the following steps:

In the first step, referring to FIG. 1, a circuit substrate 10 is provided. The circuit substrate 10 includes a substrate 11 and a wiring layer 12. The substrate 11 may be a single panel, a double panel or a multilayer panel. In the present embodiment, the circuit substrate 10 is a four-layer board, and the substrate 11 is a three-layer board. The substrate 11 includes a first insulating layer 111, a first conductive layer 112, a second insulating layer 113, a second conductive layer 114, a third insulating layer 115, and a third conductive layer 116, which are sequentially disposed. The first conductive layer 112, the second conductive layer 114, and the third conductive layer 116 are each made of a conductive material such as copper, and both have formed conductive trace patterns. The first insulating layer 111, the second insulating layer 113, and the third insulating layer 115 are each made of an insulating material such as an epoxy resin, a polyimide, or the like. The second insulating layer 113 is located between the first conductive layer 112 and the second conductive layer 114. The first conductive layer 112 and the second conductive layer 114 are electrically connected to each other by at least one first buried via 101 disposed in the second insulating layer 113, and the at least one first buried via 101 is further filled. There is a plug resin. The third insulating layer 115 is located between the second conductive layer 114 and the third conductive layer 116. The second conductive layer 114 and the third conductive layer 116 are electrically connected to each other by at least one first blind via 102 disposed in the third insulating layer 115.

The circuit layer 12 is formed on the surface of the first insulating layer 111, that is, the first insulating layer 111 is located between the first conductive layer 112 and the circuit layer 12. The circuit layer 12 can also be made of copper foil and also formed with a conductive trace pattern. The circuit layer 12 is electrically connected to the first conductive layer 112 by at least one second blind via 103 disposed in the first insulating layer 111. The circuit layer 12 has adjacent assembly areas 121 and nips 122. The assembly area 121 and the nip area 122 are both distributed with a conductive line pattern. The conductive trace pattern of the assembly area 121 includes at least one conductive trace 1211 and at least one conductive terminal 1212 for mounting an electronic component. In the present embodiment, the nip area 122 is circumferentially adjacent to the assembly area 121.

In the second step, referring to FIG. 2, a first solder resist layer 13 is formed in the assembly area 121 of the circuit layer 12 by printing or spraying, and the first solder resist layer 13 covers at least one conductive line 1211 of the assembly area 121. And exposing at least one conductive terminal 1212. In addition, the first solder resist layer 13 may also cover the nip region 122 partially located around the assembly area 121. That is, the coverage area of the first solder resist layer 13 may be greater than or equal to the distribution area of the assembly area 121. In the present embodiment, the first solder resist layer 13 is formed on the surface of at least one of the conductive traces 1211 of the assembly region 121, and is also formed on the surface of the first insulating layer 111 exposed from the conductive trace pattern of the assembly region 121, and is also formed on the surface. The surface of the wiring layer 12 around the assembly area 121.

In the third step, referring to FIG. 3 and FIG. 4 together, the protective film 20 is attached to the surface of the first solder resist layer 13. The protective film 20 may be a polyethylene terephthalate high temperature resistant tape and a polytetrafluoroethylene high temperature resistant tape.

Bonding the protective film 20 to the surface of the first solder resist layer 13 may include the steps of: first, referring to FIG. 3, on the surface of the first solder resist layer 13, the surface of the wiring layer 12 exposed from the first solder resist layer 13 and A protective layer 21 is adhered to the surface of the first insulating layer 111 exposed from the wiring layer 12. Next, the protective layer 21 is cut by laser to form an annular opening 210 surrounding the assembly area 121. The protective film layer 21 surrounded by the annular opening 210 constitutes the protective film 20. Again, the protective adhesive layer 21 other than the annular opening 210 is removed, leaving the protective adhesive layer 21 within the annular opening 210, thus forming the protective film 20 attached to the surface of the first solder resist layer 13, as shown in FIG. Shown.

In a fourth step, referring to FIG. 5, a first adhesive sheet 14 and a first copper foil 15 are provided. The first adhesive sheet 14 has a first opening 140 corresponding to the protective film 20. The first opening 140 can be formed by punching. The cross-sectional area of the first opening 140 is greater than or equal to the cross-sectional area of the protective film 20. In the embodiment, the cross-sectional area of the first opening 140 is larger than the cross-sectional area of the protective film 20.

Then, the protective film 20 attached to the assembly area 121 is caused to correspond to the first opening 140, and the first adhesive sheet 14 and the first copper foil 15 are pressed against the circuit substrate 10. That is, the first adhesive sheet 14 is pressed between the nip 123 of the wiring layer 12 and the first copper foil 15, and the protective film 20 attached to the assembly area 121 is placed in the first opening 140. The first adhesive sheet 14 is mainly composed of a polypropylene resin and glass fibers.

In the fifth step, referring to FIG. 6, the first copper foil 15 is formed into a first wiring pattern 151 by laser etching or chemical etching, and the wiring layer 12 and the first wiring pattern 151 are electrically connected. The first line pattern 151 has a first window 150 corresponding to the protective film 20, and the first window 150 communicates with the first opening 140 to expose the protective film 20. In this embodiment, the cross-sectional area of the first window 150 is equal to the cross-sectional area of the first opening 140, and the circuit layer 12 and the first line pattern 151 are at least disposed in the first adhesive sheet 14. A third blind via 104 is electrically connected. The at least one third blind via 104 may be formed before the first trace pattern 151 is formed, and may be formed by forming at least one through the first glue by a deep mechanical drilling process or a laser drilling process. a blind hole of the adhesive sheet 14 and the first copper foil 15; and a conductive material is deposited in the at least one blind via by an electroplating process to form the at least one third of the electrical connection layer 12 and the first copper foil 15. Blind guide hole 104. As such, after the first copper foil 15 is etched into the first line pattern 151, the at least one third blind via 104 can function as the electrical connection layer 12 and the first line pattern 151.

In the sixth step, referring to FIG. 7 , the second adhesive sheet 16 and the second copper foil 17 are provided, and the second adhesive sheet 16 and the second copper foil 17 are pressed onto the circuit substrate 10 . That is, the second adhesive sheet 16 is press-bonded between the first wiring pattern 151 and the second copper foil 17. The material of the second adhesive sheet 16 is substantially the same as the material of the first adhesive sheet 14.

In the seventh step, referring to FIG. 8, the second copper foil 17 is formed into a second wiring pattern 171 by laser etching or chemical etching, and the second wiring pattern 171 and the first wiring pattern 151 are electrically connected.

The second line pattern 171 has a second window 170 to expose at least an area of the second adhesive sheet 16 corresponding to the boundary of the protective film 20. It can be said that the vertical projection of the protective film 20 is located within the vertical projection of the second window 170, or that the vertical projection of the boundary of the protective film 20 is located within the vertical projection of the outermost boundary of the second window 170.

At the time of etching, the second copper foil 17 of the region corresponding to the protective film 20 may be completely etched away to form a second window 170 having a cross-sectional area greater than or equal to the protective film 20, as shown in FIG. In the present embodiment, the vertical projection of the protective film 20 is located within the vertical projection of the second window 170, and the cross-sectional area of the second window 170 is equal to the cross-sectional area of the first window 150.

Except as shown in the embodiment, at the time of etching, only a portion of the second copper foil 17 corresponding to the boundary of the protective film 20 may be etched away to form a ring-shaped second window 170 corresponding to the boundary of the protective film 20, and The second copper foil 17 in the annular second window 170 is removed without etching. That is, the vertical projection of the boundary of the protective film 20 is placed within the vertical projection of the outermost boundary of the annular second window 170.

In this embodiment, the second line pattern 171 is electrically connected to the first line pattern 151 by at least one fourth blind via 105 disposed on the second adhesive sheet 16, and is further electrically connected by at least one second via 106. The two line patterns 171, the first line pattern 151, the circuit layer 12, and the third conductive layer 116.

The fourth blind vias 105 and the second vias 106 may be formed before the second copper foil 17 is etched to form the second wiring pattern 171. The fourth blind via 105 can be formed by a similar process to the fabrication of the third blind via 104. The second via hole 106 can be formed by forming a through copper foil 17 , a second adhesive sheet 16 , a first line pattern 151 , a first adhesive sheet 14 , and a circuit substrate 10 by a mechanical drilling process. a via hole; a conductive material is deposited on the sidewall of the via hole by electroplating; a plug hole material is filled in the via hole; and a conductive material is deposited again on the surface of the plug hole material, thereby forming the second via hole 106. After the second copper foil 17 is etched to form the second line pattern 171, the fourth blind via 105 can electrically connect the second line pattern 171 with the first line pattern 151, and the second via hole 106 can be electrically connected. The second line pattern 171, the first line pattern 151, the wiring layer 12, and the third conductive layer 116.

In the eighth step, referring to FIG. 9, a second solder resist layer 18 is formed on the surface of the second wiring pattern 171, and a third solder resist layer 19 is formed on the surface of the third conductive layer 116. The second solder resist layer 18 covers the surface of the second wiring pattern 171 and also covers the surface of the second adhesive sheet 16 exposed from the second wiring pattern 171. Of course, the second solder mask 18 exposes the second window 170. The third solder resist layer 19 covers the surface of the conductive trace pattern of the third conductive layer 116 and also covers the surface of the third insulating layer 115 exposed from the third conductive layer 116. Both the second solder resist layer 18 and the third solder resist layer 19 can be formed by printing or spraying.

In addition, the third solder resist layer 19 may be formed simultaneously with the first solder resist layer 13 in addition to being formed simultaneously with the second solder resist layer 18 as shown in this embodiment.

In the ninth step, referring to FIG. 10, a second opening 160 corresponding to the protective film 20 is formed in the second adhesive sheet 16 from the second window 170, that is, the second adhesive sheet 16 above the protective film 20 is removed. Thereby, the protective film 20 is exposed. The vertical projection of the protective film 20 is located within the vertical projection of the second opening 160. The second window 170, the second opening 160, the first window 150 and the first opening 140 are sequentially connected to form a groove 100, and the protective film 20 is located in the groove 100. The groove 100 is used to house an electronic component.

In the present embodiment, the protective film 20 is exposed by: cutting the second adhesive sheet 16 exposed from the second window 170 along the boundary of the protective film 20 by laser to form an annular slit, the annular slit surrounding The second adhesive sheet 16 above the film 20 is protected such that the second adhesive sheet 16 surrounded by the annular slit is naturally peeled off, thereby forming a second opening 160 exposing the protective film 20.

It can be understood that if the second window 170 is an annular window, the second adhesive sheet 16 is cut such that the second adhesive sheet 16 surrounded by the annular slit above the protective film 20 naturally falls off, and the second window 170 of the ring is not The second copper foil 17 which is removed by etching also naturally falls off.

In addition, those skilled in the art can understand that during the process of pressing the first adhesive sheet 14 and the second adhesive sheet 16, there may be a phenomenon of overflowing, that is, a material which may make part of the first adhesive sheet 14 The material of the portion of the second adhesive sheet 16 overflows into the first opening 140 and even flows to the surface of the protective film 20. After the second opening 160 is formed, the portion of the material can be peeled off by the tweezers or other tools.

In the tenth step, the exposed protective film 20 can be removed by vacuum adsorption or manual operation to expose the first solder resist layer 13 and the at least one conductive terminal 1212. At this time, a multilayer circuit board 10a having a recess 100 which can be used to construct an electronic component is formed.

In the eleventh step, referring to FIG. 11, an electronic component 30 is mounted in the assembly area 121 of the circuit layer 12, and the electronic component 30 is received in the recess 100. In this embodiment, the electronic component 30 is configured by the following steps: First, the electronic component 30 is provided, and the electronic component 30 can be an active component or a passive component, for example, For the wafer. The electronic component 30 has at least one conductive contact 31, and the at least one conductive contact 31 corresponds to the at least one conductive terminal 1212. Conductive contacts 31 can be pads, pins, terminals or other contact elements. Next, the electronic component 30 is placed in the recess 100, and the at least one conductive contact 31 is electrically connected to the at least one conductive terminal 1212, thereby electrically connecting the electronic component 30 and the circuit layer 12. . In the present embodiment, the conductive contacts 31 are electrically connected to the conductive terminals 1212 by solder balls 32. Again, in the recess 100, the encapsulating material 33 is filled between the electronic component 30 and the multilayer circuit board 10a, thereby stably fixing the electronic component 30 and protecting the solder balls 32. Thus, the multilayer circuit board structure 10b in which the electronic component 30 is assembled is formed.

Of course, those skilled in the art can understand that, when the plurality of assembly areas 121 are disposed on the circuit substrate 10, the multi-layer circuit board 10a having the plurality of recesses 100 can be fabricated, and the multi-layer circuit board structure 10b including the plurality of electronic components 30 can be further formed. .

Further, in the present embodiment, the multilayer circuit board 10a and the multilayer circuit board structure 10b are both six-layer boards. When it is necessary to fabricate the multilayer circuit board 10a of the other layer number and the multilayer circuit board structure 10b, the circuit board 10 of a different number of layers may be used, and the adhesive sheet and the copper foil may be laminated several times on the circuit board 10. For example, when it is required to fabricate an eight-layer circuit board and an eight-layer circuit board structure, a four-layer circuit substrate 10 can be used, and the first adhesive sheet 14 and the first copper foil are sequentially pressed on both sides of the circuit substrate 10. 15. The second adhesive sheet 16 and the second copper foil 17 are configured to form an eight-layer circuit board and an eight-layer circuit board structure.

The manufacturing method of the multilayer circuit board of the present technical solution has the following advantages: first, in the process of pressing the first adhesive sheet 14, the first copper foil 15, the second adhesive sheet 16, and the second copper foil 17, in assembling The protective film 20 is formed on the surface of the first solder resist layer 13 of the region 121. Thus, the circuit layer 12 of the assembly area 121 can be protected, and the circuit layer 12 of the assembly area 121 is prevented from being damaged. Secondly, the first adhesive sheet 14 is formed first. The opening corresponding to the protective film 20 is pressed against the first adhesive sheet 14, so that the surface of the first copper foil 15 after the protective film 20 is prevented from being uneven, so that the first copper after pressing The surface of the foil 15 is very flat, which is favorable for etching to form a precise first line pattern 151; again, since the removal of the copper material is relatively difficult, and the adhesive sheet is relatively soft, the material removal is relatively easy, and in the technical solution, During the formation of the wiring pattern of the copper foil 15 and the second copper foil 17, the first window 150 and the second window 170 corresponding to the protective film 20 are formed, so that only the second adhesive sheet 16 is disposed above the protective film 20. The material needs to be removed, Therefore, the second opening 160 can be easily formed to expose the protective film 20 to facilitate the protection of the film 20; finally, the technical solution adopts forming the first window 150 and the second window 170 in the process of forming the line pattern. There is no need to add additional steps, that is, the method of manufacturing the multi-layer circuit board 10a having the recess 100 of the present technical solution is relatively simple, the processing time is short, and the yield and yield can be high in mass production.

In summary, the present invention has indeed met the requirements of the invention patent, and has filed a patent application according to law. However, the above description is only a preferred embodiment of the present invention, and it is not possible to limit the scope of the patent application of the present invention. Equivalent modifications or variations made by persons skilled in the art in light of the spirit of the invention are intended to be included within the scope of the following claims.

10‧‧‧ circuit board

11‧‧‧Base

12‧‧‧Line layer

111‧‧‧First insulation

112‧‧‧First conductive layer

113‧‧‧Second insulation

114‧‧‧Second conductive layer

115‧‧‧ third insulation

116‧‧‧ Third conductive layer

101‧‧‧First buried hole

102‧‧‧First blind via

103‧‧‧Second blind guide hole

121‧‧‧Assembly area

122‧‧‧ nip area

1211‧‧‧Electrical circuit

1212‧‧‧Electrical terminals

13‧‧‧First solder mask

19‧‧‧ Third solder mask

20‧‧‧Protective film

21‧‧‧Protective layer

210‧‧‧Circular opening

14‧‧‧First adhesive sheet

15‧‧‧First copper foil

140‧‧‧ first opening

151‧‧‧First line graphics

150‧‧‧ first window

104‧‧‧ third blind via

16‧‧‧Second adhesive sheet

17‧‧‧Second copper foil

171‧‧‧Second line graphics

170‧‧‧ second window

105‧‧‧4th blind via

106‧‧‧Second via

18‧‧‧Second solder mask

160‧‧‧second opening

100‧‧‧ Groove

30‧‧‧Electronic components

31‧‧‧Electrical contacts

32‧‧‧ solder balls

33‧‧‧Packaging materials

10a‧‧‧Multilayer circuit board

10b‧‧‧Multilayer circuit board structure

FIG. 1 is a schematic diagram of a circuit substrate provided by an embodiment of the present technical solution.

FIG. 2 is a schematic diagram of forming a first solder resist layer on a circuit substrate according to an embodiment of the present technical solution.

FIG. 3 is a schematic diagram of forming a protective adhesive layer on a circuit substrate according to an embodiment of the present technical solution.

FIG. 4 is a schematic diagram of forming a protective film on a circuit substrate according to an embodiment of the present technical solution.

FIG. 5 is a schematic diagram of a first adhesive sheet and a first copper foil laminated on a circuit substrate according to an embodiment of the present technical solution.

FIG. 6 is a schematic diagram of forming a first copper pattern by forming a first copper foil according to an embodiment of the present technical solution.

FIG. 7 is a schematic diagram of a second adhesive sheet and a second copper foil laminated on a circuit substrate according to an embodiment of the present technical solution.

FIG. 8 is a schematic diagram of forming a second copper pattern by forming a second copper foil according to an embodiment of the present technical solution.

FIG. 9 is a schematic diagram of forming a second solder resist layer on a circuit substrate according to an embodiment of the present technical solution.

FIG. 10 is a schematic diagram of the circuit substrate provided by the embodiment of the present technical solution after the protective film is exposed.

FIG. 11 is a schematic diagram of the embodiment of the present invention after the electronic component is mounted on the recess of the circuit substrate.

115‧‧‧ third insulation

116‧‧‧ Third conductive layer

16‧‧‧Second adhesive sheet

170‧‧‧ second window

171‧‧‧Second line graphics

18‧‧‧Second solder mask

19‧‧‧ Third solder mask

Claims (12)

A method for manufacturing a multilayer circuit board, comprising the steps of:
Providing a circuit substrate, the circuit substrate comprising a substrate and a circuit layer formed on a surface of the substrate, the circuit layer having an adjacent assembly area and a nip area;
Forming a first solder resist layer in the assembly area of the circuit layer;
Bonding the protective film to the surface of the first solder resist layer;
Providing a first adhesive sheet and a first copper foil, the first adhesive sheet having a first opening corresponding to the protective film, pressing the first adhesive sheet with the first copper foil on the circuit substrate, and protecting the film Located in the first opening;
Forming a first line pattern of the first copper foil, the first line pattern having a first window corresponding to the protective film;
Providing a second adhesive sheet and a second copper foil, and pressing the second adhesive sheet and the second copper foil to the circuit substrate, wherein the second adhesive sheet is located between the first circuit pattern and the second copper foil;
Forming a second copper pattern into the second line pattern, the second line pattern having a second window, the second window corresponding to a boundary of the protective film;
Forming a second solder mask on the surface of the second line pattern, the second solder mask exposing the second window;
Forming a second opening corresponding to the protective film in the second adhesive sheet from the second window, wherein the second window, the second opening, the first window and the first opening are sequentially connected to form a groove, the protection The film is exposed to the recess; and the protective film is removed to form a multi-layer circuit board having a recess. The method of fabricating a multilayer circuit board according to claim 1, wherein the first solder resist layer is further formed on a surface of the partial nip. The method for fabricating a multilayer circuit board according to claim 1, wherein the bonding the protective film to the surface of the first solder resist layer comprises the steps of:
Laminating a protective adhesive layer on the surface of the nip of the circuit layer and the surface of the first solder resist layer;
The protective adhesive layer is cut by laser to form an annular through hole surrounding the assembly area; and the protective adhesive layer outside the annular through hole is removed, and the protective adhesive layer in the annular through hole constitutes the protective film. The method of fabricating a multilayer circuit board according to claim 1, wherein the second window is an annular window, and a vertical projection of the boundary of the protective film is located in a vertical projection of an outer boundary of the second window. The method of fabricating a multilayer circuit board according to claim 1, wherein the vertical projection of the protective film is located in a vertical projection of the second window. The manufacturing method of the multi-layer circuit board of claim 1, wherein the circuit layer of the assembly area comprises at least one conductive line and at least one conductive terminal, and the first solder resist layer covers the at least one conductive layer And a surface of the substrate exposed from the wiring layer and exposing the at least one conductive terminal, the protective film covering the at least one conductive terminal. The method for fabricating a multi-layer circuit board according to claim 6, wherein after the protective film is removed, the method for fabricating the multi-layer circuit board further comprises the steps of:
Providing an electronic component having at least one conductive contact, the at least one conductive contact corresponding to the at least one conductive terminal; and placing the electronic component in the recess, And electrically connecting the at least one conductive contact to at least one conductive terminal of the assembly area. The method for fabricating a multi-layer circuit board according to claim 1, wherein the forming a second opening corresponding to the protective film in the second adhesive sheet from the second window comprises the step of: using a laser along the boundary of the protective film The second adhesive sheet is cut to form an annular slit in the second adhesive sheet such that the second adhesive sheet in the annular slit naturally falls off to form a second opening. The method of fabricating a multilayer circuit board according to claim 1, wherein the vertical projection of the protective film is located in a vertical projection of the second opening. The manufacturing method of the multi-layer circuit board of claim 1, wherein the circuit substrate comprises an insulating layer and a conductive layer, and the insulating layer is located between the circuit layer and the conductive layer, and is formed on the surface of the second circuit pattern. In the second solder resist layer, a third solder resist layer is also formed on the surface of the conductive layer. The manufacturing method of the multi-layer circuit board of claim 1, wherein the circuit substrate comprises an insulating layer and a conductive layer, and the insulating layer is located between the circuit layer and the conductive layer, and is formed on the surface of the first circuit pattern. In the first solder resist layer, a third solder resist layer is also formed on the surface of the conductive layer. The method for fabricating a multi-layer circuit board according to claim 1, wherein a first blind via hole is formed in the first adhesive sheet to electrically connect the first copper foil before forming the first wiring pattern. a copper foil and a wiring layer; a second blind via hole or a via hole is formed in the second adhesive sheet to electrically connect the second copper foil and the first wiring pattern before the second copper foil is formed into the second wiring pattern.