TW201401942A - Multilayer printed circuit board and method for manufacturing same - Google Patents

Abstract

This disclosure relates to a method for manufacturing a multilayer printed circuit board. The method includes the following steps. First, a circuit substrate including an insulation base and a circuit pattern is provided. The circuit pattern includes an exposing portion and a laminating portion. Then a resisting film is attached on the exposing portion, and the resisting film includes a copper film and a peelable adhesive positioned between the copper film and the peelable adhesive. Next, a laminating substrate is laminated on the circuit pattern to form a multilayer circuit substrate. The laminating substrate includes a number of adhesive layer and a number of circuit layer laminated alternately. Each circuit layer has an opening corresponding to the exposing portion. Then laser beam is used to cut the laminating substrate along a boundary of the exposing portion. After cutting, portion of the laminating substrate which is above the resisting film is removed to expose the resisting film, and then the resisting film is removed to form a cavity in the multilayer circuit substrate. A multilayer printed circuit board manufactured by the above-mentioned method is also provided.

Description

Multilayer circuit board and manufacturing method thereof

The present invention relates to circuit board technology, and more particularly to a multilayer circuit board having a recess and a method of fabricating the same.

In the information, communications and consumer electronics industries, circuit boards are an essential component of all electronic products. With the development of electronic products in the direction of miniaturization and high speed, circuit boards have also evolved from single-sided circuit boards to double-sided circuit boards and multilayer circuit boards. Multilayer boards, especially buried multi-layer boards with embedded electronic components, are widely used, see Takahashi, A. et al., 1992, IEEE Trans. on Components, Packaging, and Manufacturing Technology. The document "High density multilayer printed circuit board for HITAC M~880".

A multilayer circuit board in which electronic components are embedded generally has a recess for embedding electronic components. However, when the groove is opened, the circuit at the bottom of the groove is easily damaged, causing failure of the circuit board and poor assembly, thus affecting the yield and quality of the circuit board.

In view of this, it is necessary to provide a multi-layer circuit board having a groove with a good product quality and a manufacturing method thereof.

Hereinafter, a multilayer circuit board and a method of fabricating the same will be described by way of embodiments.

A method of fabricating a multilayer circuit board, comprising the steps of: providing a circuit substrate, the circuit substrate comprising an insulating substrate and a first conductive pattern attached to a surface of the insulating substrate, the first conductive pattern having an exposed area and the surrounding connection a nip area of the region; a barrier sheet disposed in the exposed region of the first conductive pattern, the barrier sheet comprising a copper foil sheet and a peelable film between the copper foil sheet and the exposed region; and a first conductive pattern on the circuit substrate Forming a first press-bonding substrate on the side to obtain a multi-layer circuit substrate, the first press-bonding substrate comprising a plurality of layers of bonded film and a plurality of layers of conductive wiring layers, one of the plurality of bonded films contacting the nip of the first conductive pattern Each of the two adjacent conductive circuit layers has a layer of bonded film, and each layer of the conductive circuit layer has an opening corresponding to the exposed area; the side of the multilayer circuit substrate adjacent to the first pressed substrate is exposed by the laser Cutting the first pressing substrate by the boundary of the region to remove a portion of the first pressing substrate corresponding to the blocking sheet to expose the blocking sheet; and removing the blocking sheet to thereby A groove formed in the circuit board, the exposed areas are exposed in the groove.

Preferably, after the recess is formed in the multilayer circuit substrate, the method further includes the step of mounting an electronic component in the recess, the electronic component being electrically connected to the assembly area of the first line pattern.

Preferably, the shape and size of the barrier sheet are consistent with the exposed area, and the shape and size of the first pressed substrate are consistent with the circuit substrate.

Preferably, the first pressing substrate comprises a first bonding film, a first conductive circuit layer, a third bonding film and a third conductive circuit layer, and forming a first pressing substrate on a side of the first conductive pattern of the circuit substrate comprises Step: providing a first copper foil and the first bonding film, and pressing the first copper foil and the first bonding film on a circuit substrate provided with a barrier sheet, so that the first bonding film is located at the first Between the copper foil and the first line pattern; forming at least one first blind via hole in the first bonding film by a drilling and plating technique to electrically connect the first copper foil and the first line pattern; through image transfer process and chemistry An etching process selectively etching the first copper foil to form the first copper foil into the first conductive wiring layer, the material of the first copper foil corresponding to the exposed region being completely removed to be in the first conductive wiring layer Forming a first opening corresponding to the exposed region; providing a third copper foil and the third bonding film, and pressing the third copper foil and the third bonding film onto the first conductive wiring layer, and Third bonding film position Between the third copper foil and the first conductive wiring layer; forming at least one third blind via hole in the third bonding film by a drilling and plating technique to electrically connect the third copper foil and the first conductive wiring layer; Selective etching of the third copper foil, such as a transfer process and a chemical etching process, to form a third copper foil into the third conductive wiring layer, the material of the third copper foil corresponding to the exposed region being completely removed so as to be A second opening corresponding to the exposed region is formed in the three conductive wiring layers.

Preferably, the first pressing substrate comprises a first bonding film, a first conductive circuit layer, a third bonding film, a third conductive circuit layer, a fifth bonding film and a fifth conductive circuit layer, first in the circuit substrate Forming the first pressing substrate on one side of the conductive pattern includes the steps of: providing a first copper foil and the first bonding film, and pressing the first copper foil and the first bonding film on a line provided with a blocking sheet Forming a first bonding film between the first copper foil and the first line pattern on the substrate; forming at least one first blind via hole in the first bonding film by a drilling and plating technique to electrically connect the first copper foil and the first a line pattern; selectively etching the first copper foil by an image transfer process and a chemical etching process to form the first copper foil into the first conductive wiring layer, the material of the first copper foil corresponding to the exposed region is completely Removing to form a first opening corresponding to the exposed region in the first conductive wiring layer; providing a third copper foil and the third bonding film, and pressing the third copper foil and the third bonding film Combined with the first conductive And a third bonding film is disposed between the third copper foil and the first conductive circuit layer; at least one third blind via hole is formed in the third bonding film by a drilling and plating technique to electrically connect the third copper a foil and a first conductive wiring layer; selectively etching the third copper foil by an image transfer process and a chemical etching process to form a third copper foil into the third conductive wiring layer, the third copper foil corresponding to the exposed region The material is completely removed to form a second opening corresponding to the exposed region in the third conductive wiring layer; a fifth copper foil and the fifth bonding film are provided, and the fifth copper foil and the first The five-bonded film is pressed onto the third conductive circuit layer, and the fifth adhesive film is located between the fifth copper foil and the third conductive circuit layer; at least one of the fifth adhesive film is formed by the drilling and plating technique a fifth blind via hole electrically connecting the fifth copper foil and the third conductive wiring layer; and selectively etching the fifth copper foil by an image transfer process and a chemical etching process to form the fifth copper foil into the fifth conductive wiring layer, The fifth copper foil The exposed region corresponding material is completely removed to expose the third opening is formed in the region corresponding to the fifth wiring layer.

Preferably, the thickness of the first adhesive film is equal to the thickness of the barrier sheet, and the first adhesive film has a receiving through hole corresponding to the barrier sheet, and the first copper foil and the first adhesive film are pressed together. When the barrier substrate is provided on the circuit substrate, the barrier sheet is located in the receiving through hole and is in contact with the first copper foil.

Preferably, the circuit substrate further includes a second conductive pattern, the first conductive pattern and the second conductive pattern are disposed on opposite sides of the insulating substrate, and the first pressing substrate is formed on a side of the first conductive pattern of the circuit substrate. And forming a second pressing substrate on a side of the second conductive pattern of the circuit substrate, the second pressing substrate also including a plurality of layers of bonded film and a plurality of conductive circuit layers alternately arranged, and the plurality of layers in the second pressing substrate are bonded One layer of the film is in contact with the second conductive pattern, and each adjacent two layers of the conductive layer in the second laminated substrate has a layer of bonded film.

Preferably, after obtaining the multilayer circuit substrate, a first solder resist layer is further formed on the surface of the first press-fit substrate, and a second solder resist layer is formed on the surface of the second press-bond substrate.

Preferably, after the first pressing substrate is cut along the boundary of the exposed area by the laser, an annular slit corresponding to the boundary of the exposed area is formed, and the portion of the first pressed substrate surrounded by the annular slit is peeled off from the surface of the blocking sheet. Blocking sheet.

A multilayer circuit board manufactured by the manufacturing method as described above, the multilayer circuit board comprising a first press-bonded substrate and a circuit substrate laminated together, the circuit substrate comprising an insulating substrate and being bonded to the insulating substrate a first conductive pattern of the surface, the first conductive pattern having an exposed area and a nip area surrounding the exposed area, the first pressed substrate comprising a plurality of layers of bonded film and a plurality of layers of conductive lines, multi-layer bonding One layer of the film is in contact with the nip of the first conductive pattern, and each adjacent two layers of the conductive layer has a layer of bonded film, and the multilayer circuit board has a through-the-first substrate and is exposed a groove corresponding to the exposed area, the exposed area being exposed in the groove.

A multilayer circuit board fabricated by the manufacturing method as described above, the multilayer circuit board comprising a first press-bonded substrate, a circuit substrate, and an electronic component, the first press-bonded substrate and the circuit substrate being pressed together The circuit substrate includes an insulating substrate and a first conductive pattern attached to a surface of the insulating substrate, the first conductive pattern having an exposed area and a nip area surrounding the exposed area, the first pressed substrate including Alternatingly arranged multi-layer bonded film and multi-layer conductive circuit layer, one of the multi-layer bonded films is in contact with the nip of the first conductive pattern, and each adjacent two layers of the conductive circuit layer has a layer of adhesive film, the multi-layer circuit The plate has a groove extending through the first press-bonding substrate, the groove corresponding to the exposed area, the exposed area is exposed in the groove, and the electronic component is received in the concave The slot is mounted in the exposed area of the circuit substrate.

In the technical solution, by providing a barrier sheet in the exposed area of the circuit substrate where the groove is required to be formed, the barrier sheet can block the ablation of the laser when the groove is formed, thereby protecting the exposed area of the circuit substrate where the groove needs to be formed. The lines and pads are not damaged when they are slotted, which makes the board have better quality. In addition, since the barrier sheet is provided, it is not necessary to design a copper ring for blocking laser ablation at the edge of the exposed region, and therefore, the area in which the wiring and the pad can be designed in the exposed region is not limited.

The multi-layer circuit board provided by the technical solution and the manufacturing method thereof will be further described in detail below with reference to the accompanying drawings and embodiments.

The manufacturing method of the multi-layer circuit board provided by the first embodiment of the present technical solution includes the following steps:

In the first step, referring to FIG. 1 to FIG. 3, a circuit substrate 10 is provided. The circuit substrate includes an insulating substrate 100 and a first line pattern 11 and a second line pattern 12 attached to both sides of the insulating substrate 100.

In the present embodiment, the circuit substrate 10 is formed by first providing a double-sided copper-clad substrate 13 as shown in FIG. 1 , the double-sided copper-clad substrate 13 including the insulating substrate 100 and being bonded thereto An upper side copper foil 110 and a lower side copper foil 120 on both sides of the insulating substrate 100; secondly, at least one first through hole is formed in the double-sided copper clad substrate 13 by a drilling technique, the at least one first through hole penetrating the insulating substrate 100, an upper side copper foil 110 and a lower side copper foil 120; then depositing a copper layer in the at least one first through hole by an electroless copper plating process and an electroplating copper process, thereby forming the at least one first through hole a conductive hole 101, as shown in FIG. 2; the upper side copper foil 110 and the lower side copper foil 120 are selectively etched again by an image transfer process and an etching process, that is, the upper side copper foil 110 is selectively etched to form the first line pattern 11, The lower copper foil 120 is selectively etched into a second wiring pattern 12 as shown in FIG. Both the first line pattern 11 and the second line pattern 12 can be designed according to the transmission requirements of the actual circuit board, and generally include a plurality of pads and a plurality of lines.

In the present embodiment, referring to FIGS. 3 and 4, the first line pattern 11 is defined to include an exposed area 111 and a nip area 112 surrounding the exposed area 111. In the present embodiment, the exposed area 111 is rectangular, and has a plurality of pads 113 and a plurality of lines 114 connected to the plurality of pads 113 one by one, and does not have a copper ring located at the edge of the exposed area 111. The nip 112 surrounds the exposed area 111 and has at least a plurality of lines. It will be understood by those skilled in the art that the number and shape of the pads 113 and the lines 114 in the exposed region 111 depend on the circuit design of the circuit board, and the number and shape of the lines in the nip 112 are also determined according to the circuit design of the circuit board. . In FIG. 4 of the present embodiment, only two pads 113 and two lines 114 of the exposed region 111 are schematically depicted, and the lines in the nip 112 are not shown.

In the second step, referring to FIG. 5, a barrier sheet 14 is disposed in the exposed region 111 of the first line pattern 11, and the barrier sheet 14 includes a copper foil sheet 141 and a peelable film 142. The peelable film 142 has a certain adhesiveness on both sides, one side of which is attached to the surface of the exposed area 111 and the surface of the insulating substrate 100 exposed from the exposed area 111, and the other side is bonded with the copper foil piece 141, that is, The peelable film is bonded between the copper foil sheet 141 and the exposed region 111. The shape and size of the barrier sheet 14 correspond exactly to the exposed area 111 so as to completely cover the exposed area 111. That is, the shape and size of the peelable film 142 and the copper foil piece 141 all correspond to the exposed area 111. It should be noted that the detachable film 142 is not very viscous. After being attached to the surface of the exposed region 111 and the surface of the insulating substrate 100, the surface of the exposed region 111 and the insulating substrate 100 can be relatively easily obtained in a subsequent step. Surface peeling.

In the third step, referring to FIG. 6 to FIG. 11 , a first pressing substrate 21 is formed on the first line pattern 11 side of the circuit substrate 10 , and a second pressing substrate 22 is formed on the second line pattern 12 side. The first pressing substrate 21 is electrically connected to the first wiring pattern 11, and the second pressing substrate 22 is electrically conducted to the second wiring pattern 12, thereby obtaining a multilayer circuit substrate.

Each of the first pressed substrate 21 and the second pressed substrate 22 may be a two-layer substrate, a three-layer substrate, or a plurality of substrates. In this embodiment, the first press-substrate substrate 21 and the second press-substrate substrate 22 are two-layer substrates, each of which includes two layers of bonded film and two layers of conductive circuit layers alternately arranged, and the multi-layer circuit substrate is a six-layer circuit substrate. Give an example for explanation. Specifically, forming the first pressed substrate 21 and the second pressed substrate 22 includes the following steps:

First, referring to FIG. 6, a first copper foil 210, a first adhesive film 212, a second copper foil 220, and a second adhesive film 222 are provided. The first adhesive film 212 has a receiving through hole 213 corresponding to the blocking piece 14 , that is, the receiving through hole 213 corresponds to the position, shape and size of the blocking piece 14 for receiving the blocking piece 14 . The thickness of the first adhesive film 212 is greater than or equal to the thickness of the barrier sheet 14. The shapes and sizes of the first copper foil 210, the first adhesive film 212, the second copper foil 220, and the second adhesive film 222 correspond to the shape and size of the circuit substrate 10. The first bonding film 212 is placed on the first line pattern 11 and the blocking sheet 14 is placed in the receiving through hole 213, the first copper foil 210 is placed on the upper side of the first bonding film 212, and the second bonding film 222 is placed in the first layer. The second copper foil 220 is placed on the lower side of the second bonding film 222, that is, the first copper foil 210, the first bonding film 212, the circuit substrate 10, the second bonding film 222, and the second copper. The foils 220 are sequentially stacked and aligned; then the stacked first copper foil 210, the first adhesive film 212, the circuit substrate 10, the second adhesive film 222, and the second copper foil 220 are placed in a press machine, and the first press is performed. A copper foil 210, a first adhesive film 212, a circuit substrate 10, a second adhesive film 222, and a second copper foil 220 form a four-ply laminate 10a, as shown in FIG. In the present embodiment, the thickness of the first adhesive film 212 is the same as the thickness of the barrier sheet 14, and the barrier sheet 14 is located in the receiving through hole 213 when pressed, so that the barrier sheet 14 is in direct contact with the first copper foil 210. That is, the barrier sheet 14 is located between the first copper foil 210 and the exposed region 111. Of course, in other embodiments, if the thickness of the first adhesive film 212 is greater than the thickness of the barrier sheet 14, since the material of the first adhesive film 212 softens and flows during the pressing process to fill the gap of the first line pattern, Whether or not the first bonding film 212 is provided with the receiving through hole 213 may cause the blocking sheet 14 not to directly contact the first copper foil 210, so that the material of the first bonding film 212 is formed between the blocking sheet 14 and the first copper foil 210. Alternatively, if the thickness of the first adhesive film 212 is equal to the thickness of the barrier sheet 14, and the receiving through hole 213 is not formed in the first adhesive film 212 before the pressing, the barrier sheet 14 and the first copper foil 210 are also provided. A material that bonds the film 212.

Secondly, at least one first blind via and at least one second blind via are formed in the four plywood 10a by a drilling technique, the at least one first blind via only penetrating the first copper foil 210 and the first adhesive film 212, The at least one second blind via penetrates only the second copper foil 220 and the second adhesive film 222; and then deposits in the at least one first blind via and the at least one second blind via an electroless copper plating process and an electroplating copper process a copper layer, thereby forming the at least one first blind via into a first blind via 102, and a second blind via as a second blind via 103, as shown in FIG. 8; and then through an image transfer process and a chemical etching process The first copper foil 210 and the second copper foil 220 are selectively etched to form the first copper foil 210 into the first conductive wiring layer 211 and the second copper foil 220 into the second conductive wiring layer 221. When the first copper foil 210 is selectively etched, a portion of the first copper foil 210 corresponding to the exposed region 111 is removed by etching, that is, the material of the portion of the first copper foil 210 corresponding to the barrier sheet 14 is removed, thereby being on the first conductive line. A first opening 201 corresponding to the exposed region 111 is formed in the layer 211. That is, the first opening 201 is aligned with the barrier sheet 14. The first conductive circuit layer 211 is electrically connected to the first line pattern 11 through the at least one first blind via hole 102, and the second conductive line layer 221 is electrically conducted through the at least one second blind via hole 103 and the second line pattern 12. The four-layer circuit substrate 10b shown in FIG.

Further, a third copper foil 214, a third adhesive film 216, a fourth copper foil 224, and a fourth adhesive film 226 are provided, and the third copper foil 214, the third adhesive film 216, the four-layer circuit substrate 10b, and the fourth bonding layer are provided. The film 226 and the fourth copper foil 224 are sequentially stacked; then the stacked third copper foil 214, third bonding film 216, four-layer circuit substrate 10b, fourth bonding film 226 and fourth copper foil 224 are formed at a time. A six-ply laminate 10c is shown in FIG. It can be understood by those skilled in the art that the material of the third adhesive film 216 flows into the gap of the first conductive circuit layer 211 and the first opening 201 during the pressing process, and the material of the fourth adhesive film 226 flows and fills the second conductive circuit layer. 221 gap. After the pressing, at least one third blind via 104 and at least one fourth blind via 105 are formed in the six plywood 10c by a drilling technique and a plating process. The third blind via 104 electrically connects the third copper foil 214 and the first conductive wiring layer 211, and the fourth blind via 105 electrically connects the fourth copper foil 224 and the second conductive wiring layer 221.

Finally, the third copper foil 214 and the fourth copper foil 224 are selectively etched by an image transfer process and a chemical etching process, thereby forming the third copper foil 214 into the third conductive wiring layer 215, and forming the fourth copper foil 224 The fourth conductive wiring layer 225 is formed, so that the six-layer circuit substrate 20 can be obtained as shown in FIG. When the third copper foil 214 is selectively etched, a portion of the third copper foil 214 corresponding to the exposed region 111 is etched away, thereby forming a second opening 202 corresponding to the exposed region 111 in the third conductive wiring layer 215. That is, the second opening 202 is aligned with the first opening 201 and both are aligned with the barrier sheet 14. The third conductive circuit layer 215 is electrically connected to the first conductive circuit layer 211 through the at least one third blind via 104, and the fourth conductive circuit layer 225 is electrically conducted through the at least one fourth blind via 105 and the second conductive trace layer 221.

The first conductive circuit layer 211, the second conductive circuit layer 221, the third conductive circuit layer 215, and the fourth conductive circuit layer 225 each have a plurality of lines and a plurality of pads, and the specific circuit design can be determined according to requirements. .

It can be understood by those skilled in the art that the first press-substrate 21 and the second press-substrate 22 may be included in addition to the first press-substrate 21 and the second press-substrate 22 as shown in this embodiment. A three-layer substrate of three layers of bonded film and three layers of conductive wiring layers alternately arranged, or a substrate of four or more layers including alternately laminated multi-laminated films and multilayer conductive wiring layers, only two adjacent conductive layer layers are required Each has a laminated film, and each layer of the conductive circuit layer has an opening corresponding to the exposed region 111. In addition, when the first press-fit substrate 21 is press-bonded on the side of the first line pattern 11 of the circuit substrate 10, the second press-fit substrate 22 may not be press-fitted on the side of the second line pattern 12, that is, the second Pressing the substrate 22 is not a necessary technical feature. At this time, a four-layer circuit substrate including the wiring substrate 10 and the first press-bonded substrate 21 can be obtained. That is, in the present technical solution, in addition to the multilayer circuit substrate in which the six-layer circuit substrate 20 is as shown in FIG. 11, a multilayer circuit substrate of other layers can be obtained.

It is also understood by those skilled in the art that after forming the first pressed substrate 21 and the second pressed substrate 22, a solder resist layer may be disposed on both sides of the six-layer circuit substrate 20. That is, a first solder resist layer 301 is disposed on the surface of the third conductive wiring layer 215, and a second solder resist layer 302 is disposed on the surface of the fourth conductive wiring layer 225, thereby protecting the third conductive wiring layer 215 and the fourth conductive wiring layer 225. The lines are exposed, and the pads to be exposed in the third conductive wiring layer 215 and the fourth conductive wiring layer 225 are exposed, as shown in FIG. The first solder mask layer 301 may cover the third adhesive film 216 exposed from the second opening 202, and may also expose the third adhesive film 216 exposed from the second opening 202. In the present embodiment, the first solder resist layer 301 has an opening corresponding to the second opening 202 to expose the third adhesive film 216 exposed from the second opening 202, and also expose a portion of the third conductive wiring layer 215. Need to expose the pad.

In the fourth step, referring to FIG. 13 and FIG. 14, the first pressing substrate 21 is cut along the boundary of the exposed region 111 with a laser on the side of the multi-layer circuit substrate, that is, the six-layer circuit substrate 20 adjacent to the first pressing substrate 21. A portion of the first press-substrate substrate 21 corresponding to the barrier sheet 14 is removed and the barrier sheet 14 is exposed.

It should be noted that, since each layer of the first conductive substrate 21 has an opening in a portion corresponding to the barrier sheet 14, the laser only needs to cut the material of the bonding film in the first pressing substrate 21. Therefore, a carbon dioxide laser can be used. In this embodiment, since the first conductive circuit layer 211 has the first opening 201, the third conductive circuit layer 215 has the second opening 202, and the first adhesive film 212 has the receiving through hole 213, in this step, It is only necessary to cut the material of the third adhesive film 216 in the first press-fit substrate 21. Since the surface of the exposed region 111 is provided with the barrier sheet 14, the barrier sheet 14 includes the copper foil sheet 141, which can block the ablation of the laser, and therefore, the laser only cuts the first pressure when the first pressed substrate 21 is cut. The material of the substrate 21 is combined without damaging the circuit substrate 10, that is, the pads 113 and the lines 114 of the exposed regions 111 are not damaged. Of course, those skilled in the art can understand that when ultraviolet laser is selected, since the ultraviolet laser cutting copper foil 141 requires a certain amount of energy and time, the barrier sheet 14 can be realized by controlling the energy and time of the ultraviolet laser. Block the role of laser ablation.

As shown in FIG. 13, after the first pressed substrate 21 is cut, that is, an annular slit 203 corresponding to the boundary of the exposed region 111 is formed in the first pressed substrate 21, and at this time, only the portion surrounded by the annular slit 203 needs to be peeled off. The first pressing of the substrate 21 exposes the barrier sheet 14, as shown in FIG. In the present embodiment, only the material of the portion of the third adhesive film 216 surrounded by the annular slit 203 is peeled off to expose the barrier sheet 14.

It can be understood by those skilled in the art that in other embodiments, if the barrier sheet 14 and the first copper foil 210, that is, the first conductive wiring layer 211, have the material of the first adhesive film 212, the first pressure can also be cut by laser. The material of the first adhesive film 212 in the substrate 21 and the material of the third adhesive film 216 are formed to form an annular slit 203, and the material of the portion of the first adhesive film 212 and the third adhesive film 216 surrounded by the annular slit 203 are peeled off. The barrier sheet 14 is exposed to the material.

In a fifth step, referring to FIG. 15, the exposed barrier sheet 14 is removed to form a recess 204, and the exposed region 111 is exposed in the recess 204, so that a multilayer circuit board having the recess 204 can be obtained. In the embodiment, it is a six-layer circuit board 30. Since the peelable film 142 of the barrier sheet 14 is easily separated from the exposed region 111 and the insulating substrate 100, it can be easily peeled off from the exposed region 111 and the surface of the insulating substrate 100.

The groove 204 has a shape and a position corresponding to the exposed area 111. In the embodiment, the shape of the groove 204 corresponds to the shape and position of the exposed area 111 shown in FIG. 4, that is, the groove 204 is located. A rectangular blind groove in the middle of the six-layer circuit board 30.

It will be understood by those skilled in the art that the first solder resist layer 301 and the second solder resist layer 302 may also be disposed after the recess 204 is formed.

Referring to FIG. 16, the recess 204 is used to mount the electronic component 31. After the recess 204 is formed, the electronic component 31 can also be assembled in the recess 204. The electronic component 31 and the first line pattern 11 The exposed area 111 is electrically connected. Specifically, the electronic component 31 is first provided, which may be an active component or a passive component such as a resistor, a capacitor, a wafer, or the like. The surface of the electronic component 31 has a plurality of connection terminals 311, and the plurality of connection terminals 311 are in one-to-one correspondence with the plurality of pads 113 in the exposed region 111. Next, solder ball bumps 312 are disposed on the surface of each of the connection terminals 311, and the electronic components 31 are placed in the recesses 204 such that each of the pads 113 is bonded to the solder bump 312 on the surface of the connection terminal 311 corresponding thereto. Contact. Again, each solder ball bump 312 is melted and cured by reflow soldering to electrically connect a connection terminal 311 and a pad 113. In this way, the electrical connection between the electronic component 31 and the first line pattern 11 can be realized, and the six-layer circuit board 30a on which the electronic component 31 is mounted can be obtained.

Preferably, a package adhesive material may be filled between the electronic component 31 and the recess 204 to better fix the electronic component 31.

The six-layer circuit board 30 having the recess 204 prepared according to the above steps of the first embodiment is as shown in Fig. 15, and the six-layer circuit board 30a on which the electronic component 31 is mounted is as shown in Fig. 16. The structure of the six-layer circuit boards 30, 30a is substantially the same except that the six-layer circuit board 30a further includes electronic components 31 mounted in the recesses 204. The six-layer circuit board 30a includes a first solder resist layer 301, a first press-bonded substrate 21, a circuit substrate 10, a second press-substrate substrate 22, a second solder resist layer 302, and an electronic component 31. The first press-substrate substrate 21, the circuit substrate 10, and the second press-substrate substrate 22 are sequentially pressed together. The first pressing substrate 21 includes a third conductive wiring layer 215, a third bonding film 216, a first conductive wiring layer 211, and a first bonding film 212 which are sequentially pressed. The first solder resist layer 301 is disposed on the surface of the first press-bonding substrate 21 and covers at least a portion of the third conductive wiring layer 215 and covers all of the third adhesive film 216 exposed from the third conductive wiring layer 215. The second pressing substrate 22 includes a fourth conductive wiring layer 225, a fourth bonding film 226, a second conductive wiring layer 221, and a second bonding film 222. The second solder resist layer 302 is disposed on the surface of the second press-bonding substrate 22 and covers at least a portion of the surface of the fourth conductive wiring layer 225 and covers all of the fourth adhesive film 226 exposed from the fourth conductive wiring layer 225. The circuit substrate 10 includes an insulating substrate 100 and a first wiring pattern 11 and a second wiring pattern 12 attached to opposite surfaces of the insulating substrate 100. The third conductive circuit layer 215, the first conductive circuit layer 211, the first circuit pattern 11, the second circuit pattern 12, the second conductive circuit layer 221, and the fourth conductive circuit layer 225 pass through the first conductive hole 101 and the first blind via hole. 102. The second blind via hole 103, the third blind via hole 104, and the fourth blind via hole 105 are electrically conducted. The six-layer circuit board 30a has a recess 204 penetrating through the first press-fit substrate 21 and the first solder resist layer 301, and the recess 204 is a blind groove exposed to the outside. The exposed area 111 of the first line pattern 11 is exposed in the groove 204. The electronic component 31 is disposed in the recess 204, is mounted on the plurality of pads 113 of the exposed region 111, and is exposed. The electronic component 31 has a plurality of connection terminals 311 that are electrically connected to the first line pattern 11 by a plurality of solder ball bumps 312.

Those skilled in the art will appreciate that the steps in the method of fabricating a multilayer circuit board of the first embodiment are not all necessary technical features. For example, in the third step, the first press-substrate substrate 21 may be formed only on the upper side of the circuit substrate 10 without being pressed at the lower side of the circuit substrate 10 to form the second press-substrate substrate 22, and thus, after the subsequent steps. A four-layer circuit board having one recess 204 can be fabricated. Also, the elements in the six-layer circuit board 30, 30a produced in the first embodiment are not all necessary technical features, for example, the first solder resist layer 301 and the second solder resist layer 302. In addition, the first blind via hole 102, the second blind via hole 103, the third blind via hole 104, and the fourth blind via hole 105 may not be formed, and a plurality of via holes penetrating through the six-layer circuit boards 30 and 30a may be formed to realize interlayer wiring. Electrical conductivity.

Of course, those skilled in the art can understand that in addition to fabricating a four-layer circuit board or a six-layer circuit board having one groove, the present technical solution can fabricate a multilayer circuit board of any number of layers having any number of grooves. For example, a single-sided copper-clad substrate, that is, a wiring substrate having only the first wiring pattern 11 and not the second wiring pattern 12, may be provided in the first step, and only the upper side of the wiring substrate 10 is pressed in the third step. The first press-fit substrate 21 is formed, and thus, after the subsequent steps, a three-layer circuit board having one recess 204 can be formed. For another example, in the second step, two or more barrier sheets 14 may be disposed in different regions on the surface of the first line pattern 11 and/or the second line pattern 12, and two in the fourth step and the fifth step. Three or more grooves, so that a multilayer circuit board having two or more grooves can be formed. For example, in the third step, the adhesive film and the copper foil are continuously added on both sides of the six-layer circuit substrate 20 as shown in FIG. 10, thereby forming a multilayer circuit board of six or more layers. Hereinafter, an eight-layer circuit board having one groove will be described as an example.

A method for fabricating a multilayer circuit board according to a second embodiment of the present technical solution includes the steps of:

In the first step, referring to Fig. 5, the wiring substrate 10 provided with the barrier sheet 14 obtained in the second step of the first embodiment is provided.

In the second step, referring to FIG. 6 to FIG. 11 and FIG. 17 to FIG. 18, a first pressing substrate 41 is formed on the first line pattern 11 side of the insulating substrate 100, and a second pressure is formed on the second line pattern 12 side. The substrate 42 is combined such that the first laminated substrate 41 is electrically conducted to the first wiring pattern 11, and the second laminated substrate 42 is electrically conducted to the second wiring pattern 12 to obtain a multilayer circuit substrate.

In this embodiment, the first press-substrate substrate 41 and the second press-fit substrate 42 are three-layer substrates, each of which includes three layers of bonded film and three layers of conductive circuit layers arranged alternately, so that an eight-layer multilayer circuit can be obtained. Substrate. The first pressing substrate 41 includes a first bonding film 212, a first conductive wiring layer 211, a third bonding film 216, a third conductive wiring layer 215, a fifth bonding film 219, and a fifth conductive wiring layer 218. The second press-bonding substrate 42 includes a second adhesive film 222, a second conductive circuit layer 221, a fourth adhesive film 226, a fourth conductive circuit layer 225, a sixth adhesive film 229, and a sixth conductive circuit layer 228. Specifically, the forming of the first pressing substrate 41 and the second pressing substrate 42 can be achieved by the following process: First, referring to FIG. 6 to FIG. 11, by the specific steps in the third step of the first embodiment, The six-layer circuit substrate 20 shown in FIG. Next, referring to FIG. 17, a fifth copper foil 217, a fifth bonding film 219, a sixth copper foil 227, and a sixth bonding film 229 are provided, and a fifth copper foil 217, a fifth bonding film 219, and a six-layer circuit substrate are sequentially stacked. 20, a sixth bonding film 229 and a sixth copper foil 227, and pressing the stacked fifth copper foil 217, fifth bonding film 219, six-layer circuit substrate 20, sixth bonding film 229 and sixth copper foil 227, Eight laminated plywood 40a. Again, referring to FIG. 17, at least one fifth blind via 106, at least one sixth blind via 107, and at least one second conductive via 108 are formed by a drilling process and a plating process. The fifth blind via 106 electrically conducts the fifth copper foil 217 and the third conductive wiring layer 215, the sixth blind via 107 electrically conducts the sixth copper foil 227 and the fourth conductive wiring layer 225, and the second conductive via 108 penetrates the eight laminated plywood 40a. Finally, the fifth copper foil 217 and the sixth copper foil 227 are selectively etched by an image transfer process and a chemical etching process, thereby forming the fifth copper foil 217 into the fifth conductive wiring layer 218, and the sixth copper foil 227 The sixth conductive wiring layer 228 is formed, and thus the eight-layer circuit substrate 40 can be obtained as shown in FIG. When the fifth copper foil 217 is selectively etched, a portion of the fifth copper foil 217 corresponding to the exposed region 111 is etched away, thereby forming a third opening 401 corresponding to the exposed region 111 in the fifth conductive wiring layer 218. That is, the third opening 401, the second opening 202, and the first opening 201 are aligned with each other, and are both aligned with the barrier sheet 14. The fifth conductive circuit layer 218 is electrically connected to the third conductive circuit layer 215 through the at least one fifth blind via 106, and the sixth conductive trace layer 228 is electrically conducted through the at least one sixth blind via 107 and the fourth conductive trace layer 225, and second The conductive hole 108 can electrically conduct the fifth conductive circuit layer 218, the third conductive circuit layer 215, the first conductive circuit layer 211, the first line pattern 11, the second line pattern 12, the second conductive line layer 221, and the fourth conductive line. At least two of the layer 225 and the sixth conductive wiring layer 228. Thus, the eight-layer circuit substrate 40 can be obtained as a multilayer circuit substrate.

It will be understood by those skilled in the art that a solder resist layer may be separately formed on the outermost sides of the eight-layer circuit substrate 40 to protect the outer lines of the eight-layer circuit substrate 40. For example, a first solder resist layer 501 may be disposed on the surface of the fifth conductive wiring layer 218, and a second solder resist layer 502 may be disposed on the surface of the sixth conductive wiring layer 228.

In the third step, the first press-substrate substrate 41 is cut along the boundary of the exposed region 111 at a side of the multilayer circuit substrate, that is, the eight-layer circuit substrate 40 adjacent to the first press-substrate substrate 41, to remove the portion corresponding to the barrier sheet 14. The first pressing substrate 41 is pressed and the barrier sheet 14 is exposed.

It should be noted that, since each layer of the first conductive substrate 41 has an opening in a portion corresponding to the barrier sheet 14, the laser only needs to cut the material of the bonding film in the first pressing substrate 41. . In this embodiment, the laser only needs to cut the materials of the third adhesive film 216 and the fifth adhesive film 219 in the first pressed substrate 41. Since the surface of the exposed area 111 is provided with the barrier sheet 14, the barrier sheet 14 can block the ablation of the laser. Therefore, when the first pressed substrate 41 is cut, the laser can only cut the material of the first pressed substrate 41 without being damaged. The circuit substrate 10 is provided.

In a fourth step, referring to FIG. 19, the exposed barrier sheet 14 is removed to form a recess 504, and the exposed region 111 is exposed in the recess 504, so that an eight-layer circuit board 50 having the recess 504 can be obtained. . Since the peelable film 142 of the barrier sheet 14 is easily separated from the exposed region 111 and the insulating substrate 100, it can be easily peeled off from the exposed region 111 and the surface of the insulating substrate 100.

Referring to FIG. 20, after the recess 504 is formed, the electronic component 51 can also be assembled in the recess 504. The electronic component 51 is electrically connected to the exposed area 111 of the first line pattern 11. The surface of the electronic component 51 has a plurality of connection terminals 511 that are in one-to-one correspondence with the plurality of pads 113 in the exposed area 111. Solder ball bumps 512 may be provided on the surface of each of the connection terminals 511, and each solder ball bump 512 is melted and solidified by reflow soldering to electrically connect one connection terminal 511 and one pad 113. In this way, the electrical connection between the electronic component 51 and the first line pattern 11 can be realized, and the eight-layer circuit board 50a on which the electronic component 51 is mounted can be obtained.

By the above steps of the embodiment, a multilayer circuit board of eight-layer circuit boards 50, 50a can be obtained. It will be understood by those skilled in the art that the present technical solution can also produce a multi-layer circuit board having other layers of grooves and other layers of multi-layer circuit boards in which the electronic components are assembled in the grooves.

In the technical solution, since the barrier sheet is disposed in the exposed region of the circuit substrate where the groove is required to be formed, the barrier sheet can block the ablation of the laser in the slotting step, thereby protecting the exposed region of the circuit substrate where the groove needs to be formed. Lines and pads. In addition, since the barrier sheet is provided, it is not necessary to design a copper ring for blocking laser ablation at the edge of the exposed region, and therefore, the area in which the wiring and the pad can be designed in the exposed region is not limited.

In summary, the present invention has indeed met the requirements of the invention patent, and has filed a patent application according to law. However, the above description is only a preferred embodiment of the present invention, and it is not possible to limit the scope of the patent application of the present invention. Equivalent modifications or variations made by persons skilled in the art in light of the spirit of the invention are intended to be included within the scope of the following claims.

10. . . Circuit substrate

100. . . Insulating substrate

11. . . First line graphic

12. . . Second line graphic

13. . . Double-sided copper clad substrate

110. . . Upper copper foil

120. . . Lower side copper foil

101. . . First conductive hole

111. . . Exposed area

112. . . Press area

113. . . Pad

114. . . line

14. . . Barrier sheet

141. . . Copper foil

142. . . Peelable film

21, 41. . . First pressed substrate

22, 42. . . Second pressed substrate

210. . . First copper foil

212. . . First bonding film

220. . . Second copper foil

222. . . Second bonding film

213. . . Receiving through hole

10a. . . Four laminate plywood

102. . . First blind via

103. . . Second blind via

211. . . First conductive circuit layer

201. . . First opening

221. . . Second conductive circuit layer

10b. . . Four-layer circuit substrate

214. . . Third copper foil

216. . . Third bonding film

224. . . Fourth copper foil

226. . . Fourth bonding film

10c. . . Six laminated plywood

215. . . Third conductive circuit layer

225. . . Fourth conductive circuit layer

202. . . Second opening

104. . . Third blind via

105. . . Fourth blind via

20. . . Six-layer circuit board

301, 501. . . First solder mask

302, 502. . . Second solder mask

203. . . Circular incision

204, 504. . . Groove

30, 30a. . . Six-layer board

31, 51. . . Electronic Component

311, 511. . . Connection terminal

312, 512. . . Solder ball bump

219. . . Fifth bonding film

218. . . Fifth conductive circuit layer

229. . . Sixth bonding film

228. . . Sixth conductive layer

217. . . Fifth copper foil

227. . . Sixth copper foil

401. . . Third opening

106. . . Fifth blind guide hole

107. . . Sixth blind via

108. . . Second conductive hole

40a. . . Eight laminated plywood

40. . . Eight-layer circuit substrate

50, 50a. . . Eight-layer board

FIG. 1 is a schematic diagram of a double-sided copper-clad substrate provided by a first embodiment of the present technical solution.

FIG. 2 is a schematic diagram of forming a conductive hole in a double-sided copper-clad substrate according to a first embodiment of the present technical solution.

3 is a schematic view showing the double-sided copper-clad substrate of FIG. 2 as a wiring substrate.

4 is a top plan view of FIG. 3.

FIG. 5 is a schematic view showing a barrier sheet provided on the circuit substrate of FIG. 3. FIG.

FIG. 6 is a schematic diagram of a first copper foil, a first adhesive film, a second adhesive film, and a second copper foil according to the first embodiment of the present technical solution.

FIG. 7 is a schematic view showing the first copper foil, the first adhesive film, the second adhesive film, and the second copper foil provided in FIG. 6 on the circuit substrate of FIG. 5, thereby obtaining a four-layer laminate.

Figure 8 is a schematic view showing the formation of blind via holes in the four laminate ply of Figure 7.

Fig. 9 is a schematic view showing the formation of a four-layer circuit board by the four-layer laminate of Fig. 8.

FIG. 10 is a schematic view showing the third copper foil, the third adhesive film, the fourth adhesive film, and the fourth copper foil laminated on both sides of the four-layer circuit substrate of FIG. 9 to obtain a six-layer laminate.

Fig. 11 is a schematic view showing the formation of a six-layer circuit board of the six-layer laminate of Fig. 10.

FIG. 12 is a schematic view showing the solder resist layers formed on both sides of the six-layer circuit substrate of FIG. 11.

FIG. 13 is a schematic view showing the formation of an annular slit in the six-layer circuit substrate of FIG.

FIG. 14 is a schematic view showing the barrier sheet exposed in the six-layer circuit substrate of FIG.

Fig. 15 is a schematic view showing the formation of a groove in the six-layer circuit substrate of Fig. 14.

Figure 16 is a schematic view of the electronic component assembled in the recess of Figure 15.

Fig. 17 is a schematic view showing the formation of an eight-ply laminate after the film and the copper foil are respectively pressed on the upper and lower sides of the six-layer circuit substrate of Fig. 11.

Fig. 18 is a schematic view showing the eight-layer laminated board of Fig. 17 formed into an eight-layer circuit board.

Figure 19 is a schematic view showing the formation of a groove in the eight-layer circuit substrate of Figure 18.

Figure 20 is a schematic view of the electronic component assembled in the recess of Figure 19.

202. . . Second opening

215. . . Third conductive circuit layer

301. . . First solder mask

216. . . Third bonding film

226. . . Fourth bonding film

225. . . Fourth conductive circuit layer

302. . . Second solder mask

Claims (11)

A method for manufacturing a multilayer circuit board, comprising the steps of:
Providing a circuit substrate, the circuit substrate comprising an insulating substrate and a first conductive pattern attached to a surface of the insulating substrate, the first conductive pattern having an exposed area and a nip area surrounding the exposed area;
Providing a barrier sheet in an exposed region of the first conductive pattern, the barrier sheet comprising a copper foil sheet and a peelable film between the copper foil sheet and the exposed region;
Forming a first press-bonding substrate on a side of the first conductive pattern of the circuit substrate to obtain a multi-layer circuit substrate, the first press-bonding substrate comprising a plurality of layers of bonded film and a plurality of layers of conductive lines, one of a plurality of layers of bonded film a embossed area of a conductive pattern is in contact with each other, and each adjacent two layers of conductive circuit layers has a layer of bonded film, and each layer of the conductive circuit layer has an opening corresponding to the exposed area;
Cutting a first pressing substrate along a boundary of the exposed area with a laser on a side of the multilayer circuit substrate adjacent to the first pressing substrate to remove a portion of the first pressing substrate corresponding to the blocking piece to expose the blocking piece; and removing the blocking The sheet thus forms a groove in the multilayer circuit substrate, and the exposed region is exposed in the groove. The method for fabricating a multi-layer circuit board according to claim 1, wherein after forming the recess in the multi-layer circuit substrate, the method further includes the step of mounting an electronic component in the recess, the electronic component and the first The assembly area of the line pattern is electrically connected. The method for manufacturing a multilayer circuit board according to the first aspect of the invention, wherein the shape and size of the barrier sheet are consistent with the exposed area, and the shape and size of the first pressure-bonding substrate are consistent with the circuit substrate. The manufacturing method of the multi-layer circuit board of claim 3, wherein the first press-bonding substrate comprises a first adhesive film, a first conductive circuit layer, a third adhesive film, and a third conductive circuit layer. Forming the first pressing substrate on one side of the first conductive pattern of the circuit substrate includes the steps of:
Providing a first copper foil and the first adhesive film, and pressing the first copper foil and the first adhesive film on a circuit substrate provided with a barrier sheet such that the first adhesive film is located on the first copper foil Between the first line graphic and the first line;
Forming at least one first blind via hole in the first bonding film by a drilling and plating technique to electrically connect the first copper foil and the first wiring pattern;
Selectively etching the first copper foil by an image transfer process and a chemical etching process to form the first copper foil into the first conductive wiring layer, and the material of the first copper foil corresponding to the exposed region is completely removed Forming a first opening corresponding to the exposed area in the first conductive circuit layer;
Providing a third copper foil and the third bonding film, and pressing the third copper foil and the third bonding film onto the first conductive wiring layer, and the third bonding film is located on the third copper foil and Between the first conductive circuit layers;
Forming at least one third blind via hole in the third bonding film by a drilling and plating technique to electrically connect the third copper foil and the first conductive wiring layer; and selectively etching the third copper by an image transfer process and a chemical etching process The foil thus forms a third copper foil as the third conductive wiring layer, the material of the third copper foil corresponding to the exposed region is completely removed to form a second corresponding to the exposed region in the third conductive wiring layer Opening. The manufacturing method of the multi-layer circuit board of claim 3, wherein the first press-bonding substrate comprises a first adhesive film, a first conductive circuit layer, a third adhesive film, a third conductive circuit layer, The fifth bonding film and the fifth conductive circuit layer form a first pressing substrate on a side of the first conductive pattern of the circuit substrate. The steps include:
Providing a first copper foil and the first adhesive film, and pressing the first copper foil and the first adhesive film on a circuit substrate provided with a barrier sheet such that the first adhesive film is located on the first copper foil Between the first line graphic and the first line;
Forming at least one first blind via hole in the first bonding film by a drilling and plating technique to electrically connect the first copper foil and the first wiring pattern;
Selectively etching the first copper foil by an image transfer process and a chemical etching process to form the first copper foil into the first conductive wiring layer, and the material of the first copper foil corresponding to the exposed region is completely removed Forming a first opening corresponding to the exposed area in the first conductive circuit layer;
Providing a third copper foil and the third bonding film, and pressing the third copper foil and the third bonding film onto the first conductive wiring layer, and the third bonding film is located on the third copper foil and Between the first conductive circuit layers;
Forming at least one third blind via hole in the third bonding film by a drilling and plating technique to electrically connect the third copper foil and the first conductive wiring layer;
Selectively etching the third copper foil by an image transfer process and a chemical etching process to form a third copper foil into the third conductive circuit layer, the material of the third copper foil corresponding to the exposed region being completely removed Forming a second opening corresponding to the exposed area in the third conductive circuit layer;
Providing a fifth copper foil and the fifth bonding film, and pressing the fifth copper foil and the fifth bonding film on the third conductive circuit layer, and the fifth bonding film is located on the fifth copper foil and Between the third conductive circuit layers;
Forming at least one fifth blind via hole in the fifth adhesive film by a drilling and plating technique to electrically connect the fifth copper foil and the third conductive wiring layer; and selectively etching the fifth copper by an image transfer process and a chemical etching process The foil thus forms a fifth copper foil as the fifth conductive wiring layer, the material of the fifth copper foil corresponding to the exposed region is completely removed to form a third corresponding to the exposed region in the fifth conductive wiring layer Opening. The manufacturing method of the multi-layer circuit board of claim 4, wherein the thickness of the first adhesive film is equal to the thickness of the barrier film, and the first adhesive film has a receiving pass corresponding to the barrier film. And a hole, when the first copper foil and the first adhesive film are pressed on the circuit substrate provided with the barrier sheet, the barrier sheet is located in the receiving through hole and is in contact with the first copper foil. The manufacturing method of the multi-layer circuit board of claim 4, wherein the circuit substrate further comprises a second conductive pattern, and the first conductive pattern and the second conductive pattern are disposed on opposite sides of the insulating substrate. On the side, when the first laminated substrate is formed on the first conductive pattern side of the circuit substrate, the second pressing substrate is further formed on the second conductive pattern side of the circuit substrate, and the second pressed substrate also includes alternately arranged a multilayer adhesive film and a plurality of conductive circuit layers, one of the plurality of bonded films in the second laminated substrate is in contact with the second conductive pattern, and each of the adjacent two conductive layers in the second laminated substrate has a layer Bonded film. The method for fabricating a multilayer circuit board according to claim 7, wherein after obtaining the multilayer circuit substrate, a first solder resist layer is formed on the surface of the first press-bonded substrate, and a surface is formed on the surface of the second press-bonded substrate. Two solder mask. The method for fabricating a multilayer circuit board according to claim 1, wherein the first pressing substrate is cut along the boundary of the exposed area to form an annular slit corresponding to the boundary of the exposed area, from the surface of the blocking sheet. Stripping the portion of the first press-fitted substrate surrounded by the annular slit exposes the barrier sheet. A multilayer circuit board manufactured by the manufacturing method of claim 1, wherein the multilayer circuit board includes a first press-fit substrate and a circuit substrate that are press-fitted together, the circuit substrate including an insulating substrate And a first conductive pattern attached to the surface of the insulating substrate, the first conductive pattern having an exposed area and a nip area surrounding the exposed area, the first pressed substrate comprising a plurality of layers of bonded film and a plurality of layers a conductive circuit layer, one of the multi-layer bonded films is in contact with the nip of the first conductive pattern, and each of the two adjacent conductive circuit layers has a layer of bonded film, the multilayer circuit board having a first press through a groove of the substrate that is exposed to the outside, the groove corresponding to the exposed area, the exposed area being exposed in the groove. A multilayer circuit board manufactured by the manufacturing method of claim 2, wherein the multilayer circuit board comprises a first press-bonded substrate, a circuit substrate, and an electronic component, the first press-bonded substrate and The circuit substrate is pressed together, the circuit substrate includes an insulating substrate and a first conductive pattern attached to the surface of the insulating substrate, the first conductive pattern having an exposed area and a nip area surrounding the exposed area, The first pressed substrate comprises a plurality of layers of bonded film and a plurality of conductive circuit layers arranged alternately, one of the plurality of bonded films is in contact with the nip of the first conductive pattern, and each layer of the adjacent two conductive layers has a layer of bonding. In the film, the multi-layer circuit board has a groove extending through the first press-bonding substrate, the groove corresponding to the exposed area, the exposed area is exposed in the groove, the electronic component It is housed in the groove and mounted on the exposed area of the circuit substrate.