TWI536888B - Method for manufacturing rigid-flexible printed circuit board - Google Patents

Description

Soft and hard combined circuit board manufacturing method

The present invention relates to the field of circuit board manufacturing, and in particular, to a method for fabricating a soft and hard combined circuit board.

The hard and soft combination circuit board is a circuit board structure including a flexible board and a hard board which are connected to each other, and can have both the flexibility of the flexible circuit board and the hardness of the rigid circuit board. At present, the flexing and bending area of the hard and soft combined circuit board is generally produced by using a deep cutting or pre-opening window. However, the deep cutting is not easy to control, the cutting depth tolerance is too large, resulting in low product yield, and the deep cutting requires the purchase of a dedicated machine to increase the production cost. The pre-opening window is incapable of performing text printing, surface treatment or fitting of the components due to the difference between the flexing zone and the rigid circuit board. In addition, when the area of the flexing zone is too large, if the window is pre-opened, the structure of the flexing zone is relatively fragile, and the card is likely to cause the product to be scrapped during production.

In view of the above, it is necessary to provide a method of fabricating a hard and soft combination circuit board that overcomes the above problems.

A method for manufacturing a soft and hard combined circuit board, comprising the steps of:

Providing a flexible circuit board, the flexible circuit board includes a handover area, a first bonding area and a second bonding area connected to opposite sides of the handover area;

Providing a first pressure-bonding substrate, the first pressure-bonding substrate includes a first dielectric layer and a first copper layer, and the first pressure-bonding substrate has a first window opening area corresponding to the intersection area;

Forming two rows of first blind holes from the first dielectric layer to the first copper foil layer in the first window opening region, wherein one row of the first blind holes corresponds to the boundary between the intersection area and the first bonding area, and the other row of a blind hole corresponds to a boundary between the intersection area and the second bonding area, and each of the first blind holes exposes a portion of the first copper foil layer;

Providing a first press film, the first press film having a first opening corresponding to the intersection area;

Stacking and pressing the first press-bonding substrate, the first press-fit film, and the flexible circuit board to obtain a multi-layer substrate,

The first dielectric layer is closer to the flexible circuit board than the first copper foil layer;

Selectively removing a portion of the first copper foil layer to form a third conductive wiring layer while simultaneously opening the first window

The first copper foil layer of the zone is removed;

The first dielectric layer of the first window opening region is removed to expose the interface of the flexible circuit board.

Compared with the prior art, the soft-hardened circuit board provided by the technical solution has a blind hole arranged at intervals from the dielectric layer to the copper foil layer at the edge of the region corresponding to the bonding substrate and the intersection area. There is no need for deep cutting, which avoids problems such as reduced product yield and increased cost due to deep cutting. At the same time, the manufacturing method of the soft and hard bonding board provided by the technical solution is not pre-opened, and the subsequent text printing, surface treatment or accessory fitting can be smoothly carried out.

1 is a schematic cross-sectional view of a flexible circuit board provided by an embodiment of the present technical solution.

2 is a top plan view of a substrate provided by an embodiment of the present technical solution.

3 is a schematic cross-sectional view of the substrate of FIG. 2.

4 is a cross-sectional view showing the formation of the first conductive wiring layer by the third copper foil layer of FIG. 2 and the formation of the second conductive wiring layer by the fourth copper foil layer.

FIG. 5 is a plan view of a first press-fit substrate and a second press-fit substrate provided by the present technical solution.

6 is a cross-sectional view showing the first pressure-bonding substrate and the second pressure-sensitive substrate of FIG. 5.

7 is a first blind hole in which the first pressing substrate of FIG. 5 is arranged along the edge of the first window opening area, and the first pressing hole and the second pressing substrate are arranged along the edge of the second window opening area by laser ablation. Top view of the second blind hole.

8 is a cross-sectional view showing the first laminated substrate in which the first blind vias are formed and the second laminated substrate in which the second blind vias are formed.

FIG. 9 is a top plan view of a first press film and a second press film provided by an embodiment of the present technical solution.

Figure 10 is a cross-sectional view showing the first press film and the second press film of Figure 9.

11 is a schematic cross-sectional view showing a first laminated substrate, a first pressed film, a flexible circuit board, a second pressed film, and a second pressed substrate sequentially pressed together to obtain a multilayer substrate.

Fig. 12 is a schematic cross-sectional view showing a through hole formed in the multilayer substrate of Fig. 11.

FIG. 13 is a schematic cross-sectional view showing the metal plating of the inner wall of the through hole of FIG.

14 is a cross-sectional view showing the first copper foil layer of FIG. 13 forming a third conductive wiring layer, and the second copper foil layer being formed to form a fourth conductive wiring layer.

15 is a cross-sectional view showing a first solder resist layer formed on one side of the third conductive wiring layer of FIG. 14 and a second solder resist layer formed on one side of the fourth conductive wiring layer.

Figure 16 is a plan view of the multilayer substrate of Figure 15.

17 is a plan view of the multilayer substrate of FIG. 16 after removing the material corresponding to the waste region.

Figure 18 is a cross-sectional view of the multilayer substrate of Figure 17.

19 is a cross-sectional view showing the first laminated substrate and the second pressed substrate in which the multilayer substrate of FIG. 18 is removed from the transfer region to obtain a soft-hardened circuit board.

The method for manufacturing a soft-hard combination circuit board provided by the technical solution includes the following steps:

In the first step, referring to Figure 1, a flexible circuit board 10 is provided.

The flexible circuit board 10 is a circuit board on which conductive lines are formed. The flexible circuit board 10 can be a single-sided circuit board or a double-sided circuit board. In this embodiment, the flexible circuit board 10 is a double-sided circuit board. The flexible circuit board 10 includes a first cover layer 101, a first conductive wiring layer 102, a first insulating layer 103, a second conductive wiring layer 104, and a second cover layer 105. The first insulating layer 103 includes a first surface 1031 and a second surface 1032 opposite to each other. The first conductive wiring layer 102 is formed on the first surface 1031. The second conductive wiring layer 104 is formed on the second surface 1032. The first conductive wiring layer 102 has a third surface 1021 away from the first surface 1031. The first cover layer 101 is formed on the third surface 1021. The first cover layer 101 covers the first conductive wiring layer 102 and the first insulating layer 103 exposed from the first conductive wiring layer 102. The second electrically conductive circuit layer 104 has a fourth surface 1041 that is remote from the second surface 1032. The second cover layer 105 is formed on the fourth surface 1041. The second cover layer 105 covers the second conductive wiring layer 104 and the first insulating layer 103 exposed from the second conductive wiring layer 104. The material of the first cover layer 101 and the second cover layer 105 may be polyimide.

Referring to FIG. 1 to FIG. 4, the flexible circuit board 10 can be obtained as follows:

First, referring to Figures 2 and 3, a substrate 11 is provided. The substrate 11 includes a third copper foil layer 111, a first insulating layer 103, and a fourth copper foil layer 112. The first insulating layer 103 includes a first surface 1031 and a second surface 1032 opposite the first surface 1031. The third copper foil layer 111 is in contact with the first surface 1031. The fourth copper foil layer 112 is in contact with the second surface 1032.

The substrate 11 includes a handover area 113, a first bonding area 1141, a second bonding area 1142, a first waste area 1151, and a second waste area 1152. The intersection area 113 and the first bonding area are shown by dashed lines in FIG. 1141, the second bonding area 1142, the first waste area 1151 and the second waste area 1152 are separated. The interface 113 is square in shape for forming a soft region of the hard and soft bonded circuit board 100. The first bonding area 1141 and the second bonding area 1142 are respectively connected to opposite sides of the interface 113 for fixed connection with the rigid circuit board. The first waste area 1151 and the second waste area 1152 are connected between the first bonding area 1141 and the second bonding area 1142, and are respectively connected to the other opposite sides of the intersection area 113. In this embodiment, in the plane in which the substrate 11 is located, the extending direction from the first bonding region 1141 to the second bonding region 1142 is defined as a length direction, and a direction perpendicular to the extending direction is defined as a width direction. The first waste area 1151 and the second waste area 1152 are connected to opposite sides of the intersection area 113 in the width direction.

Then, referring to FIG. 4, the third copper foil layer 111 is formed to form the first conductive wiring layer 102, and the fourth copper foil layer 112 is formed to form the second conductive wiring layer 104. Preferably, the copper foil layer can be formed into a conductive wiring layer by image transfer and etching. The first conductive circuit layer 102 and the second conductive circuit layer 104 extend along the length direction and are distributed in the first bonding area 1141, the second bonding area 1142, and the intersection area 113.

Finally, referring to FIG. 1 , the first cover layer 101 and the second cover layer 105 are respectively formed on the first conductive circuit layer 102 and the second conductive circuit layer 104 to obtain the flexible circuit board 10 .

It can be understood that the flexible circuit board 10 also has a handover area, a bonding area, and a waste area corresponding to the intersection area 113, the bonding area 114, and the waste area 115 of the substrate 11.

In the second step, referring to FIG. 5 and FIG. 6, the first pressed substrate 210 and the second pressed substrate 220 are provided.

The first press-fit substrate 210 has a first window opening region 211 corresponding to the intersection area 113. The first press-fit substrate 210 includes a first dielectric layer 212 and a first copper foil layer 213. The first dielectric layer 212 has a fifth surface 2121 and a sixth surface 2122 opposite the fifth surface 2121. The first copper foil layer 213 is in contact with the sixth surface 2122.

The second press-fit substrate 220 has a second window opening region 221 corresponding to the intersection area 113. The second press-fit substrate 220 includes a second dielectric layer 222 and a second copper foil layer 223. The second dielectric layer 222 has a seventh surface 2221 and an eighth surface 2222 opposite the seventh surface 2221. The second copper foil layer 223 is in contact with the eighth surface 2222.

The first dielectric layer 212 and the second dielectric layer 222 may each be a phenolic paper laminate, an epoxy paper laminate, a polyester glass mat laminate or an epoxy glass cloth laminate. Preferably, the first dielectric layer Both the layer 212 and the second dielectric layer 222 are epoxy glass cloth laminates.

In the fourth step, referring to FIG. 7 and FIG. 8, two rows of first blind holes 214 are formed by laser ablation from the fifth surface 2121 to the sixth surface 2122 in the first window opening region 211, wherein the first row of the first blind holes 214 corresponds to At the intersection of the intersection area 113 and the first bonding area 1141, another row of first blind holes 214 corresponds to the boundary between the intersection area 113 and the second bonding area 1142, and each of the first blind holes 214 exposes a portion of the first copper. The foil layer 213 is formed by laser ablation from the seventh surface 2221 to the eighth surface 2222 in the second window opening region 221 to form two rows of second blind holes 224, wherein one row of the second blind holes 224 corresponds to the intersection area 113 and the first sticker The second blind hole 224 of the other row corresponds to the boundary between the intersection area 113 and the second bonding area 1142, and each of the second blind holes 224 exposes a portion of the second copper foil layer 223.

Preferably, the first blind hole 214 and the second blind hole 224 are formed by carbon dioxide laser ablation.

It can be understood that laser ablation can also be formed from the fifth surface 2121 to the sixth surface 2122 along the edge of the first window opening area 211 corresponding to the intersection of the intersection area 113 and the first waste area 1151 and the second waste area 1152. Two rows of first blind holes 214. From the seventh surface 2221 to the eighth surface 2222, respectively, along the edge of the second window opening region 221 corresponding to the intersection of the intersection region 113 with the first waste region 1151 and the second waste region 1152, the laser ablation forms two rows of second blind holes 224. .

It can be understood that the holes of the first blind holes 214 and the rows of the second blind holes 224 of each row may be arranged at intervals or may be connected to each other.

It can be understood that after the step is completed, the step of plasma removing the first blind hole 214 and the second blind hole 224 may be further included.

In the fifth step, referring to FIG. 9 and FIG. 10, a first press film 310 and a second press film 320 are provided.

The first press film 310 can be a conventional semi-cured film or a low-flow semi-cured film. A first opening 311 corresponding to the intersection area 113 of the flexible circuit board 10 is formed in the first press film 310.

The structure of the second press film 320 is substantially the same as that of the first press film 310. The second press film 320 may be a conventional semi-cured film or a low-flow semi-cured film. A second opening 321 corresponding to the intersection area 113 of the flexible circuit board 10 is formed in the second press film 320.

In this embodiment, the first press film 310, the second press film 320, the first press-substrate 210, and the second press-substrate 220 have the same length.

In the sixth step, referring to FIG. 11, the flexible circuit board 10, the first pressing substrate 210, the second pressing substrate 220, the first pressing film 310, and the second pressing film 320 are aligned and combined into one. Overall, the multilayer substrate 20 is obtained.

When the alignment is performed, the first pressed substrate 210, the first pressed film 310, the flexible circuit board 10, the second pressed film 320, and the second pressed substrate 220 are sequentially stacked. The first window opening region 211 of the first press-fit substrate 210 corresponds to the first opening 311 of the first press-fit film 310. The second window opening region 221 of the second press-fit substrate 220 corresponds to the second opening 321 of the second press-fit film 320. The first opening 311 of the first press film 310 and the second opening 321 of the second press film 320 all correspond to the interface 113 of the flexible circuit board 10. After the pressing, the portion of the first cover layer 101 corresponding to the first bonding area 1141, the second bonding area 1142, the first waste area 1151 and the second waste area 1152 is directly connected to the first press-fit film 310. contact. A gap exists between a portion of the first cover layer 101 corresponding to the interface 113 and a first dielectric layer 212 corresponding to the first window opening 211. The portion of the second cover layer 105 corresponding to the first bonding area 1141, the second bonding area 1142, the first waste area 1151 and the second waste area 1152 is directly in contact with the second press film 320. A gap exists between a portion of the second cover layer 105 corresponding to the intersection region and a second dielectric layer 222 corresponding to the second window opening region 221. After the pressing, the first press film 310 and the second press film 320 are both cured.

It can be understood that only the first pressed substrate 210, the first pressed film 310, and the flexible circuit board 10 are sequentially stacked and integrated into one body to obtain a multilayer substrate 20.

In the seventh step, referring to FIG. 12 and FIG. 13, a conductive via 201 is formed in the multilayer substrate 20.

Specifically, the conductive via 201 can be formed in the following manner:

First, referring to FIG. 12, a through hole 202 is formed in the multilayer substrate 20. The through hole 202 can be formed by mechanical drilling or laser ablation, and the through hole 202 can be opened in a corresponding area of the first bonding area 1141 (and) or the second bonding area 1142. In this embodiment, the through hole is opened in the second bonding area 1142.

Then, referring to FIG. 13, a metal plating layer 203 is formed on the hole wall of the through hole 202 to obtain a conductive via 201. The metal plating layer 203 can be formed by electroless plating or electroplating. In the present embodiment, the metal plating layer 203 is also formed on the surfaces of the first copper foil layer 213 and the second copper foil layer 223. Of course, the surfaces of the first copper foil layer 213 and the second copper foil layer 223 can also be prevented from forming the metal plating layer 203 by masking.

It can be understood that this step can also form a conductive blind hole in the multilayer substrate 20. At this time, a blind hole is formed in the multilayer substrate 20, and then a metal plating layer is formed in the blind hole to obtain a conductive blind hole.

In an eighth step, referring to FIG. 14, a portion of the first copper foil layer 213 and the metal plating layer 203 corresponding to the portion of the first copper foil layer 213 are selectively removed to form a third conductive wiring layer 215, and the second portion is selectively removed. The copper foil layer 223 and the metal plating layer 203 corresponding to the partial second copper foil layer 223 form a fourth conductive wiring layer 225. The third conductive wiring layer 215 and the fourth conductive wiring layer 225 may be formed by an image transfer and etching process. The third conductive circuit layer 215 is formed on a region of the first pressed substrate 210 corresponding to the first bonding region 1141 and the second bonding region 1142. The fourth conductive wiring layer 225 is formed on a region of the second pressing substrate 220 corresponding to the first bonding region 1141 and the second bonding region 1142. The first copper foil layer 213 of the first window opening region 211 and its corresponding metal plating layer 203 are also simultaneously removed, exposing the two rows of first blind holes 214. The second copper foil layer 223 of the second window opening region 221 and its corresponding metal plating layer 203 are also simultaneously removed to expose the two rows of second blind holes 224.

In the ninth step, referring to FIG. 15 and FIG. 16, a first solder resist layer 410 is formed on one side of the third conductive wiring layer 215, and a second solder resist layer 420 is formed on the fourth conductive wiring layer 225 side.

The first solder resist layer 410 covers the first conductive layer 215 and the first dielectric layer 212 exposed from the third conductive circuit layer 215 in the corresponding region of the first bonding region 1141 and the second bonding region 1142, and is filled. The pores of the conductive via 201. The second solder resist layer 420 covers the fourth conductive layer 225 and the second dielectric layer 222 exposed from the fourth conductive circuit layer 225 in the corresponding region of the first bonding region 1141 and the second bonding region 1142, and is filled. The pores of the conductive via 201.

It can be understood that when the solder resist layer is formed on the conductive circuit layer, a part of the conductive circuit layer can be exposed from the solder resist layer to form an electrical contact pad.

In the tenth step, referring to FIG. 17 and FIG. 18, the flexible circuit board 10 corresponding to the first scrap area 1151 and the second waste area 1152, the first press film 310, the second press film 320, and the first pressure are removed. The material of the substrate 210 and the second pressure-bonding substrate 220 exposes a gap between the portion of the first cover layer 101 corresponding to the interface 113 and the first dielectric layer 212 and a portion of the second cover layer 105 corresponding to the interface 113 A gap between the second dielectric layers 222. Preferably, the material corresponding to the waste zone 115 is removed by means of a die punch.

The eleventh step, referring to FIG. 19, removes the first dielectric layer 212 of the first window opening region 211 and the second dielectric layer 222 of the second window opening region 221 to expose the interface 113 of the flexible circuit board 10, The board 100 is hard and hard.

The first dielectric layer 212 is cut along the interface between the intersection area 113 and the first bonding area 1141 by laser ablation or fishing, and the second dielectric layer 222 is cut along the boundary between the intersection area 113 and the second bonding area 1142. The first dielectric layer 212 of the first window opening region 211 and the second dielectric layer 222 of the second window opening region 221 are detached to expose the interface 113 of the flexible circuit board 10. It can also be directly bent and removed by the production line operator. Since the first pressing substrate 210, the first pressing film 310, the flexible circuit board 10, the second pressing film 320, and the second pressing substrate 220 are stacked and pressed, the first window opening area 211 is first. The fifth surface 2121 of the dielectric layer 212 is laser ablated to the sixth surface 2122 to form two rows of first blind holes 214, wherein a row of first blind holes 214 corresponds to the boundary between the intersection area 113 and the first bonding area 1141. The other row of the first blind vias 214 corresponds to the interface between the interface 113 and the second bonding region 1142 , and is formed by laser ablation from the seventh surface 2221 of the second dielectric layer 222 to the eighth surface 2222 in the second window opening region 221 . There are two rows of second blind holes 224, wherein one row of second blind holes 224 corresponds to the intersection of the intersection area 113 and the first bonding area 1141, and the other row of second blind holes 224 corresponds to the intersection area 113 and the second bonding. The junction of zone 1142. Therefore, when the multi-layer substrate 20 is cut by laser ablation or fishing, or the multi-layer substrate 20 is manually bent, the first dielectric layer 212 corresponding to the first window opening region 211 and the second dielectric layer corresponding to the second window opening region 221 are easily replaced. The electrical layer 222 falls off.

It can be understood that in other embodiments, the first dielectric layer 212 may be cut along the interface between the intersection area 113 and the first bonding area 1141, and the second medium may be cut along the boundary between the intersection area 113 and the second bonding area 1142. The electric layer 222 further removes the flexible circuit board 10 corresponding to the first waste area 1151 and the second waste area 1152 by the die punching, the first press film 310, the second press film 320, the first press-fit substrate 210, The second press substrate 220 material. At this time, the first dielectric layer 212 corresponding to the first window opening region 211 and the second dielectric layer 222 of the second window opening region 221 may be detached to expose the interface 113 of the flexible circuit board 10.

The method for fabricating the soft-hardened circuit board provided by the technical solution has a blind hole arranged at intervals from the dielectric layer to the copper foil layer at the edge of the region corresponding to the bonding substrate and the intersection area, and no deep cutting is required. It avoids the problems of product yield reduction and cost increase caused by deep cutting. At the same time, the manufacturing method of the soft and hard bonding board provided by the technical solution is not pre-opened, and the subsequent text printing, surface treatment or accessory fitting can be smoothly carried out.

In summary, the present invention has indeed met the requirements of the invention patent, and has filed a patent application according to law. However, the above description is only a preferred embodiment of the present invention, and it is not possible to limit the scope of the patent application of the present invention. Equivalent modifications or variations made by persons skilled in the art in light of the spirit of the invention are intended to be included within the scope of the following claims.

100‧‧‧Soft and hard combined circuit board

10‧‧‧Soft circuit board

101‧‧‧First cover

102‧‧‧First conductive circuit layer

103‧‧‧First insulation

104‧‧‧Second conductive circuit layer

105‧‧‧Second overlay

1031‧‧‧ first surface

1032‧‧‧ second surface

1021‧‧‧ third surface

1041‧‧‧Fourth surface

11‧‧‧Substrate

111‧‧‧ Third copper foil layer

112‧‧‧fourth copper foil layer

113‧‧‧ handover area

1141‧‧‧First Fit Area

1142‧‧‧Second fitting area

1151‧‧‧First Waste Area

1152‧‧‧Second waste area

210‧‧‧First press-fit substrate

220‧‧‧Second pressed substrate

211‧‧‧First window area

221‧‧‧Second window area

212‧‧‧First dielectric layer

222‧‧‧Second dielectric layer

213‧‧‧First copper foil layer

223‧‧‧Second copper foil layer

2121‧‧‧ fifth surface

2122‧‧‧ sixth surface

2221‧‧‧ seventh surface

2222‧‧‧ eighth surface

214‧‧‧ first blind hole

224‧‧‧ second blind hole

310‧‧‧First press film

320‧‧‧Second pressure film

311‧‧‧ first opening

321‧‧‧ second opening

20‧‧‧Multilayer substrate

201‧‧‧ conductive vias

202‧‧‧through hole

203‧‧‧Metal plating

215‧‧‧ Third conductive circuit layer

225‧‧‧fourth conductive layer

410‧‧‧First solder mask

420‧‧‧Second solder mask

411‧‧‧ third opening

421‧‧‧ fourth opening

2151‧‧‧First electrical contact pads

2251‧‧‧Second electrical contact pads

no

10‧‧‧Soft circuit board

101‧‧‧First cover

105‧‧‧Second overlay

113‧‧‧ handover area

210‧‧‧First press-fit substrate

220‧‧‧Second pressed substrate

211‧‧‧First window area

221‧‧‧Second window area

212‧‧‧First dielectric layer

222‧‧‧Second dielectric layer

310‧‧‧First press film

320‧‧‧Second pressure film

Claims (10)

A method for manufacturing a soft and hard combined circuit board, comprising the steps of:
Providing a flexible circuit board, the flexible circuit board includes a handover area, a first bonding area and a second bonding area connected to opposite sides of the handover area;
Providing a first pressing substrate, the first pressing substrate includes a first dielectric layer and a first copper foil layer, and the first pressing substrate has a first window opening area corresponding to the intersection area;
Forming two rows of first blind holes from the first dielectric layer to the first copper foil layer in the first window opening region, wherein one row of the first blind holes corresponds to the boundary between the intersection area and the first bonding area, and the other row of a blind hole corresponds to a boundary between the intersection area and the second bonding area, and each of the first blind holes exposes a portion of the first copper foil layer;
Providing a first press film, the first press film having a first opening corresponding to the intersection area;
Stacking and pressing the first press-bonding substrate, the first press-fit film, and the flexible circuit board to obtain a multi-layer substrate, wherein the first dielectric layer is closer to the flexible circuit board than the first copper foil layer;
Selectively removing a portion of the first copper foil layer to form a third conductive wiring layer while removing the first copper foil layer of the first window opening region; and removing the first dielectric layer of the first window opening region to expose the flexible circuit board Handover area. The method for manufacturing a soft-hardened circuit board according to claim 1, wherein the handover area is square, and the flexible circuit board further includes a first waste area and a second waste area, the first waste area and The second waste area is connected between the first bonding area and the second bonding area and connected to the other opposite sides of the intersection area. The method for manufacturing a soft-hardened circuit board according to the second aspect of the invention, wherein before the removing the first dielectric layer of the first window opening region to expose the intersection of the flexible circuit board, the method further comprises: adopting a die punching type The first pressing substrate, the first pressing film and the flexible circuit board corresponding to the scrap area are removed. The method for manufacturing a soft-hardened circuit board according to the first aspect of the invention, wherein after the first bonding hole forms the first blind hole, the method further comprises the step of plasma-removing the first blind hole. The method for manufacturing a soft-hardened circuit board according to claim 1, wherein before the forming the third copper foil layer into the third conductive circuit layer, forming a conductive via hole to form the conductive via hole Including steps:
A through hole is formed in the multilayer substrate; and a metal plating layer is formed on an inner wall of the through hole to obtain a conductive via. The method for manufacturing a soft-hardened circuit board according to the first aspect of the invention, wherein after the first copper foil layer is formed into the third conductive circuit layer, the method further comprises forming a first side on the third conductive circuit layer side. a solder resist layer, the first solder resist layer covering the third conductive circuit layer and the first bonding region and the first bonding region exposing the first dielectric layer from the third conductive wiring layer. The method for manufacturing a soft-hardened circuit board according to the first aspect of the invention, wherein the first pressure-bonding substrate corresponding to the intersection area is removed by laser ablation, fishing or manual bending. The method for manufacturing a soft-hardened circuit board according to claim 1, wherein the method further comprises the steps of:
Providing a second pressing substrate, the second pressing substrate includes a second dielectric layer and a second copper foil layer, and the second pressing substrate has a second window opening region corresponding to the intersection area;
Forming two rows of second blind holes from the second dielectric layer to the second copper foil layer in the second window opening region, wherein one row of the second blind holes corresponds to the boundary between the intersection area and the first bonding area, and the other row of the second blind holes The two blind holes correspond to the intersection of the intersection area and the second bonding area, and each of the second blind holes exposes a portion of the second copper foil layer;
Providing a second press film, the second press film having a second opening corresponding to the intersection area;
Stacking and pressing the first press-bonding substrate, the first press-fit film, the flexible circuit board, the second press-fit film, and the second press-bonding substrate to obtain a multi-layer substrate, wherein the first dielectric layer is closer to the flexible circuit board than the first copper foil layer The second dielectric layer is closer to the flexible circuit board than the second copper foil layer;
Selectively removing a portion of the second copper foil layer to form a fourth conductive wiring layer while removing the second copper foil layer of the second window opening region;
The second dielectric layer of the second window opening region is removed to expose the interface of the flexible circuit board. The method for fabricating a soft-hardened circuit board according to claim 8, wherein the first copper foil layer is formed into a third conductive wiring layer, and the second copper foil layer is formed into a fourth conductive wiring layer. ,
The method further includes forming a first solder resist layer on one side of the third conductive circuit layer, and forming a second solder resist layer on a side of the fourth conductive circuit layer, the first solder resist layer covering the third conductive trace layer and the first bonding layer a first dielectric layer exposed from the third conductive circuit layer in the region and the second bonding region, the second solder resist layer covering the fourth conductive circuit layer and the first bonding region and the second bonding region A second dielectric layer exposed by the four conductive circuit layers. The method of manufacturing a soft-hardened circuit board according to claim 9, wherein the first solder resist layer and the second solder resist layer further fill the pores of the conductive via.