TWI858071B - 半導體裝置以及半導體裝置的製造方法 - Google Patents
半導體裝置以及半導體裝置的製造方法 Download PDFInfo
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- TWI858071B TWI858071B TW109118673A TW109118673A TWI858071B TW I858071 B TWI858071 B TW I858071B TW 109118673 A TW109118673 A TW 109118673A TW 109118673 A TW109118673 A TW 109118673A TW I858071 B TWI858071 B TW I858071B
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- H—ELECTRICITY
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- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/67—Thin-film transistors [TFT]
- H10D30/674—Thin-film transistors [TFT] characterised by the active materials
- H10D30/6755—Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate
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- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/031—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02565—Oxide semiconducting materials not being Group 12/16 materials, e.g. ternary compounds
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- H01L21/02656—Special treatments
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
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- H01L21/34—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies not provided for in groups H01L21/18, H10D48/04 and H10D48/07, with or without impurities, e.g. doping materials
- H01L21/42—Bombardment with radiation
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- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/34—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies not provided for in groups H01L21/18, H10D48/04 and H10D48/07, with or without impurities, e.g. doping materials
- H01L21/46—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/428
- H01L21/477—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
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- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
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- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
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- H10B41/70—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates the floating gate being an electrode shared by two or more components
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- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/67—Thin-film transistors [TFT]
- H10D30/6704—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device
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- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/67—Thin-film transistors [TFT]
- H10D30/6704—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device
- H10D30/6713—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes
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- H—ELECTRICITY
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- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/67—Thin-film transistors [TFT]
- H10D30/6729—Thin-film transistors [TFT] characterised by the electrodes
- H10D30/673—Thin-film transistors [TFT] characterised by the electrodes characterised by the shapes, relative sizes or dispositions of the gate electrodes
- H10D30/6733—Multi-gate TFTs
- H10D30/6734—Multi-gate TFTs having gate electrodes arranged on both top and bottom sides of the channel, e.g. dual-gate TFTs
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- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/67—Thin-film transistors [TFT]
- H10D30/6757—Thin-film transistors [TFT] characterised by the structure of the channel, e.g. transverse or longitudinal shape or doping profile
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- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/68—Floating-gate IGFETs
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- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/69—IGFETs having charge trapping gate insulators, e.g. MNOS transistors
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- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
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- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
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- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/02—Manufacture or treatment characterised by using material-based technologies
- H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
- H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
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- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
- H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
- H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
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- Condensed Matter Physics & Semiconductors (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Electromagnetism (AREA)
- Optics & Photonics (AREA)
- High Energy & Nuclear Physics (AREA)
- Health & Medical Sciences (AREA)
- Toxicology (AREA)
- Thin Film Transistor (AREA)
- Semiconductor Memories (AREA)
Applications Claiming Priority (12)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2019-111337 | 2019-06-14 | ||
| JP2019111337 | 2019-06-14 | ||
| JP2019156743 | 2019-08-29 | ||
| JP2019-156743 | 2019-08-29 | ||
| JP2019-165482 | 2019-09-11 | ||
| JP2019165482 | 2019-09-11 | ||
| JP2019-183633 | 2019-10-04 | ||
| JP2019183633 | 2019-10-04 | ||
| JP2019-239534 | 2019-12-27 | ||
| JP2019239534 | 2019-12-27 | ||
| JP2020-050342 | 2020-03-20 | ||
| JP2020050342 | 2020-03-20 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| TW202046406A TW202046406A (zh) | 2020-12-16 |
| TWI858071B true TWI858071B (zh) | 2024-10-11 |
Family
ID=73781334
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW109118673A TWI858071B (zh) | 2019-06-14 | 2020-06-03 | 半導體裝置以及半導體裝置的製造方法 |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US20220238719A1 (enExample) |
| JP (3) | JP7601761B2 (enExample) |
| KR (1) | KR20220020831A (enExample) |
| CN (1) | CN113924657A (enExample) |
| TW (1) | TWI858071B (enExample) |
| WO (1) | WO2020250083A1 (enExample) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR102744478B1 (ko) * | 2019-02-28 | 2024-12-18 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 반도체 장치 및 반도체 장치의 제작 방법 |
| US20230147329A1 (en) * | 2021-11-08 | 2023-05-11 | International Business Machines Corporation | Single Process Double Gate and Variable Threshold Voltage MOSFET |
| TW202349459A (zh) * | 2022-04-15 | 2023-12-16 | 日商半導體能源研究所股份有限公司 | 疊層體的製造方法及半導體裝置的製造方法 |
| JP2024008440A (ja) * | 2022-07-08 | 2024-01-19 | 株式会社ジャパンディスプレイ | 半導体装置 |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2011139054A (ja) * | 2009-12-04 | 2011-07-14 | Semiconductor Energy Lab Co Ltd | 半導体装置およびその作製方法 |
| JP2017120412A (ja) * | 2015-12-28 | 2017-07-06 | 株式会社半導体エネルギー研究所 | 装置、テレビジョンシステム及び電子機器 |
| JP2018098519A (ja) * | 2011-06-10 | 2018-06-21 | 株式会社半導体エネルギー研究所 | 半導体装置 |
Family Cites Families (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH031572A (ja) * | 1989-05-29 | 1991-01-08 | Fujitsu Ltd | 薄膜トランジスタマトリクス及びその製造方法 |
| JP3018627B2 (ja) * | 1991-09-02 | 2000-03-13 | 富士電機株式会社 | 絶縁膜の製造方法 |
| JP3953444B2 (ja) * | 2002-10-16 | 2007-08-08 | 株式会社アルバック | 薄膜形成装置及び薄膜形成方法 |
| CN103985760B (zh) | 2009-12-25 | 2017-07-18 | 株式会社半导体能源研究所 | 半导体装置 |
| WO2012017843A1 (en) | 2010-08-06 | 2012-02-09 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor integrated circuit |
| US8901556B2 (en) * | 2012-04-06 | 2014-12-02 | Semiconductor Energy Laboratory Co., Ltd. | Insulating film, method for manufacturing semiconductor device, and semiconductor device |
| KR102290247B1 (ko) * | 2013-03-14 | 2021-08-13 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 반도체 장치와 그 제작 방법 |
| KR102546189B1 (ko) * | 2015-04-13 | 2023-06-22 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 반도체 장치 |
| US10056497B2 (en) * | 2015-04-15 | 2018-08-21 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and manufacturing method thereof |
| TWI693719B (zh) * | 2015-05-11 | 2020-05-11 | 日商半導體能源研究所股份有限公司 | 半導體裝置的製造方法 |
| WO2018073689A1 (en) * | 2016-10-21 | 2018-04-26 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device |
| JP7154136B2 (ja) * | 2017-02-07 | 2022-10-17 | 株式会社半導体エネルギー研究所 | 半導体装置の作製方法 |
| JP7232764B2 (ja) * | 2017-08-04 | 2023-03-03 | 株式会社半導体エネルギー研究所 | 半導体装置 |
| KR102631152B1 (ko) * | 2017-08-04 | 2024-01-30 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 반도체 장치 및 그 제작 방법 |
| JP2019091872A (ja) * | 2017-10-27 | 2019-06-13 | 株式会社半導体エネルギー研究所 | 半導体装置、および半導体装置の作製方法 |
-
2020
- 2020-06-02 CN CN202080041969.7A patent/CN113924657A/zh active Pending
- 2020-06-02 US US17/617,015 patent/US20220238719A1/en active Pending
- 2020-06-02 JP JP2021525403A patent/JP7601761B2/ja active Active
- 2020-06-02 WO PCT/IB2020/055190 patent/WO2020250083A1/ja not_active Ceased
- 2020-06-02 KR KR1020217041369A patent/KR20220020831A/ko active Pending
- 2020-06-03 TW TW109118673A patent/TWI858071B/zh active
-
2024
- 2024-12-05 JP JP2024212021A patent/JP7727818B2/ja active Active
-
2025
- 2025-08-08 JP JP2025133157A patent/JP2025159088A/ja active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2011139054A (ja) * | 2009-12-04 | 2011-07-14 | Semiconductor Energy Lab Co Ltd | 半導体装置およびその作製方法 |
| JP2018098519A (ja) * | 2011-06-10 | 2018-06-21 | 株式会社半導体エネルギー研究所 | 半導体装置 |
| JP2017120412A (ja) * | 2015-12-28 | 2017-07-06 | 株式会社半導体エネルギー研究所 | 装置、テレビジョンシステム及び電子機器 |
Also Published As
| Publication number | Publication date |
|---|---|
| KR20220020831A (ko) | 2022-02-21 |
| JP7601761B2 (ja) | 2024-12-17 |
| JP7727818B2 (ja) | 2025-08-21 |
| JP2025159088A (ja) | 2025-10-17 |
| US20220238719A1 (en) | 2022-07-28 |
| CN113924657A (zh) | 2022-01-11 |
| TW202046406A (zh) | 2020-12-16 |
| JPWO2020250083A1 (enExample) | 2020-12-17 |
| JP2025026536A (ja) | 2025-02-21 |
| WO2020250083A1 (ja) | 2020-12-17 |
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