TWI764986B - 使用選擇性二氧化矽沉積以形成自我對準接觸窗的方法 - Google Patents

使用選擇性二氧化矽沉積以形成自我對準接觸窗的方法 Download PDF

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TWI764986B
TWI764986B TW107105503A TW107105503A TWI764986B TW I764986 B TWI764986 B TW I764986B TW 107105503 A TW107105503 A TW 107105503A TW 107105503 A TW107105503 A TW 107105503A TW I764986 B TWI764986 B TW I764986B
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坎達巴拉 Ｎ 泰伯利
韓相哲
蔡洙杜
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日商東京威力科創股份有限公司
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Abstract

在各種實施例中，描述利用選擇性SiO2 沉積以形成自我對準接觸窗之基板處理方法。該方法包含：提供一平坦化基板，該平坦化基板包含一介電層表面及一含金屬表面；以一含金屬催化層覆蓋該介電層表面；及使該平坦化基板暴露至包含一矽烷醇氣體之一處理氣體一時間期間，以選擇性地沉積一SiO2 層在該介電層表面上之該含金屬催化層上。根據一實施例，該方法更包含：沉積一蝕刻停止層在該SiO2 層上及在該含金屬表面上；沉積一層間介電層在該平坦化基板上；在該層間介電層中蝕刻一凹陷特徵部及停止在該含金屬表面上之該蝕刻停止層上；及以一金屬填充該凹陷特徵部。

Description

使用選擇性二氧化矽沉積以形成自我對準接觸窗的方法
相關申請案之交互參考 本申請案關於2017年2月14日所提出之美國臨時專利申請案第62/458,858號並且主張其優先權，其全部揭示內容係合併於此做為參考文獻。
本發明係關於用於處理基板之方法，具體而言，係關於使用選擇性SiO2 沉積以形成自我對準接觸窗之方法。
金屬氧化物半導體（MOS）電晶體，例如MOS場效電晶體（MOSFET），通常會使用在積體電路之製造中。MOS電晶體包含數個構件，例如閘極電極、閘極介電層、間隙物、及源極與汲極擴散區。層間介電質（ILD）通常會形成在MOS電晶體上並且覆蓋擴散區。
藉由接觸插塞以電連接至MOS電晶體，接觸插塞通常是由金屬（ 例如鎢）所形成。接觸插塞之製做可藉由，首先將ILD層圖案化以形成向下到達擴散區之貫孔。圖案化處理通常是光微影處理。接著，將金屬沉積在貫孔中以形成接觸插塞。使用相同或類似的處理，形成向下到達閘極電極之不同接觸插塞。
在製做接觸插塞時可能發生之問題是，接觸窗至閘極短路（contact-to-gate short）之形成。接觸窗至閘極短路係一種短路電路，發生於接觸插塞未對準並且與閘極電極發生電接觸的時候。防止接觸窗至閘極短路之習知方法係藉由控制對準及關鍵尺寸（CD）。遺憾地，對於具有小閘極節距的電晶體而言，對於閘極及接觸窗尺寸之嚴格CD控制會對製程窗（process window）造成限制。因此，接觸窗至閘極短路之可能性是非常高的。當電晶體閘極節距尺寸進一步微縮時，因為關鍵尺寸變得更小，故此問題變得更常見。
自我對準圖案化（self-aligned patterning）需要取代疊合驅動圖案化（overlay-driven patterning），俾使甚至在引入EUV之後，成本效能縮放亦可繼續。在圖案化高度微縮的技術節點中，薄膜之選擇性沉積是重要的步驟。
在各種實施例中，描述使用選擇性SiO2 沉積以形成自我對準接觸窗之方法。根據一實施例，該方法包含：提供一平坦化基板，該平坦化基板包含一介電層表面及一含金屬表面；以一含金屬催化層覆蓋該介電層表面；及使該平坦化基板暴露至包含一矽烷醇氣體之一處理氣體一時間期間，以選擇性地沉積一SiO2 層在該介電層表面上之該含金屬催化層上。
根據一實施例，該方法更包含：沉積一蝕刻停止層在該SiO2 層上及在該含金屬表面上；沉積一層間介電層在該平坦化基板上；在該層間介電層中蝕刻一凹陷特徵部及停止在該含金屬表面上之該蝕刻停止層上；及以一金屬填充該凹陷特徵部。
根據一實施例，該方法包含：提供一平坦化基板，該平坦化基板包含一介電層表面及一含金屬表面；以一第一含金屬催化層覆蓋該介電層表面；及使該平坦化基板暴露至包含一矽烷醇氣體之一處理氣體一時間期間，以沉積一SiO2 層在該介電層表面上及一較薄的額外SiO2 層在該含金屬表面上，其中該暴露之實施係不存在任何氧化及水解劑及在大約150 °C或較低之基板溫度下。該方法更包含：在一蝕刻處理中從該含金屬表面去除該額外SiO2 層；及重覆該等覆蓋、暴露及去除步驟至少一次，以增加在該介電層表面上之該SiO2 層之厚度。
由閘極節距微縮所引起之一個問題是，接觸窗至閘極短路之可能性。當這樣的接觸發生時，短路產生，毀壞了MOS電晶體。目前減少短路之方法包含，控制對準及以較小的關鍵尺寸來圖案化接觸窗。然而，當閘極節距微縮時，符合現行技術之對準需求會變得非常困難。
根據一實施例，描述一方法，用於在MOS電晶體之製做期間，減少接觸窗至閘極短路之可能性。在以下的敘述中，將使用熟悉此項技藝者所通常採用的名詞，以描述示例性實例之各種態樣，以將其工作之本義傳達給其他的熟悉此項技藝者。然而，明顯地，對於熟悉此項技藝者而言，本發明可在僅有所述態樣其中某些之情況下加以實施。為了說明之目的，特定的數字、材料及配置被提出，以提供對於示例性實例之徹底了解。然而，熟悉此項技藝者應當了解，在沒有特定細節之情況下，亦可實施本發明。在其它的情況下，熟知的特徵被省略或簡化，以免模糊了示例性實例。
根據本發明之一實施例，圖1A-1F藉由橫剖面圖而概要地顯示基板之處理方法。顯示在圖1A中之示例性平坦化基板100包含常見於半導體元件中之各種材料層，然而，本發明之實施例可應用於較簡單或更先進的半導體元件。平坦化基板100包含氧化物層102（例如，SiO2 ）、氮化物層104（例如，SiN）、閘極接觸層106、頂蓋層108（例如，SiN或SiCN）、源極∕汲極層112（例如，Si或SiC）、具有外露的介電層表面120之介電層110（例如，SiO2 ）、具有外露的含金屬表面124之含金屬層114（例如，溝渠矽化物層：CoSi2 、NiSi或MoSi2 ）。在示例性平坦化基板100中，含金屬層114可為接觸區域及閘極區域之部分，其在進一步處理期間易於產生接觸窗至閘極短路。可使用化學機械研磨（CMP）製程以平坦化基板100。
圖1B顯示在以含金屬催化層118覆蓋介電層表面120後之平坦化基板100。介電層表面120之末端可具有羥基（-OH），其在介電層表面120提供了良好的覆蓋選擇性（相較於在含金屬表面124上）。根據本發明之某些實施例，含金屬催化層118可包含鋁（Al）、鈦（Ti）、或鋁和鈦兩者。根據一實施例，含金屬催化層118可選自於由Al、Al2 O3 、AlN、AlON、含Al前驅物、含Al合金、CuAl、TiAlN、TaAlN、Ti、TiAlC、TiO2 、TiON、TiN、含Ti前驅物、含Ti合金、及其組合所組成之群組。含金屬催化層118之形成可藉由將平坦化基板100暴露至含金屬前驅物蒸氣及選擇性的含氧氣體及∕或含氮氣體。根據一實施例，該暴露之進行可藉由將平坦化基板100暴露至含金屬氣體脈衝，其優先地吸附大約一單分子層厚之含金屬催化層118在介電層表面120上。金屬可在平坦化基板100之表面起反應，以形成小於一單分子層厚之化學吸附層。在一範例中，含金屬催化層118可包含受吸附的含金屬前驅物，例如三甲基鋁（TMA、AlMe3 ）。
本發明之實施例可使用各種的含鋁前驅物。例如，許多鋁前驅物具有化學式： AlL1 L2 L3 Dx 其中，L1 、L2 、L3 為個別的陰離子配位基，D為中性供體配位基，x可為0、1或2。每一L1 、L2 、L3 配位基可個別地選自於烷氧化物（alkoxide）、鹵化物（halide）、芳基氧化物（aryloxide）、醯胺（amide）、環戊二烯基、烷基、矽烷基、脒基（amidinate）、β-二酮基（β-diketonate）、酮亞胺（ketoiminate）、矽烷醇化物（silanoate）、及羧酸鹽（carboxylate）之群組。D配位基可選自於醚、呋喃（furan）、吡啶（pyridine）、吡咯（pyrole）、吡咯烷（pyrolidine）、胺、冠醚（crown ether）、二醇醚（glyme）及腈（nitrile）之群組。
鋁前驅物之其它範例包含：AlMe3 、AlEt3 、AlMe2 H、 [Al(Os Bu)3 ]4 、Al(CH3 COCHCOCH3 )3 、AlCl3 、AlBr3 、AlI3 、Al(Oi Pr)3 、[Al(NMe2 )3 ]2 、Al(i Bu)2 Cl、Al(i Bu)3 、Al(i Bu)2 H、AlEt2 Cl、Et3 Al2 (Os Bu)3 、及Al(THD)3 。
本發明之實施例可使用各種含Ti前驅物。範例包含具有“Ti-N＂分子內鍵結之含Ti前驅物，包含Ti(NEt2 )4 （TDEAT）、Ti(NMeEt)4 （TEMAT）、and Ti(NMe2 )4 （TDMAT）。其它範例包含具有“Ti-C＂分子內鍵結之含Ti前驅物，包含Ti(COCH3 )(η5 -C5 H5 )2 Cl、Ti(η5 -C5 H5 )Cl2 、Ti(η5 -C5 H5 )Cl3 、Ti(η5 -C5 H5 )2 Cl2 、Ti(η5 -C5 (CH3 )5 )Cl3 、Ti(CH3 )(η5 -C5 H5 )2 Cl、 Ti(η5 -C9 H7 )2 Cl2 、Ti((η5 -C5 (CH3 )5 )2 Cl、Ti((η5 -C5 (CH3 )5 )2 Cl2 、Ti(η5 -C5 H5 )2 (μ-Cl)2 、Ti(η5 -C5 H5 )2 (CO)2 、Ti(CH3 )3 (η5 -C5 H5 )、Ti(CH3 )2 (η5 -C5 H5 )2 、Ti(CH3 )4 、Ti(η5 -C5 H5 )(η7 -C7 H7 )、Ti(η5 -C5 H5 )(η8 -C8 H8 )、Ti(C5 H5 )2 (η5 -C5 H5 )2 、Ti((C5 H5 )2 )2 (η-H)2 、Ti(η5 - C5 (CH3 )5 )2 、Ti(η5 - C5 (CH3 )5 )2 (H)2 、及Ti(CH3 )2 (η5 - C5 (CH3 )5 )2 。TiCl4 係含有“Ti-鹵素＂鍵結之鈦鹵化物前驅物之一範例。
參考圖1C，藉由將平坦化基板100暴露至包含矽烷醇（silanol）之處理氣體，使SiO2 膜130選擇性地沉積在含金屬催化層118上（相較於含金屬表面124）。根據本發明之實施例，含金屬催化層118催化來自矽烷醇氣體之SiO2 膜130之選擇性沉積，且此催化效果被觀察到直到沉積的SiO2 膜130大約5 nm厚。暴露至處理氣體可進行一段時間，在此段時間並未在含金屬表面124上產生明顯的SiO2 沉積。根據本發明之實施例，平坦化基板100係在不存在任何氧化及水解劑之情況下暴露至包含矽烷醇氣體之處理氣體。根據某些實施例，矽烷醇氣體可選自於由三(叔-戊氧基)矽烷醇（tris(tert-pentoxy) silanol，TPSOL）、三(叔-丁氧基)矽烷醇（tris(tert-butoxy) silanol）、及雙(叔-丁氧基)(異丙氧基)矽烷醇（bis(tert-butoxy)(isopropoxy) silanol）所組成之群組。
發明人已經發現，氧化及水解劑並非SiO2 膜沉積所需要。在某些範例中，處理氣體可進一步包含惰性氣體，例如氬。在一實施例中，處理氣體可由一矽烷醇氣體及一惰性氣體所組成。此外，根據一實施例，在暴露期間，基板溫度可為大約150 °C或較低。在另一實施例中，基板溫度可為大約120 °C或較低。在又另一實施例中，基板溫度可為大約100 °C或較低。
圖1D顯示在SiO2 膜130上以及在含金屬表面124上沉積蝕刻停止層140後之平坦化基板100。蝕刻停止層140可，例如，包括Al2 O3 。
平坦化基板100之進一步處理可包含沉積層間介電層（IDL）150、在IDL 150中蝕刻特徵部並且停止在蝕刻停止層140上。之後，將阻障層158沉積在特徵部中並且以金屬填充特徵部。受金屬填充的特徵部160可，在一範例中，包含鎢（W）、釕（Ru）、銅（Cu）、或鈷（Co）。如圖1E中所示，受金屬填充的特徵部160可能不與下面的含金屬層114及閘極氧化物層116對齊。此可能是由於故意的錯位以增加在受金屬填充的特徵部160每一者之間之間距、或由於疊合（overlay）誤差所致之非故意的錯位。發明人已經了解，在介電層110上之選擇性沉積的SiO2 膜130大大地降低了含金屬層114藉由受金屬填充的特徵部160短路之可能性。
圖1F顯示平坦化基板100之進一步處理，包含在受金屬填充的特徵部160中蝕刻孔洞，並且在孔洞中沉積阻障層168及金屬膜170。在一範例中，金屬膜170可包含銅（Cu）。
根據本發明之一實施例，圖2A-2F藉由橫剖面圖而概要地顯示基板之處理方法。在圖1B中之平坦化基板100已經被重製為在圖2A中之平坦化基板200。圖2A顯示在以含金屬催化層118覆蓋介電層表面120後之平坦化基板200。介電層表面120之末端可具有羥基（-OH），其在介電層表面120提供了良好的覆蓋選擇性（相較於含金屬表面124）。
參考圖2B，藉由將平坦化基板200暴露至包含矽烷醇之處理氣體，使SiO2 膜130沉積在含金屬催化層118上，且使較薄的SiO2 膜132沉積在含金屬表面124上。處理氣體之暴露時間可長於在圖1C中之選擇性沉積，導致選擇性的減低以及較薄的SiO2 膜132在含金屬表面124上之沉積。
在含金屬表面124上之多餘的SiO2 膜132可以蝕刻處理加以去除，例如使用化學氧化物去除（COR）處理或使用稀釋氫氟酸（DHF）溶液。在去除SiO2 膜132期間，可能使SiO2 膜130變薄。產生的平坦化基板200係顯示在圖2C。
以含金屬催化層118覆蓋介電層表面120、藉由暴露至包含矽烷醇氣體之處理氣體之沉積處理、以及蝕刻處理可被重複至少一次，以增加SiO2 膜130之厚度。圖2D顯示在重複處理7次以及在SiO2 膜130中形成自我對準凹陷特徵部142之後之平坦化基板200。
平坦化基板200之進一步處理係顯示在圖2E中，包含沉積阻障層164在凹陷特徵部142中以及以金屬162填充凹陷特徵部142。金屬162可，例如，包含鎢（W）、鈷（Co）、釕（Ru）、或鋁（Al）。
圖2F顯示平坦化基板200之進一步處理，包含在金屬162中蝕刻孔洞，並且在孔洞中沉積阻障層174及金屬膜172。金屬膜172可，例如，包含鎢（W）、鈷（Co）、釕（Ru）、或鋁（Al）。
圖3顯示平坦化基板30之橫剖面TEM影像。SiO2 膜301係選擇性地沉積在SiO2 層300上（相較於TaN阻障層304及W金屬插塞302）。在W金屬插塞302上，沒有觀察到SiO2 之沉積。SiO2 沉積之實施，係利用暴露至TMA 6秒、接著暴露至TPSOL 60秒。
圖4顯示平坦化基板40之橫剖面TEM影像。SiO2 膜401係沉積在SiO2 層400上，且較薄的SiO2 膜403沉積在TaN阻障層404及W金屬插塞402上。SiO2 膜401具有約8.2 nm之厚度，SiO2 膜403在W金屬插塞402上具有約2.8 nm之厚度。SiO2 沉積之實施係使用6次沉積循環，其中每一循環包含暴露至TMA 6秒、接著暴露至TPSOL 60秒。
已經描述基板處理方法之數個實施例，用於使用選擇性SiO2 沉積以形成自我對準接觸窗。雖然本發明已經藉由一或多個實施例之敘述而加以說明，且雖然實施例已經相當詳細地加以描述，但其並非用於侷限或以任何方式限制所附申請專利範圍至這些細節。對於熟悉此項技藝者而言，額外的優點及修改將很容易顯現。因此，本發明並不受限於所述或所示的特定細節、代表性設備及方法及說明性範例。據此，可能與這些細節有所偏離，但不違背大致的發明概念之範圍。
30‧‧‧基板40‧‧‧基板100‧‧‧基板102‧‧‧氧化物層104‧‧‧氮化物層106‧‧‧閘極接觸層108‧‧‧頂蓋層110‧‧‧介電層112‧‧‧源極∕汲極層114‧‧‧含金屬層118‧‧‧含金屬催化層120‧‧‧介電層表面124‧‧‧含金屬表面130‧‧‧SiO2膜132‧‧‧SiO2膜140‧‧‧蝕刻停止層142‧‧‧凹陷特徵部150‧‧‧層間介電層158‧‧‧阻障層160‧‧‧受金屬填充的特徵部162‧‧‧金屬164‧‧‧阻障層168‧‧‧阻障層170‧‧‧金屬膜172‧‧‧金屬膜174‧‧‧阻障層200‧‧‧基板300‧‧‧SiO2層301‧‧‧SiO2膜302‧‧‧W金屬插塞304‧‧‧TaN阻障層400‧‧‧SiO2層401‧‧‧SiO2膜402‧‧‧W金屬插塞403‧‧‧SiO2膜404‧‧‧TaN阻障層
隨附的圖式係包含在此說明書中、並且構成說明書之一部分，隨附的圖式用於說明本發明之實施例，並且與上述的發明內容及下述的實施方式一起用於解釋本發明。
根據本發明之一實施例，圖1A-1F藉由橫剖面圖而概要地顯示基板之處理方法。
根據本發明之一實施例，圖2A-2F藉由橫剖面圖而概要地顯示基板之處理方法。
根據本發明之一實施例，圖3顯示選擇性沉積在基板上之SiO2 膜之橫剖面穿透式電子顯微鏡（TEM）影像。
根據本發明之一實施例，圖4顯示沉積在基板上之SiO2 膜之橫剖面TEM影像。
100‧‧‧基板
102‧‧‧氧化物層
104‧‧‧氮化物層
106‧‧‧閘極接觸層
108‧‧‧頂蓋層
110‧‧‧介電層
112‧‧‧源極/汲極層
114‧‧‧含金屬層
118‧‧‧催化層
120‧‧‧介電層表面
124‧‧‧含金屬表面
130‧‧‧SiO2膜

Claims (18)

  1. 一種基板處理方法，包含：提供一平坦化基板，該平坦化基板包含一介電層表面及一含金屬表面；以一含金屬催化層覆蓋該介電層表面；及使該平坦化基板暴露至包含一矽烷醇氣體之一處理氣體一時間期間，以選擇性地沉積一SiO2層在該介電層表面上之該含金屬催化層上，其中使該平坦化基板暴露至包含該矽烷醇氣體之該處理氣體之實施，係不存在任何氧化及水解劑及在大約150℃或較低之基板溫度下。
  2. 如申請專利範圍第1項之基板處理方法，更包含：沉積一蝕刻停止層在該SiO2層上及在該含金屬表面上。
  3. 如申請專利範圍第2項之基板處理方法，更包含：沉積一層間介電層在該平坦化基板上；在該層間介電層中蝕刻一凹陷特徵部及停止在該含金屬表面上之該蝕刻停止層上；及以一金屬填充該凹陷特徵部。
  4. 如申請專利範圍第2項之基板處理方法，其中該蝕刻停止層包含Al2O3。
  5. 如申請專利範圍第1項之基板處理方法，其中該SiO2層形成一凸起SiO2特徵部與該含金屬表面相鄰。
  6. 如申請專利範圍第1項之基板處理方法，其中該矽烷醇氣體係選自於由三(叔-戊氧基)矽烷醇(tris(tert-pentoxy)silanol)、三(叔-丁氧基)矽烷醇(tris(tert-butoxy)silanol)、及雙(叔-丁氧基)(異丙氧基)矽烷醇(bis(tert-butoxy)(isopropoxy)silanol)所組成之群組。
  7. 如申請專利範圍第1項之基板處理方法，其中在該暴露期間，該基板溫度係大約100℃或較低。
  8. 如申請專利範圍第1項之基板處理方法，其中該處理氣體由一矽烷醇氣體及一惰性氣體所組成。
  9. 如申請專利範圍第1項之基板處理方法，其中該SiO2層係在自我限制處理(self-limiting process)中沉積在該含金屬催化層上。
  10. 如申請專利範圍第9項之基板處理方法，其中該SiO2層之厚度係約5nm。
  11. 如申請專利範圍第1項之基板處理方法，其中該暴露更包含：使該平坦化基板暴露至包含該矽烷醇氣體之該處理氣體一額外時間期間，以沉積一較薄的額外SiO2層在該含金屬表面上；及在一蝕刻處理中從該含金屬表面去除該額外SiO2層。
  12. 如申請專利範圍第11項之基板處理方法，更包含：重覆該等覆蓋、暴露及去除步驟至少一次，以增加在該介電層表面上之該SiO2層之厚度。
  13. 一種基板處理方法，包含：提供一平坦化基板，該平坦化基板包含一介電層表面及一含金屬表面；以一含金屬催化層覆蓋該介電層表面；使該平坦化基板暴露至包含一矽烷醇氣體之一處理氣體一時間期間，相較於該含金屬表面而選擇性地沉積一SiO2層在該介電層表面上，其中該暴露之實施係不存在任何氧化及水解劑及在大約150℃或較低之基板溫度下；沉積一蝕刻停止層在該SiO2層上及在該含金屬表面上；沉積一層間介電層在該平坦化基板上； 在該層間介電層中蝕刻一凹陷特徵部及停止在該含金屬表面上之該蝕刻停止層上；及以一金屬填充該凹陷特徵部。
  14. 如申請專利範圍第13項之基板處理方法，其中該蝕刻停止層包含Al2O3。
  15. 如申請專利範圍第13項之基板處理方法，其中該SiO2層形成一凸起SiO2特徵部與該含金屬表面相鄰。
  16. 一種基板處理方法，包含：提供一平坦化基板，該平坦化基板包含一介電層表面及一含金屬表面；以一第一含金屬催化層覆蓋該介電層表面；使該平坦化基板暴露至包含一矽烷醇氣體之一處理氣體一時間期間，以沉積一SiO2層在該介電層表面上及一較薄的額外SiO2層在該含金屬表面上，其中該暴露之實施係不存在任何氧化及水解劑及在大約150℃或較低之基板溫度下；在一蝕刻處理中從該含金屬表面去除該額外SiO2層；及重覆該等覆蓋、暴露及去除步驟至少一次，以增加在該介電層表面上之該SiO2層之厚度。
  17. 如申請專利範圍第16項之基板處理方法，其中該蝕刻停止層包含Al2O3。
  18. 如申請專利範圍第16項之基板處理方法，其中該SiO2層形成一凸起SiO2特徵部與該含金屬表面相鄰。
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