TWI733831B - 用於射頻應用之結構 - Google Patents

用於射頻應用之結構 Download PDF

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Publication number
TWI733831B
TWI733831B TW106118833A TW106118833A TWI733831B TW I733831 B TWI733831 B TW I733831B TW 106118833 A TW106118833 A TW 106118833A TW 106118833 A TW106118833 A TW 106118833A TW I733831 B TWI733831 B TW I733831B
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TW
Taiwan
Prior art keywords
substrate
trenches
silicon
layer
resistivity
Prior art date
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TW106118833A
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English (en)
Chinese (zh)
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TW201806175A (zh
Inventor
埃里克 戴斯鮑內
約努 茨拉杜
奧列格 科諾強克
尚皮耶 洛斯肯
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法商索泰克公司
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Publication of TW201806175A publication Critical patent/TW201806175A/zh
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Publication of TWI733831B publication Critical patent/TWI733831B/zh

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76264SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
    • H01L21/76283Lateral isolation by refilling of trenches with dielectric material
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/01Manufacture or treatment
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002Preparing wafers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76224Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76254Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76264SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/67Thin-film transistors [TFT]
    • H10D30/6758Thin-film transistors [TFT] characterised by the insulating substrates
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/113Isolations within a component, i.e. internal isolations
    • H10D62/115Dielectric isolations, e.g. air gaps
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/201Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates the substrates comprising an insulating layer on a semiconductor body, e.g. SOI
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/411Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs characterised by materials, geometry or structure of the substrates
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Micromachines (AREA)
  • Element Separation (AREA)
  • Surface Acoustic Wave Elements And Circuit Networks Thereof (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)
TW106118833A 2016-06-08 2017-06-07 用於射頻應用之結構 TWI733831B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
FR1655266A FR3052592B1 (fr) 2016-06-08 2016-06-08 Structure pour applications radiofrequences
??1655266 2016-06-08
FR1655266 2016-06-08

Publications (2)

Publication Number Publication Date
TW201806175A TW201806175A (zh) 2018-02-16
TWI733831B true TWI733831B (zh) 2021-07-21

Family

ID=56511794

Family Applications (1)

Application Number Title Priority Date Filing Date
TW106118833A TWI733831B (zh) 2016-06-08 2017-06-07 用於射頻應用之結構

Country Status (8)

Country Link
US (3) US10943815B2 (enExample)
EP (1) EP3469627B1 (enExample)
JP (1) JP7053502B2 (enExample)
KR (1) KR102369549B1 (enExample)
FR (1) FR3052592B1 (enExample)
SG (2) SG10201913097SA (enExample)
TW (1) TWI733831B (enExample)
WO (1) WO2017212160A1 (enExample)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR3052592B1 (fr) * 2016-06-08 2018-05-18 Soitec Structure pour applications radiofrequences
FR3062517B1 (fr) * 2017-02-02 2019-03-15 Soitec Structure pour application radiofrequence
CN110828962B (zh) 2018-08-09 2021-08-03 财团法人工业技术研究院 天线阵列模块及其制造方法
US10658474B2 (en) * 2018-08-14 2020-05-19 Taiwan Semiconductor Manufacturing Co., Ltd. Method for forming thin semiconductor-on-insulator (SOI) substrates
FR3086096B1 (fr) * 2018-09-14 2021-08-27 Soitec Silicon On Insulator Procede de realisation d'un substrat avance pour une integration hybride
US11661337B2 (en) * 2020-10-19 2023-05-30 Taiwan Semiconductor Manufacturing Company, Ltd. Comb electrode release process for MEMS structure
US11658206B2 (en) * 2020-11-13 2023-05-23 Taiwan Semiconductor Manufacturing Company, Ltd. Deep trench structure for a capacitive device
US20220406649A1 (en) * 2021-06-22 2022-12-22 Texas Instruments Incorporated Passive component q factor enhancement with elevated resistance region of substrate
FR3126541B1 (fr) 2021-09-02 2025-01-10 Commissariat Energie Atomique Procédé de fabrication d’une structure multicouche
FR3134478B1 (fr) * 2022-04-06 2025-07-25 Commissariat Energie Atomique Substrat comprenant des vias et procédés de fabrication associés
FR3142289A1 (fr) * 2022-11-23 2024-05-24 Commissariat A L'energie Atomique Et Aux Energies Alternatives Procédé de fabrication d’un empilement comprenant une couche isolante
CN116902904A (zh) * 2023-07-14 2023-10-20 绍兴中芯集成电路制造股份有限公司 一种mems器件、mems器件的制备方法和电子装置

Citations (4)

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CN102169552A (zh) * 2011-01-28 2011-08-31 上海集成电路研发中心有限公司 射频识别标签及其制造方法
TW201220470A (en) * 2010-08-02 2012-05-16 Ibm Method, apparatus, and design structure for silicon-on-insulator high-bandwidth circuitry with reduced charge layer
US20120266116A1 (en) * 2008-08-07 2012-10-18 International Business Machines Corporation Integrated millimeter wave antenna and transceiver on a substrate
CN103022054A (zh) * 2012-12-21 2013-04-03 上海宏力半导体制造有限公司 绝缘体上硅射频器件及绝缘体上硅衬底

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JP3582890B2 (ja) * 1995-05-23 2004-10-27 株式会社日立製作所 半導体装置
US6312568B2 (en) * 1999-12-07 2001-11-06 Applied Materials, Inc. Two-step AIN-PVD for improved film properties
KR100388011B1 (ko) * 2000-01-17 2003-06-18 삼성전기주식회사 GaN박막 SAW필터 및 이를 제조하는 방법
US6391792B1 (en) * 2000-05-18 2002-05-21 Taiwan Semiconductor Manufacturing Co., Ltd Multi-step chemical mechanical polish (CMP) planarizing method for forming patterned planarized aperture fill layer
US20090179027A1 (en) * 2007-12-29 2009-07-16 Saint-Gobain Ceramics & Plastics, Inc. Coaxial ceramic igniter and methods of fabrication
US9070585B2 (en) * 2012-02-24 2015-06-30 Semiconductor Components Industries, Llc Electronic device including a trench and a conductive structure therein and a process of forming the same
CN103077949B (zh) * 2013-01-28 2016-09-14 上海华虹宏力半导体制造有限公司 绝缘体上硅射频器件及其制作方法
US9373613B2 (en) * 2013-12-31 2016-06-21 Skyworks Solutions, Inc. Amplifier voltage limiting using punch-through effect
EP3024020A1 (en) * 2014-11-19 2016-05-25 Nxp B.V. Semiconductor device and method
WO2016209263A1 (en) * 2015-06-26 2016-12-29 Intel Corporation GALLIUM NITRIDE (GaN) TRANSISTOR STRUCTURES ON A SUBSTRATE
DE112015007201T5 (de) * 2015-12-21 2018-09-06 Intel Corporation Integrierte hf-frontend-strukturen
FR3052592B1 (fr) * 2016-06-08 2018-05-18 Soitec Structure pour applications radiofrequences

Patent Citations (4)

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Publication number Priority date Publication date Assignee Title
US20120266116A1 (en) * 2008-08-07 2012-10-18 International Business Machines Corporation Integrated millimeter wave antenna and transceiver on a substrate
TW201220470A (en) * 2010-08-02 2012-05-16 Ibm Method, apparatus, and design structure for silicon-on-insulator high-bandwidth circuitry with reduced charge layer
CN102169552A (zh) * 2011-01-28 2011-08-31 上海集成电路研发中心有限公司 射频识别标签及其制造方法
CN103022054A (zh) * 2012-12-21 2013-04-03 上海宏力半导体制造有限公司 绝缘体上硅射频器件及绝缘体上硅衬底

Also Published As

Publication number Publication date
US11923239B2 (en) 2024-03-05
SG11201810415PA (en) 2018-12-28
JP7053502B2 (ja) 2022-04-12
EP3469627A1 (fr) 2019-04-17
US20190157137A1 (en) 2019-05-23
JP2019527925A (ja) 2019-10-03
US20210143053A1 (en) 2021-05-13
TW201806175A (zh) 2018-02-16
WO2017212160A1 (fr) 2017-12-14
EP3469627B1 (fr) 2020-07-29
FR3052592B1 (fr) 2018-05-18
US10943815B2 (en) 2021-03-09
US11367650B2 (en) 2022-06-21
KR20190017762A (ko) 2019-02-20
FR3052592A1 (fr) 2017-12-15
KR102369549B1 (ko) 2022-03-04
SG10201913097SA (en) 2020-02-27
US20220277988A1 (en) 2022-09-01

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