TWI727660B - 氮化矽之選擇性沉積 - Google Patents

氮化矽之選擇性沉積 Download PDF

Info

Publication number
TWI727660B
TWI727660B TW109104749A TW109104749A TWI727660B TW I727660 B TWI727660 B TW I727660B TW 109104749 A TW109104749 A TW 109104749A TW 109104749 A TW109104749 A TW 109104749A TW I727660 B TWI727660 B TW I727660B
Authority
TW
Taiwan
Prior art keywords
silicon
silicon nitride
substrate
nitride
dioxide
Prior art date
Application number
TW109104749A
Other languages
English (en)
Other versions
TW202035781A (zh
Inventor
瀚 王
布萊恩 C 漢迪克斯
艾瑞克 康杜
湯瑪士 Ｈ 邦姆
Original Assignee
美商恩特葛瑞斯股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 美商恩特葛瑞斯股份有限公司 filed Critical 美商恩特葛瑞斯股份有限公司
Publication of TW202035781A publication Critical patent/TW202035781A/zh
Application granted granted Critical
Publication of TWI727660B publication Critical patent/TWI727660B/zh

Links

Images

Classifications

    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/30—Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
    • C23C16/34—Nitrides
    • C23C16/345—Silicon nitride
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/02—Pretreatment of the material to be coated
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/04—Coating on selected surface areas, e.g. using masks
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/455—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into reaction chamber or for modifying gas flows in reaction chamber
    • C23C16/45523—Pulsed gas flow or change of composition over time
    • C23C16/45525—Atomic layer deposition [ALD]
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/455—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into reaction chamber or for modifying gas flows in reaction chamber
    • C23C16/45523—Pulsed gas flow or change of composition over time
    • C23C16/45525—Atomic layer deposition [ALD]
    • C23C16/45553—Atomic layer deposition [ALD] characterized by the use of precursors specially adapted for ALD
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02205—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02205—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition
    • H01L21/02208—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si
    • H01L21/02211—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound being a silane, e.g. disilane, methylsilane or chlorosilane
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02299—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment
    • H01L21/02312—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment treatment by exposure to a gas or vapour
    • H01L21/02315—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment treatment by exposure to a gas or vapour treatment by exposure to a plasma
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/0217—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02205—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition
    • H01L21/02208—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H01L21/0228—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition deposition by cyclic CVD, e.g. ALD, ALE, pulsed CVD

Landscapes

  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Materials Engineering (AREA)
  • Mechanical Engineering (AREA)
  • Organic Chemistry (AREA)
  • Metallurgy (AREA)
  • General Chemical & Material Sciences (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Inorganic Chemistry (AREA)
  • Plasma & Fusion (AREA)
  • Chemical Vapour Deposition (AREA)
  • Formation Of Insulating Films (AREA)

Abstract

本發明之某些實施例利用低溫原子層沉積方法來形成含有矽及氮之材料(例如，氮化矽)。原子層沉積使用四碘化矽(SiI4 )或六碘化二矽(Si2 I6 )作為一種前驅物且使用諸如氨之含氮材料作為另一前驅物。在需要氮化矽之選擇性沉積於二氧化矽上方沉積的情形中，基板表面首先用氨電漿處理。

Description

氮化矽之選擇性沉積
本發明係關於用於將氮化矽選擇性沉積至微電子裝置上之方法。
氮化矽通常用於積體電路之製造中。例如，其常常在製造各種諸如記憶體單元、邏輯裝置、記憶體陣列等之微電子裝置中用作絕緣材料。傳統地，氮化矽膜經沉積於整個基板表面上方，儘管該沉積可能僅在某些區域中需要。因此，利用額外微影及蝕刻步驟以移除任何非所需區域。高度需要減少所涉及之微影及蝕刻步驟之數目作為用於減少總製造成本之手段。另外，若僅在需要氮化矽處將其選擇性沉積，則微影中之誤差不影響經塗佈區域之清晰度。
使用氮化矽之選擇性沉積可藉由允許氮化矽僅在所選擇且所需區域中沉積來去除習知圖案化步驟。在ALD或經脈衝之CVD模式中交替使用碘化矽前驅物與交替的熱氮源，我們可優先將氮化矽沉積於現有氮化物表面(例如，氮化矽或氮化鋁)及金屬氧化物表面(例如氧化鋁或氧化鋯)上，而極其有限地沉積於暴露之二氧化矽表面上。另外，我們已發現藉由用氨電漿預處理不同氧化物表面，可將經由四碘化矽及諸如氨之氮化合物之幾奈米氮化矽選擇性沉積於二氧化矽表面上，同時於一些「鄰近」金屬氧化物表面(例如，Al2 O3 及ZrO2 )上實現無沉積或有限沉積。因此，此預處理步驟為「選擇性」氮化物生長之基礎。
本發明提供一種用於將氮化矽層選擇性原子層沉積(ALD)至各種微電子裝置基板上之方法。出於本發明之目的，我們將ALD定義為將各種反應物及共反應物在空間或時間上分離的化學氣相沉積模式，使得將基板可替代地暴露於一種與共反應物分離的反應物。在第一實施例中，本發明提供一種用於將氮化矽選擇性沉積於具有複數個不同組成之表面之微電子裝置基板上的方法，該方法包含在原子層沉積條件下，在約150℃至約400℃之溫度下且在低於約15托之壓力下，使該基板與依序經脈衝之四碘化矽或六碘化二矽及含氮共反應物接觸。在其他實施例中，溫度為約175℃至約350℃，或約200℃至約250℃。當氮化矽膜以某可製造速率沉積於一些暴露之表面上且其他表面接受可忽略或容易移除之氮化矽量時，實現選擇性沉積。
在某些實施例中，微電子裝置表面中之一者將包含氮化物表面，諸如氮化鈦、氮化鋁或氮化矽。在其他實施例中，微電子裝置表面中之一者將包含諸如二氧化矽、氮氧化矽、二氧化鍺、SiCO之介電質表面或低k表面。在一些實施例中，介電質包括二氧化矽。在一些實施例中，介電質為多孔材料。在一些實施例中，多孔介電質含有彼此連接之孔隙，而在其他實施例中，該等孔隙並不彼此連接。在一些實施例中，介電質包含低k材料，其定義為具有低於約4.0之介電值之絕緣體。在一些實施例中，低k材料之介電值低於約3.5、低於約3.0、低於約2.5或低於約2.3。在一些實施例中，第二表面包含Si-O鍵。在一些實施例中，第二表面例如藉由電漿處理去活化。在一些實施例中，第二表面為非導電表面。在某些實施例中，基板包括第一表面，其中一些為介電質且其中一些為金屬相。在一些實施例中，該等表面中之一者為具有高於二氧化矽之k的介電質，諸如氧化鋁、氧化鉿、氧化鋯、氧化鈦、鑭系元素氧化物或此等氧化物中之任一者或全部之混合物。
在某些實施例中，裝置基板由至少一個二氧化矽表面及至少一個氧化鋁表面構成，由此將該氮化矽選擇性沉積於該氧化鋁表面上。
在某些實施例中，裝置基板由至少一個二氧化矽表面及至少一個二氧化鋯表面構成，由此將該氮化矽選擇性沉積於該至少一個二氧化鋯表面上。
在某些實施例中，裝置基板由至少一個二氧化矽表面及至少一個氧化鋁表面構成，裝置表面用氨電漿預處理，且由此將該氮化矽選擇性沉積於該至少一個二氧化矽表面上。
在某些實施例中，裝置基板由至少一個二氧化矽表面及至少一個氧化鉿表面構成，裝置表面用氨電漿預處理，且由此將氮化矽選擇性沉積於該至少一個二氧化矽表面上。
在某些實施例中，裝置基板由至少一個二氧化矽表面及至少一個二氧化鋯表面構成，裝置表面用氨電漿預處理，且由此將該氮化矽選擇性沉積於該至少一個二氧化矽表面上。
在此類實施例中，術語「選擇性沉積」或「選擇性」意欲反映氮化矽於一個表面上之沉積相較於另一表面優先。已由Gladfelter[Chem. Mater. 5,1372(1993)]給出之數值定義為兩個表面之間覆蓋度之差異，經標準化為相同兩個表面之覆蓋度之總和。實務上，製程之選擇性一般取決於膜之厚度。本發明使得在18Å時之選擇性能夠大於90%。在其他實施例中，氮化矽於一個表面上相較於另一表面之優先沉積在超過100Å時以大於95%之發生率發生。
此ALD方法利用使用四碘化矽(SiI4 )或六碘化二矽(Si2 I6 )作為一種「矽」前驅物，且使用含氮材料作為共反應物或作為另一前驅物。含氮材料可為有機的(例如，第三丁基肼)或無機的(例如NH3 )。在一些實施例中，含氮材料之混合物可用作ALD之前驅物，且在其他實施例中，僅一種含氮材料可用作ALD之前驅物(例如，僅NH3 或僅第三丁基肼)。如本文中所使用，術語「含氮材料」可用以指代純(例如，其完全為NH3 或完全為第三丁基肼)前驅物材料，或可指代含有「含氮材料」作為含氮材料之混合物之部分的前驅物。在某些實施例中，ALD可用以形成包括矽及氮之材料。此類材料可包含氮化矽、基本上由氮化矽組成或由氮化矽組成，及/或可具有其他組成。
我們已發現藉由用氨電漿預處理不同氧化物表面，可將經由四碘化矽及諸如氨之氮化合物之幾奈米氮化矽選擇性沉積於二氧化矽表面上，而於一些金屬氧化物表面(例如，Al2 O3 及ZrO2 )上實現無沉積或有限沉積。在需要氮化矽沉積優先在現有氮化矽、氮化鋁或金屬氧化物表面上(但不在二氧化矽表面上)發生之情況下，省略用氨電漿進行之預處理步驟。
在原子層沉積中，依序處理步驟通常被稱作「脈衝」或循環。因此，ALD方法係基於前驅化學物質之受控、自限之表面反應。本發明可用完全飽和反應或(若更可製造)僅前驅物及共反應物之單獨脈衝來實踐。藉由交替且依序使基板與前驅物接觸來實質上避免氣相反應。此可藉由將基板自不同反應物及共反應物之區域移動或藉由在靜止基板上方交替氣體流動來實踐。在兩種情況下，例如藉由在反應物脈衝之間自反應室移除過量反應物及/或反應物副產物使氣相反應物在時間上及在基板表面上彼此分離。在一些實施例中，使一或多個基板表面交替且依序與兩種或大於兩種氣相前驅物或反應物接觸。使基板表面與氣相反應物接觸意謂反應物蒸氣與基板表面接觸有限之時段。換言之，可理解為將基板表面暴露於各氣相反應物有限之時段。
簡言之，通常在約0.5托至15托之減壓下，將包含至少第一表面及第二不同表面之基板加熱至介於150℃至400℃範圍內之適合沉積溫度。在其他實施例中，溫度為約175℃至350℃或200℃至250℃。沉積溫度通常維持低於反應物之熱分解溫度但在溫度足夠高以避免反應物之冷凝且為所需「選擇性」表面反應提供活化能。例示性表面包括諸如氮化矽、氮化鈦及氮化鋁之氮化物及諸如二氧化矽、氧化鋁、氧化鉿及氧化鋯之氧化物。
使基板表面與氣相第一反應物接觸。在某些實施例中，將氣相第一反應物之脈衝提供至含有基板之反應空間。在其他實施例中，將基板移動至含有氣相第一反應物之反應空間。條件通常經選擇以使得不超過約一單層之第一反應物以自限方式經吸附於基板表面上。熟習此項技術者基於特定條件、基板及反應器構形可容易地測定合適接觸時間。諸如藉由用惰性氣體沖洗或藉由移除基板存在之第一反應物而自基板表面中移除(若存在)過量第一反應物及反應副產物。
沖洗意謂諸如藉由用真空泵抽空腔室及/或藉由用諸如氬氣或氮氣之惰性氣體替換反應器內部之氣體而自基板表面移除氣相前驅物及/或氣相副產物。在某些實施例中，沖洗時間為約0.05秒至20秒、在約1秒與10秒之間或在約1秒與2秒之間。然而必要時，諸如在需要跨極高縱橫比結構或具有複雜表面形態之其他結構的高度保形階梯覆蓋的情況下，可採用其他沖洗時間。
使基板表面與氣相第二氣態反應物接觸。在某些實施例中，將第二氣態反應物之脈衝提供至含有基板之反應空間。在其他實施例中，將基板移動至含有氣相第二反應物之反應空間。自基板表面移除(若存在)表面反應之過量第二反應物及氣態副產物。重複接觸及移除之步驟直至已在基板之第一表面上選擇性形成所需厚度之薄膜為止，其中各循環留下不超過約一個分子單層。可包括包含交替且依序使基板之表面與其他反應物接觸之額外階段以形成更複雜之材料，諸如三元材料。
各循環之各階段一般為自限的。在各階段中供應過量反應物前驅物以使易受影響之結構表面飽和。表面飽和確保反應物佔據所有可用反應性位點(受例如物理尺寸或「位阻」限制)，且因此確保極佳階梯覆蓋。通常，少於一個分子層之材料經各循環沉積，然而，在一些實施例中，在循環期間沉積超過一個分子層。
移除過量反應物可包括抽空反應空間之一些內含物及/或經氦氣、氮氣或另一惰性氣體沖洗反應空間。在某些實施例中，沖洗可包含切斷反應氣體之流動同時使惰性載氣繼續流動至反應空間。在另一實施例中，沖洗步驟可採用真空步驟以自表面移除過量反應物。
能夠用以生長薄膜之反應器可用於本文中所描述之沉積。此類反應器包括裝備有用於以「經脈衝之」方式提供前驅物之合適設備及構件的ALD反應器，以及CVD反應器。根據某些實施例，可使用噴頭反應器。
可使用之適合反應器之實例包括市售設備以及自製建構反應器，且將為熟習CVD及/或ALD技術者所已知。
本發明可藉由其某些實施例之以下實例進一步說明，但除非另外具體指示，否則應理解此等實例僅出於說明之目的包括在內且不意欲限制本發明之範疇。
實驗部分 實例 1 在此實例中，將SiN相對於基板之第三不同表面選擇性沉積於基板之第一表面及第二表面上。在此實例中，基板之第一表面包含藉由ALD沉積之Al2 O3 且基板之第二表面包含經ALD沉積之ZrO2 ，且第三不同表面包含天然氧化矽(在環境條件下生長於拋光單晶矽表面上)。
藉由ALD製程使用四碘化矽(SiI4 )作為第一前驅物且使用NH3 作為第二前驅物選擇性沉積SiN膜。SiI4 容納於ProE-Vap安瓿中且經加熱至100℃。N2 載氣在固體SiI4 之表面上方流動，將SiI4 蒸氣帶入具有基板之加熱腔室中。在200℃之溫度及1.5托之反應室壓力下對基板進行各沉積循環。各沉積循環包括10秒SiI4 蒸氣脈衝、10秒惰性N2 淨化、10秒NH3 脈衝及10秒惰性N2 淨化。參考圖1，對於由100個沉積循環組成之ALD製程，沉積於Al2 O3 及ZrO2 (兩者均藉由ALD沉積)上之SiN相對於天然氧化矽之選擇性比率在高k膜上沉積18Å時為90%。
實例 2 在此實例中，將SiN相對於基板之第二及第三不同表面選擇性沉積於基板之第一表面上。該基板之該第一表面包含天然氧化矽。基板之第二表面包含藉由ALD沉積之Al2 O3 。第三表面包含藉由ALD沉積之ZrO2 。在SiN沉積之前，使基板經受NH3 電漿處理製程。
使用與實例1中所描述之相同製程，藉由ALD製程使用四碘化矽(SiI4 )作為第一前驅物且使用NH3 作為第二前驅物選擇性沉積SiN膜。使用由100至200個沉積循環組成之ALD製程沉積樣品。如圖2中所說明，量測沉積於第一經電漿處理之天然氧化矽表面上的材料的厚度且將其與沉積於第二及第三經電漿處理之Al2 O3 及ZrO2 表面上的材料的厚度進行比較。圖2展示SiN於包含經電漿處理之天然氧化矽之第一表面上的沉積相對於經電漿處理之Al2 O3 及ZrO2 表面具有極高選擇性。(選擇性超過95%)。
圖1為在200℃下於如所描繪之各種氧化物基板上之氮化矽(SiI4 /NH3 )沉積的圖示。相對於循環數目繪製以埃為單位之厚度。
圖2為在200℃下於如所描繪之各種氧化物表面上之氮化矽(SiI4 /NH3 )沉積的圖示，其中各氧化物表面已用銨電漿預處理。相對於循環數目繪製以埃為單位之厚度。

Claims (10)

  1. 一種用於在具有複數個不同組成之表面之微電子裝置基板上選擇性沉積氮化矽的方法，該方法包含在原子層沉積條件下，在約150℃至約400℃之溫度下且在低於約15托之壓力下，使該基板與依序經脈衝之四碘化矽或六碘化二矽及含氮共反應物接觸，其中該方法進一步包含用氨電漿預處理該基板之步驟。
  2. 如請求項1之方法，其中該溫度為約175℃至約350℃。
  3. 如請求項1之方法，其中該溫度為約200℃至約250℃。
  4. 如請求項1之方法，其中待沉積於其上之該表面係選自二氧化矽、二氧化鍺、SiCO及低k基板。
  5. 如請求項1之方法，其中該溫度為約200℃至約250℃，且待沉積於其上之該表面不同於二氧化矽。
  6. 如請求項1之方法，其中該裝置基板包含選自氮化矽、氮化鈦、氮化鉭及氮化鋁、氧化鉿、氧化鋯、氧化鋁及其組合之一些表面，該等表面相比於同一基板上選自具有抑制之氮化矽沉積的二氧化矽、二氧化鍺、SiCO及低k基板的其他表面具有增強之氮化矽沉積。
  7. 如請求項1之方法，其中該裝置基板由至少一個二氧化矽表面及至少一個氧化鋁表面構成，由此將該氮化矽選擇性沉積於該至少一個氧化鋁表面上。
  8. 如請求項1之方法，其中該裝置基板由至少一個二氧化矽表面及至少一個二氧化鋯表面構成，由此將該氮化矽選擇性沉積於該至少一個二氧化鋯表面上。
  9. 如請求項1之方法，其中該含氮前驅化合物係選自氨、二甲基肼、第三丁基肼、甲基肼或其混合物。
  10. 如請求項1之方法，其中將Si源在安瓿中加熱以用於汽化。
TW109104749A 2019-02-14 2020-02-14 氮化矽之選擇性沉積 TWI727660B (zh)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US201962805644P 2019-02-14 2019-02-14
US62/805,644 2019-02-14
US201962808020P 2019-02-20 2019-02-20
US62/808,020 2019-02-20

Publications (2)

Publication Number Publication Date
TW202035781A TW202035781A (zh) 2020-10-01
TWI727660B true TWI727660B (zh) 2021-05-11

Family

ID=72040812

Family Applications (1)

Application Number Title Priority Date Filing Date
TW109104749A TWI727660B (zh) 2019-02-14 2020-02-14 氮化矽之選擇性沉積

Country Status (6)

Country Link
US (1) US11380539B2 (zh)
JP (2) JP7286780B2 (zh)
KR (1) KR20210106003A (zh)
CN (2) CN117265500A (zh)
TW (1) TWI727660B (zh)
WO (1) WO2020167972A1 (zh)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10988490B1 (en) * 2019-10-03 2021-04-27 Entegris, Inc. Triiodosilylamine precursor compounds
US20230187202A1 (en) * 2021-12-15 2023-06-15 Entegris, Inc. Deposition of silicon nitride with enhanced selectivity

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW200525612A (en) * 2003-10-31 2005-08-01 Aviza Tech Inc Low temperature deposition of silicon nitride
TW201812084A (zh) * 2016-08-12 2018-04-01 美光科技公司 藉由原子層沉積形成氮化矽之方法、相關之半導體結構及形成半導體結構的方法、及用於原子層沉積的矽前驅物
TW201843345A (zh) * 2017-05-08 2018-12-16 荷蘭商Ａｓｍ智慧財產控股公司 用於在基板上選擇性地形成氮化矽膜之方法及相關半導體裝置結構

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050145177A1 (en) * 2003-12-30 2005-07-07 Mcswiney Michael Method and apparatus for low temperature silicon nitride deposition
US7338826B2 (en) 2005-12-09 2008-03-04 The United States Of America As Represented By The Secretary Of The Navy Silicon nitride passivation with ammonia plasma pretreatment for improving reliability of AlGaN/GaN HEMTs
KR20110098579A (ko) * 2010-02-26 2011-09-01 전자부품연구원 질화물 반도체 소자 및 표면 전처리를 통한 질화물 반도체 소자 제조 방법
US20120213940A1 (en) * 2010-10-04 2012-08-23 Applied Materials, Inc. Atomic layer deposition of silicon nitride using dual-source precursor and interleaved plasma
US9824881B2 (en) * 2013-03-14 2017-11-21 Asm Ip Holding B.V. Si precursors for deposition of SiN at low temperatures
US9355837B2 (en) 2014-09-25 2016-05-31 Micron Technology, Inc. Methods of forming and using materials containing silicon and nitrogen
CN107533951B (zh) * 2015-05-01 2021-10-26 应用材料公司 使用表面封端化学性质的薄膜电介质的选择性沉积
US10121699B2 (en) 2015-08-05 2018-11-06 Asm Ip Holding B.V. Selective deposition of aluminum and nitrogen containing material
WO2017052905A1 (en) * 2015-09-22 2017-03-30 Applied Materials, Inc. Apparatus and method for selective deposition
US10176984B2 (en) * 2017-02-14 2019-01-08 Lam Research Corporation Selective deposition of silicon oxide
US10242866B2 (en) * 2017-03-08 2019-03-26 Lam Research Corporation Selective deposition of silicon nitride on silicon oxide using catalytic control
US10043656B1 (en) * 2017-03-10 2018-08-07 Lam Research Corporation Selective growth of silicon oxide or silicon nitride on silicon surfaces in the presence of silicon oxide
US9911595B1 (en) * 2017-03-17 2018-03-06 Lam Research Corporation Selective growth of silicon nitride
WO2019028136A1 (en) * 2017-08-04 2019-02-07 Lam Research Corporation SELECTIVE DEPOSITION OF SILICON NITRIDE ON HORIZONTAL SURFACES
TWI821283B (zh) * 2018-04-29 2023-11-11 美商應用材料股份有限公司 沉積方法

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW200525612A (en) * 2003-10-31 2005-08-01 Aviza Tech Inc Low temperature deposition of silicon nitride
TW201812084A (zh) * 2016-08-12 2018-04-01 美光科技公司 藉由原子層沉積形成氮化矽之方法、相關之半導體結構及形成半導體結構的方法、及用於原子層沉積的矽前驅物
TW201843345A (zh) * 2017-05-08 2018-12-16 荷蘭商Ａｓｍ智慧財產控股公司 用於在基板上選擇性地形成氮化矽膜之方法及相關半導體裝置結構

Also Published As

Publication number Publication date
KR20210106003A (ko) 2021-08-27
CN117265500A (zh) 2023-12-22
US11380539B2 (en) 2022-07-05
JP2023116517A (ja) 2023-08-22
CN113423864B (zh) 2023-11-07
CN113423864A (zh) 2021-09-21
JP2022523159A (ja) 2022-04-21
US20200266048A1 (en) 2020-08-20
WO2020167972A1 (en) 2020-08-20
TW202035781A (zh) 2020-10-01
JP7286780B2 (ja) 2023-06-05

Similar Documents

Publication Publication Date Title
JP7300032B2 (ja) 酸化物薄膜の堆積
KR102377746B1 (ko) 소수성 전구체들을 사용한 선택적 퇴적
JP6813983B2 (ja) アルミニウム及び窒素を含む材料の選択的堆積
KR102185458B1 (ko) 선택적 퇴적
TWI685584B (zh) 用於積體電路製造的方法
TWI426547B (zh) 用於批次原子層沈積反應器之處理製程
US7247581B2 (en) Methods for treating pluralities of discrete semiconductor substrates
WO2001045158A1 (en) Apparatus and concept for minimizing parasitic chemical vapor deposition during atomic layer deposition
JP2009544849A (ja) 膜形成装置のクリーニング方法および膜形成装置
KR20210043745A (ko) 선택적 산화알루미늄 막 증착
JP2023116517A (ja) 窒化ケイ素の選択的堆積
US20230187202A1 (en) Deposition of silicon nitride with enhanced selectivity
US10269560B2 (en) Atomic layer deposition method for manufacturing semiconductor structure
US20140231930A1 (en) Atomic Layer Deposition of Hafnium or Zirconium Alloy Films
TW202342787A (zh) 區域選擇性碳基薄膜沉積
Chang High-k gate dielectric deposition technologies
TW202132600A (zh) 蝕刻或沉積之方法