TWI715055B - 一種類扇出多元件混合積體軟性微系統及其製備方法 - Google Patents

一種類扇出多元件混合積體軟性微系統及其製備方法 Download PDF

Info

Publication number
TWI715055B
TWI715055B TW108119095A TW108119095A TWI715055B TW I715055 B TWI715055 B TW I715055B TW 108119095 A TW108119095 A TW 108119095A TW 108119095 A TW108119095 A TW 108119095A TW I715055 B TWI715055 B TW I715055B
Authority
TW
Taiwan
Prior art keywords
wafer
soft
chip
microsystem
array
Prior art date
Application number
TW108119095A
Other languages
English (en)
Other versions
TW202000577A (zh
Inventor
王瑋
董曉
Original Assignee
北京大學
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 北京大學 filed Critical 北京大學
Publication of TW202000577A publication Critical patent/TW202000577A/zh
Application granted granted Critical
Publication of TWI715055B publication Critical patent/TWI715055B/zh

Links

Images

Classifications

    • BPERFORMING OPERATIONS; TRANSPORTING
    • B81MICROSTRUCTURAL TECHNOLOGY
    • B81BMICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
    • B81B7/00Microstructural systems; Auxiliary parts of microstructural devices or systems
    • B81B7/02Microstructural systems; Auxiliary parts of microstructural devices or systems containing distinct electrical or optical devices of particular relevance for their function, e.g. microelectro-mechanical systems [MEMS]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5387Flexible insulating substrates
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B81MICROSTRUCTURAL TECHNOLOGY
    • B81BMICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
    • B81B7/00Microstructural systems; Auxiliary parts of microstructural devices or systems
    • B81B7/0006Interconnects
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B81MICROSTRUCTURAL TECHNOLOGY
    • B81BMICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
    • B81B7/00Microstructural systems; Auxiliary parts of microstructural devices or systems
    • B81B7/0032Packages or encapsulation
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B81MICROSTRUCTURAL TECHNOLOGY
    • B81CPROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C1/00Manufacture or treatment of devices or systems in or on a substrate
    • B81C1/00015Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
    • B81C1/00222Integrating an electronic processing unit with a micromechanical structure
    • B81C1/0023Packaging together an electronic processing unit die and a micromechanical structure die
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B81MICROSTRUCTURAL TECHNOLOGY
    • B81CPROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C1/00Manufacture or treatment of devices or systems in or on a substrate
    • B81C1/00015Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
    • B81C1/00261Processes for packaging MEMS devices
    • B81C1/00301Connecting electric signal lines from the MEMS device with external electrical signal lines, e.g. through vias
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/12Mountings, e.g. non-detachable insulating substrates
    • H01L23/14Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
    • H01L23/145Organic substrates, e.g. plastic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L25/0655Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00 the devices being arranged next to each other
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/16Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B81MICROSTRUCTURAL TECHNOLOGY
    • B81BMICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
    • B81B2201/00Specific applications of microelectromechanical systems
    • B81B2201/02Sensors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68345Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used as a support during the manufacture of self supporting substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68359Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used as a support during manufacture of interconnect decals or build up layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68368Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used in a transfer process involving at least two transfer steps, i.e. including an intermediate handle substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04105Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/18High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L2224/23Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
    • H01L2224/24Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
    • H01L2224/241Disposition
    • H01L2224/24135Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/24137Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Micromachines (AREA)

Abstract

本發明揭露了一種類扇出多元件混合積體軟性微系統及其製備方法,屬於微電子領域。該軟性微系統採用微機電系統(MEMS)晶片和/或積體電路(IC)晶片作為元件單元,元件單元之間採用由聚合物填充的軟性隔離槽作為軟性連接,元件單元之間的電互聯由金屬佈線層實現。本發明採用類扇出方法完成的多元件混合積體軟性微系統既保留了矽基元件優良的電學性能,又實現了微系統整體的軟性,而且結構穩定、性能可靠。

Description

一種類扇出多元件混合積體軟性微系統及其製備方法
本發明涉及半導體製造領域,具體來講涉及一種多元件混合積體軟性微系統及其製備方法。
扇出型封裝技術是基於晶圓重構技術,將晶片重新佈置到一塊人工晶圓上進行封裝的圓片級封裝技術。該方法可以完成更小更薄的封裝,實現多元件的混合積體,而且可以藉由批次加工提高效率、降低成本。該方法在便携式電子產品晶片的封裝、儲存器晶片封裝等領域具有十分廣泛的應用。
軟性電子是將有機/無機材料電子元件製作在軟性材料上的電子技術。由於其獨特的軟性/延展性以及高效、低成本製造製程,軟性電子技術在訊息、能源、醫療、國防等領域具有廣泛應用前景。目前,軟性電子主要有兩種製備策略:一種是直接利用軟性功能材料實現電子元件的軟性化;另一種是藉由轉印的方式把電子元件轉移到軟性基底上。對於前一種方法,有機半導體材料的製備是關鍵基礎。由於有機半導體具有軟性特點,因而該方法軟性化製程簡單,容易實現印刷、圖案化、薄膜化成型,進而形成軟性電子元件。但就目前已知的有機半導體而言,遷移率不高仍是限制其性能的重要因素。例如,最近報導的一種彈性有機半導體材料,在從原長度拉伸至原長度兩倍的過程中,可以一直保持遷移率大於1.0cm2/V‧s,但這仍然遠小於矽的載流子遷移率 (102-103cm2/V‧s)。相比於有機半導體材料,以矽為代表的無機半導體材料不僅具有更高的遷移率,而且已經形成了一套成熟的製備製程。採用合適的方法實現矽基結構的軟性化可以獲得高性能的軟性電子元件。對於後一種方法,核心思路是應用具有較小厚度(<10μm)的矽結構,在彈性體輔助下實現三維拓撲變化,獲得具有軟性的矽基元件,但對於MEMS這種具有複雜結構的元件,較小的厚度會影響元件的結構强度,不便採用上述方法形成結構可靠的軟性電子元件。
為此,需要發明一種軟性微系統加工技術,實現具有優良電學性能的高可靠性軟性電子的加工。
針對現在軟性電子製備方法中存在的技術問題,本發明的目的在於提供一種類扇出多元件混合積體軟性微系統及其製備方法,既可以保證軟性電子元件有良好的電學性能,又可以保證複雜軟性電子元件具有足夠可靠的結構强度。
本發明解決其技術問題所採用的技術方案是:
一種類扇出多元件混合積體軟性微系統,採用微機電系統(MEMS)晶片和/或積體電路(IC)晶片作為元件單元,所述元件單元之間採用由聚合物填充的軟性隔離槽作為軟性連接,所述元件單元之間的電互聯由金屬佈線層實現。
進一步地,所述的微機電系統(MEMS)晶片或積體電路(IC)晶片來自於同一批次或不同批次的流片過程;所述微機電系統(MEMS)晶片為矽基板上多個感測單元組成的感測陣列經蝕刻後形成的陣列化感測晶片;所 述積體電路(IC)晶片為單個電路晶片或矽基板上多個電路單元組成的電路陣列經蝕刻後形成的陣列化電路晶片。
進一步地,所述的聚合物為包括聚對二甲苯(Parylene)在內的任意可化學氣相沉積的軟性材料。
進一步地,所述的軟性隔離槽為以相同的間隔均勻分佈於元件單元之間的由所述聚合物填充的高深寬比隔離槽;同時可以對矽基板進行深蝕刻至釋放所有隔離槽之間的殘餘矽,並澱積所述聚合物以實現元件單元之間的全聚合物軟性連接。
進一步地,所述的軟性連接能夠實現剛性元件單元之間的軟性互連和表面平面化功能。
進一步地,所述金屬佈線層是單層或多層,當金屬佈線層是多層時,每層之間澱積軟性材料作為電隔離。
相應地,本發明提供了上述類扇出多元件混合積體軟性微系統製備方法,該方法包括以下步驟:1)在矽片正面製作晶片定位用的圖形;2)將矽基板上多個感測單元組成的感測陣列、單個電路晶片或矽基板上多個電路單元組成的電路陣列正面黏貼到所述矽片正面對應位置;3)對所述黏貼了晶片的矽片表面甩膠,並黏貼到另一片作為臨時載片的矽片正面;4)剝離掉所述晶片正面的矽片,暴露出晶片正面; 5)對臨時載片上晶片正面進行光刻,藉由深蝕刻方式形成隔離槽,獲得由感測陣列分離成的陣列式微機電系統(MEMS)晶片以及由電路陣列分離成的陣列式積體電路(IC)晶片;6)對臨時載片上晶片正面澱積一定厚度的聚合物以填充所述隔離槽形成軟性連接結構;7)對臨時載片上晶片正面進行光刻,藉由氧等離子體蝕刻所述澱積的聚合物,在晶片正面對應的引線之間形成互連窗口;8)對臨時載片上晶片正面進行光刻和濺射種子層,由電鍍金屬製備相應的所述引線之間的金屬佈線層,完成微機電系統(MEMS)晶片與積體電路(IC)晶片之間的電學互連;9)對臨時載片上晶片正面澱積一定厚度的聚合物作為電隔離保護,進行光刻並藉由氧等離子體蝕刻所述澱積的聚合物以獲得金屬佈線層與外界的引線接口;10)將臨時載片上晶片正面黏貼到另一矽基板上,並剝離掉臨時載片;11)對矽基板上晶片背面進行光刻,蝕刻所述隔離槽下部以及隔離槽之間的殘餘矽並澱積一定厚度的聚合物做保護,形成多元件混合積體軟性微系統。
進一步地,步驟3)在對所述黏貼了晶片的矽片表面甩膠後,黏貼臨時載片前,可以使用CMP對晶片背面減薄至適當厚度。
本發明的有益效果是:
(一)本發明揭露的技術方案可以實現多種不同元件的軟性混合積體,形成一個具有完整功能的軟性微系統。
(二)與現有的軟性電子軟性化技術方案相比,本發明採用矽基晶片作為功能單元,因而電路具有優良的電學性能;本發明所用的晶片不需要減薄至很薄,從而能保證了複雜結構晶片的結構强度與正常工作。
1、21、22:晶片
2:陣列晶片
3:軟性材料
4:金屬佈線層
5:孔
6:定位圖形
7、8:黏接材料
9:隔離槽
41:焊點
01:轉移載片
02:臨時載片
03:矽基板
第1圖是本發明類扇出多元件混合積體軟性微系統結構示意圖。
第2圖是本發明實施例中形成轉移載片上定位圖形的縱剖面結構示意圖。
第3圖是本發明實施例中將晶片正面黏接到轉移在片上的縱剖面結構示意圖。
第4圖是本發明實施例中將晶片背面黏接到臨時載片上的縱剖面結構示意圖。
第5圖是本發明實施例中將晶片與轉移載片分離後的縱剖面結構示意圖。
第6圖是本發明實施例中在陣列晶片正面蝕刻軟性槽並澱積軟性材料後的縱剖面結構示意圖。
第7圖是本發明實施例中在軟性材料表面完成金屬佈線層後的剖面結構示意圖。
第8圖是本發明實施例中在金屬佈線層表面澱積軟性材料並蝕刻軟性材料暴露出金屬佈線層上與外部電互聯的焊盤後的剖面結構示意圖。
第9圖是本發明實施例中剝離掉晶片背面的臨時載片並蝕刻掉軟性槽下面和軟性槽內殘留的矽基板後的剖面結構示意圖。
第10圖是本發明實施例中在晶片背面澱積軟性材料後的剖面結構示意圖。
下文藉由具體實施例並配合附圖,對本發明做詳細的說明。所述實施例的示例在所附圖中示出,其中自始至終相同或類似的標號表示相同或類似的元件。下面藉由參考附圖描述的實施例是示例性的,僅用於解釋本發明,而不能解釋為對本發明的限制。
本實施例提供了一種類扇出多元件混合積體軟性微系統的結構,參見第1圖,包括至少兩種晶片(其它實施例中也可以採用一種晶片),1是一種晶片,21與22是另一種陣列晶片2分成的兩個晶片,各晶片之間由軟性材料3連接。晶片正面是進行過微加工且需要電互聯的表面,晶片之間的電互聯由晶片正面的金屬佈線層4完成,晶片與金屬佈線層表面均有軟性材料3包裹保護,金屬佈線層4中需要與外部進行電學接觸的焊點41表面的軟性材料3會被去除,形成孔5,從而暴露出焊點41。
本實施例的類扇出多元件混合積體軟性微系統的加工步驟為:
(1)在轉移載片01的表面加工定位圖形6,如第2圖所示。可以採用在轉移載片01表面濺射或蒸發一層金屬,然後進行光刻、腐蝕、去膠的方法製備定位圖形6。
(2)使用黏接材料7將晶片1與陣列晶片2黏接到轉移載片01的表面,如第3圖。其中陣列晶片2由兩個連接在一起的相同晶片21與22組成,晶片正面向下。
(3)使用另一種黏接材料8將晶片背面黏接到臨時載片02上,如第4圖。
(4)將轉移載片01與黏接材料7去除,使晶片1的正面與陣列晶片2的正面露出,如第5圖。
(5)在陣列晶片2正面光刻並蝕刻出隔離槽9,使晶片2分為兩個相同的晶片21與22,然後澱積軟性材料3,如第6圖。
(6)蝕刻晶片正面上電互聯用焊盤上的軟性材料3並加工金屬,形成金屬佈線層4,金屬佈線層可以藉由光刻、澱積種子層、電鍍金屬、剝離光刻膠的方法加工,結果如第7圖。
(7)在金屬佈線層4表面再澱積軟性材料,然後光刻並蝕刻軟性材料,形成孔5,露出金屬佈線層上與外部電互聯的焊盤41,如第8圖。
(8)在晶片正面黏貼矽基板03,並去除臨時載片02與黏接材料8,然後藉由光刻、蝕刻去除隔離槽9下面以及內部殘留的矽,陣列晶片2被完全分為兩個由軟性材料連接的相同晶片21與22,如第9圖。
(9)去除矽基板03,並在晶片1、21、22背面澱積軟性材料3,最終形成由軟性材料3包裹並連接在一起的晶片1、21、22,晶片之間的電互聯由金屬佈線層4完成。
以上實施例僅用以說明本發明的技術方案而非對其進行限制,本領域的普通技術人員可以對本發明的技術方案進行修改或者等同替換,而不脫離本發明的精神和範圍,本發明的保護範圍應以申請專利範圍書所述為準。
1:晶片
3:軟性材料
4:金屬佈線層
5:孔
21、22:晶片
41:焊點

Claims (8)

  1. 一種類扇出多元件混合積體軟性微系統,其中該微系統採用陣列晶片,且該陣列晶片之間採用由聚合物填充的軟性隔離槽作為軟性連接,並且由軟性材料包裹並連接在一起的該陣列晶片,藉此該軟性材料嵌入該陣列晶片,而該陣列晶片之間的電互聯由金屬佈線層實現。
  2. 如申請專利範圍第1項所述的類扇出多元件混合積體軟性微系統,其中該陣列晶片包含微機電系統晶片和積體電路晶片且該微機電系統晶片或積體電路晶片來自於同一批次或不同批次的流片過程;該微機電系統晶片為矽基板上複數個感測單元組成的感測陣列經蝕刻後形成的陣列化感測晶片;該積體電路晶片為單個電路晶片或矽基板上複數個電路單元組成的電路陣列經蝕刻後形成的陣列化電路晶片。
  3. 如申請專利範圍第1項所述的類扇出複數個元件混合積體軟性微系統,其中該聚合物為包括聚對二甲苯在內的任意可化學氣相沉積的軟性材料。
  4. 如申請專利範圍第1項所述的類扇出複數個元件混合積體軟性微系統,其中該軟性隔離槽為以相同的間隔均勻分佈於該元件單元之間的由該聚合物填充的高深寬比隔離槽;藉由對矽基板進行深蝕刻至釋放所有隔離槽之間的殘餘矽,並澱積該聚合物以實現元件單元之間的全聚合物軟性連接。
  5. 如申請專利範圍第1項所述的類扇出複數個元件混合積體軟性微系統,其中該軟性連接能夠實現剛性元件單元之間的軟性互連和表面平面化功能。
  6. 如申請專利範圍第1項所述的類扇出複數個元件混合積體軟性微系統,其中該金屬佈線層是單層或多層,當金屬佈線層是複數層時,每層之間澱積軟性材料作為電隔離。
  7. 一種如申請專利範圍第1項所述的類扇出多元件混合積體軟性微系統的製備方法,其步驟包括:在矽片正面製作晶片定位用的圖形;將矽基板上複數個感測單元組成的感測陣列、單個電路晶片或矽基板上複數個電路單元組成的電路陣列正面黏貼到該矽片正面對應位置;對該黏貼了晶片的矽片表面甩膠,並黏貼到另一片作為臨時載片的矽片正面;剝離掉該晶片正面的矽片,暴露出晶片正面;對臨時載片上晶片正面進行光刻,藉由深蝕刻方式形成隔離槽,獲得由感測陣列分離成的陣列式微機電系統晶片以及由電路陣列分離成的陣列式積體電路晶片;對臨時載片上晶片正面澱積一定厚度的聚合物以填充該隔離槽形成軟性連接結構;對臨時載片上晶片正面進行光刻,藉由氧等離子體蝕刻該澱積的聚合物,在晶片正面對應的引線之間形成互連窗口;對臨時載片上晶片正面進行光刻和濺射種子層,由電鍍金屬製備相應的該引線之間的金屬佈線層,完成微機電系統晶片與積體電路晶片之間的電學互連;對臨時載片上晶片正面澱積一定厚度的聚合物作為電隔離保護, 進行光刻並藉由氧等離子體蝕刻該澱積的聚合物以獲得金屬佈線層與外界的引線接口;將臨時載片上晶片正面黏貼到另一矽基板上,並剝離掉臨時載片;對矽基板上晶片背面進行光刻,蝕刻該隔離槽下部以及隔離槽之間的殘餘矽並澱積一定厚度的聚合物做保護,形成複數個元件混合積體軟性微系統。
  8. 如申請專利範圍第7項所述的方法,其中在對該黏貼了晶片的矽片表面甩膠後,黏貼臨時載片前,使用CMP對晶片背面減薄至適當厚度。
TW108119095A 2018-06-08 2019-05-31 一種類扇出多元件混合積體軟性微系統及其製備方法 TWI715055B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201810586370.6 2018-06-08
CN201810586370.6A CN108996464B (zh) 2018-06-08 2018-06-08 一种类扇出多器件混合集成柔性微系统及其制备方法

Publications (2)

Publication Number Publication Date
TW202000577A TW202000577A (zh) 2020-01-01
TWI715055B true TWI715055B (zh) 2021-01-01

Family

ID=64600369

Family Applications (1)

Application Number Title Priority Date Filing Date
TW108119095A TWI715055B (zh) 2018-06-08 2019-05-31 一種類扇出多元件混合積體軟性微系統及其製備方法

Country Status (4)

Country Link
US (1) US11296033B2 (zh)
CN (1) CN108996464B (zh)
TW (1) TWI715055B (zh)
WO (1) WO2019233072A1 (zh)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110371920B (zh) * 2019-07-12 2023-09-08 北京机械设备研究所 抑制ndir气体传感器振动敏感性的方法及装置
CN111717885B (zh) * 2020-05-20 2023-10-31 北京协同创新研究院 一种硅基微纳结构柔性化加工方法
CN112864100B (zh) * 2021-01-14 2022-03-22 北京大学深圳研究生院 三维异质集成的柔性封装结构及制造方法
CN113113540B (zh) * 2021-03-01 2022-11-11 北京大学 一种柔性混合电子系统加工方法和柔性混合电子系统
US20230326791A1 (en) * 2022-04-11 2023-10-12 Applied Materials, Inc. Self field-suppression cvd tungsten (w) fill on pvd w liner

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW201539699A (zh) * 2014-04-09 2015-10-16 Zhuhai Advanced Chip Carriers & Electronic Substrate Solutions Technologies Co Ltd 嵌入式芯片的製造方法
CN105448648A (zh) * 2014-07-30 2016-03-30 北大方正集团有限公司 一种晶片流片方法

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20020182778A1 (en) 2001-05-29 2002-12-05 Pei-Wei Wang Flexible package fabrication method
US7843022B2 (en) * 2007-10-18 2010-11-30 The Board Of Trustees Of The Leland Stanford Junior University High-temperature electrostatic transducers and fabrication method
CN101445216B (zh) * 2008-12-04 2012-03-28 北京大学 分体式微机电系统及其制备方法
CN202003990U (zh) * 2011-01-31 2011-10-05 江阴长电先进封装有限公司 低成本芯片扇出结构
CN102543924A (zh) 2011-12-31 2012-07-04 桂林电子科技大学 基于s型铜布线的芯片级三维柔性封装结构
CN103681458B (zh) 2012-09-03 2016-06-01 华进半导体封装先导技术研发中心有限公司 一种制作嵌入式超薄芯片的三维柔性堆叠封装结构的方法
CN103274350B (zh) * 2013-05-16 2016-02-10 北京大学 一种基于Parylene填充的隔热结构及其制备方法
CN205016513U (zh) * 2014-10-24 2016-02-03 胡迪群 具有封装胶体支撑的电路重新分布层结构
CN105161465A (zh) * 2015-08-10 2015-12-16 中芯长电半导体(江阴)有限公司 晶圆级芯片封装方法
CN105957836A (zh) * 2016-06-01 2016-09-21 格科微电子(上海)有限公司 半导体器件的扇出型晶圆级封装方法
CN106025050A (zh) 2016-06-08 2016-10-12 中国电子科技集团公司第五十八研究所 一种柔性共形封装结构
CN106684003B (zh) 2016-12-29 2019-03-29 清华大学 扇出型封装结构及其制作方法
CN206955629U (zh) 2017-05-27 2018-02-02 北京万应科技有限公司 芯片晶圆及微机电系统
CN107452702A (zh) * 2017-07-28 2017-12-08 中芯长电半导体(江阴)有限公司 半导体芯片的封装结构及封装方法
US10340253B2 (en) * 2017-09-26 2019-07-02 Taiwan Semiconductor Manufacturing Co., Ltd. Package structure and method of manufacturing the same

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW201539699A (zh) * 2014-04-09 2015-10-16 Zhuhai Advanced Chip Carriers & Electronic Substrate Solutions Technologies Co Ltd 嵌入式芯片的製造方法
CN105448648A (zh) * 2014-07-30 2016-03-30 北大方正集团有限公司 一种晶片流片方法

Also Published As

Publication number Publication date
CN108996464B (zh) 2020-05-22
CN108996464A (zh) 2018-12-14
WO2019233072A1 (zh) 2019-12-12
US11296033B2 (en) 2022-04-05
TW202000577A (zh) 2020-01-01
US20210358853A1 (en) 2021-11-18

Similar Documents

Publication Publication Date Title
TWI715055B (zh) 一種類扇出多元件混合積體軟性微系統及其製備方法
US6506664B1 (en) Method of transferring ultra-thin substrates and application of the method to the manufacture of a multi-layer thin film device
KR101746269B1 (ko) 반도체 디바이스 및 그 제조방법
EP2712491B1 (en) Flexible electronic structure
TWI408784B (zh) 積體電路微模組
TWI469229B (zh) 製造積體電路系統的方法
CN106997855A (zh) 集成电路封装件及其形成方法
TWI352412B (en) Multi-chip package structure and method of fabrica
CN102217063A (zh) 用于功率器件的晶片级别芯片级封装的半导体管芯结构、使用其的封装及系统、以及其制造方法
JP2007260866A (ja) 半導体装置およびその製造方法
KR20040047653A (ko) 반도체장치 및 그 제조방법
CN110491853A (zh) 一种硅基三维扇出集成封装方法及结构
US11943864B2 (en) Stretchable/conformable electronic and optoelectronic circuits, methods, and applications
CN110364443A (zh) 半导体器件和制造方法
CN110323197A (zh) 用于超高密度芯片FOSiP封装的结构及其制备方法
CN107107600A (zh) 设置便于组装的超小或超薄分立元件
JP4020367B2 (ja) 半導体装置の製造方法
TW201924015A (zh) 半導體元件及其製造方法
WO2022183584A1 (zh) 一种柔性混合电子系统加工方法和柔性混合电子系统
CN108336019A (zh) 一种晶圆级封装中形成导电插塞的方法及晶圆级封装结构
CN111717885B (zh) 一种硅基微纳结构柔性化加工方法
CN106252345A (zh) 指纹传感器模组及其制作方法
CN207217505U (zh) 半导体结构及扇出型封装结构
US9202801B2 (en) Thin substrate and mold compound handling using an electrostatic-chucking carrier
US7875479B2 (en) Integration structure of semiconductor circuit and microprobe sensing elements and method for fabricating the same