TWI706510B - 將微裝置整合並接合於系統基板 - Google Patents

將微裝置整合並接合於系統基板 Download PDF

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TWI706510B
TWI706510B TW107140378A TW107140378A TWI706510B TW I706510 B TWI706510 B TW I706510B TW 107140378 A TW107140378 A TW 107140378A TW 107140378 A TW107140378 A TW 107140378A TW I706510 B TWI706510 B TW I706510B
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bonding
nanostructures
metal
etching
substrate
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TW107140378A
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TW201923976A (zh
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格拉姆瑞札 查吉
巴哈瑞 塞德吉瑪奇
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加拿大商弗瑞爾公司
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Abstract

本發明係關於將光電微裝置整合於一系統基板中以用於在低溫下兩個基板之間的有效且持久電接合。2D奈米結構及3D支架可針對改良接合性質產生互鎖結構。將奈米粒子添加至該結構中針對更佳導電產生高表面積。在微裝置及接收基板之對準之前或之後，施加固化劑進一步協助形成強接合。

Description

將微裝置整合並接合於系統基板
本發明係關於使用可改良良率及表面輪廓之一低成本且可靠之方法將微裝置接合至其他基板。更具體言之，可在使用或不使用主體介質的情況下使用2D及3D奈米結構增大且互鎖接合區域。
本發明之若干實施例係關於在接收及/或微裝置基板上形成導電、撓性且熱穩定2D及3D奈米結構，以用於有效接合定位於一施體基板上之微裝置。除了改良之形態參數(諸如表面構形、表面輪廓及結晶度)外，增強兩個基板(施體基板及接收基板)之間的物理性質(諸如導電性、熱穩定性及可靠性)。該等微裝置之減小之像素節距利用對於有效及可靠接合而言至關重要之奈米結構。
微裝置陣列可包括微發光二極體(LED)、有機LED (OLED)、感測器、固態裝置、積體電路、(微機電系統) MEMS及/或其他電子組件。該接收基板之候選者包含但不限於一印刷電路板(PCB)、薄膜電晶體背板及積體電路基板。在光學微裝置(諸如LED)的情況中，該接收基板可為一顯示器之一組件(諸如一驅動電路背板)。
相關申請案之交叉參考
此申請案主張2017年11月14日申請之加拿大申請案第2,985,254號的優先權，該案之全部內容係以引用的方式併入本文中。
除非另有定義，否則本文使用之所有技術及科學術語具有與本發明所屬之技術之一般技術者所通常理解相同之含義。
如在說明書及發明申請專利範圍中所使用，單數形式「一」、「一個」及「該」包含複數參考，除非背景內容另外明確指示。
在此揭示內容中，術語「奈米粒子」、「奈米結構」、「奈米柱」及「奈米線」可互換使用。「奈米結構」、「奈米柱」及「奈米線」可經定義為具有限於數十奈米或更小之一厚度或直徑及一無限制長度之結構。
在此揭示內容中，術語「裝置」、「垂直裝置」及「微裝置」可互換使用。
將複數個微裝置轉移至一受體基板中之程序可涉及將微裝置之一預選定陣列接合至受體基板，接著移除施體基板。已針對微裝置開發若干接合程序。
在本發明中，一受體基板中之襯墊係指一微裝置轉移至之受體基板中之一指定區域。襯墊可具有某些形式之接合材料以永久固持微裝置。襯墊可堆疊為多個層以提供具有改良之接合及導電能力之一更機械穩定之結構。
為了產生光電裝置與一受體基板上之受體襯墊之間的電連接，光電裝置經接合至受體襯墊。在一些情況中，接合層經沈積於光電裝置上及受體基板襯墊上以在其等之間產生接合。在接合層之間建立之一實體連接之後，應用複數個接合條件以固化接合。此等接合條件可為電流、光、溫度及/或壓力之施加。此等接合之可靠性係直接依據接合襯墊及光電裝置之表面積、用於各襯墊之一接合材料之數目及類型/結構及接合層至初始襯墊及/或光電裝置之黏附。
隨著接合襯墊對於由接合至受體基板之光電裝置陣列製成之高密度裝置變得更小，接合良率、效能及可靠性變得更具有挑戰。
根據一項實施例，為了改良接合可靠性及良率，受體基板或光電裝置(微裝置)上之接合襯墊之表面經紋理化。此處，導電(或不導電)材料之一層經沈積為遮罩。此層應至少覆蓋接合襯墊區域。在導電層之沈積之後，在層(或若干層)上完成其他處理，諸如表面處理、圖案化及/或功能化。接著，層(或若干層)藉由不同手段(諸如離子銑削、雷射消融、反應離子蝕刻(RIE)、其他乾式蝕刻或濕式蝕刻手段)紋理化。紋理增大接合襯墊之表面積且亦產生可容忍不同襯墊之間的高度失配之一互鎖情況。
根據另一實施例，接合層及/或接合劑經沈積於襯墊之表面上。在一個情況中，沈積焊接材料(諸如In、Tin等)之一薄層。在另一情況中，奈米粒子(實心導電或混合殼-芯導電/不導電)分散於襯墊之表面中。此等奈米粒子可懸浮於亦可充當一接合劑(及空的空間之填料)之一溶液內或該溶液可蒸發且將奈米粒子留在表面上。在一個情況中，紋理化可穿過所有層直至其到達襯墊。此情況將由僅透過襯墊表面區域連接之獨立3D結構構成。
在另一情況中，3D結構在表面上(至少在襯墊表面上)生長。此處，3D結構(諸如奈米線)可為導電的。在一個情況中，其亦可為接合劑。在另一情況中，其他層可經沈積於奈米線之頂部上以產生接合劑。在另一情況中，奈米粒子(諸如其他奈米線、2D片或球體(例如，塗佈氧化矽之金屬奈米粒子))可分散於3D結構之間。在另一情況中，溶液可用於充填3D結構之間的區域(若使用經分散奈米粒子，則此溶液可與經分散奈米粒子之溶液相同)。在一些情況中，導電3D結構(即，金屬奈米線)並不提供接合所需之顯著結構剛性。在此情況中，沈積一非金屬奈米線芯且由導電層(及/或接合層)覆蓋表面。此等層亦將3D結構之表面連接至襯墊表面或微裝置。在另一情況中，非金屬奈米線用作導電材料(諸如金屬奈米線、2D片(經還原石墨層)、球體等等)之結構支撐。用於結合3D結構之其他方法亦可配合此等結構使用。
在一個情況中，3D結構(由紋理化或生長形成)可透過額外生長程序分支化。額外分支可提供更高表面及更佳之互鎖。
若3D結構在襯墊表面區域外(藉由表面紋理化或生長)，則其不會被連接至受體基板或微裝置基板上的任何作用元件。此等結構可藉由蝕刻來移除或可保留於表面上且提供一些額外功能性。在一個情況中，其等可提供結構支撐。再者，此等結構可經設計以提供特定光學效能，諸如過濾特定波長以提供更佳之色彩純度及/或光方向性。在另一情況中，其等可用作其他感測器，諸如電容式觸摸感測器。由於此等結構之深寬比非常高，故在頂部之電場可非常高。因此，由外部源造成之一小干擾可產生電場之顯著改變，此可經偵測為一觸摸輸入。
在另一實施例中，支架結構係用於增強光電裝置與受體基板之間的接合性質。在一個情況中，支架層係至少在襯墊表面上生長或形成。一個方法係在表面上形成一模板。此等模板可係由粒子(諸如球體、AAO、圖案化光阻劑、嵌段共聚物等)製成。接著，將至少一個導電層沈積於模板上。此後，模板可經移除或保持在結構內。此處，可使用其他接合層或接合劑(奈米粒子、聚合物……)。在另一情況中，支架經轉移或沈積於表面上。此處，在一個情況中，於支架結構與襯墊(或微裝置)之間使用至少一個黏附層來將支架固持在適當位置中。在另一情況中，於支架經轉移或沈積於表面上之後，沈積一黏附層(不同方法)。黏附層可為不同材料，諸如焊接材料、聚合物、具有奈米粒子之功能溶液等等。
在一項實施例中，使用具有大作用表面積之奈米紋理化、奈米多孔及奈米孔結構增加受體及/或微裝置基板上之接觸區域(接合區域)。奈米紋理化及奈米多孔結構可係隨機或以一界定順序形成。例如，奈米孔可經形成為經對準孔或隨機多孔結構之陣列。
在另一實施例中，使用由透明導電氧化物(TCO)、金屬及/或導電之基於石墨烯之材料(諸如經還原氧化石墨烯(rGO)及碳奈米管(CNT) )製成的錐狀及針狀奈米結構、柱及奈米線(NW)。此等直立(或稍微傾斜)結構提供具有低電阻率之一垂直電流路徑，且展示機械可撓性及熱穩定性之優勢。奈米結構可經隨機形成為高密度配置，或經製造為具有所需大小及節距之有序陣列結構。將針對最大垂直導電來最佳化奈米結構之數目。
在此實施例中，透過蝕刻一平坦層而形成該等結構。透過不同方法(例如，電漿輔助化學氣相沈積(PECVD)、濺鍍、印刷、旋塗……)沈積一薄膜層以用作一硬遮罩且接著在層之頂部上形成一圖案。使用不同方法(離子銑削、乾式蝕刻、濕式蝕刻、雷射消融等等)來蝕刻該層以形成一3D奈米結構。可藉由蝕刻整個層或僅部分蝕刻該層而形成結構。
在另一方法中，奈米結構自組裝在表面上。透過沈積或不同固化程序(例如，表面功能化等)處理微裝置或受體基板上之襯墊區域之表面以實現襯墊區域或整個表面區域上之結構之選擇性組裝。
在另一實施例中，由另一層覆蓋奈米結構以增強接合程序。在一個情況中，由可透過電流、光、熱、機械力或化學反應固化之材料覆蓋結構。在此情況中，在對準且將受體基板及微裝置連接在一起之後，施加所需固化劑以增強接合。
在另一實施例中，使用其他材料充填在結構之間以增強接合程序。此等材料可在不同條件及固化劑(電流、光、壓力、熱等等)下固化。
在另一實施例中，受體基板或微裝置基板之整個表面使用包含襯墊區域及襯墊區域之間的空間之奈米結構覆蓋。然而，奈米結構(奈米線、奈米粒子、塗佈氧化矽之奈米粒子等)係稀疏的使得結構之間不存在連接。在一個情況中，結構可藉由一些介電材料(諸如聚醯胺、SU8、PMMA等)薄膜層分離。此處，微裝置及受體基板透過形成於表面上之結構對準且接合在一起。可使用不同固化程序來增強接合。在一個情況中，可透過結構施加電流以通過微裝置以用於微/奈米焊接/接頭。在另一情況中，更高溫度、壓力及/或光可用於增強接合程序。
在一項實施例中，具有極大表面積之互鎖奈米結構使用隨機交叉金屬奈米線、分支型奈米線、碳奈米管、3D金屬及碳奈米纖維及金屬網/布形成，從而形成一3D支架。NW的交叉在空間上延伸接合區域，從而導致有效接合。
針對以上實施例，襯墊區域中之奈米結構之大小(直徑)、長度及濃度經工程設計以最大化接合輪廓。因此，達成最大效能。
一項實施例利用使用一逐層(LBL)組裝程序錨定至NW/rGO及CNT上之奈米粒子。在此等結構中，金屬/rGO NW及CNT將使用金屬、塗佈氧化矽金屬及塗佈金屬氧化矽奈米粒子奈米填料(諸如銀、銀/氧化矽及鎳NP)裝飾。此等結構增強表面積，產生高效能導電黏合劑。因此，將達成兩個襯墊之間的一最大接合區域及一最佳導電路徑。
其他實施例係關於一3D總成中之氧化矽或聚苯乙烯奈米珠及金屬NP、金屬及石墨烯奈米線或CNT之組合。導電奈米粒子、金屬及rGO NW及CNT經擴散至3D氧化矽或聚苯乙烯晶體中以產生用於選擇性接合之一垂直電流路徑。在接合程序期間，氧化矽其自身在壓力及溫度下充當一機械穩固之材料。
此描述之若干實施例係關於將已形成(as-formed)奈米結構(多孔結構、金屬及rGO NW、CNT、金屬及塗佈氧化矽之NP)埋入透明及一機械可撓性且熱穩固之主體介質中。
此描述之若干實施例係關於控制在接合程序期間施加之電流、溫度及壓力，以提供一強接合。
本發明之目的在於描述將金屬奈米結構應用於在低溫下兩個基板之間的有效且耐久接合。含金屬奈米結構材料歸因於其等獨有之化學物理性質已經廣泛用於行業實踐中。奈米結構金屬之高內聚能及熔點導致接合期間之延長之組件穩定性(與改良之可靠性相關)。金屬粒子之高表面活化能對兩個表面之間的穩固接合係關鍵的。金屬奈米粒子合成及表面化學改性係簡單的，此使含有金屬奈米粒子之系統尤其受關注。此處，關於金屬奈米結構製造提出之所有程序係在低溫下進行之高處理量程序且與習知半導體程序相容。
2D及3D金屬奈米結構具有優越性質，包含獨有形態結構、大表面積及高導電性。
在下文中詳細描述根據當前結構及方法之各種實施例。
圖1A展示組合奈米粒子硬遮罩及隨後藉由蝕刻之遮罩移除之隨機形成之奈米紋理。如在圖1A中展示，藉由組合奈米遮蔽及蝕刻使用一接合材料104在一基板106上形成2D金屬紋理化結構。奈米粒子102 (諸如氧化鋁(Al2 O3 )、氧化矽及聚苯乙烯奈米球或其他遮罩)可用作蝕刻遮罩。一蝕刻程序114 (諸如使用具有對金屬之高蝕刻選擇性之各向異性電漿化學之反應離子蝕刻(RIE)、透過一銑削程序之物理蝕刻及一簡單但受控濕式蝕刻程序)可用於形成金屬奈米紋理120。紋理之幾何結構及大小可藉由蝕刻遮罩之大小及蝕刻條件調整。奈米紋理之深度110可等於用作接合材料104之金屬層之深度。遮罩移除之程序112可使用簡單超音波處理或化學蝕刻達成。
圖1B展示將奈米紋理化金屬接合至微裝置及接收基板上。奈米紋理化結構可形成於受體基板104b或微裝置襯墊102b上。在一個情況中，可形成微陣列106b之襯墊上之奈米紋理化金屬及接收基板108b之襯墊上之奈米紋理化金屬。在接合期間，表面紋理可適應不同襯墊及/或微裝置之間的某些高度差。再者，表面紋理對更可靠之接合產生更大表面積。微陣列106b之襯墊上之奈米紋理化金屬與接收基板108b之襯墊上之奈米紋理化金屬之間的接合112b產生互鎖接合112b之一大表面積。
圖1C繪示展示使用奈米球遮罩及銑削實現銀奈米紋理之一SEM影像及放大影像。SEM影像A及放大影像B展示使用奈米球遮罩及銑削實現銀奈米紋理。金屬奈米紋理化結構亦可藉由在一乾式或濕式蝕刻程序中之聚合物自遮蔽而形成。
在另一實施例中，表面紋理使用模板及沈積而產生。在此方法中，在由導電材料覆蓋之表面之間的一空間上形成一模板。模板可經移除或保留在表面上。
圖2A1展示使用具有經工程設計之大小節距之嵌段共聚物(BCP)或鋁陽極氧化物(AAO)模板在基板上形成無孔/奈米孔奈米結構之陣列。如在圖2A1中展示，具有經工程設計之大小節距之BCP或AAO 204用作基板202上之模板。3D海綿狀奈米多孔及奈米孔208(隨機或有序)係藉由奈米模板化接著進行使用PECVD、PVD、CVD、濺鍍、印刷、旋塗、電鍍、無電電鍍等之接合材料206 (例如，金屬)沈積/生長而形成。
圖2A2展示將奈米多孔及奈米孔金屬奈米結構接合至微裝置及接收基板上。結構可形成於受體基板104b或微裝置襯墊102b上。在一個情況中，可形成微陣列204a之襯墊上之奈米多孔及奈米孔金屬奈米結構及接收基板206a之襯墊上之奈米多孔及奈米孔金屬奈米結構。在接合210a期間，表面紋理可適應不同襯墊及/或微裝置之間的某些高度差。再者，表面紋理對更可靠之接合產生更大表面積。在一個情況中，由可透過電流、光、熱、機械力或化學反應固化之材料208覆蓋結構。微陣列204a之襯墊上之奈米多孔及奈米孔金屬奈米結構與接收基板206a之襯墊上之奈米多孔及奈米孔金屬奈米結構之間的接合產生互鎖接合212a之一大表面積。
圖2B1至圖2B3展示在基板204b之頂部上具有一接合材料202b之基板204b上形成無孔/奈米孔奈米結構之陣列之實例。在圖2B1中，嵌段共聚物(BCP)或鋁陽極氧化物(AAO)用作模板216。可使用一結構層(例如，金屬，諸如銀(Ag)、銦(In)、鎳(Ni)、Co或金屬合金)之一電化學沈積及無電電鍍218以覆蓋間距(或孔)。隨後可藉由濕式移除程序移除210模板。
圖2B2展示在基板204b之頂部上具有一接合材料202b之基板204b上形成無孔/奈米孔奈米結構之陣列之另一實例，其中圖案化蝕刻遮罩用作模板214。可使用一結構層(例如，金屬，諸如銀(Ag)、銦(In)、鎳(Ni)、Co或金屬合金)之一電化學沈積及無電電鍍228以覆蓋間距(或孔)。隨後可移除230模板以形成無孔/奈米孔奈米結構。
圖2B3展示在基板之頂部上具有一接合材料202b之基板204b上形成無孔/奈米孔奈米結構之陣列之另一實例，其中硬遮罩(諸如氧化矽或聚苯乙烯珠或奈米球)用作模板220。可使用一結構層(例如，金屬，諸如銀(Ag)、銦(In)、鎳(Ni)、Co或金屬合金)之一電化學沈積及無電電鍍222以覆蓋間距(或孔)。隨後可化學(例如，在二甲基甲醯胺DMF中)或透過剝離(在氧化矽模板的情況中)移除224模板。
在一項實施例中，無孔/奈米孔之形狀、節距及大小可藉由奈米模板之大小調整。
圖2C展示使用不同模板之微裝置陣列與接收基板之間的無孔/奈米孔結構之接合。此處，表面可由其他接合或填料層覆蓋。在一個情況中，無孔/奈米孔金屬奈米結構使用不同模板(例如，226 (嵌段共聚物(BCP)或鋁陽極氧化物(AAO))、232 (圖案化蝕刻遮罩)、230 (氧化矽或聚苯乙烯珠或奈米球) )形成於微陣列及接收基板之襯墊上。此外，展示用於具有無孔/奈米孔結構之微裝置與接收基板之間的接合242。
適應表面粗糙度之一個方法係在受體襯墊或微裝置之頂部上形成多孔接合層。雖然多孔層具有將微裝置固持於適當位置中之機械強度，但彈性可補償表面不均勻性。再者，彈性可提供對歸因於可能的摺疊、滾動或壓力之機械應力之更大容限。此處，在形成多孔表面之後，可沈積其他層以促進微裝置與受體襯墊之間的接合。然而，表面自身可由接合材料(諸如銦、錫、銀等)製成。在另一實施例中，模板完全由導電層覆蓋(可形成一些開口)。藉由蝕刻或其他手段移除模板，留下一3D多孔層。導電層可在表面上形成模板之後沈積於模板上或模板可在形成至表面中之前由導電層覆蓋。
圖3A展示使用基板304上之奈米粒子硬遮罩模板(諸如氧化矽或聚合物奈米球模板302)之自組裝來形成金屬奈米多孔結構之橫截面視圖及俯視圖。金屬層306可藉由3D模板形成之後之PVD及CVD方法而沈積。可移除310模板且可形成3D奈米多孔結構308。
圖3B展示用以形成一模板之金屬NP、CNT、rGO奈米線(NW)、Ag NW及氧化矽奈米球之一混合物之橫截面視圖316及俯視圖320。將在氧化矽移除之後釋放一3D金屬奈米多孔結構。
在第三方法中，圖3C展示芯/殼氧化矽奈米球之一橫截面及俯視圖，其中金屬殼形成一3D膠態晶體模板。中空金屬球體之一陣列將在氧化矽移除之後形成。
圖3D展示如圖3A至圖3C中呈現之諸如金屬奈米多孔結構340、3D金屬奈米多孔結構350及中空金屬球體360之結構之對準及接合。
圖4A1展示使用奈米大小之硬遮罩及蝕刻(乾式、銑削、濕式、雷射消融)形成奈米柱/奈米線/針/奈米錐奈米結構之有序陣列。圖4A1展示包含錐狀、針狀奈米結構、柱及奈米線之奈米結構之直立陣列形成於透明導電氧化物(TCO) (ZnO、ITO、GIZO等)及金屬(Ag、Ni等)上。結構可經製造為具有所需大小及節距402之有序陣列結構。將針對最大垂直導電最佳化奈米結構之數目。可使用類似，但更受控制之方法使用遮罩或無遮罩方法形成結構，如本文解釋。在前者方法中，藉由蝕刻遮罩之大小控制形狀、大小及節距(由接合區域中之奈米結構之密度判定)。在圖4A1中，硬遮罩404用作基板408上之模板。接合材料406可藉由PECVD、濺鍍、電子束、蒸鍍、電鍍、印刷、旋塗等之一者沈積。蝕刻程序可使用一RIE或一銑削程序對接合材料(TCO或金屬)選擇性執行410以形成針狀或錐狀奈米結構。模板可經移除412且可沈積一外塗層(overcoat layer) 414以增強微陣列102b及接收基板104b之襯墊上之3D結構之有序陣列之接合性質。在一個程序中，錐狀、針狀奈米結構之形成可藉由使用與圖4A1相同之程序及使用氧化矽或聚苯乙烯奈米球作為硬遮罩之蝕刻(乾式、銑削、濕式)而完成。
圖4A2展示使用奈米球硬遮罩及蝕刻(乾式、銑削、濕式、雷射消融)形成奈米柱/奈米線/針/奈米錐奈米結構之有序陣列。奈米球可用作基板408上之一模板404。接合材料406可藉由PECVD、濺鍍、電子束/蒸鍍、電化學及無電電鍍、印刷、旋塗等之一者沈積。蝕刻程序440可使用一RIE或一銑削程序對接合材料(TCO或金屬)選擇性執行以形成針狀或錐狀奈米結構。結構448可經製造為具有所需大小及節距之有序陣列結構。模板可經移除442且可沈積一外塗層444以增強微陣列102b及接收基板104b之襯墊上之3D結構之有序陣列之接合性質。
圖4B1至圖4B2展示透過自遮蔽及蝕刻而隨機形成奈米結構。在一項實施例中，結構可經製造為隨機形成為一高密度配置之具有所需大小及節距之有序陣列結構。圖4B1繪示用於基板462及接合材料464上之聚合物自遮蔽460。可藉由自上而下蝕刻472 (諸如乾式、濕式及銑削)達成奈米結構之隨機466/錐狀468/針狀470形成，且此等結構可形成於受體基板104b或微裝置襯墊102b上。
圖4B2展示透過晶種形成480及水熱、CVD及LPCVD生長482，接著進行後續金屬沈積486而隨機形成奈米結構。可使用一水熱CVD及LPCVD生長482達成奈米結構之隨機/錐狀/針狀形成。在此等程序中，藉由前驅體/氣體化學及水熱/電漿條件控制奈米結構之幾何參數。可使用具有良好接合性質之層486外塗已形成之奈米結構484以增強接合品質。可藉由生長及後續(接合材料)沈積達成奈米結構之隨機/錐狀/針狀形成且此等材料可形成於受體基板104b及微裝置襯墊102b上。
除了自上而下蝕刻外，可在與多數受體基板相容之一低溫(例如，~150℃)下使用水熱方法生長TCO NW。生長基板482可用作作用接合區域，或用作所需金屬薄膜486 (諸如Ag、Au、In、Tin、In/Tin、Ni、Cu、Co等)之支撐模板。在此情況中，使用與低溫程序相容且具有更佳機械強度之材料(例如ZnO)形成奈米線陣列。接著，可由導電及接合層覆蓋奈米線之表面。
如提及之各種金屬奈米結構(諸如奈米錐、奈米柱及奈米線)可使用一濕式化學蝕刻程序(諸如選擇性金屬奈米級蝕刻方法(SMNEM) )產生。濕式化學程序提供高處理量及低溫(＜75℃)蝕刻，此與習知半導體程序相容。介電泳輔助式生長亦可用於自一水性鹽溶液形成金屬奈米線(諸如銀及鈀)。
圖5A至圖5B展示微裝置陣列102b與接收基板104b之襯墊之間之垂直/隨機對準碳奈米管(CNT)/還原氧化石墨烯(rGO) NW的接合。垂直對準502 (圖5A)或隨機對準510 (圖5B)之高度導電基於碳之奈米材料(諸如rGO NW及CNT)可被實施為用於在微裝置陣列102b與接收基板104b之襯墊之間之接合506的一維及垂直電流路徑。rGO NW可係透過化學還原製造，且CNT可使用CVD、雷射消融及電弧放電方法來產生。垂直對準之奈米結構508 (圖5A)或隨機形成之奈米結構514 (圖5B)可係形成於基板上。
圖6A至6B展示使用奈米柱/NW裝飾之rGO片之隨機/垂直對準之3D堆疊的形成。圖6A展示使用現場生長之ZnO奈米柱/奈米線602裝飾之rGO片/發泡體/薄膜604的3D堆疊可藉由一直接冷凍乾燥及水熱程序來實現。堆疊可係隨機形成(圖6A)或經形成為一垂直對準之結構(圖6B)。
獨有結構產生一互鎖、撓性、高效能接合介質，其有效地減少rGO之凝聚同時增大複合物的密度及表面輪廓。一非常薄之層接合材料可在形成之後經沈積於3D堆疊結構上以改良接合性質。接合材料可為In、Ag及Sn。
圖6C至圖6D展示在微裝置陣列與接收基板之襯墊之間之使用奈米柱/NW裝飾之rGO片/發泡體/薄膜之垂直對準/隨機對準之3D堆疊的接合。圖6C展示在微裝置陣列102b與接收基板104b之襯墊之間之使用奈米柱/NW 626裝飾之rGO片/發泡體/薄膜628之隨機對準之3D堆疊的接合624。類似地，圖6D展示在微裝置陣列102b與接收基板104b之襯墊之間之使用奈米柱/NW 636裝飾之rGO片/發泡體/薄膜634之垂直對準之3D堆疊的接合638。
圖7A展示裝飾有經還原氧化石墨烯(rGO) 702之金屬奈米粒子/奈米線的形成。裝飾有rGO片/薄膜/發泡體704、706之金屬奈米粒子/奈米線係相互支撐的多孔結構，其等可藉由在一惰性氣氛中使經塗佈有金屬前驅體的自組裝氧化石墨烯(GO) 702退火而現場製備。
圖7B展示在微裝置陣列102b與接收基板104b之襯墊之間之經還原氧化石墨烯(rGO)片/發泡體/薄膜748上裝飾之金屬奈米粒子(NP) 746之3D堆疊的接合740。一非常薄的層接合材料可在形成之後經沈積於3D堆疊結構上，以改良接合性質。接合材料可為In、Ag及Sn。
圖7C展示在微裝置陣列102b與接收基板104b之襯墊之間的裝飾於經還原氧化石墨烯(rGO)片/發泡體/薄膜上之金屬奈米線之3D堆疊之接合756，其產生具有增強之互鎖及表面輪廓之一接合材料。一非常薄之層接合材料可在形成之後沈積於3D堆疊結構上以改良接合性質。接合材料可為In、Ag及Sn。
圖8A展示對準交叉之金屬/TCO奈米線及奈米纖維(金屬、聚合物、CNT、碳等)之3D支架。獨立奈米線及奈米纖維或使用金屬NP裝飾之3D支架係具有改良之互鎖性質及極大表面積之3D奈米結構之另一實例。其等可使用對準交叉之金屬(例如，Ag)奈米線、3D金屬及聚合物、CNT及碳奈米纖維形成。
圖8B1展示使用隨機對準交叉之金屬奈米線、3D金屬及聚合物、CNT及碳奈米纖維形成之隨機交叉之金屬奈米線、CNT及奈米纖維之3D支架。一非常薄之層接合材料可在形成之後沈積於3D堆疊結構上以改良接合性質。接合材料可為In、Ag及Sn。
圖8B2展示裝飾有金屬奈米粒子之隨機交叉之金屬奈米線、CNT及奈米纖維之3D支架。金屬NW、CNT及碳奈米纖維可經滴鑄、旋塗或靜電紡絲(electrospinning)於基板上，接著進行金屬之化學(或物理)沈積或金屬奈米粒子之化學沈積及使用導電NP之奈米纖維之裝飾。此程序導致快速改良之導電。金及銀奈米結構藉由簡單地將(碳、聚合物、DNA等)奈米纖維(具有與金屬前驅體反應之一些表面功能基)浸沒於金屬離子前驅體之一水溶液中而合成。雖然金屬離子在奈米纖維之表面上局部還原，但大金屬奈米粒子形成，且平滑碳(或聚合物)-金屬混合物奈米結構形成。
圖8C展示微裝置陣列102b與接收基板104b之間的使用金屬奈米粒子804裝飾之隨機交叉奈米線/CNT/奈米纖維806之3D支架之互鎖接合802。
圖8D1至圖8D3分別展示在藉由施加400 mA恆定直流電(DC)達80秒之電接合之後之裸Ag NW (奈米線)、塗佈銦(In)之Ag NW及塗佈錫(Sn)之Ag NW之SEM影像。具有接合材料之AG NW之塗層不僅覆蓋奈米線，而且充填接頭之間的間隙。奈米接頭之形成在影像中係明顯的。接合材料增強共晶接合以使用Ag NW形成合金且降低經歷焦耳加熱所需之熱輸入。因此，達成奈米接頭形成之一總體增加以及相關聯之電阻減小。
圖8E展示藉由施加25至800 mA DC電流經由將接合材料沈積於Ag NW上之一電阻減小。在一個實例中，可見電阻減小在較低電流下更明顯，從而使沈積方法更適用於低電流狀態(regime)。可見Ag NW上塗佈之銦及錫接合材料兩者具有對電阻之一等效效應，其中錫對減小電阻具有一稍微更佳之效應。在另一實例中，塗佈雙層In/Tin之Ag NW展示進一步電阻減小，從而將裸NW電阻降低至較低電流下之其初始值之一半。使用接合材料塗佈奈米線將奈米線互連強化至一顯著程度。其亦容許在焦耳加熱時建立更多電流路徑，此係歸因於自經沈積金屬區之更大接觸點，導致總體更低之電阻。
圖8F展示相較於DC電流之施加脈衝直流電(PDC)對Ag NW及奈米接頭之電阻之效應。隨著所施加之電流之量值增大，可觀察到Ag NW之電阻之一對數減小。因此，更輕易在更高施加電流下形成奈米接頭。在施加PDC的情況下，在一個方向上在「開啟時間」與「關閉時間」之間更改之一25Hz波形在相較於標準DC時展示電阻之最佳減小，此意味著「開啟時間」足以供應足夠能量至燒結奈米線，而「關閉時間」容許應變之便利性而不大量損失熱回應速率。
圖9A展示具有改良互鎖性質之階層式分支型奈米線，其等具有一主幹902 (諸如SnO2 、ZnO)及分支904 (諸如ZnO、Ag)，其組合碳熱還原與水熱或催化劑輔助VLS生長。具有改良互鎖性質之分支型奈米線(包含階層式)可在組合碳熱還原與水熱生長之一程序中製造。
圖9B展示具有改良互鎖性質之階層式梳狀分支型奈米線，其等具有一主幹906 (諸如SnO2 、ZnO)及分支908 (諸如ZnO、Ag)。具有一主幹(諸如SnO2 )及分支(諸如ZnO)之梳狀奈米結構(具有改良互鎖性質)(包含階層式)可在組合碳熱還原與水熱生長之一程序中製造。
混合SnO2 –ZnO或ZnO-Ag奈米線亦可在低壓(約1Pa)下經由兩步驟碳熱還原方法產生。其亦可使用基於催化劑輔助蒸汽-液體-固體(VLS)機制之單步驟碳熱還原產生。在此合成程序中，活化碳粉末充當一還原劑，而金屬奈米粒子或奈米簇充當成核晶種。金屬奈米粒子晶種判定所得一維金屬/金屬氧化物奈米線之生長方向、介面能及直徑。在此容易的合成方法中，奈米線之形態及性質主要由生長參數(諸如溫度、催化劑層之厚度、載氣流之速率及源與基板之間的距離)控制。主幹奈米線之直徑將在數十奈米(~50至100 nm)之範圍內，而分支奈米線具有稍小之直徑(~10至30 nm)。接合材料(諸如銀、銦、錫等)可蒸鍍至已形成之分支型/梳狀NW結構上，從而使用一金屬層覆蓋它。
圖9C展示此等結構之3D支架，其中可藉由堆疊對準奈米結構912、隨機形成之階層式奈米結構914及梳狀奈米結構916而產生高互鎖接合性質。
圖9D展示微裝置陣列與接收基板之間的經對準奈米結構之3D支架之接合。所得3D結構可使用金屬奈米粒子裝飾以進一步改良表面接合區域。利用此等架構之接合結構可在經對準以及隨機形成之階層式及梳狀奈米結構中呈現。
此等奈米線可直接形成於微裝置及/或接收基板之襯墊上，或其等可轉移至襯墊且藉由薄層之沈積及黏著劑材料之選擇附接至表面。
圖10A至圖10B展示具有與奈米線/奈米錐之具改良之互鎖性質之分支型奈米線。具有一奈米線主幹1002 (金屬，TCO)或奈米錐主幹1004及分支(金屬，TCO)之具改良之互鎖性質之分支型奈米線亦可透過蝕刻遮罩(奈米硬遮罩、氧化矽、聚合物珠等)之連續自組裝及蝕刻(乾式、濕式、銑削)形成。
圖11展示透過蝕刻接著進行接合材料(例如，金屬層)沈積，從而形成2D奈米孔陣列來使用具有經工程設計之大小節距之奈米球微影形成金屬奈米網之一實例。可使用奈米球微影1100來圖案化接合材料1102 (例如，銀、In、Sn薄膜)，從而形成具有極佳均勻性、高導電率及良好透明度之2D六邊形奈米孔陣列而製造來自接合材料1102 (例如，金屬薄膜)之一經精確控制之奈米網。具有適當表面功能基之氧化矽或聚合物奈米球可經由簡單且可調整滴鑄、旋塗、垂直浸塗或Langmuir-Blodgettt Troughs方法在單層中組裝。接著，經由蝕刻1100減小氧化矽或聚合物珠之大小。使用適度電漿條件達數分鐘(5至10分鐘)而在氟、氟-氧(CF4 /O2 )之混合物或氧氣(針對聚合物珠之情況)下執行蝕刻。接著將金屬1102沈積於基板上。金屬奈米網1106將在剝離1110奈米珠之後形成(使用簡單的超音波處理或化學蝕刻達成)。金屬奈米網之大小及節距可藉由選定奈米珠之初始大小及蝕刻後步驟進行工程設計。亦展示一俯視圖1108。
圖12A展示用於選擇性接合之氧化矽/聚苯乙烯奈米珠及金屬/TCO NW/石墨烯奈米線/CNT之混合物之3D總成。可使用氧化矽奈米模板化及後續電鍍形成3D奈米多孔金屬奈米結構。首先，將金屬層1208沈積於基板上。接著，將具有所需大小之氧化矽或聚合物奈米珠1206組裝於表面上，從而形成一單層模板。藉由電漿乾式蝕刻，從而產生開口而最佳化奈米珠之大小。接著，將金屬層電鍍於開口上。在導致具有改良表面積之一3D奈米多孔金屬奈米結構之一化學蝕刻程序中移除珠1206。
氧化矽奈米球或聚苯乙烯奈米珠及奈米結構與一個方向電流路徑(例如，金屬/TCO NW、石墨烯奈米線或CNT等)之組合可形成一3D總成，其可有利於選擇性接合(其中使用具有微LED裝置之陣列之匣)。
圖12B展示用於選擇性接合之氧化矽/聚苯乙烯奈米珠1224及金屬/TCO NW、石墨烯奈米線/CNT等與額外金屬NP之混合物之3D總成。彼金屬奈米粒子(NP)可使用一逐層(LBL)組裝程序、浸塗或滴鑄錨定於所有上文提及之奈米結構1226 (包含本文呈現之NW、CNT、rGO、3D支架)上。將使用金屬或金屬塗佈之氧化矽或塗佈氧化矽之金屬奈米填料(諸如銀、銀/氧化矽、鎳、Ag-Cu奈米粒子)裝飾此等結構。奈米填料可在一CVD程序、水熱或碳熱生長方法或自單分散金屬膠體溶液至已形成之奈米結構上之簡單滴鑄中生長於奈米結構上。NP 1228錨定之奈米結構增強表面積，產生高效能導電黏合劑。因此，將達成兩個襯墊(1220、1222)與最大接合區域之間的最佳導電。
氧化矽組件使此結構對接合壓力及溫度具有機械彈性。亦可將金屬奈米粒子添加至結構以增大接合表面積。
導電金屬奈米線/奈米粒子、石墨烯NW及CNT可藉由簡單滴鑄擴散至一3D氧化矽或聚苯乙烯晶體中。此結構可產生用於選擇性接合之垂直電流路徑。
圖13展示芯金屬/芯-殼/合金奈米粒子之一實例。已經展示芯金屬奈米粒子1302 (諸如Ag、Ni等)、芯/殼奈米粒子1304、1306 (諸如塗佈氧化矽之銀、塗佈金屬之氧化矽(Ag/氧化矽)等)及合金奈米粒子1308 (Ag-Cu等)。
圖14展示併入可固化主體介質中之芯金屬/芯-殼/合金奈米粒子之接合。芯金屬奈米粒子1412 (諸如Ag、Ni等)、芯/殼奈米粒子1416、1418 (諸如塗佈氧化矽之銀、塗佈銀之氧化矽(Ag/氧化矽)等)及合金奈米粒子1420 (Ag-Cu等)將併入至熱穩定及機械穩定透明主體介質1410 (諸如聚醯亞胺、SU8、BCB、聚矽氧、UV黏合劑及接合環氧樹脂)中。此主體介質可使用電流且在光、熱、或機械力下固化。在此方法中，具有適當表面功能基之奈米粒子之選擇對產生一高度導電各向異性層係關鍵的。具有羧基及硫醇基之自組裝單層(SAM)之Ag奈米粒子增強NP之介面性質且改良導電。微裝置及接收基板之襯墊亦可使用一SAM層塗佈以用於與接合材料之更佳黏合。介質中之NP濃度係必須針對最小-接近零之側向導電最佳化之另一關鍵參數。使用黑色箭頭1422展示定向電流路徑。除了其之簡單性之外，此方法係高度可調整的。
歸因於所有上述結構之實體幾何結構及高密度，其等可產生一各向異性接合介質而不嵌入一周圍主體介質中。其等產生具有活性表面(催化性質)、垂直方向上之高度導電性質及高表面積之獨立(self-standing)金屬奈米結構，同時展示對在接合期間施加之電流或/及壓力及溫度之足夠阻力。
本文呈現之結構可由一外塗層覆蓋以增強接合性質。
圖15A至圖15B展示在對準之後/之前將固化劑施加於形成於微裝置陣列1502及接收基板1510之襯墊上之奈米結構之接合1506中。一外塗層1504可提供用於增強接合。為在接合期間提供額外機械阻力(尤其針對其中多孔/紋理奈米結構、NW、CNT及3D支架之密度係低的情況)，奈米結構將嵌入一機械透明、撓性及熱穩定主體介質中以充當一固化劑。穩定主體介質(諸如聚醯亞胺、SU8、BCB、聚矽氧、UV黏合劑及接合環氧樹脂)之使用亦有利於其中奈米粒子僅用作填料(芯：Ag、Ni等且芯/殼結構：Ag/氧化矽)或合金Ag-Cu之情況。固化劑1512可在受體基板及微裝置之對準1508及連接之後(圖15A)或之前1530 (圖15B)施加。
將針對不同結構控制且調整接合期間之電流、光強度、溫度、壓力及機械力。此等參數將取決於結構之多孔性及密度調整，從而確保產生各向異性、導電及強接合。
在一項實施例中，提供一種接合結構。接合結構包括兩個表面，其中一受體基板上之至少一個接合襯墊之一個表面之至少一部分經電接合至一施體基板上之至少一光電微裝置之另一表面之至少一部分，其中該兩個表面之至少一者經紋理化以增大用於該受體基板與該施體基板之間的接合之一表面積。
在另一實施例中，該兩個表面之至少一者在紋理化該兩個表面之至少一者之後由一導電層覆蓋，且該兩個表面之至少一者係藉由以下之一者紋理化：一離子銑削、一雷射消融、一反應離子蝕刻、一乾式蝕刻及一濕式蝕刻。
在又一實施例中，該兩個表面之至少一者藉由由複數個奈米結構覆蓋該兩個表面之至少一者而紋理化。複數個奈米結構包括以下之一者：非導電奈米結構、導電奈米結構或其等之一組合。複數個奈米結構係奈米紋理化、奈米多孔及奈米孔金屬奈米結構之一者且呈以下之一者之一形式：奈米粒子、奈米柱、奈米線、奈米針、奈米錐及塗佈氧化矽之奈米粒子。
在某另一實施例中，複數個奈米結構由一透明介電材料分離，其中介電材料包括聚醯胺、SU8、PMMA及BCB薄膜層之一者。
在某進一步實施例中，複數個奈米結構以以下之一者形成：兩個表面之至少一者上之一隨機順序或一經對準順序。隨機順序奈米結構使用一自遮蔽蝕刻或透過組合氧化矽或聚苯乙烯奈米球微影與蝕刻而形成，且經對準順序奈米結構使用一受控微影程序或奈米球遮罩形成。
在又一實施例中，至少一個接合劑沈積於兩個表面之至少一者上。至少一個接合劑充填複數個奈米結構之間的一空間。接合劑包括選自由銦、錫及銀構成之群組之至少一材料。施加一電流以在一低溫下在接合劑之間形成一共晶接合。
在某另一實施例中，在兩個表面之間施加一固化劑以增強受體基板與施體基板之間的接合。固化劑包括以下之一者：聚醯胺、SU8、PMMA、BCB薄膜層、環氧樹脂及UV可固化黏合劑，且以以下之一者之形式執行固化：一電流、一光、一熱、一機械力或一化學反應。
在另一實施例中，在兩個表面之間的一空間上形成一模板以增強受體基板與施體基板之間的接合。模板係以下之一者：嵌段共聚物(BCP)及鋁陽極氧化物(AAO)、一經圖案化蝕刻遮罩、氧化矽奈米球、聚苯乙烯珠。奈米紋理化結構藉由使用生長機制或電化學電鍍將接合劑沈積於模板上而形成。視情況透過蝕刻程序移除兩個表面之間的模板。
在某進一步實施例中，兩個表面之至少一者藉由在兩個表面之至少一者上形成一3D支架奈米結構而紋理化。3D支架奈米結構係互鎖奈米結構，其等包括以下之一者：隨機交叉金屬奈米線、階層式分支型/錐狀奈米線、碳奈米管、石墨烯片、使用奈米線/奈米粒子裝飾之石墨烯片、3D金屬、碳奈米纖維及金屬網/布。
在又一實施例中，藉由在兩個表面之至少一者上之模板上沈積至少一個導電層而形成3D支架結構。接合結構進一步包括在3D支架結構與兩個表面之至少一者之間添加一黏合層。一經預形成3D支架在黏合層添加至表面之至少一者之後轉移至兩個表面之至少一者，且一經預形成3D支架經轉移至兩個表面之至少一者且在該轉移之後，沈積該黏合層。黏合層包括以下之一者：燒結材料、聚合物及功能奈米粒子薄膜。
在另一實施例中，提供一種接合程序。接合程序包括提供兩個表面，其中一受體基板上之至少一個襯墊之一第一表面之至少一部分經電接合至一施體基板上之至少一光電微裝置之一第二表面之至少一部分；由複數個奈米結構覆蓋兩個表面之至少一者；及藉由一接合劑充填複數個奈米結構之間的一區域。
在又一實施例中，接合劑係以下之一者：一燒結材料、接合材料、聚合物及使用導電奈米粒子充填之溶液。藉由針對選擇性接合蝕刻而自襯墊之間的一空間移除使用接合劑充填之複數個奈米結構。兩個表面透過電流固化以提供共晶接合及在低溫下形成奈米接頭而電接合，且藉由施加一DC脈衝或一AC電流至兩個表面而完成電流固化。
已為繪示及描述之目的呈現本發明之一或多個實施例之先前描述。並不意在具窮舉性或使本發明受限於所揭示之精確形式。鑑於上述教示，許多修改及變化係可能的。本發明之範疇不意在為此實施方式限制，而藉由本發明隨附之發明申請專利範圍限制。
102‧‧‧奈米粒子 102b‧‧‧微裝置襯墊 104‧‧‧接合材料 104b‧‧‧受體基板 106‧‧‧基板 106b‧‧‧微陣列 108b‧‧‧接收基板 110‧‧‧深度 112‧‧‧遮罩移除之程序 112b‧‧‧接合 114‧‧‧蝕刻程序 120‧‧‧金屬奈米紋理 202‧‧‧基板 202b‧‧‧接合材料 204‧‧‧嵌段共聚物(BCP)或鋁陽極氧化物(AAO) 204a‧‧‧微陣列 204b‧‧‧基板 206‧‧‧接合材料 206a‧‧‧接收基板 208‧‧‧材料 210‧‧‧移除 210a‧‧‧接合 212a‧‧‧互鎖接合 214‧‧‧模板 216‧‧‧模板 218‧‧‧電化學沈積及無電電鍍 220‧‧‧模板 222‧‧‧電化學沈積及無電電鍍 224‧‧‧移除 226‧‧‧嵌段共聚物(BCP)或鋁陽極氧化物(AAO) 228‧‧‧電化學沈積及無電電鍍 230‧‧‧移除 232‧‧‧圖案化蝕刻遮罩 242‧‧‧接合 302‧‧‧氧化矽或聚合物奈米球模板 304‧‧‧基板 306‧‧‧金屬層 308‧‧‧3D奈米多孔結構 310‧‧‧移除 316‧‧‧橫截面視圖 320‧‧‧俯視圖 340‧‧‧金屬奈米多孔結構 350‧‧‧3D金屬奈米多孔結構 360‧‧‧中空金屬球體 402‧‧‧節距 404‧‧‧硬遮罩 406‧‧‧接合材料 408‧‧‧基板 410‧‧‧選擇性執行 412‧‧‧移除 414‧‧‧外塗層 440‧‧‧蝕刻程序 442‧‧‧移除 444‧‧‧外塗層 448‧‧‧結構 460‧‧‧自遮蔽 462‧‧‧基板 464‧‧‧接合材料 466‧‧‧隨機 468‧‧‧錐狀 470‧‧‧針狀 472‧‧‧蝕刻 480‧‧‧晶種形成 482‧‧‧水熱CVD及LPCVD生長 484‧‧‧奈米結構 486‧‧‧後續金屬沈積 502‧‧‧垂直對準 506‧‧‧接合 508‧‧‧垂直對準之奈米結構 510‧‧‧隨機對準 514‧‧‧隨機形成之奈米結構 602‧‧‧奈米柱/奈米線 604‧‧‧rGO片/發泡體/薄膜 624‧‧‧接合 626‧‧‧奈米柱/NW 628‧‧‧rGO片/發泡體/薄膜 634‧‧‧rGO片/發泡體/薄膜 636‧‧‧奈米柱/NW 638‧‧‧接合 702‧‧‧經還原氧化石墨烯(rGO) 704‧‧‧rGO片/薄膜/發泡體 706‧‧‧rGO片/薄膜/發泡體 740‧‧‧接合 746‧‧‧金屬奈米粒子(NP) 748‧‧‧經還原氧化石墨烯(rGO)片/發泡體/薄膜 756‧‧‧接合 802‧‧‧互鎖接合 804‧‧‧金屬奈米粒子 806‧‧‧隨機交叉奈米線/CNT/奈米纖維 902‧‧‧主幹 904‧‧‧分支 906‧‧‧主幹 908‧‧‧分支 912‧‧‧奈米結構 914‧‧‧階層式奈米結構 916‧‧‧梳狀奈米結構 1002‧‧‧奈米線主幹 1004‧‧‧奈米錐主幹 1100‧‧‧奈米球微影/蝕刻 1102‧‧‧接合材料/金屬 1106‧‧‧金屬奈米網 1108‧‧‧俯視圖 1110‧‧‧剝離 1206‧‧‧氧化矽或聚合物奈米珠 1208‧‧‧金屬層 1220‧‧‧襯墊 1222‧‧‧襯墊 1224‧‧‧氧化矽/聚苯乙烯奈米珠 1226‧‧‧奈米結構 1228‧‧‧金屬奈米粒子(NP) 1302‧‧‧芯金屬奈米粒子 1304‧‧‧芯/殼奈米粒子 1306‧‧‧芯/殼奈米粒子 1308‧‧‧合金奈米粒子 1410‧‧‧熱穩定及機械穩定透明主體介質 1412‧‧‧芯金屬奈米粒子 1416‧‧‧芯/殼奈米粒子 1418‧‧‧芯/殼奈米粒子 1420‧‧‧合金奈米粒子 1422‧‧‧定向電流路徑 1502‧‧‧微裝置陣列 1504‧‧‧外塗層 1506‧‧‧接合 1508‧‧‧對準 1510‧‧‧接收基板 1512‧‧‧固化劑 1530‧‧‧之前
此描述之若干實施例係關於在接合程序期間控制奈米結構之溫度及壓力，以提供一強接合。
在閱讀以下實施方式及參考附圖之後，將明白本發明之以上及其他優點。
圖1A展示組合奈米粒子硬遮罩及藉由蝕刻之遮罩移除之隨機形成之奈米紋理(nanotexture)。
圖1B展示將奈米紋理化金屬接合至微裝置及接收基板上。
圖1C展示展示使用奈米球遮罩及銑削實現銀奈米紋理之SEM影像及放大影像。
圖2A1展示使用BCP或AAO模板在基板上形成無孔/奈米孔奈米結構陣列且將接合材料(例如，金屬)連續沈積於模板上。
圖2A2展示將具有經塗佈金屬之無孔/奈米孔奈米結構陣列接合於微裝置及接收基板上。
圖2B1展示使用硬遮罩模板來在基板上形成無孔/奈米孔奈米結構陣列，接著在敞露區域中進行金屬無電電鍍或電化學金屬沈積之一個實例。
圖2B2展示使用經圖案化蝕刻遮罩模板來在基板上形成無孔/奈米孔奈米結構陣列，接著在敞露區域中進行金屬無電電鍍或電化學金屬沈積之另一實例。
圖2B3展示使用氧化矽或聚合物奈米球模板來在基板上形成無孔/奈米孔奈米結構陣列，接著在敞露區域中進行金屬無電電鍍或電化學金屬沈積之另一實例。
圖2C展示微裝置陣列與接收基板之間的無孔/奈米孔奈米結構之接合。
圖3A展示使用奈米粒子硬遮罩模板之自組裝、連續金屬沈積及蝕刻模板之3D金屬奈米多孔結構。
圖3B展示使用奈米粒子硬遮罩模板之自組裝之金屬NP、CNT/rGO NW及氧化矽奈米球之3D混合物。
圖3C展示使用奈米粒子硬遮罩模板之自組裝之具有金屬殼之芯/殼氧化矽或聚苯乙烯奈米球。
圖3D展示圖3A至圖3C中呈現之結構之對準及接合。
圖4A1展示使用奈米大小硬遮罩及蝕刻形成有序奈米柱陣列之一個實例。
圖4A2展示使用奈米大小硬遮罩及蝕刻形成有序奈米柱陣列之另一實例。
圖4B1展示透過自遮蔽及蝕刻而隨機形成奈米結構。
圖4B2展示透過晶種形成及水熱生長，接著進行後續金屬沈積而隨機形成奈米結構。
圖5A展示微裝置陣列與接收基板之襯墊之間的垂直對準之CNT/rGO NW之接合。
圖5B展示微裝置陣列與接收基板之襯墊之間的隨機形成之CNT/rGO NW之接合。
圖6A展示使用奈米柱/NW裝飾之rGO片之隨機3D堆疊之形成。
圖6B展示使用奈米柱/NW裝飾之rGO片之垂直對準之3D堆疊之形成。
圖6C展示在微裝置陣列與接收基板之襯墊之間的使用奈米柱/NW裝飾之rGO片/發泡體/薄膜之隨機對準之3D堆疊之接合。
圖6D展示在微裝置陣列與接收基板之襯墊之間的使用奈米柱/NW裝飾之rGO片/發泡體/薄膜之垂直對準之3D堆疊之接合。
圖7A展示裝飾有經還原氧化石墨烯(rGO)之金屬奈米粒子/奈米線之形成。
圖7B展示在微裝置陣列與接收基板之襯墊之間的經還原氧化石墨烯(rGO)片/發泡體/薄膜上裝飾之金屬奈米粒子(NP)之3D堆疊之接合。
圖7C展示在微裝置陣列與接收基板之襯墊之間的裝飾有經還原氧化石墨烯(rGO)片/發泡體/薄膜之銀奈米粒子/奈米線之3D堆疊之接合。
圖8A展示對準交叉之金屬/TCO奈米線及奈米纖維之3D支架(3D scaffold)。
圖8B1展示隨機交叉之金屬奈米線及奈米纖維之3D支架。
圖8B2展示裝飾有金屬奈米粒子之隨機交叉之金屬奈米線及奈米纖維之3D支架。
圖8C展示微裝置陣列與接收基板之間的使用金屬NP裝飾之隨機交叉奈米線/奈米纖維之3D支架之互鎖接合。
圖8D1至圖8D3分別展示根據本發明之一實施例之裸Ag NW、塗佈銦之Ag NW及塗佈錫(Sn)之Ag NW之SEM影像。
圖8E展示根據本發明之一實施例之電阻對比DC電流之一圖示。
圖8F展示根據本發明之一實施例之施加脈衝直流電(PDC)對Ag NW及奈米接頭(nano-joint)之電阻之一效應。
圖9A展示具有改良之互鎖性質之階層式分支型(branch-type)奈米線。
圖9B展示具有改良之互鎖性質之梳狀分支型奈米線。
圖9C展示經對準/隨機/梳狀階層式奈米結構之3D支架。
圖9D展示微裝置陣列與接收基板之間的經對準階層式奈米結構之3D支架之接合。
圖10A展示具有與奈米線之改良之互鎖性質之分支型奈米線。
圖10B展示具有與奈米錐主幹之改良之互鎖性質之分支型奈米線。
圖11展示使用奈米球微影，接著進行接合材料(例如，金屬層)沈積及蝕刻，從而形成2D奈米孔陣列來形成金屬奈米網之一實例。
圖12A展示用於選擇性接合之氧化矽/聚苯乙烯奈米珠及金屬/TCO NW/石墨烯奈米線/CNT之混合物之3D總成。
圖12B展示用於選擇性接合之氧化矽/聚苯乙烯奈米珠及金屬/TCO NW/石墨烯奈米線/CNT與額外金屬NP之混合物之3D總成。
圖13展示芯金屬/芯-殼/合金奈米粒子之一個實例。
圖14展示併入可固化主體介質中之芯金屬/芯-殼/合金奈米粒子之接合。
圖15A展示在對準之後在形成於微裝置陣列及接收基板之襯墊上之奈米結構之接合中施加固化劑。
圖15B展示在對準之前在形成於微裝置陣列及接收基板之襯墊上之奈米結構之接合中施加固化劑。
102b‧‧‧微裝置襯墊
104b‧‧‧受體基板
106b‧‧‧微陣列
108b‧‧‧接收基板
112b‧‧‧接合

Claims (31)

  1. 一種接合結構，其包括：兩個表面，其中一受體(receiver)基板上之至少一個接合襯墊(bonding pad)之一個表面的至少一部分經電接合至一施體(donor)基板上之至少一光電微裝置之另一表面的至少一部分，其中該兩個表面中之至少一者經紋理化(textured)以增大用於該受體基板與該施體基板之間之接合之一表面積，其中該兩個表面中之至少一者在紋理化該兩個表面之該至少一者之後由一導電層覆蓋，其中至少一個接合劑(bonding agent)沈積於該兩個表面之至少一者上，及其中施加一電流以在一低溫下在該等接合劑之間形成一共晶接合(eutectic bonding)。
  2. 如請求項1之接合結構，其中該兩個表面之至少一者係藉由以下之一者來紋理化：一離子銑削、一雷射消融、一反應離子蝕刻、一乾式蝕刻，及一濕式蝕刻。
  3. 如請求項1之接合結構，其中該兩個表面之至少一者係藉由由複數個奈米結構覆蓋該兩個表面中之至少一者來紋理化。
  4. 如請求項3之接合結構，其中該複數個奈米結構包括以下之一者：非 導電奈米結構、導電奈米結構，或其等之一組合。
  5. 如請求項3之接合結構，其中該複數個奈米結構係以下之一者：奈米紋理化、奈米多孔及奈米孔金屬奈米結構。
  6. 如請求項3之接合結構，其中該複數個奈米結構係呈以下之一者之一形式：奈米粒子、奈米柱、奈米線、奈米針、奈米錐，及塗佈氧化矽之奈米粒子。
  7. 如請求項3之接合結構，其中該複數個奈米結構係由一透明介電材料分離，其中該介電材料包括聚醯胺、SU8、PMMA及BCB薄膜層中之一者。
  8. 如請求項3之接合結構，其中該複數個奈米結構係以以下之一者形成：該兩個表面中之至少一者上之一隨機順序或一經對準順序。
  9. 如請求項8之接合結構，其中該等隨機順序奈米結構係使用一自遮蔽蝕刻或透過組合氧化矽或聚苯乙烯奈米球微影與蝕刻來形成。
  10. 如請求項8之接合結構，其中該等經對準順序奈米結構係使用一受控微影程序或奈米球遮罩來形成。
  11. 如請求項1之接合結構，其中該至少一個接合劑充填該複數個奈米結 構之間之一空間。
  12. 如請求項11之接合結構，其中該接合劑包括選自由銦、錫及銀構成之群組之至少一材料。
  13. 如請求項1之接合結構，其中在該兩個表面之間施加一固化劑(curing agent)以增強該受體基板與該施體基板之間的該接合。
  14. 如請求項13之接合結構，其中該固化劑包括以下之一者：聚醯胺、SU8、PMMA、BCB薄膜層、環氧樹脂，及UV可固化黏合劑。
  15. 如請求項14之接合結構，其中以以下之一者之形式來執行該固化：一電流、一光、一熱、一機械力，或一化學反應。
  16. 如請求項1之接合結構，其中在該兩個表面之間之一空間上形成一模板，以增強該受體基板與該施體基板之間的該接合。
  17. 如請求項16之接合結構，其中該模板係以下之一者：嵌段共聚物(BCP)及鋁陽極氧化物(AAO)、一經圖案化蝕刻遮罩、氧化矽奈米球、聚苯乙烯珠。
  18. 如請求項16之接合結構，其中該等奈米紋理化結構係藉由使用生長機制或電化學電鍍將該接合劑沈積於該模板上而形成。
  19. 如請求項18之接合結構，其中視情況透過蝕刻程序移除該兩個表面之間的該模板。
  20. 如請求項1之接合結構，其中該兩個表面之至少一者係藉由在該兩個表面之至少一者上形成一3D支架奈米結構來紋理化。
  21. 如請求項20之接合結構，其中該等3D支架奈米結構係互鎖奈米結構，其等包括以下之一者：隨機交叉金屬奈米線、階層式分支型/錐狀奈米線、碳奈米管、石墨烯片、使用奈米線/奈米粒子裝飾之石墨烯片、3D金屬、碳奈米纖維，及金屬網/布。
  22. 如請求項20之接合結構，其中藉由在該兩個表面之至少一者上之該模板上沈積至少一個導電層來形成該3D支架結構。
  23. 如請求項20之接合結構，進一步包括在該3D支架結構與該兩個表面之至少一者之間添加一黏合層。
  24. 如請求項23之接合結構，其中一經預形成3D支架在該黏合層經添加至該等表面之至少一者之後轉移至該兩個表面中之該至少一者。
  25. 如請求項23之接合結構，其中一經預形成3D支架經轉移至兩個表面之至少一者，且在該轉移之後沈積該黏合層。
  26. 如請求項23之接合結構，其中該黏合層包括以下之一者：燒結材料、聚合物，及功能奈米粒子薄膜。
  27. 一種接合程序，其包括提供兩個表面，其中一受體基板上之至少一個襯墊之一第一表面的至少一部分經電接合至一施體基板上之至少一光電微裝置之一第二表面的至少一部分；由複數個奈米結構來覆蓋該兩個表面之至少一者；及藉由一接合劑來充填該複數個奈米結構之間之一區域。
  28. 如請求項27之接合程序，其中該接合劑係以下之一者：一燒結材料、接合材料、聚合物，及使用導電奈米粒子充填之溶液。
  29. 如請求項27之接合程序，其中藉由針對選擇性接合蝕刻而自襯墊之間之一空間移除使用該接合劑充填之該複數個奈米結構。
  30. 如請求項27之接合程序，其中該兩個表面係透過電流固化以提供共晶接合且在低溫下形成奈米接頭而電接合。
  31. 如請求項27之接合程序，其中藉由施加一DC脈衝或一AC電流至該兩個表面來完成該電流固化。
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