CN116741733A - 微器件在系统基板中的粘合结构与粘合工艺 - Google Patents
微器件在系统基板中的粘合结构与粘合工艺 Download PDFInfo
- Publication number
- CN116741733A CN116741733A CN202310685272.9A CN202310685272A CN116741733A CN 116741733 A CN116741733 A CN 116741733A CN 202310685272 A CN202310685272 A CN 202310685272A CN 116741733 A CN116741733 A CN 116741733A
- Authority
- CN
- China
- Prior art keywords
- nanostructures
- metal
- bonding
- substrate
- etching
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000758 substrate Substances 0.000 title claims abstract description 115
- 238000000034 method Methods 0.000 title abstract description 66
- 230000008569 process Effects 0.000 title abstract description 49
- 239000002086 nanomaterial Substances 0.000 claims abstract description 121
- 239000002105 nanoparticle Substances 0.000 claims abstract description 50
- 230000005693 optoelectronics Effects 0.000 claims abstract description 13
- 229910052751 metal Inorganic materials 0.000 claims description 125
- 239000002184 metal Substances 0.000 claims description 125
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 98
- 239000002070 nanowire Substances 0.000 claims description 91
- 230000001070 adhesive effect Effects 0.000 claims description 59
- 239000000853 adhesive Substances 0.000 claims description 58
- 239000000377 silicon dioxide Substances 0.000 claims description 49
- 238000005530 etching Methods 0.000 claims description 37
- 239000002061 nanopillar Substances 0.000 claims description 17
- 239000004793 Polystyrene Substances 0.000 claims description 16
- 229920002223 polystyrene Polymers 0.000 claims description 16
- 238000001312 dry etching Methods 0.000 claims description 11
- 238000001039 wet etching Methods 0.000 claims description 11
- 238000001020 plasma etching Methods 0.000 claims description 8
- 238000000608 laser ablation Methods 0.000 claims description 7
- 239000003989 dielectric material Substances 0.000 claims description 5
- 239000004952 Polyamide Substances 0.000 claims description 4
- 238000000054 nanosphere lithography Methods 0.000 claims description 4
- 229920003229 poly(methyl methacrylate) Polymers 0.000 claims description 4
- 229920002647 polyamide Polymers 0.000 claims description 4
- 239000004926 polymethyl methacrylate Substances 0.000 claims description 4
- 238000000992 sputter etching Methods 0.000 claims description 4
- 235000012239 silicon dioxide Nutrition 0.000 claims description 3
- 239000003795 chemical substances by application Substances 0.000 abstract description 10
- 239000010410 layer Substances 0.000 description 66
- 239000000463 material Substances 0.000 description 52
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 43
- 239000010408 film Substances 0.000 description 28
- 229910052709 silver Inorganic materials 0.000 description 24
- 230000015572 biosynthetic process Effects 0.000 description 23
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 21
- 239000002041 carbon nanotube Substances 0.000 description 21
- 239000002082 metal nanoparticle Substances 0.000 description 20
- 239000002077 nanosphere Substances 0.000 description 20
- 239000004332 silver Substances 0.000 description 20
- 229910021393 carbon nanotube Inorganic materials 0.000 description 19
- 229910021389 graphene Inorganic materials 0.000 description 18
- 229920000642 polymer Polymers 0.000 description 18
- 239000012790 adhesive layer Substances 0.000 description 15
- 229910052718 tin Inorganic materials 0.000 description 15
- 229910017926 Ag NW Inorganic materials 0.000 description 14
- 238000000151 deposition Methods 0.000 description 14
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 13
- 229910052738 indium Inorganic materials 0.000 description 13
- 229920001400 block copolymer Polymers 0.000 description 11
- 239000006260 foam Substances 0.000 description 11
- 238000003801 milling Methods 0.000 description 11
- 230000008021 deposition Effects 0.000 description 10
- 239000002121 nanofiber Substances 0.000 description 10
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 9
- 239000002102 nanobead Substances 0.000 description 9
- 238000006722 reduction reaction Methods 0.000 description 9
- 239000000243 solution Substances 0.000 description 9
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 8
- 229910045601 alloy Inorganic materials 0.000 description 8
- 239000000956 alloy Substances 0.000 description 8
- 239000002134 carbon nanofiber Substances 0.000 description 8
- 238000007772 electroless plating Methods 0.000 description 8
- 150000002739 metals Chemical class 0.000 description 8
- VNWKTOKETHGBQD-UHFFFAOYSA-N methane Chemical class C VNWKTOKETHGBQD-UHFFFAOYSA-N 0.000 description 8
- 230000009467 reduction Effects 0.000 description 8
- 239000011324 bead Substances 0.000 description 7
- 238000001465 metallisation Methods 0.000 description 7
- 238000002493 microarray Methods 0.000 description 7
- 239000000203 mixture Substances 0.000 description 7
- 230000000694 effects Effects 0.000 description 5
- 229910052759 nickel Inorganic materials 0.000 description 5
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 5
- 238000001878 scanning electron micrograph Methods 0.000 description 5
- 229910052782 aluminium Inorganic materials 0.000 description 4
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 4
- 239000010407 anodic oxide Substances 0.000 description 4
- 239000011230 binding agent Substances 0.000 description 4
- 229910052799 carbon Inorganic materials 0.000 description 4
- 238000005266 casting Methods 0.000 description 4
- 239000011258 core-shell material Substances 0.000 description 4
- 239000002106 nanomesh Substances 0.000 description 4
- 239000002243 precursor Substances 0.000 description 4
- 238000007639 printing Methods 0.000 description 4
- 238000004528 spin coating Methods 0.000 description 4
- 238000004544 sputter deposition Methods 0.000 description 4
- XOLBLPGZBRYERU-UHFFFAOYSA-N tin dioxide Chemical compound O=[Sn]=O XOLBLPGZBRYERU-UHFFFAOYSA-N 0.000 description 4
- 229910017944 Ag—Cu Inorganic materials 0.000 description 3
- 239000003054 catalyst Substances 0.000 description 3
- 238000003486 chemical etching Methods 0.000 description 3
- 238000006243 chemical reaction Methods 0.000 description 3
- 230000007423 decrease Effects 0.000 description 3
- 238000004070 electrodeposition Methods 0.000 description 3
- 230000005496 eutectics Effects 0.000 description 3
- 239000000945 filler Substances 0.000 description 3
- 229910001092 metal group alloy Inorganic materials 0.000 description 3
- 230000004048 modification Effects 0.000 description 3
- 238000012986 modification Methods 0.000 description 3
- -1 pillars Substances 0.000 description 3
- 238000007747 plating Methods 0.000 description 3
- 239000013545 self-assembled monolayer Substances 0.000 description 3
- 238000001338 self-assembly Methods 0.000 description 3
- 238000005476 soldering Methods 0.000 description 3
- 239000007787 solid Substances 0.000 description 3
- 239000004593 Epoxy Substances 0.000 description 2
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 description 2
- 239000004642 Polyimide Substances 0.000 description 2
- FOIXSVOLVBLSDH-UHFFFAOYSA-N Silver ion Chemical compound [Ag+] FOIXSVOLVBLSDH-UHFFFAOYSA-N 0.000 description 2
- 230000008901 benefit Effects 0.000 description 2
- 239000003638 chemical reducing agent Substances 0.000 description 2
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 239000011248 coating agent Substances 0.000 description 2
- 239000011247 coating layer Substances 0.000 description 2
- 238000000576 coating method Methods 0.000 description 2
- 239000011370 conductive nanoparticle Substances 0.000 description 2
- 239000004020 conductor Substances 0.000 description 2
- 239000013078 crystal Substances 0.000 description 2
- 238000003618 dip coating Methods 0.000 description 2
- 230000005684 electric field Effects 0.000 description 2
- 238000010894 electron beam technology Methods 0.000 description 2
- 238000009713 electroplating Methods 0.000 description 2
- 238000001704 evaporation Methods 0.000 description 2
- 230000008020 evaporation Effects 0.000 description 2
- 239000004744 fabric Substances 0.000 description 2
- 125000000524 functional group Chemical group 0.000 description 2
- 238000010438 heat treatment Methods 0.000 description 2
- 238000011065 in-situ storage Methods 0.000 description 2
- 238000001459 lithography Methods 0.000 description 2
- 238000004518 low pressure chemical vapour deposition Methods 0.000 description 2
- 229910021645 metal ion Inorganic materials 0.000 description 2
- 230000003287 optical effect Effects 0.000 description 2
- 230000000704 physical effect Effects 0.000 description 2
- 238000005240 physical vapour deposition Methods 0.000 description 2
- 229920000647 polyepoxide Polymers 0.000 description 2
- 229920001721 polyimide Polymers 0.000 description 2
- 229920001296 polysiloxane Polymers 0.000 description 2
- 239000011148 porous material Substances 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 229910000679 solder Inorganic materials 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- 238000003786 synthesis reaction Methods 0.000 description 2
- 239000010409 thin film Substances 0.000 description 2
- MYMOFIZGZYHOMD-UHFFFAOYSA-N Dioxygen Chemical compound O=O MYMOFIZGZYHOMD-UHFFFAOYSA-N 0.000 description 1
- PXGOKWXKJXAPGV-UHFFFAOYSA-N Fluorine Chemical compound FF PXGOKWXKJXAPGV-UHFFFAOYSA-N 0.000 description 1
- 229910006404 SnO 2 Inorganic materials 0.000 description 1
- FAPWRFPIFSIZLT-UHFFFAOYSA-M Sodium chloride Chemical compound [Na+].[Cl-] FAPWRFPIFSIZLT-UHFFFAOYSA-M 0.000 description 1
- UOBPHQJGWSVXFS-UHFFFAOYSA-N [O].[F] Chemical compound [O].[F] UOBPHQJGWSVXFS-UHFFFAOYSA-N 0.000 description 1
- 230000002776 aggregation Effects 0.000 description 1
- 238000004220 aggregation Methods 0.000 description 1
- 238000000137 annealing Methods 0.000 description 1
- 239000007864 aqueous solution Substances 0.000 description 1
- 238000001241 arc-discharge method Methods 0.000 description 1
- 238000003491 array Methods 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 125000003178 carboxy group Chemical group [H]OC(*)=O 0.000 description 1
- 239000012159 carrier gas Substances 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 238000005234 chemical deposition Methods 0.000 description 1
- 239000000084 colloidal system Substances 0.000 description 1
- 239000002131 composite material Substances 0.000 description 1
- 238000005034 decoration Methods 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 238000006731 degradation reaction Methods 0.000 description 1
- 238000004720 dielectrophoresis Methods 0.000 description 1
- UXGNZZKBCMGWAZ-UHFFFAOYSA-N dimethylformamide dmf Chemical compound CN(C)C=O.CN(C)C=O UXGNZZKBCMGWAZ-UHFFFAOYSA-N 0.000 description 1
- 229910001882 dioxygen Inorganic materials 0.000 description 1
- 125000003700 epoxy group Chemical group 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 230000001747 exhibiting effect Effects 0.000 description 1
- 238000011049 filling Methods 0.000 description 1
- 238000001914 filtration Methods 0.000 description 1
- 229910052731 fluorine Inorganic materials 0.000 description 1
- 239000011737 fluorine Substances 0.000 description 1
- 238000004108 freeze drying Methods 0.000 description 1
- 238000007306 functionalization reaction Methods 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 229910002804 graphite Inorganic materials 0.000 description 1
- 239000010439 graphite Substances 0.000 description 1
- 238000001027 hydrothermal synthesis Methods 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 239000011261 inert gas Substances 0.000 description 1
- 230000002045 lasting effect Effects 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 230000007246 mechanism Effects 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 239000002923 metal particle Substances 0.000 description 1
- 230000000877 morphologic effect Effects 0.000 description 1
- 239000011807 nanoball Substances 0.000 description 1
- 239000002110 nanocone Substances 0.000 description 1
- 230000006911 nucleation Effects 0.000 description 1
- 238000010899 nucleation Methods 0.000 description 1
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 1
- 229910052763 palladium Inorganic materials 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 229920002120 photoresistant polymer Polymers 0.000 description 1
- 230000009257 reactivity Effects 0.000 description 1
- 238000011946 reduction process Methods 0.000 description 1
- 230000004044 response Effects 0.000 description 1
- 230000000717 retained effect Effects 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
- 239000011780 sodium chloride Substances 0.000 description 1
- 238000000527 sonication Methods 0.000 description 1
- 238000006557 surface reaction Methods 0.000 description 1
- 230000003746 surface roughness Effects 0.000 description 1
- 238000004381 surface treatment Methods 0.000 description 1
- 238000001308 synthesis method Methods 0.000 description 1
- 125000003396 thiol group Chemical group [H]S* 0.000 description 1
- 238000011282 treatment Methods 0.000 description 1
- 238000003631 wet chemical etching Methods 0.000 description 1
- 238000007704 wet chemistry method Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B82—NANOTECHNOLOGY
- B82B—NANOSTRUCTURES FORMED BY MANIPULATION OF INDIVIDUAL ATOMS, MOLECULES, OR LIMITED COLLECTIONS OF ATOMS OR MOLECULES AS DISCRETE UNITS; MANUFACTURE OR TREATMENT THEREOF
- B82B3/00—Manufacture or treatment of nanostructures by manipulation of individual atoms or molecules, or limited collections of atoms or molecules as discrete units
- B82B3/0009—Forming specific nanostructures
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B82—NANOTECHNOLOGY
- B82B—NANOSTRUCTURES FORMED BY MANIPULATION OF INDIVIDUAL ATOMS, MOLECULES, OR LIMITED COLLECTIONS OF ATOMS OR MOLECULES AS DISCRETE UNITS; MANUFACTURE OR TREATMENT THEREOF
- B82B3/00—Manufacture or treatment of nanostructures by manipulation of individual atoms or molecules, or limited collections of atoms or molecules as discrete units
- B82B3/0042—Assembling discrete nanostructures into nanostructural devices
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B82—NANOTECHNOLOGY
- B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
- B82Y30/00—Nanotechnology for materials or surface science, e.g. nanocomposites
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/03—Manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/07—Structure, shape, material or disposition of the bonding areas after the connecting process
- H01L24/08—Structure, shape, material or disposition of the bonding areas after the connecting process of an individual bonding area
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/27—Manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/03—Manufacturing methods
- H01L2224/036—Manufacturing methods by patterning a pre-deposited material
- H01L2224/0361—Physical or chemical etching
- H01L2224/03614—Physical or chemical etching by chemical means only
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/03—Manufacturing methods
- H01L2224/036—Manufacturing methods by patterning a pre-deposited material
- H01L2224/0363—Manufacturing methods by patterning a pre-deposited material using a laser or a focused ion beam [FIB]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/03—Manufacturing methods
- H01L2224/036—Manufacturing methods by patterning a pre-deposited material
- H01L2224/0363—Manufacturing methods by patterning a pre-deposited material using a laser or a focused ion beam [FIB]
- H01L2224/03632—Ablation by means of a laser or focused ion beam [FIB]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04026—Bonding areas specifically adapted for layer connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0555—Shape
- H01L2224/05556—Shape in side view
- H01L2224/05557—Shape in side view comprising protrusions or indentations
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0555—Shape
- H01L2224/05556—Shape in side view
- H01L2224/05558—Shape in side view conformal layer on a patterned surface
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05599—Material
- H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/07—Structure, shape, material or disposition of the bonding areas after the connecting process
- H01L2224/08—Structure, shape, material or disposition of the bonding areas after the connecting process of an individual bonding area
- H01L2224/081—Disposition
- H01L2224/0812—Disposition the bonding area connecting directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding
- H01L2224/08151—Disposition the bonding area connecting directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding the bonding area connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/08221—Disposition the bonding area connecting directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding the bonding area connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/08225—Disposition the bonding area connecting directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding the bonding area connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/27—Manufacturing methods
- H01L2224/276—Manufacturing methods by patterning a pre-deposited material
- H01L2224/2761—Physical or chemical etching
- H01L2224/27614—Physical or chemical etching by chemical means only
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/27—Manufacturing methods
- H01L2224/276—Manufacturing methods by patterning a pre-deposited material
- H01L2224/2763—Manufacturing methods by patterning a pre-deposited material using a laser or a focused ion beam [FIB]
- H01L2224/27632—Ablation by means of a laser or focused ion beam [FIB]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29005—Structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/2901—Shape
- H01L2224/29016—Shape in side view
- H01L2224/29018—Shape in side view comprising protrusions or indentations
- H01L2224/29019—Shape in side view comprising protrusions or indentations at the bonding interface of the layer connector, i.e. on the surface of the layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29075—Plural core members
- H01L2224/29078—Plural core members being disposed next to each other, e.g. side-to-side arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/29138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/29139—Silver [Ag] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/2919—Material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/29193—Material with a principal constituent of the material being a solid not provided for in groups H01L2224/291 - H01L2224/29191, e.g. allotropes of carbon, fullerene, graphite, carbon-nanotubes, diamond
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
- H01L2224/29199—Material of the matrix
- H01L2224/2929—Material of the matrix with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
- H01L2224/29298—Fillers
- H01L2224/29299—Base material
- H01L2224/293—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/29338—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/29339—Silver [Ag] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
- H01L2224/29298—Fillers
- H01L2224/29299—Base material
- H01L2224/293—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/29338—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/29355—Nickel [Ni] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
- H01L2224/29298—Fillers
- H01L2224/29299—Base material
- H01L2224/29386—Base material with a principal constituent of the material being a non metallic, non metalloid inorganic material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
- H01L2224/29298—Fillers
- H01L2224/29299—Base material
- H01L2224/29393—Base material with a principal constituent of the material being a solid not provided for in groups H01L2224/293 - H01L2224/29391, e.g. allotropes of carbon, fullerene, graphite, carbon-nanotubes, diamond
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
- H01L2224/29298—Fillers
- H01L2224/29399—Coating material
- H01L2224/294—Coating material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/29438—Coating material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/29439—Silver [Ag] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
- H01L2224/29298—Fillers
- H01L2224/29499—Shape or distribution of the fillers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/2954—Coating
- H01L2224/2957—Single coating layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/2954—Coating
- H01L2224/29599—Material
- H01L2224/296—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/29601—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
- H01L2224/29609—Indium [In] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/2954—Coating
- H01L2224/29599—Material
- H01L2224/296—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/29601—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
- H01L2224/29611—Tin [Sn] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/2954—Coating
- H01L2224/29599—Material
- H01L2224/296—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/29638—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/29639—Silver [Ag] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/32227—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the layer connector connecting to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/80001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by connecting a bonding area directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding
- H01L2224/808—Bonding techniques
- H01L2224/80801—Soldering or alloying
- H01L2224/80805—Soldering or alloying involving forming a eutectic alloy at the bonding interface
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/80001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by connecting a bonding area directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding
- H01L2224/808—Bonding techniques
- H01L2224/80897—Mechanical interlocking, e.g. anchoring, hook and loop-type fastening or the like
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8319—Arrangement of the layer connectors prior to mounting
- H01L2224/83193—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed on both the semiconductor or solid-state body and another item or body to be connected to the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/838—Bonding techniques
- H01L2224/83897—Mechanical interlocking, e.g. anchoring, hook and loop-type fastening or the like
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
- H01L2933/0008—Processes
- H01L2933/0033—Processes relating to semiconductor body packages
- H01L2933/0066—Processes relating to semiconductor body packages relating to arrangements for conducting electric current to or from the semiconductor body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H3/00—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Manufacturing & Machinery (AREA)
- Nanotechnology (AREA)
- Crystallography & Structural Chemistry (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Composite Materials (AREA)
- Materials Engineering (AREA)
- Laminated Bodies (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Micromachines (AREA)
Abstract
本公开涉及微器件在系统基板中的粘合结构与粘合工艺。本公开涉及将光电子微器件集成到系统基板上,以用于在低温下两个基板之间的有效且持久的电粘合。2D纳米结构和3D支架可建立互锁结构以改善粘合性能。纳米颗粒在结构中的添加将创建大表面区域以使得导电性更好。固化剂在微器件和接收基板的对准之前或之后的应用还有助于形成牢固的粘合。
Description
分案申请的相关信息
本申请为发明名称为“微器件在系统基板中的粘合结构与粘合工艺”、申请号为201811352458.8、申请日为2018年11月14日的中国发明专利申请的分案申请。
相关申请的交叉引用
本申请要求于2017年11月14日提交的第2,985,254号加拿大申请的优先权,该加拿大申请通过引用以其整体并入本文中。
技术领域
本公开涉及利用低成本且可靠的方法将微器件粘合至其它基板,该方法可提高产量并且改善表面轮廓。更具体地,可在具有或不具有宿主介质的情况下利用2D和3D纳米结构来使得粘结区域增加并且互锁。
发明内容
本公开的多个实施方式涉及在接收基板和/或微器件基板上形成导电、柔性且热稳定的2D和3D纳米结构,以用于位于供体基板上的微器件的有效粘合。除了诸如表面形貌、表面轮廓和结晶度的形态参数得到改善之外,还增强了两个基板(供体基板和接收基板)之间诸如电导率、热稳定性和可靠性的物理性能。微器件的像素间距减小使得纳米结构的使用对于有效且可靠的粘合至关重要。
微器件阵列可包括微型发光二极管(LED)、有机LED(OLED)、传感器、固态器件、集成电路、微机电系统(MEMS)和/或其它电子组件。用于接收基板的候选项包括但不限于印刷电路板(PCB)、薄膜晶体管底板和集成电路衬底。在诸如LED的光学微器件的情况下,接收基板可以是显示器的组件,诸如,驱动电路底板。
附图说明
本说明书的多个实施方式实际上在粘合过程期间控制纳米结构的温度和压力以提供牢固的粘合。
通过阅读以下详细描述并且通过参考附图,本公开的上述以及其它优点将变得明显。
图1A示出了随机形成的结合纳米颗粒硬掩模的纳米纹理以及通过蚀刻进行的掩模移除。
图1B示出将纳米纹理金属粘合到微器件和接收基板上。
图1C示出SEM图像和放大的图像,其示出利用纳米球掩模和铣削实现的银纳米纹理。
图2A1示出利用BCP或AAO模板和粘合材料(例如金属)在模板上的连续沉积而形成无孔/纳米孔纳米结构的阵列。
图2A2示出将涂覆有金属的无孔/纳米孔纳米结构的阵列粘合至微器件基板和接收基板上。
图2B1示出利用硬掩模模板、随后通过在开口区域中进行金属无电镀或者电化学金属沉积在基板上形成无孔/纳米孔纳米结构的阵列的一个示例。
图2B2示出利用图案化蚀刻掩模模板、随后通过在开口区域中进行金属无电镀或者电化学金属沉积在基板上形成无孔/纳米孔纳米结构的阵列的另一示例。
图2B3示出利用二氧化硅或聚合物纳米球模板、随后通过在开口区域中进行金属无电镀或者电化学金属沉积在基板上形成无孔/纳米孔纳米结构的阵列的另一示例。
图2C示出微器件阵列与接收基板之间的无孔/纳米孔结构的粘合。
图3A示出利用纳米颗粒硬掩模模板的自组装、连续的金属沉积以及对模板进行蚀刻的3D金属纳米多孔结构。
图3B示出利用纳米颗粒硬掩模模板的自组装的金属NP、CNT/rGO NW和二氧化硅纳米球的3D混合物。
图3C示出利用纳米颗粒硬掩模模板的自组装的具有金属壳的芯/壳二氧化硅或聚苯乙烯纳米球。
图3D示出图3A至图3C中呈现的结构的对准与粘合。
图4A1示出利用纳米尺寸硬掩模和蚀刻形成纳米柱的有序阵列的一个示例。
图4A2示出利用纳米尺寸硬掩模和蚀刻形成纳米柱的有序阵列的另一示例。
图4B1示出通过自掩蔽和蚀刻随机形成纳米结构。
图4B2示出通过种子形成和水热生长以及随后的金属沉积来随机地形成纳米结构。
图5A示出微器件阵列和接收基板的焊盘之间的竖直对准的CNT/rGO NW的粘合。
图5B示出微器件阵列的焊盘和接收基板的焊盘之间随机形成的CNT/rGO NW的粘合。
图6A示出利用纳米柱/NW装饰的rGO片材的随机3D堆叠的形成。
图6B示出利用纳米柱/NW装饰的rGO片材的竖直对准的3D堆叠的形成。
图6C示出微器件阵列的焊盘和接收基板的焊盘之间的利用纳米柱/NW装饰的rGO片材/泡沫/膜的随机对准的3D堆叠的粘合。
图6D示出微器件阵列的焊盘和接收基板的焊盘之间的利用纳米柱/NW修饰的rGO片材/泡沫/膜的竖直对准的3D堆叠的粘合。
图7A示出装饰在还原氧化石墨烯(rGO)上的金属纳米颗粒/纳米线的形成。
图7B示出装饰在微器件阵列的焊盘和接收基板的焊盘之间的还原氧化石墨烯(rGO)片材/泡沫/膜上的金属纳米颗粒(NP)的3D堆叠的粘合740。
图7C示出装饰在微器件阵列的焊盘和接收基板的焊盘之间的还原氧化石墨烯(rGO)片材/泡沫/膜上的银纳米颗粒/纳米线的3D堆叠的粘合。
图8A示出对准交叉的金属/TCO纳米线和纳米纤维的3D支架。
图8B1示出随机交叉的金属纳米线和纳米纤维的3D支架。
图8B2示出用金属纳米颗粒装饰的随机交叉的金属纳米线和纳米纤维的3D支架。
图8C示出微器件阵列和接收基板之间的用金属NP装饰的随机交叉的纳米线/纳米纤维的3D支架的互锁粘合。
图8D1至图8D3分别示出了根据本发明的实施方式的裸露的Ag NW、涂覆铟的Ag NW和涂覆锡(Sn)的Ag NW的SEM图像。
图8E示出根据本发明的实施方式的电阻与DC电流的图示。
图8F示出根据本发明的实施方式在Ag NW的电阻和纳米节点上施加直流脉冲(PDC)的效果。
图9A示出具有改善的互锁性能的分层分支式纳米线。
图9B示出具有改善的互锁性能的梳状分支式纳米线。
图9C示出对准/随机/梳状分层纳米结构的3D支架。
图9D示出微器件阵列和接收基板之间的对准分层纳米结构的3D支架的粘合。
图10A示出具有纳米线的具有改善的互锁性能的分支式纳米线。
图10B示出具有纳米锥支柱的具有改善的互锁性能的分支式纳米线。
图11示出利用纳米球光刻、随后通过粘合材料(例如,金属层)沉积和蚀刻形成2D纳米孔阵列来形成金属纳米网的示例。
图12A示出二氧化硅/聚苯乙烯纳米珠子和金属/TCO NW/石墨烯纳米线/CNT的混合物的用于选择性粘合的3D组装。
图12B示出二氧化硅/聚苯乙烯纳米珠子和金属/TCO NW/石墨烯纳米线/CNT的具有附加金属NP的混合物的用于选择性粘合的3D组装。
图13示出芯金属/芯-壳/合金纳米颗粒的一个示例。
图14示出并入到可固化的宿主介质中的芯金属/芯-壳/合金纳米颗粒的粘合。
图15A示出固化剂在对准之后在形成于微器件阵列和接收基板的焊盘上的纳米结构的粘合中的应用。
图15B示出固化剂在对准之前在形成于微器件阵列和接收基板的焊盘上的纳米结构的粘合中的应用。
具体实施方式
除非另外限定,否则本文使用的全部技术术语和科学术语具有与由本发明所属领域的普通技术人员通常所理解的含义相同的含义。
除非上下文清楚地另行指出,否则如本说明书和所附权利要求中所使用的那样,单数形式“一”、“一个”和“所述”包括复数指代。
在本公开中,术语“纳米颗粒”、“纳米结构”、“纳米柱”和“纳米线”可互换使用。“纳米结构”、“纳米柱”和“纳米线”可限定为具有限制到几十纳米或更小的厚度或直径和不受限的长度的结构。
在本公开中,术语“器件”、“竖直器件”和“微器件”可互换使用。
将多个微器件转移到接收器基板中的工艺包括将预先选定的微器件阵列粘合到接收器基板、随后移除供体基板。已经针对微器件开发了多种粘合工艺。
在本公开中,接收器基板中的焊盘表示接收器基板中微器件要转移到的指定区域。焊盘可具有某种形式的粘合材料以永久地保持微器件。焊盘可堆叠成多层以提供具有改善的粘合与导电能力的机械上更稳定的结构。
为了建立光电子器件与接收器基板上的接收器焊盘之间的电连接,光电子器件粘合至接收器焊盘。在一些情况中,将粘合层沉积到光电子器件和接收器基板焊盘上,以建立光电子器件和接收器基板焊盘之间的粘合。在粘合层之间建立的物理连接之后,施加多个粘合条件以加固粘合。这些粘合条件可以是电流、光、温度和/或压力的施加。这些粘合的可靠性是粘合焊盘和光电子器件的表面区域、用于每个焊盘的粘合材料的量和类型/结构以及粘合层与原始焊盘和/或光电子器件的粘合性的直接功能。
由于对于由粘合至接收器基板的光电子器件阵列制成的高密度器件来说,粘合焊盘变得更小,所以粘合产量、性能和可靠性变得更具挑战。
根据一个实施方式,为了提高粘合可靠性和产量,对接收器基板或光电子器件(微器件)上的粘合焊盘的表面进行纹理化。这里,导电(或非导电)材料的层作为掩模被沉积。该层应至少覆盖粘合焊盘区域。在沉积导电层之后,可在层(多个层)上进行其他处理,诸如表面处理、图案化和/或功能化。接下来,通过诸如离子铣削、激光烧蚀、反应离子蚀刻(RIE)、其他干蚀刻或湿蚀刻方法的不同方法来纹理化所述层(或多个层)。纹理增加了粘合焊盘的表面区域并且还建立能够耐受不同焊盘之间的高度错配的互锁情况。
根据另一实施方式,粘合层和/或粘合剂沉积在焊盘的表面上。在一种情况中,沉积焊接材料(诸如In、Tin等)的薄层。在另一情况中,纳米颗粒(固体导电的或混合的壳-芯导电的/非导电的)散布到焊盘的表面中。这些纳米颗粒可悬浮在溶液内部,其中,溶液还可用作粘合剂(和空的空间的填料),以及溶液可蒸发并且将纳米颗粒留在表面上。在一种情况中,纹理可经过全部层,直到其到达焊盘。这种情况将由仅通过焊盘表面区域连接的单独3D结构构成。
在另一情况中,在表面(至少在焊盘表面上)生长3D结构。这里,诸如纳米线的3D结构可以是导电的。在一种情况中,其还可以是粘合剂。在另一情况中,可将其它层沉积到纳米线的顶部上以建立粘合剂。在另一情况中,诸如其它纳米线、2D片材或球体(例如,涂覆二氧化硅的金属纳米颗粒)的纳米颗粒可散布在3D结构之间。在另一情况中,溶液可用于填充3D结构之间的区域(在使用散布的纳米颗粒的情况中,该溶液可与散布的纳米颗粒的溶液相同)。在一些情况中,导电3D结构(即,金属纳米线)不提供粘合所需的有效的结构硬度。在这种情况中,沉积非金属纳米线芯,并且通过导电层(和/或粘合层)来覆盖表面。这些层还将3D结构的表面与焊盘表面或微器件连接。在另一情况中,非金属纳米线用作用于诸如金属纳米线、2D片材(还原石墨层)、球等的导电材料的结构支撑。用于粘合3D结构的其它方法也可与这些结构一起使用。
在一种情况中,3D结构(通过纹理化或生长形成的)可通过额外的生长工艺进行分支。额外的分支可提供更大的表面和更好的互锁。
如果3D结构位于焊盘表面区域外部(通过表面纹理化或生长),则其将不连接至接收器基板或微器件基板上的任何有源元件。这些结构可通过蚀刻来移除,或者可保留在表面上并且提供某些额外的功能。在一种情况中,它们可提供结构支撑。此外,这些结构可设计成提供某些光学性能,诸如某一波长的过滤以提供更好的颜色纯度和/或光方向性。在另一情况中,它们可用作诸如电容式触摸的其它传感器。由于该结构的纵横比非常高,所以顶部处的电场可非常高。因此,由外部源引起的小扰动可在电场中建立可被检测为触摸输入的有效改变。
在另一实施方式中,支架结构用于增强光电子器件和接收器基板之间的粘合性能。在一种情况中,支架层在至少焊盘表面上生长或形成。一个方法是在表面上使模板显影(develop)。这些模板可由诸如球体、AAO、图案化光刻胶、嵌段共聚物等的粒子制成。接下来,将至少一个导电层沉积到模板上。此后,模板可移除或保留在结构内部。这里,可使用其它粘合层或粘合剂(纳米颗粒、聚合物…)。在另一情况中,将支架转移或沉积到表面上。这里,在一种情况中,将至少一个粘合层用于支架结构和焊盘(或微器件)之间以将支架保持在适当位置。在另一情况中,在支架转移或沉积到表面上之后沉积粘合层(不同的方法)。粘合层可以是诸如焊接材料、聚合物、具有纳米颗粒的功能性溶液等的不同材料。
在一个实施方式中,位于接收器和/或微器件基板上的接触区域(粘合区域)利用具有大活性表面区域的纳米纹理化结构、纳米多孔结构和纳米孔结构而增大。纳米纹理化结构和纳米多孔结构可随机地形成或者以限定顺序形成。例如,纳米孔可形成为对准孔结构或随机多孔结构的阵列。
在另一实施方式中,使用由透明导电氧化物(TCO)、金属和/或基于导电石墨烯的材料(诸如还原氧化石墨烯(rGO)和碳纳米管(CNT))制成的圆锥状纳米结构和针状纳米结构、柱状物和纳米线(NW)。这些直立(或稍微倾斜的)结构提供具有低电阻率的竖直电流路径,并且展现出机械柔性和热稳定性的优点。纳米结构可以以高密度布置随机地形成,或者可制造成具有期望尺寸和间距的有序阵列结构。将优化纳米结构的数量以用于最大的竖直传导率。
在该实施方式中,结构通过蚀刻平坦层形成。通过不同的方法(例如等离子体加强的化学蒸气沉积(PECVD)、溅射、印刷、旋转涂布…)沉积薄膜层以用作硬掩模,之后将图案形成在层的顶部上。利用不同的方法(离子铣削、干蚀刻、湿蚀刻、激光烧蚀等)蚀刻所述层以形成3D纳米结构。所述结构可通过蚀刻整个层或通过仅蚀刻所述层的部分来形成。
在另一方法中,纳米结构在表面上自组装。位于微器件或接收器基板上的焊盘区域的表面通过沉积或不同的固化工艺(例如,表面功能化等)进行处理,以使得能够选择性组装焊盘区域或整个表面区域上的结构。
在另一实施方式中,纳米结构由另一层覆盖以增强粘合工艺。在一种情况中,结构由可通过电流、光、热、机械力或化学反应固化的材料覆盖。在这种情况中,在将接收器基板和微器件对准并且连接到一起之后,施加所需要的固化剂以增强粘合。
在另一实施方式中,可利用其它材料来填充结构之间的空间以增强粘合工艺。这些材料可在不同的条件和固化剂(电流、光、压力、热等)下固化。
在另一实施方式中,接收器或微器件的整个表面(包括焊盘区域和焊盘区域之间的空间)用纳米结构覆盖。然而,纳米结构(纳米线、纳米颗粒、涂覆二氧化硅的纳米颗粒等)是稀少的,使得结构之间不存在连接。在一种情况中,结构可通过诸如聚酰胺薄膜层、SU8薄膜层、PMMA薄膜层等的一些介电材料分离。这里,微器件和接收器基板通过形成在表面上的结构对准并粘合到一起。可利用不同的固化工艺来加强粘合。在一种情况中,可通过所述结构来将电流施加成穿过微器件以用于微米/纳米焊接/节点。在另一情况中,更高的温度、压力和/或光可用于加强粘合工艺。
在一个实施方式中,利用形成3D支架的随机交叉的金属纳米线、分支式纳米线、碳纳米管、3D金属和碳纳米纤维以及金属网/织物来形成具有极大表面区域的互锁纳米结构。NW的交叉在空间上扩展了粘合区域,产生有效粘合。
对于上述实施方式,焊盘区域中的纳米结构的尺寸(直径)、长度和浓度可设计成最大化粘合轮廓。因此,实现最大化性能。
一个实施方式使用利用逐层(LBL)组装工艺锚固到NW/rGO和CNT上的纳米颗粒。在这些结构中,金属/rGO NW和CNT将用金属、涂覆二氧化硅的金属和涂覆金属的二氧化硅纳米颗粒纳米填料(诸如银、银/二氧化硅和镍NP)装饰。这样的结构增加表面区域,产生高性能的导电粘合剂。因此,将实现两个焊盘之间最大的粘合区域和最优的导电路径。
其他实施方式涉及在3D组装中二氧化硅或聚苯乙烯纳米珠子和金属NP、金属和石墨烯纳米线或CNT的组合。导电纳米颗粒、金属和rGO NW和CNT散布到3D二氧化硅或聚苯乙烯晶体中,以建立用于选择性粘合的竖直电流路径。在粘合工艺期间,二氧化硅本身在压力和温度下用作机械鲁棒性材料。
本说明书的多个实施方式涉及如所形成的纳米结构(多孔结构、金属和rGO NW、CNT、金属和涂覆二氧化硅的NP)在透明且机械柔性和热稳定的宿主介质中的嵌入。
本说明书的多个实施方式涉及控制在粘合工艺期间施加的电流、温度和压力以提供牢固的粘合。
本公开的目的是描述用于在低温下两个基板之间有效且持久的粘合的金属纳米结构的应用。含有金属的纳米结构化的材料由于它们独特的化学物理性能而被广泛用于工业实践。纳米结构化金属的高内聚能和高熔点使得在粘合期间成分的稳定性得以扩展(与可靠性改善相关)。金属粒子的高表面活性能对于两个表面之间的鲁棒粘合至关重要。金属纳米颗粒合成和表面化学改性是简单的,这使得包含金属纳米颗粒的系统尤其令人关注。这里,所提出的与金属纳米结构制造有关的所有工艺是在低温下进行的高吞吐量工艺,并且与传统半导体工艺兼容。
2D和3D金属纳米结构具有优越的性能,包括独特的形态结构、大的表面区域和高电导率。
在下文中详细描述根据本结构和方法的各实施方式。
图1A示出随机形成的结合纳米颗粒硬掩模的纳米纹理以及随后通过蚀刻进行的掩模移除。如图1A所示,2D金属纹理结构通过结合纳米掩模和蚀刻利用粘合材料104形成在基板106上。诸如铝氧化物(Al2O3)、二氧化硅和聚苯乙烯纳米球或其它掩模的纳米颗粒102可用作蚀刻掩模。诸如利用各向异性等离子体化学的对金属具有高蚀刻选择性的反应离子蚀刻(RIE)、通过铣削工艺的物理蚀刻和简单但受控的湿蚀刻过程的蚀刻工艺114可用于形成金属纳米纹理120。所述纹理的几何结构和尺寸可通过蚀刻掩模的尺寸和蚀刻条件来调整。纳米纹理的深度110可等于用作粘合材料104的金属层的深度。掩模移除的工艺112可通过简单的超声波降解或化学蚀刻来实现。
图1B示出将纳米纹理金属粘合到微器件和接收基板上。所述纳米纹理结构可形成在接收器基板104b或微器件焊盘102b上。在一种情况下,可形成位于微阵列的焊盘上的纳米纹理金属106b和位于接收基板的焊盘上的纳米纹理金属108b。在粘合期间,表面纹理可调节不同焊盘和/或微器件之间的一些高度差。此外,表面纹理建立更多表面区域以用于更可靠的粘合。位于微阵列的焊盘上的纳米纹理金属106b与位于接收基板的焊盘上的纳米纹理金属108b之间的粘合112b利用互锁的粘合112b建立大的表面区域。
图1C示出SEM图像和放大的图像,其示出利用纳米球掩模和铣削实现的银纳米纹理。SEM图像A和放大的图像B示出利用纳米球掩模和铣削实现的银纳米纹理。金属纳米纹理结构还可在干蚀刻工艺或湿蚀刻工艺中通过聚合物自掩模来形成。
在另一实施方式中,表面纹理利用模板和沉积来显影。在此方法中,模板形成在由导电材料覆盖的表面之间的空间上。模板可从表面移除或保留在表面上。
图2A1示出利用具有设计尺寸间距的嵌段共聚物(BCP)或铝阳极氧化物(AAO)模板在基板上形成无孔/纳米孔纳米结构的阵列。如2A1所示,具有设计尺寸间距的BCP或AAO204用作位于基板202上的模板。3D海绵体纳米多孔和纳米孔208(随机或有序的)通过在纳米制模之后利用PECVD、PVD、CVD、溅射、印刷、旋转涂布、电镀、无电镀等粘合材料206(例如,金属)沉积/生长来形成。
图2A2示出将纳米多孔和纳米孔金属纳米结构粘合在微器件和接收基板上。所述结构可形成在接收器基板104b或微器件焊盘102b上。在一种情况下,可形成位于微阵列204a的焊盘上的纳米多孔和纳米孔金属纳米结构和位于接收基板206a的焊盘上的纳米多孔和纳米孔金属纳米结构。在粘合期间210a,表面纹理可调节不同焊盘和/或微器件之间的一些高度差。此外,表面纹理建立更多表面区域以用于更可靠的粘合。在一种情况中,由能够通过电流、光、热、机械力或化学反应而固化的材料208来覆盖所述结构。位于微阵列的焊盘上的纳米多孔和纳米孔金属纳米结构204a与位于接收基板的焊盘上的纳米多孔和纳米孔金属纳米结构206a之间的粘合利用互锁的粘合212a建立大的表面区域。
图2B1至图2B3示出在基板204b上形成无孔/纳米孔纳米结构的阵列的示例,其中,基板204b具有位于基板204b的顶部上的粘合材料202b。在图2B1中,嵌段共聚物(BCP)和铝阳极氧化物(AAO)用作模板216。结构层(例如诸如银(Ag)、铟(In)、镍(Ni)、Co或金属合金的金属)的电化学沉积和无电镀218可用于覆盖间隔(或孔)。随后可通过湿移除工艺来移除210模板。
图2B2示出在基板204b上形成无孔/纳米孔纳米结构的阵列的另一示例,其中,基板204b具有位于基板204b的顶部上的粘合材料202b,其中,图案化蚀刻掩模用作模板214。结构层(例如诸如银(Ag)、铟(In)、镍(Ni)、Co或金属合金的金属)的电化学沉积和无电镀228可用于覆盖间隔(或孔)。随后可移除230模板以形成无孔/纳米孔纳米结构。
图2B3示出在基板204b上形成无孔/纳米孔纳米结构的阵列的另一示例,其中,基板204b具有位于基板的顶部上的粘合材料202b,其中,诸如二氧化硅或聚苯乙烯珠子或纳米球的硬掩模用作模板220。结构层(例如诸如银(Ag)、铟(In)、镍(Ni)、Co或金属合金的金属)的电化学沉积和无电镀222可用于覆盖间隔(或孔)。随后可化学地(例如,在二甲基甲酰胺DMF中)或通过剥离(在二氧化硅模板的情况下)来移除224模板。
在一个实施方式中,无孔/纳米孔的形状、间距和尺寸可通过纳米模板的尺寸来调整。
图2C示出微器件阵列与接收基板之间的无孔/纳米孔结构利用不同模板的粘合。这里,所述表面可通过其它粘合层或填料层覆盖。在一种情况中,无孔/纳米孔金属纳米结构利用不同的模板(例如226(嵌段共聚物(BCP)和铝阳极氧化物(AAO)、232(图案化蚀刻掩模)、230(二氧化硅或聚苯乙烯珠子或纳米球))形成在微阵列和接收基板的焊盘上。此外,示出了用于具有无孔/纳米孔结构的微器件与接收基板之间的粘合242。
调节表面粗糙度的一个方法是在接收器焊盘或微器件的顶部上形成多孔粘合层。虽然多孔层具有将微器件保持在适当位置的机械强度,但是弹性可补偿表面不均匀性。此外,弹性可对由于可能的折叠、旋转或压力而产生的机械应力提供更多的耐受性。这里,在形成多孔表面之后,可沉积其它层以促进微器件与接收器焊盘之间的粘合。然而,表面本身可由诸如铟、锡、银等的粘合材料制成。在另一实施方式中,模板由导电层完全覆盖(可形成一些开口)。可通过蚀刻或其它保留3D多孔层的方法来移除模板。可在将模板形成在表面上之后在模板上沉积导电层,或者可在形成到表面中之前由导电层覆盖模板。
图3A示出了利用诸如二氧化硅或聚合物纳米球模板302的纳米颗粒硬掩模模板的自组装而在基板304上形成金属纳米多孔结构的剖视图和俯视图。金属层306可在形成3D模板之后通过PVD和CVD方法来沉积。可移除310模板并且可形成3D纳米多孔结构308。
图3B示出金属NP、CNT、rGO纳米线(NW)、Ag NW和二氧化硅纳米球的混合物形成模板的316剖视图和320俯视图。3D金属纳米多孔结构将在二氧化硅移除后释放。
在第三个方法中,图3C示出了利用金属壳形成3D胶晶模板的芯/壳二氧化硅纳米球的剖视图和俯视图。在二氧化硅移除之后,将形成中空金属球的阵列。
图3D示出了诸如图3A至图3C中所呈现的金属纳米多孔结构340、3D金属纳米多孔结构350和中空金属球360的结构的对准与粘合。
图4A1示出利用纳米尺寸的硬掩模和蚀刻(干蚀刻、铣削、湿蚀刻、激光烧蚀)形成纳米柱/纳米线/针状物/纳米锥纳米结构的有序阵列。图4A1示出纳米结构的竖直阵列形成在透明导电氧化物(TCO)(ZnO、ITO、GIZO等)和金属(Ag、Ni等)上,其中,纳米结构包括圆锥形纳米结构、针状纳米结构、柱状物和纳米线。所述结构可制造成具有期望尺寸和间距402的有序阵列结构。将优化纳米结构的数量以用于最大的竖直导电率。如本文所说明的,所述结构可利用掩模方法或无掩模的方法形成,其中,无掩模的方法利用相似但更受控制的方法。在前述方法中,形状、尺寸和间距(由粘合区域中的纳米结构的密度确定)通过蚀刻掩模的尺寸来控制。在图4A1中,硬掩模404用作基板408上的模板。粘合材料406可通过PECVD、溅射、电子束、蒸发、电镀、印刷、旋转涂布等中之一来沉积。可利用RIE或铣削工艺对粘合材料(TCO或金属)有选择性地执行蚀刻工艺410以形成针状或圆锥状的纳米结构。可移除412模板并且可沉积覆盖层414以提高微阵列的焊盘102b和接收基板104b上的3D结构的有序阵列的粘合性能。在一种工艺中,圆锥、针状的纳米结构可的形成可通过使用与图4A1的工艺相同的工艺并且通过利用二氧化硅或聚苯乙烯纳米球作为硬掩模进行蚀刻(干蚀刻、铣削、湿蚀刻)来完成。
图4A2示出利用纳米球硬掩模和蚀刻(干蚀刻、铣削、湿蚀刻、激光烧蚀)来形成纳米柱/纳米线/针状物/纳米锥纳米结构的有序阵列。纳米球可用作基板408上的模板404。粘合材料406可通过PECVD、溅射、电子束/蒸发、电化学镀和无电镀、印刷、旋转涂布等中之一来沉积。可利用RIE或铣削工艺对粘合材料(TCO或金属)有选择性地执行蚀刻工艺410以形成针状或圆锥状的纳米结构。结构448可制造成具有期望尺寸和间距的有序阵列结构。可移除442模板并且可沉积覆盖层414以提高微阵列的焊盘102b和接收基板104b上的3D结构的有序阵列的粘合性能。
图4B1至图4B2示出通过自掩蔽和蚀刻随机形成纳米结构。在一个实施方式中,所述结构可制造成以高密度布置随机形成的具有期望尺寸和间距的有序阵列结构。图4B1示出用于基板462和粘合材料464上的聚合物自掩模460。可通过自顶向下蚀刻472(诸如,干蚀刻、湿蚀刻和铣削)来实现随机纳米结构466/圆锥状纳米结构468/针状纳米结构470的形成,并且这些结构可形成在接收器基板104b或微器件焊盘102b上。
图4B2示出通过种子形成480以及水热生长、CVD生长和LPCVD生长482以及随后的金属沉积486来随机地形成纳米结构。可利用水热生长、CVD生长和LPCVD生长482来实现随机纳米结构/圆锥状纳米结构/针状纳米结构的形成。在这些工艺中,纳米结构的几何参数通过前驱体/气体化学和水热条件/等离子体条件来控制。如此形成的纳米结构484可利用具有良好粘合性能的层486涂覆,以提高粘合质量。可通过生长和随后的(粘合材料)沉积来实现随机纳米结构/圆锥状纳米结构/针状纳米结构的形成,并且这些结构可形成在接收器基板104b或微器件焊盘102b上。
除自顶向下蚀刻之外,可在与大多数接收器基板兼容的低温(例如约150℃)下利用水热方法生长TCO NW。生长结构482可用作主动粘合区域,或者可用作用于预期的金属膜486(诸如Ag、Au、In、Tin、In/Tin、Ni、Cu、Co等)的支承模板。在这种情况中,利用与低温工艺兼容且具有较好机械强度的材料(例如,ZnO)来形成纳米线的阵列。然后可通过导电层与粘合层来覆盖纳米线的表面。
如所提到的各种金属纳米结构(诸如纳米锥、纳米柱和纳米线)可利用诸如选择性金属纳米级蚀刻方法(SMNEM)的湿化学蚀刻工艺来生产。湿化学工艺提供高吞吐量和低温(<75℃)蚀刻,这与传统的半导体工艺兼容。介电泳辅助生长还可用于由盐水溶液(诸如银和钯)来形成金属纳米线。
图5A至图5B位于微器件阵列102b的焊盘和接收基板104b的焊盘之间的竖直/随机对准的碳纳米管(CNT)/还原氧化石墨烯(rGO)NW的粘合。诸如rGO NW和CNT的高导电性的碳基纳米材料的竖直对准502(图5A)或随机对准510(图5B)可实现为一维且竖直的电流路径,以用于微器件阵列102b和接收基板104b的焊盘之间的粘合506。rGO NW可通过化学还原来制造,且CNT可利用CVD、激光烧蚀和电弧放电的方法来生产。竖直对准508(图5A)或随机形成的纳米结构514(图5B)可形成到基板上。
图6A至图6B示出利用纳米柱/NW装饰的rGO片材的随机/竖直对准3D堆叠的形成。图6A示出利用原位生长的ZnO纳米柱/纳米线602装饰的rGO片材/泡沫/膜604的3D堆叠可通过直接冷冻干燥与水热工艺实现。堆叠可随机地形成(图6A),或者可形成为竖直对准的结构(图6B)。
独特结构可建立互锁、柔性、高性能的粘合介质,这在增加复合材料的密度和表面轮廓时有效地减少rGO的集聚。可在形成3D堆叠结构之后,在3D堆叠结构上沉积非常薄层的粘合材料以提高粘合性能。粘合材料可以是In、Ag和Sn。
图6C至图6D示出微器件阵列的焊盘和接收基板的焊盘之间的利用纳米柱/NW装饰的rGO片材/泡沫/膜的竖直对准/随机对准的3D堆叠的粘合。图6C示出微器件阵列102b的焊盘和接收基板104b的焊盘之间的利用纳米柱/NW 626装饰的rGO片材/泡沫/膜的随机对准的3D堆叠的粘合624。类似地,图6D示出微器件阵列102b的焊盘和接收基板104b的焊盘之间的利用纳米柱/NW 626修饰的rGO片材/泡沫/膜的竖直对准的3D堆叠的粘合638。
图7A示出装饰在还原氧化石墨烯(rGO)702上的金属纳米颗粒/纳米线的形成。装饰在rGO片材/膜/泡沫704、706上的金属纳米颗粒/纳米线是互相支承的多孔结构,其可通过在惰性气体中对用金属前驱体涂覆的自组装石墨烯氧化物(GO)702进行退火而在原位制备。
图7B示出装饰在微器件阵列102b的焊盘和接收基板104b的焊盘之间的还原氧化石墨烯(rGO)片材/泡沫/膜748上的金属纳米颗粒(NP)的3D堆叠的粘合740。在形成3D堆叠结构之后,可在3D堆叠结构上沉积非常薄层的粘合材料以提高粘合性能。粘合材料可以是In、Ag和Sn。
图7C示出装饰在微器件阵列102b的焊盘和接收基板104b的焊盘之间的还原氧化石墨烯(rGO)片材/泡沫/膜上的金属纳米线的3D堆叠的粘合756,金属纳米线的3D堆叠创建具有加强的互锁和表面轮廓的粘合材料。可在形成3D堆叠结构之后,在3D堆叠结构上沉积非常薄层的粘合材料以提高粘合性能。粘合材料可以是In、Ag和Sn。
图8A示出对准交叉的金属/TCO纳米线和纳米纤维(金属、聚合物、CNT、碳等)的3D支架。单独的纳米线和纳米纤维的3D支架或用金属NP装饰的纳米线和纳米纤维的3D支架是具有改善的互锁性能和极大的表面积的3D纳米结构的其它示例。它们可利用对准交叉的金属(例如银)纳米线、3D金属和聚合物、CNT和碳纳米纤维形成。
图8B1示出利用随机对准交叉的金属纳米线、3D金属和聚合物、CNT和碳纳米纤维形成的随机交叉的金属纳米线、CNT和纳米纤维的3D支架。可在形成3D堆叠结构之后,在3D堆叠结构上沉积非常薄层的粘合材料以提高粘合性能。粘合材料可以是In、Ag和Sn。
图8B2示出用金属纳米颗粒装饰的随机交叉的金属纳米线、CNT和纳米纤维的3D支架。可将金属NW、CNT和碳纳米纤维滴铸、旋转涂布或电纺(静电纺丝)到基板上,随后进行金属的化学(或物理)沉积,或进行金属纳米颗粒的化学沉积和具有导电NP的纳米纤维的装饰。该工艺使得导电性得到快速改善。金和银纳米结构可通过将(碳、聚合物、DNA等)纳米纤维(具有用于与金属前驱体反应的一些表面功能团)简单地浸入金属离子前驱体的水溶液中来合成。虽然金属离子在纳米纤维的表面上被局部地还原,但是仍形成大的金属纳米颗粒,并且形成平滑的碳(或聚合物)–金属混合纳米结构。
图8C示出微器件阵列102b与接收基板104b之间用金属纳米颗粒804装饰的随机交叉的纳米线/CNT/纳米纤维806的3D支架的互锁粘合802。
图8D1至图8D3分别示出了裸露的Ag NW(纳米线)、涂覆铟(In)的Ag NW和涂覆锡(Sn)的Ag NW在通过施加400mA恒定直流(DC)80秒的电气粘合之后的SEM图像。用粘合材料对Ag NW的涂覆不仅覆盖纳米线,而且还填充节点之间的间隙。纳米节点的形成在图像中显而易见。粘合材料增强共晶粘合以形成具有Ag NW的合金并且减少经历焦耳加热所需的热输入。因此,实现了纳米节点的形成在相关电阻减小的情况下的整体增加。
图8E示出通过施加25-800mA DC电流经由粘合材料在Ag NW上的沉积的电阻减小。在一个示例中,看到在较小的电流下电阻减小更显著,从而使得沉积方法更适合于小电流情况。看到涂覆在Ag NW上的铟和锡粘合材料对电阻具有相同的影响,其中,锡在减小电阻方面具有稍微更好的效果。在另一示例中,示出的涂覆双层In/Tin的Ag NW的电阻进一步减小,裸露的NW的电阻在较小电流情况下降低到其原始值的一半。用粘合材料对纳米线的涂覆在很大程度上加固了纳米线互锁。其还允许在发生焦耳加热后建立更多的电流路径,这是因为来自沉积金属区域的更多的接触点,使得电阻整体降低。
图8F示出与DC电流相比在Ag NW的电阻和纳米节点上施加直流脉冲(PDC)的效果。可观察到,随着施加的电流的大小增加,Ag NW的电阻呈对数减小。因此,所以在较高的施加电流下,更容易形成纳米节点。在施加PDC的情况下,在一个方向上在“工作时间”和“关断时间”之间切换的25Hz的波形与标准DC相比展现出最优的电阻减小,这表示“工作时间”足以提供充分的能量来烧结纳米线,而“关断时间”允许在没有大量的热响应速率损失的情况下容易地进行应变。
图9A示出具有支柱902(诸如SnO2、ZnO)和分支904(诸如ZnO、Ag)的、具有改善的互锁性能的分层分支式纳米线,其中,所述分层分支式纳米线将碳热还原与水热或催化剂辅助的VLS生长相结合。可通过将碳热还原与水热生长组合的工艺来制造包括分层的具有互锁性能的分支式纳米线。
图9B示出具有支柱906(诸如SnO2、ZnO)和分支908(诸如ZnO、Ag)的具有改善互锁性能的分层梳状分支式纳米线。包括分层、具有改善的互锁性能、具有支柱(诸如SnO2)和分支(诸如ZnO)的梳状纳米结构可通过将碳热还原与水热生长组合的工艺进行制造。
混合的SnO2–ZnO或ZnO-Ag纳米线还可通过在低压(约1Pa)下的两步碳热还原方法生产。其还可基于催化剂辅助的蒸气液体固体(VLS)原理利用单步碳热还原生产。在该合成工艺中,活性碳粉末用作还原剂,而金属纳米颗粒或纳米团簇充当成核种子。金属纳米颗粒种子确定合成的一维金属/金属氧化物纳米线的生长方向、界面能和直径。在该简便的合成方法中,纳米线的形态和性能主要受诸如温度、催化剂层的厚度、载气流的速率和源与衬底之间的距离的生长参数控制。支柱纳米线的直径将在几十纳米(约50nm至100nm)的范围内,而分支纳米线具有稍微更小的直径(约10nm至30nm)。诸如银、铟、锡等的粘合材料可蒸发到如此形成的分支/梳状的NW结构,从而利用金属层来覆盖所述分支/梳状的NW结构。
图9C示出这种具有高互锁粘合性能的结构的3D支架可通过堆叠对准纳米结构912、随机形成的分层纳米结构914和梳状纳米结构916来生产。
图9D示出微器件阵列和接收基板之间的对准纳米结构的3D支架的粘合。所产生的3D结构可利用金属纳米颗粒装饰,以进一步改善表面粘合区域。利用这些结构体的粘合结构可呈现为对准的且随机形成的分层以及梳状的纳米结构。
这些纳米线可直接形成到微器件和/或接收基板的焊盘上,或者它们可转移至焊盘并且通过薄层的沉积和粘合材料的选择而附接至表面。
图10A至图10B示出具有纳米线/纳米锥的、具有改善的互锁性能的分支式纳米线。具有纳米线支柱1002(金属、TCO)或纳米锥支柱1004和分支(金属、TCO)的具有改善的互锁性能的分支式纳米线还可通过蚀刻掩模(纳米硬掩模、二氧化硅、聚合物珠子等)的连续自组装和蚀刻(干蚀刻、湿蚀刻、铣削)形成。
图11示出使用具有设计尺寸的间距的纳米球光刻,通过蚀刻、随后通过粘合材料(例如,金属层)沉积形成2D纳米孔阵列来形成金属纳米网的示例。可利用纳米球光刻1100来图案化粘合材料1102(例如银薄膜、In薄膜、Sn薄膜)以形成具有优良均匀性、高导电性和良好透明度的2D六边形纳米孔阵列,进而从粘合材料1102(例如金属膜)制造精确受控的纳米网。具有适当的表面功能团的二氧化硅或聚合物纳米球可通过简单且可扩展的滴铸法、旋涂法、竖直浸涂法或朗格缪尔-布洛杰特槽(Langmuir-Blodgettt Troughs)法而组装成单层。接下来,可通过蚀刻1100来减少二氧化硅或聚合物珠子的尺寸。利用持续几分钟(5-10分钟)的适度等离子体条件在氟、氟-氧气(CF4/O2)的混合物或氧气气体(针对聚合物珠子的情况)下执行蚀刻。然后,将金属1102沉积到所述结构上。金属纳米网1106将在通过简单的超声波降解或化学蚀刻实现的纳米珠子的剥离1110之后形成。金属纳米网的尺寸和间距可通过所选择的纳米珠子的最初尺寸和后续的蚀刻步骤来设计。还示出了1108俯视图。
图12A示出二氧化硅/聚苯乙烯纳米珠子和金属/TCO NW/石墨烯纳米线/CNT的混合物的用于选择性粘合的3D组装。3D纳米多孔金属纳米结构可利用二氧化硅纳米制模和随后的电镀来形成。首先,将金属层1208沉积到基板上。接下来,将具有期望尺寸的二氧化硅或聚合物纳米珠子1206组装到表面上,以形成单层模板。通过等离子体干蚀刻来优化纳米珠子的尺寸,以建立开口。接下来,将金属层电镀到开口上。通过化学蚀刻工艺移除珠子1206,进而产生具有改善的表面区域的3D纳米多孔金属纳米结构。
二氧化硅纳米球或聚苯乙烯纳米珠子和具有一个方向的电流路径的纳米结构(例如金属/TCO NW、石墨烯纳米线或CNT等)的组合可形成可有利于选择性粘合的3D组装(其中,使用了具有微型LED器件的阵列)。
图12B示出二氧化硅或聚苯乙烯纳米珠子1224和金属/TCO NW、石墨烯纳米线或CNT等具有附加金属NP的混合物的用于选择性粘合的3D组装。所述金属纳米颗粒(NP)可利用逐层(LBL)组装工艺、浸涂或滴铸来锚固到上述所有纳米结构1226(包括本文提到的NW、CNT、rGO、3D支架)上。这些结构将利用金属或涂覆金属的二氧化硅或二氧化硅涂覆的金属纳米填料(诸如银、银/二氧化硅、镍、Ag-Cu纳米颗粒)来装饰。纳米填料可通过CVD工艺、水热生长法或通过碳热还原生长法或通过简单地从单分散的金属胶体溶液滴铸到如所形成的纳米结构上来在纳米结构上生长。锚固NP1228的纳米结构增加表面区域,产生高性能导电粘合剂。因此,将实现发明两个焊盘(1220、1222)之间的最优导电和最大的粘合区域。
二氧化硅成分使得该结构在机械上恢复到粘合压力和温度。还可将金属纳米颗粒添加到该结构以增加粘合表面区域。
导电的金属纳米线/纳米颗粒、石墨烯NW和CNT可通过简单的滴铸扩散到3D二氧化硅或聚苯乙烯晶体中。该结构可建立用于选择性粘合的竖直电流路径。
图13示出芯金属/芯-壳/合金纳米颗粒的示例。示出了诸如Ag、Ni等的芯金属纳米颗粒1302、诸如涂覆二氧化硅的银的芯/壳纳米颗粒1304、1306、涂覆金属的二氧化硅(Ag/二氧化硅)等以及合金纳米颗粒1308(Ag-Cu等)。
图14示出并入到可固化的宿主介质中的芯金属/芯-壳/合金纳米颗粒的粘合。诸如Ag、Ni等的芯金属纳米颗粒1412、诸如涂覆二氧化硅的银的芯/壳纳米颗粒1416、1418、涂覆银的二氧化硅(Ag/二氧化硅)等以及合金纳米颗粒1420(Ag-Cu等)将并入到热稳定且机械稳定的透明宿主介质1410中,透明宿主介质1410诸如聚酰亚胺、SU8、BCB、硅树脂、UV粘合剂和粘合环氧树脂。该宿主介质可利用电流且在光、热或机械力的条件下固化。在该方法中,为产生高导电性的各向异性层,关键是选择具有适当表面功能团的纳米颗粒。具有羧基和硫醇基的自组装单层(SAM)的银纳米颗粒提高了NP的界面性能并且改善了导电性。为了与粘合材料更好地粘合,微器件和接收基板的焊盘还可利用SAM层涂覆。所述介质中的NP浓度是为了最小地接近于零的横向导电率而必须优化的另一关键参数。用黑色箭头1422示出了方向性的电流路径。尽管该方法简单,但是该方法具有高度可扩展性。
由于所有上述结构的物理几何结构和高密度,上述结构可在不嵌入到周围宿主的情况下产生各向异性的粘合介质。上述结构建立具有活性表面(接触反应性能)、在竖直方向上的高导电性能和高表面区域的自立式金属纳米结构,同时展现出对在粘合期间施加的电流或/和压力和温度充分的抵抗性。
本文中提到的结构可由涂覆层覆盖以提高粘合性能。
图15A至图15B示出固化剂在对准之后/之前在形成于微器件阵列1502和接收基板1510的焊盘上的纳米结构的粘合1506中的应用。可设置涂覆层1504以增强粘合。为了在粘合期间提供额外的机械抵抗力,特别是对于多孔纳米结构/纹理纳米结构、NW、CNT和3D支架的密度低的情况,会将纳米结构嵌入到机械透明、柔性且热稳定的宿主介质中来用作固化剂。在仅将纳米颗粒用作填料(芯:Ag、Ni等和芯/壳结构:Ag/二氧化硅)或Ag-Cu合金的情况中,使用诸如聚酰亚胺、SU8、BCB、硅树脂、UV粘合剂和粘合环氧树脂的稳定的宿主介质也是有益的。可在对准1508以及接收器基板和微器件的连接之后(图15A)或之前1530(图15B)施加固化剂1512。
将针对不同的结构控制和调节粘合期间的电流、光强度、温度、压力和机械力。这些参数将根据结构的多孔性和密度来调整,以确保建立各向异性、导电且牢固的粘合。
在一个实施方式中,提供了粘合结构。粘合结构包括两个表面,其中,位于接收器基板上的至少一个粘合焊盘的一个表面的至少一部分电粘合至位于供体基板上的至少光电子微器件的另一表面的至少一部分,其中,两个表面中至少之一被纹理化以增大用于接收器基板和供体基板之间的粘合的表面区域。
在另一实施方式中,两个表面中至少之一在纹理化两个表面中至少之一之后由导电层覆盖,并且两个表面中至少之一通过离子铣削、激光烧蚀、反应离子蚀刻、干蚀刻和湿蚀刻中之一来进行纹理化。
在又一实施方式中,两个表面中至少之一通过用多个纳米结构覆盖两个表面中至少之一来纹理化。多个纳米结构包括非导电纳米结构、导电纳米结构或它们的组合中的一个。多个纳米结构是纳米纹理化金属纳米结构、纳米多孔金属纳米结构和纳米孔金属纳米结构之一,并且成纳米颗粒、纳米柱、纳米线、纳米针、纳米锥和涂覆二氧化硅的纳米颗粒之一的形式。
在另一实施方式中,多个纳米结构通过透明介电材料分离,其中,介电材料包括聚酰胺薄膜层、SU8薄膜层、PMMA薄膜层和BCB薄膜层之一。
在进一步的实施方式中,多个纳米结构在两个表面中至少之一上以随机顺序或对准顺序之一形成。随机顺序纳米结构利用自掩模蚀刻或通过结合二氧化硅或聚苯乙烯纳米球光刻和蚀刻而形成,且对准顺序纳米结构利用受控的光刻工艺或纳米球掩模而形成。
在又一实施方式中,将至少一种粘合剂沉积在两个表面中至少之一上。至少一种粘合剂填充多个纳米结构之间的空间。粘合剂至少包括从由铟、锡和银构成的群组中选择的至少一种材料。施加电流以在低温下形成粘合剂之间的共晶接合。
在另一实施方式中,在两个表面之间施加固化剂,以增强接收器基板和供体基板之间的粘合。固化剂包括聚酰胺薄膜层、SU8薄膜层、PMMA薄膜层、BCB薄膜层、环氧树脂和UV可固化粘合剂之一,并且固化以电流、光、热、机械力或化学反应之一的形式来执行。
在另一实施方式中,在两个表面之间的空间上形成模板,以增强接收器基板和供体基板之间的粘合。模板是嵌段共聚物(BCP)和铝阳极氧化物(AAO)、图案化蚀刻掩模、二氧化硅纳米球和聚苯乙烯珠子之一。纳米纹理化结构通过使用生长机理或电化学镀将粘合剂沉积到模板上来形成。可通过蚀刻工艺在两个表面之间可选地移除模板。
在进一步的实施方式中,两个表面中至少之一通过在两个表面中至少之一上形成3D支架纳米结构来纹理化。3D支架纳米结构是互锁的纳米结构,该互锁的纳米结构包括以下中的一个:随机交叉的金属纳米线、分层分支式/圆锥状纳米线、碳纳米管、石墨烯片材、用纳米线/纳米颗粒装饰的石墨烯片材、3D金属、碳纳米纤维和金属网/金属织物。
在又一实施方式中,3D支架结构通过将至少一个导电层沉积到位于两个表面中至少之一上的模板上来形成。粘合结构还包括在3D支架结构和两个表面中至少之一之间添加粘合层。预先形成的3D支架在粘合层添加到表面中至少之一上之后转移至两个表面中至少之一,并且预先形成的3D支架转移至两个表面中至少之一,并且所述粘合层在所述转移之后沉积。粘合层包括焊接材料、聚合物和功能性纳米颗粒膜之一。
在另一实施方式中,提供了粘合工艺。粘合工艺包括:提供两个表面,其中,接收器基板上的至少一个焊盘的第一表面的至少一部分电粘合至供体基板上的至少光电子微器件的第二表面的至少一部分;通过多个纳米结构覆盖两个表面中至少之一;以及用粘合剂填充多个纳米结构之间的区域。
在又一实施方式中,粘合剂是焊接材料、粘合材料、聚合物和填充有导电纳米颗粒的溶液之一。填充有粘合剂的多个纳米结构通过用于选择性粘合的蚀刻从焊盘之间的空间移除。两个表面在低温下通过电流固化电粘合以提供共晶粘合并形成纳米节点,并且电流固化通过向两个表面施加DC脉冲或AC电流来完成。
出于说明和描述的目的,前面已经对本发明的一个或多个实施方式进行了描述。其并非旨在穷举本发明或将本发明限制为所公开的精确形式。鉴于上述教导,许多修改和变化都是可能的。其意图是本发明的范围不受该详细描述的限制,而是由所附权利要求限定。
Claims (10)
1.粘合结构,包括:
两个表面,其中,接收器基板上的至少一个粘合焊盘的一个表面的至少部分电粘合至供体基板上的至少光电子微器件的另一表面的至少部分,其中,所述两个表面中的至少一个被纹理化,以增大用于所述接收器基板与所述供体基板之间的粘合的表面面积。
2.如权利要求1所述的粘合结构,其中,所述两个表面中的至少一个在使所述两个表面中的至少一个纹理化之后由导电层覆盖。
3.如权利要求1所述的粘合结构,其中,所述两个表面中的至少一个通过以下中的一个进行纹理化:离子铣削、激光烧蚀、反应离子蚀刻、干蚀刻和湿蚀刻。
4.如权利要求1所述的粘合结构,其中,所述两个表面中的至少一个通过由多个纳米结构覆盖所述两个表面中的至少一个来纹理化。
5.如权利要求4所述的粘合结构,其中,所述多个纳米结构包括以下中的一个:非导电纳米结构、导电纳米结构或非导电纳米结构和导电纳米结构的组合。
6.如权利要求4所述的粘合结构,其中,所述多个纳米结构是以下中的一个:纳米纹理化金属纳米结构、纳米多孔金属纳米结构和纳米孔金属纳米结构。
7.如权利要求4所述的粘合结构,其中,所述多个纳米结构为以下形式中的一种:纳米颗粒、纳米柱、纳米线、纳米针、纳米锥和涂覆二氧化硅的纳米颗粒。
8.如权利要求所述4的粘合结构,其中,所述多个纳米结构通过透明的介电材料分离,其中,所述介电材料包括以下中的一个:聚酰胺薄膜层、SU8薄膜层、PMMA薄膜层和BCB薄膜层。
9.如权利要求4所述的粘合结构,其中,所述多个纳米结构以以下顺序中的一个形成:在所述两个表面中的至少一个上的对准顺序或随机顺序。
10.如权利要求9所述的粘合结构,其中,所述随机顺序的纳米结构利用自掩模蚀刻或通过结合二氧化硅或聚苯乙烯纳米球光刻与蚀刻来形成。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CA2985254A CA2985254A1 (en) | 2017-11-14 | 2017-11-14 | Integration and bonding of micro-devices into system substrate |
CA2,985,254 | 2017-11-14 | ||
CN201811352458.8A CN109786352B (zh) | 2017-11-14 | 2018-11-14 | 微器件在系统基板中的粘合结构与粘合工艺 |
Related Parent Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201811352458.8A Division CN109786352B (zh) | 2017-11-14 | 2018-11-14 | 微器件在系统基板中的粘合结构与粘合工艺 |
Publications (1)
Publication Number | Publication Date |
---|---|
CN116741733A true CN116741733A (zh) | 2023-09-12 |
Family
ID=66335433
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN202310685272.9A Pending CN116741733A (zh) | 2017-11-14 | 2018-11-14 | 微器件在系统基板中的粘合结构与粘合工艺 |
CN201811352458.8A Active CN109786352B (zh) | 2017-11-14 | 2018-11-14 | 微器件在系统基板中的粘合结构与粘合工艺 |
Family Applications After (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201811352458.8A Active CN109786352B (zh) | 2017-11-14 | 2018-11-14 | 微器件在系统基板中的粘合结构与粘合工艺 |
Country Status (5)
Country | Link |
---|---|
US (4) | US10818622B2 (zh) |
CN (2) | CN116741733A (zh) |
CA (1) | CA2985254A1 (zh) |
DE (1) | DE102018128584A1 (zh) |
TW (1) | TWI706510B (zh) |
Families Citing this family (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CA2985254A1 (en) | 2017-11-14 | 2019-05-14 | Vuereal Inc | Integration and bonding of micro-devices into system substrate |
US10658349B1 (en) * | 2018-01-26 | 2020-05-19 | Facebook Technologies, Llc | Interconnect using embedded carbon nanofibers |
US10998297B1 (en) * | 2018-05-15 | 2021-05-04 | Facebook Technologies, Llc | Nano-porous metal interconnect for light sources |
CN110568567A (zh) * | 2018-06-06 | 2019-12-13 | 菲尼萨公司 | 光纤印刷电路板组件表面清洁及粗糙化 |
CN109192875B (zh) * | 2018-09-04 | 2021-01-29 | 京东方科技集团股份有限公司 | 背板及制造方法、显示基板及制造方法和显示装置 |
US11195811B2 (en) * | 2019-04-08 | 2021-12-07 | Texas Instruments Incorporated | Dielectric and metallic nanowire bond layers |
CN110371919B (zh) * | 2019-07-19 | 2022-06-17 | 北京航空航天大学 | 一种微纳米多级柱结构的自组装制备方法 |
US11777059B2 (en) | 2019-11-20 | 2023-10-03 | Lumileds Llc | Pixelated light-emitting diode for self-aligned photoresist patterning |
CN110752282B (zh) * | 2019-11-29 | 2024-06-11 | 华引芯(武汉)科技有限公司 | 一种具有高光效和高可靠性的uv led器件及其制备方法 |
CN113130837B (zh) * | 2019-12-31 | 2022-06-21 | Tcl科技集团股份有限公司 | 量子点发光二极管及其制备方法 |
DE102020107240A1 (de) * | 2020-03-17 | 2021-09-23 | Nanowired Gmbh | Kompositverbindung zweier Bauteile |
DE102021105129A1 (de) * | 2021-03-03 | 2022-09-08 | Nanowired Gmbh | Beschichten von Nanodrähten |
CN113702352A (zh) * | 2021-08-25 | 2021-11-26 | 山东智微检测科技有限公司 | 一种适用于气相糜烂性毒剂的sers检测芯片及其制备方法 |
CN114582744B (zh) * | 2022-02-18 | 2022-11-22 | 广东省科学院半导体研究所 | 一种高密度铜柱凸点键合互连的方法 |
CN117836925A (zh) * | 2022-07-13 | 2024-04-05 | 厦门市芯颖显示科技有限公司 | 绑定组件、微型电子部件及绑定背板 |
DE102022119151A1 (de) * | 2022-07-29 | 2024-02-01 | Ams-Osram International Gmbh | Optoelektronisches modul und verfahren zur herstellung eines optoelektronischen moduls |
Family Cites Families (29)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8728380B2 (en) * | 1995-11-15 | 2014-05-20 | Regents Of The University Of Minnesota | Lithographic method for forming a pattern |
US6340822B1 (en) * | 1999-10-05 | 2002-01-22 | Agere Systems Guardian Corp. | Article comprising vertically nano-interconnected circuit devices and method for making the same |
US20020145826A1 (en) * | 2001-04-09 | 2002-10-10 | University Of Alabama | Method for the preparation of nanometer scale particle arrays and the particle arrays prepared thereby |
US20040039717A1 (en) * | 2002-08-22 | 2004-02-26 | Alex Nugent | High-density synapse chip using nanoparticles |
US20040012730A1 (en) * | 2002-07-17 | 2004-01-22 | Long-Jyh Pan | Electrically shielding light guide for a liquid crystal display |
US7371674B2 (en) * | 2005-12-22 | 2008-05-13 | Intel Corporation | Nanostructure-based package interconnect |
JP4054881B2 (ja) * | 2006-02-06 | 2008-03-05 | 松下電器産業株式会社 | 単電子半導体素子の製造方法 |
CA2657423A1 (en) * | 2006-03-03 | 2008-02-07 | Illuminex Corporation | Heat pipe with nano-structured wicking material |
KR100844630B1 (ko) * | 2006-03-29 | 2008-07-07 | 산요덴키가부시키가이샤 | 반도체 장치 |
US8918152B2 (en) * | 2007-02-13 | 2014-12-23 | The Trustees Of The University Of Pennsylvania | Parallel fabrication of nanogaps and devices thereof |
JP5535915B2 (ja) * | 2007-09-12 | 2014-07-02 | スモルテック アーベー | ナノ構造体による隣接層の接続および接合 |
US8118934B2 (en) * | 2007-09-26 | 2012-02-21 | Wang Nang Wang | Non-polar III-V nitride material and production method |
JP5051243B2 (ja) * | 2008-02-15 | 2012-10-17 | 富士通株式会社 | 半導体装置の製造方法 |
US9017808B2 (en) * | 2008-03-17 | 2015-04-28 | The Research Foundation For The State University Of New York | Composite thermal interface material system and method using nano-scale components |
US20110039459A1 (en) * | 2009-08-11 | 2011-02-17 | Yancey Jerry W | Solderless carbon nanotube and nanowire electrical contacts and methods of use thereof |
JP2013518438A (ja) * | 2010-01-25 | 2013-05-20 | ボード オブ トラスティーズ オブ ザ レランド スタンフォード ジュニア ユニバーシティ | 接続されたナノ構造体及びそのための方法 |
US8877636B1 (en) * | 2010-02-26 | 2014-11-04 | The United States Of America As Represented By The Adminstrator Of National Aeronautics And Space Administration | Processing of nanostructured devices using microfabrication techniques |
CN201780997U (zh) * | 2010-07-08 | 2011-03-30 | 张栋楠 | 一种用于led芯片的散热结构 |
US9184319B2 (en) * | 2011-01-14 | 2015-11-10 | The Board Of Trustees Of The Leland Stanford Junior University | Multi-terminal multi-junction photovoltaic cells |
CN102723427B (zh) * | 2012-05-30 | 2015-09-02 | 惠州市大亚湾永昶电子工业有限公司 | Led晶片共晶焊接工艺 |
US8916448B2 (en) | 2013-01-09 | 2014-12-23 | International Business Machines Corporation | Metal to metal bonding for stacked (3D) integrated circuits |
US9006095B2 (en) * | 2013-02-19 | 2015-04-14 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor devices and methods of manufacture thereof |
CN105453001B (zh) * | 2013-07-31 | 2018-10-16 | 3M创新有限公司 | 将电子部件粘结到图案化纳米线透明导体 |
US11370024B2 (en) * | 2013-09-06 | 2022-06-28 | San Diego State University Research Foundation | Current activated tip-based sintering (CATS) |
US10309026B2 (en) * | 2015-09-01 | 2019-06-04 | International Business Machines Corporation | Stabilization of metallic nanowire meshes via encapsulation |
US9985248B2 (en) * | 2015-10-14 | 2018-05-29 | Microcontinuum, Inc. | Methods and systems for forming OLEDs and thin film devices |
US20170215280A1 (en) * | 2016-01-21 | 2017-07-27 | Vuereal Inc. | Selective transfer of micro devices |
WO2018098506A1 (en) * | 2016-11-28 | 2018-05-31 | Sila Nanotechnologies Inc. | High-capacity battery electrodes with improved binders, construction, and performance |
CA2985254A1 (en) | 2017-11-14 | 2019-05-14 | Vuereal Inc | Integration and bonding of micro-devices into system substrate |
-
2017
- 2017-11-14 CA CA2985254A patent/CA2985254A1/en not_active Abandoned
-
2018
- 2018-11-13 US US16/189,844 patent/US10818622B2/en active Active
- 2018-11-14 DE DE102018128584.1A patent/DE102018128584A1/de active Pending
- 2018-11-14 CN CN202310685272.9A patent/CN116741733A/zh active Pending
- 2018-11-14 TW TW107140378A patent/TWI706510B/zh active
- 2018-11-14 CN CN201811352458.8A patent/CN109786352B/zh active Active
-
2020
- 2020-09-24 US US17/031,587 patent/US12014999B2/en active Active
-
2023
- 2023-03-20 US US18/186,658 patent/US20230253350A1/en active Pending
-
2024
- 2024-05-07 US US18/657,384 patent/US20240297133A1/en active Pending
Also Published As
Publication number | Publication date |
---|---|
US20210020593A1 (en) | 2021-01-21 |
US20240297133A1 (en) | 2024-09-05 |
CN109786352B (zh) | 2023-06-30 |
US20190148321A1 (en) | 2019-05-16 |
US12014999B2 (en) | 2024-06-18 |
DE102018128584A1 (de) | 2019-05-16 |
US20230253350A1 (en) | 2023-08-10 |
CA2985254A1 (en) | 2019-05-14 |
TW201923976A (zh) | 2019-06-16 |
TWI706510B (zh) | 2020-10-01 |
US10818622B2 (en) | 2020-10-27 |
CN109786352A (zh) | 2019-05-21 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN109786352B (zh) | 微器件在系统基板中的粘合结构与粘合工艺 | |
CN109959980B (zh) | 疏水镜子以及使用该疏水镜子的汽车 | |
US11987717B2 (en) | Air-stable conductive ink | |
TWI418516B (zh) | 奈米粒子膜與其形成方法與應用 | |
US7732015B2 (en) | Process for producing nanoparticle or nanostructure with use of nanoporous material | |
JP2005517537A (ja) | 高度に組織化されたカーボン・ナノチューブ構造の指向性アセンブリ | |
Chen et al. | Self-assembly, alignment, and patterning of metal nanowires | |
TWI674442B (zh) | 疏水鏡子以及使用該疏水鏡子的汽車 | |
KR101039630B1 (ko) | 기판 상에 나노구조체를 선택적으로 위치시키는 방법 및 이에 의해 형성된 나노구조체를 포함하는 나노-분자 소자 | |
Chong et al. | Combinational template-assisted fabrication of hierarchically ordered nanowire arrays on substrates for device applications | |
KR20090024437A (ko) | 변형된 기판 구조를 갖는 탄소 나노튜브 막 및 그 제조방법 | |
KR102016850B1 (ko) | 에너지 하베스팅을 위한 대전체 구조, 이의 제조 방법 및 이를 이용하는 마찰전기 제너레이터 | |
Yoo et al. | Nanoparticle films as a conducting layer for anodic aluminum oxide template-assisted nanorod synthesis | |
CN109957345B (zh) | 疏水膜 | |
WO2006101659A2 (en) | Method of making nanoparticle wires | |
US20180286993A1 (en) | Electrode arrangement and method of production thereof | |
TWI694002B (zh) | 疏水窗戶以及使用該疏水窗戶的房子和汽車 | |
Fiedler et al. | Evaluation of metallic nano-lawn structures for application in microelectronic packaging | |
Fu et al. | Two-Dimensional Plasmonic Nanoassemblies: Fabrication, Properties, and Applications | |
JP5426246B2 (ja) | 配線板、およびその製造方法 | |
Li et al. | Preparation of free-standing metal wire arrays by in situ assembly | |
KR101081717B1 (ko) | 나노선 성장용 촉매 패턴 형성 방법, 이를 이용한 나노선 형성 방법 및 그 방법으로 형성된 나노선을 이용한 나노선 소자 | |
Shenhar et al. | Self-assembly and self-organization | |
Velev | Assembly of electrically functional microstructures from colloidal particles | |
US9142410B2 (en) | Semiconductor nano layer structure and manufacturing method thereof |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination |