TWI701766B - 積體電路裝置及其形成方法 - Google Patents

積體電路裝置及其形成方法 Download PDF

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TWI701766B
TWI701766B TW107115930A TW107115930A TWI701766B TW I701766 B TWI701766 B TW I701766B TW 107115930 A TW107115930 A TW 107115930A TW 107115930 A TW107115930 A TW 107115930A TW I701766 B TWI701766 B TW I701766B
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low
layer
dielectric
gate stack
source
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TW107115930A
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Chinese (zh)
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TW201923971A (zh
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陳彥廷
李威養
楊豐誠
陳燕銘
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台灣積體電路製造股份有限公司
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    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
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    • H01L21/823475MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type interconnection or wiring or contact manufacturing related aspects
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  • Engineering & Computer Science (AREA)
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  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
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  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Chemical & Material Sciences (AREA)
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TW107115930A 2017-11-15 2018-05-10 積體電路裝置及其形成方法 TWI701766B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US15/813,742 2017-11-15
US15/813,742 US10770354B2 (en) 2017-11-15 2017-11-15 Method of forming integrated circuit with low-k sidewall spacers for gate stacks

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TW201923971A TW201923971A (zh) 2019-06-16
TWI701766B true TWI701766B (zh) 2020-08-11

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