TWI692800B - 顯示裝置及顯示裝置之薄膜電晶體的製造方法 - Google Patents

顯示裝置及顯示裝置之薄膜電晶體的製造方法 Download PDF

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TWI692800B
TWI692800B TW108124379A TW108124379A TWI692800B TW I692800 B TWI692800 B TW I692800B TW 108124379 A TW108124379 A TW 108124379A TW 108124379 A TW108124379 A TW 108124379A TW I692800 B TWI692800 B TW I692800B
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layer
substrate
light
film transistor
semiconductor layer
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劉晉銓
林富良
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大陸商友達光電（昆山）有限公司
友達光電股份有限公司
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Abstract

本發明提供一種顯示裝置及顯示裝置之薄膜電晶體的製造方法。薄膜電晶體的製造方法包括：提供一基板；在該基板上形成一遮光層，圖案化所述遮光層，形成一圖案化遮光層；在該基板上形成一緩衝層；在該基板上形成一半導體層，圖案化所述半導體層，形成一圖案化半導體層；在該基板上形成一絕緣層；在該基板上形成一導電層，圖案化所述導電層，形成一圖案化導電層；其中，圖案化所述遮光層及圖案化所述半導體層採用同一光罩。能有效避免顯示區域之外薄膜電晶體的光電效應並减少生產過程中的光罩數量。

Description

顯示裝置及顯示裝置之薄膜電晶體的製造 方法
本發明是有關於一種顯示裝置及顯示裝置中薄膜電晶體的製造方法，且特別是有關於一種包括遮光層的顯示裝置及其薄膜電晶體的製造方法。
隨著科技的發展，顯示裝置被廣泛應用在許多電子產品上，如手機、平板電腦、手錶等。為了提高顯示質量，大尺寸、高解析度、高亮度的顯示裝置應運而生。
顯示裝置一般在製作有源元件陣列基板的過程中，會在顯示區內薄膜電晶體的下方形成一層遮光層以避免薄膜電晶體發生的光電效應。圖1A是現有顯示裝置中薄膜電晶體結構的俯視示意圖，圖1B是圖1A沿A-A’的剖面示意圖，圖1C是圖1A沿B-B’的剖面示意圖。如圖1A、1B以及圖1C所示，薄膜電晶體10包括基板11，在基板11上依序形成有遮光層12、緩衝層13、半導體層14、閘極絕緣層15、第一金屬層16、層間絕緣層17以及第二金屬層18。其中， 在半導體層14兩側形成第一重摻雜區SD以及第二重摻雜區SD，在第一重摻雜區SD以及第二重摻雜區SD之間形成溝道區CH與輕摻雜區N-，第二金屬層18通過接觸孔19與半導體層14實現電性連接。由圖1C可以看出，現有顯示裝置中薄膜電晶體10的遮光層12僅僅形成在與半導體層14的溝道區CH相對應的位置，且遮光層12較半導體層14略寬。另外，現有的遮光層12和半導體層14是分別通過兩個不同的光罩進行圖案化所形成的。
因此，如何能有效避免顯示區域之外薄膜電晶體的光電效應幷减少生產過程中的光罩數量，實為需要解决的問題之一。
為解决上述問題，本發明提供一種顯示裝置及顯示裝置之薄膜電晶體的製造方法，能有效避免顯示區域之外薄膜電晶體的光電效應並减少生產過程中的光罩數量。
本發明實施例的薄膜電晶體的製造方法，包括以下步驟：提供一基板；在該基板上形成一遮光層，圖案化所述遮光層，形成一圖案化遮光層；在該基板上形成一緩衝層；在該基板上形成一半導體層，圖案化所述半導體層，形成一圖案化半導體層； 在該基板上形成一絕緣層；在該基板上形成一導電層，圖案化所述導電層，形成一圖案化導電層；其中，圖案化所述遮光層及圖案化所述半導體層採用同一光罩。
上述的製造方法，其中，圖案化所述半導體層的步驟採用過度蝕刻的方式。
上述的製造方法，其中，所述圖案化遮光層與所述圖案化半導體層完全重叠。
上述的製造方法，其中，所述圖案化遮光層的尺寸比所述圖案化半導體層的尺寸大。
上述的製造方法，其中，所述遮光層為遮光金屬層，可以為鈦、鉬、鉻、銥、鋁、銅、銀、金或上述的任意組合。
上述的製造方法，其中，所述半導體層可以為非晶矽、多晶矽。
上述的製造方法，其中，所述薄膜電晶體為顯示面板中的薄膜電晶體。
上述的製造方法，其中，所述薄膜電晶體為多工電路中的薄膜電晶體或所述薄膜電晶體為閘極驅動移位暫存器中的薄膜電晶體。
本發明實施例的顯示裝置，包括一第一基板，具有一第一薄膜電晶體與一第二薄膜電晶體，其中該第一薄膜電晶體與該第二薄膜電晶體分別包括：一遮光層，設置於 該第一基板；一緩衝層，覆蓋於該遮光層的上方與側邊；一半導體層，設置於該緩衝層上方，使得該緩衝層位於該半導體層與該遮光層之間，且該半導體層具有一第一摻雜區、一第二摻雜區與一溝道區，而該溝道區位於該第一摻雜區與該第二摻雜區之間；一第一絕緣層，設置於該半導體層上方；一第一金屬層，設置於該第一絕緣層上方，且該第一金屬層與該溝道區在垂直投影方向上具有重叠區域；一第二絕緣層，覆蓋於該第一金屬層；以及一第二金屬層，設置於該第二絕緣層上方，且該第二金屬層與該第一摻雜區或第二摻雜區連接；該半導體層在垂直投影於該第一基板的投影面積小於該遮光層在垂直投影於該第一基板的投影面積。
上述的顯示裝置，其中，該半導體層在垂直投影於該第一基板的投影形狀與該遮光層在垂直投影於該第一基板的投影形狀相同。
上述的顯示裝置，其中，該第一基板具有一顯示區與一周邊電路區，且該周邊電路區位於該顯示區的周邊，其中該第一薄膜電晶體位於該顯示區，而該第二薄膜電晶體位於該周邊電路區。
上述的顯示裝置，其中，該第二薄膜電晶體的該遮光層在垂直投影於該第一基板的投影面積大於該第一薄膜電晶體的該遮光層在垂直投影於該第一基板的投影面積。
上述的顯示裝置，其中，該第二薄膜電晶體的該遮光層在垂直投影於該第一基板的投影形狀與該第一薄 膜電晶體的該遮光層在垂直投影於該第一基板的投影形狀，彼此不相同。
以下結合附圖和具體實施例對本發明進行詳細描述，但不作為對本發明的限定。
10、100:薄膜電晶體
11、110:基板
12、120:遮光層
13、130:緩衝層
14、140:半導體層
15、150:閘極絕緣層
16、160:第一金屬層
17、170:層間絕緣層
18、180‧‧‧第二金屬層
19、190‧‧‧接觸孔
200‧‧‧顯示裝置
210‧‧‧顯示區
220‧‧‧周邊區
230‧‧‧多工器
240‧‧‧閘極驅動移位暫存器
G‧‧‧閘極
CH‧‧‧溝道區
SD‧‧‧重摻雜區
N-‧‧‧輕摻雜區
圖1A是現有顯示裝置中薄膜電晶體結構的俯視示意圖。
圖1B是圖1A沿A-A’的剖面示意圖。
圖1C是圖1A沿B-B’的剖面示意圖。
圖2A是本發明一實施例薄膜電晶體結構的俯視示意圖。
圖2B是圖2A沿A-A’的剖面示意圖。
圖2C是圖2A沿B-B’的剖面示意圖。
圖3是本發明一實施例顯示裝置的結構示意圖。
下面結合附圖對本發明的結構原理和工作原理作具體的描述。
圖2A是本發明一實施例薄膜電晶體結構的俯視示意圖，圖2B是圖2A沿A-A’的剖面示意圖，圖2C是圖2A沿B-B’的剖面示意圖。如圖2A、圖2B及圖2C所示，薄膜電晶體100的製造方法包括以下步驟：(A)提供一基板110； (B)首先在基板110上形成遮光層120，利用一光罩對遮光層120進行圖案化，形成圖案化的遮光層120，本實施例中，遮光層120為遮光金屬層，可以為鈦、鉬、鉻、銥、鋁、銅、銀、金或上述的任意組合，可以採用蝕刻的方式進行圖案化，但本發明並不以此為限；(C)在基板110上形成緩衝層130，緩衝層130覆蓋圖案化的遮光層120以及基板110；(D)在緩衝層130上形成半導體層140，半導體層140可以採用非晶矽、多晶矽等其他半導體材料製成，本發明並不以此為限。利用與圖案化遮光層120相同的光罩，對半導體層140進行圖案化，形成圖案化的半導體層140。於本實施例中，圖案化半導體層140時可採用蝕刻的方式，且圖案化半導體層140的蝕刻相較於圖案化遮光層120時的蝕刻為過度蝕刻方式。由此，由圖2B、圖2C可以看出，在圖案化後的半導體層140的下方均形成有遮光層120，半導體層140與遮光層120完全重叠，且遮光層120的尺寸較半導體層140的尺寸大，換句話說，半導體層140在垂直投影於基板110的投影面積小於遮光層120在垂直投影於基板110的投影面積。於本實施例中，遮光層120的外側邊緣與半導體層140的外側邊緣之間的距離為d，d例如為0.5μm，d的尺寸也可以根據遮光層120的材料及厚度進行選擇，本發明並不以此為限。形成半導體層140之後，再對半導體層140進行摻雜，在半導體層140兩側形成第一重摻雜區SD以及第二重摻雜區SD，第一重摻雜區SD形成薄膜電晶體100的源 極，第二重摻雜區SD形成薄膜電晶體100的漏極，在第一重摻雜區SD以及第二重摻雜區SD之間形成溝道區CH與輕摻雜區N-；(E)在基板110上形成閘極絕緣層150，閘極絕緣層150覆蓋圖案化的半導體層140以及基板110；(F)在基板110上形成第一金屬層160，第一金屬層160可以為鈦、鉬、鉻、銥、鋁、銅、銀、金或上述的任意組合，對第一金屬層160進行圖案化，形成圖案化的第一金屬層160，圖案化的第一金屬層160形成薄膜電晶體100的閘極G；(G)在基板110上形成層間絕緣層170；(H)在基板110上形成第二金屬層180，第二金屬層180可以為鈦、鉬、鉻、銥、鋁、銅、銀、金或上述的任意組合，對第二金屬層180進行圖案化，形成圖案化的第二金屬層180，在本實施例中，第二金屬層180通過接觸孔190與半導體層140(第一重摻雜區SD或第二重摻雜區SD)實現電性連接。
當然，形成薄膜電晶體100還有很多其他的層，本發明僅示例性的進行描述，並不以此為限。
圖3是本發明一實施例顯示裝置的結構示意圖。如圖3所示，本實施例的顯示裝置200包括形成在基板(圖中未示出)上的顯示區210以及周邊區220，周邊區220圍繞顯示區210設置。於圖3所示的實施例中，周邊區220圍繞顯示區210，但本發明不以此為限，於另一實施例中， 周邊區220僅設置於顯示區210的單側邊或雙側邊。具體而言，多個像素單元(圖中未示出)陣列設置於顯示區210。於圖3所示的實施例中，顯示裝置200或顯示區210為矩形形狀，但本發明並不以此為限，可因不同的設計與需求，顯示裝置200或顯示區210也可設置為圓形、橢圓形、其他不規則的弧形、三角形、五邊形或其他多邊形。另外，多個像素單元可為對齊或錯位等方式排列成陣列。周邊區220中形成有多工器(Multiplexer，MUX)230、閘極驅動移位暫存器(Shift Register，SR)240等，多工器230以及閘極驅動移位暫存器為一個或多個，本發明並不以此為限。其中，像素單元、多工器230以及閘極驅動移位暫存器240中均形成有薄膜電晶體，薄膜電晶體採用上述的製造方法所形成。
具體而言，在本實施例中，多工器230為多個薄膜電晶體所組成，且多工器230的多個薄膜電晶體的製造工藝步驟可依照上述實施例的工藝步驟來形成。因此，位於周邊區220中薄膜電晶體的遮光層與半導體層是通過同一層光罩，且進一步結合不同的蝕刻程度所形成的面積不同的兩層圖案化結構。如此一來，不僅能够减少一層光罩的成本，也可兼顧光電效應的影響。同樣的，閘極驅動移位暫存器240也為多個薄膜電晶體所組成，閘極驅動移位暫存器240也可通過上述實施例的製造工藝步驟來形成，在此不再贅述。
於本實施例的顯示裝置中，像素單元電路與周邊區的電路(如多工器230、閘極驅動移位暫存器240等) 的作用均不同，因此，各電路薄膜電晶體的結構或尺寸會有不相同的設計。舉例而言，於周邊區的電路中，其薄膜電晶體的尺寸會相對大於像素單元電路中薄膜電晶體的尺寸。因此，多工器230以及閘極驅動移位暫存器240中薄膜電晶體的遮光層在垂直投影於基板的投影面積大於像素單元中薄膜電晶體的遮光層在垂直投影於基板的投影面積。又或者，於周邊區的電路中，其薄膜電晶體的組成層別雖與像素單元電路的薄膜電晶體的組成層別相同，但其佈局圖案則不相同。換言之，多工器230以及閘極驅動移位暫存器240中薄膜電晶體的形狀也與像素單元中薄膜電晶體的形狀不同，多工器230以及閘極驅動移位暫存器240中薄膜電晶體的遮光層在垂直投影於基板的投影形狀與像素單元中薄膜電晶體的遮光層在垂直投影於基板的投影形狀也不相同。
當然，周邊區還設置有其他電路，例如靜電放電保護電路、測試電路以及開關電路等，上述電路也是由薄膜電晶體所構成，其中的薄膜電晶體同樣也可以採用上述的製造方法形成。於圖3所示的實施例中，閘極驅動移位暫存器240設置於周邊區220，但本發明不以此為限，於另一窄邊框的實施例中，閘極驅動移位暫存器240則設置於顯示區210內，其閘極驅動移位暫存器240同樣可以採用上述實施例的製造工藝步驟來形成薄膜電晶體，在此不再贅述。
綜上，依照本發明的實施例，由於薄膜電晶體的半導體層和遮光層採用同一光罩，因此，在生產過程中可以减少一層光罩，節約生產成本。而且，不僅顯示裝置像素 單元中的薄膜電晶體，多工器230以及閘極驅動移位暫存器240中的薄膜電晶體也都在所有半導體層的下方均形成有遮光層，如此一來，不僅避免了像素單元中薄膜電晶體的光電效應，同時也可以避免多工器230以及閘極驅動移位暫存器240中薄膜電晶體的光電效應。另外，由於半導體層相對於遮光層採用過度蝕刻的方式形成，因此，遮光層120在各個方向上的尺寸均較半導體層的尺寸大，遮光層不僅可以在垂直於基板的方向上避免半導體層產生光電效應，而且可以在半導體層周邊的各個方向上避免半導體層產生光電效應。
當然，本發明還可有其它多種實施例，在不背離本發明精神及其實質的情况下，熟悉本領域的技術人員當可根據本發明作出各種相應的改變和變形，但這些相應的改變和變形都應屬本發明所附的請求項的保護範圍。
100‧‧‧薄膜電晶體
120‧‧‧遮光層
140‧‧‧半導體層
160‧‧‧第一金屬層
180‧‧‧第二金屬層
190‧‧‧接觸孔

Claims (9)

  1. 一種顯示裝置之薄膜電晶體的製造方法，其中，包括以下步驟：提供一基板；在該基板上形成一遮光層，圖案化所述遮光層，形成一圖案化遮光層；在該基板上形成一緩衝層；在該基板上形成一半導體層，圖案化所述半導體層，形成一圖案化半導體層，所述圖案化遮光層與所述圖案化半導體層完全重叠；在該基板上形成一絕緣層；在該基板上形成一導電層，圖案化所述導電層，形成一圖案化導電層；其中，圖案化所述遮光層及圖案化所述半導體層採用同一光罩。
  2. 根據請求項1所述的製造方法，其中，圖案化所述半導體層的步驟採用過度蝕刻的方式。
  3. 根據請求項2所述的製造方法，其中，所述圖案化遮光層的尺寸比所述圖案化半導體層的尺寸大。
  4. 根據請求項3所述的製造方法，其中，所述遮光層為遮光金屬層，可以為鈦、鉬、鉻、銥、鋁、銅、銀、金或上述的任意組合。
  5. 根據請求項4所述的製造方法，其中，所述半導體層可以為非晶矽、多晶矽。
  6. 一種顯示裝置，包括：一第一基板，具有一第一薄膜電晶體與一第二薄膜電晶體，其中該第一薄膜電晶體與該第二薄膜電晶體分別包括：一遮光層，設置於該第一基板；一緩衝層，覆蓋於該遮光層的上方與側邊；一半導體層，設置於該緩衝層上方，使得該緩衝層位於該半導體層與該遮光層之間，且該半導體層具有一第一摻雜區、一第二摻雜區與一溝道區，而該溝道區位於該第一摻雜區與該第二摻雜區之間；一第一絕緣層，設置於該半導體層上方；一第一金屬層，設置於該第一絕緣層上方，且該第一金屬層與該溝道區在垂直投影方向上具有重叠區域；一第二絕緣層，覆蓋於該第一金屬層；以及一第二金屬層，設置於該第二絕緣層上方，且該第二金屬層與該第一摻雜區或第二摻雜區連接； 其中，該半導體層在垂直投影於該第一基板的投影面積小於該遮光層在垂直投影於該第一基板的投影面積，且該半導體層在垂直投影於該第一基板的投影形狀與該遮光層在垂直投影於該第一基板的投影形狀相同。
  7. 根據請求項6所述的顯示裝置，其中，該第一基板具有一顯示區與一周邊電路區，且該周邊電路區位於該顯示區的周邊，其中該第一薄膜電晶體位於該顯示區，而該第二薄膜電晶體位於該周邊電路區。
  8. 根據請求項7所述的顯示裝置，其中，該第二薄膜電晶體的該遮光層在垂直投影於該第一基板的投影面積大於該第一薄膜電晶體的該遮光層在垂直投影於該第一基板的投影面積。
  9. 根據請求項7所述的顯示裝置，其中，該第二薄膜電晶體的該遮光層在垂直投影於該第一基板的投影形狀與該第一薄膜電晶體的該遮光層在垂直投影於該第一基板的投影形狀，彼此不相同。
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