TWI660439B - 梳狀凸塊結構 - Google Patents

梳狀凸塊結構 Download PDF

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Publication number
TWI660439B
TWI660439B TW106132995A TW106132995A TWI660439B TW I660439 B TWI660439 B TW I660439B TW 106132995 A TW106132995 A TW 106132995A TW 106132995 A TW106132995 A TW 106132995A TW I660439 B TWI660439 B TW I660439B
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TW
Taiwan
Prior art keywords
solder
metal
disposed
conductive layer
bump
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TW106132995A
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English (en)
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TW201901822A (zh
Inventor
Po Chun Lin
林柏均
Chin Lung Chu
朱金龍
Original Assignee
Nanya Technology Corporation
南亞科技股份有限公司
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Application filed by Nanya Technology Corporation, 南亞科技股份有限公司 filed Critical Nanya Technology Corporation
Publication of TW201901822A publication Critical patent/TW201901822A/zh
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Publication of TWI660439B publication Critical patent/TWI660439B/zh

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Abstract

一種梳狀凸塊結構包含：半導體基板；焊墊設置於半導體基板之上；導電層設置於焊墊之上；焊錫凸塊設置於導電層之上；以及至少兩金屬側壁，分別沿焊錫凸塊的相對兩側設置。

Description

梳狀凸塊結構
本發明是有關於梳狀凸塊結構及其製造方法。
半導體器件用於大量電子設備，例如計算機，蜂窩電話等。半導體器件包括通過在半導體晶片上沉積許多類型的材料薄膜而形成在半導體晶片上的積體電路(IC)，以及圖案化材料薄膜以形成積體電路。
再分配層(RDL)過程是採用原始設計的IC的I/O焊墊，並使用晶片級金屬佈線處理和触碰處理來改變IC的接觸點位置。形成凸塊(Bumping)是先進的晶片級工藝技術，其中在將晶片切割成單個芯片之前，以整個晶片形式在晶片上形成由焊料製成的「凸塊」或「球」。
如今，低成本RDL/Bumping解決方案普遍加工，但不能處理細間距產品。鈍化後的聚亞醯胺(PI)下面的PI可以是良好的緩衝層，但是PI的弱點對於其他鈍化本身或金屬的粘合強度低。因此，當處理不正確地控制時，PI有時會很容易地從晶片剝離。
本發明提出一種創新的梳狀凸塊結構及其製造方法，以解決先前技術的困境。
在本發明的一實施例中，一種梳狀凸塊結構包含：半導體基板；焊墊設置於半導體基板之上；導電層設置於焊墊之上；焊錫凸塊設置於導電層之上；以及至少兩金屬側壁，分別沿焊錫凸塊的相對兩側設置。
在本發明的另一實施例中，一種梳狀凸塊結構包含：第一半導體基板；第一焊墊，設置於第一半導體基板之上；第一導電層設置於第一焊墊之上；第一焊錫凸塊設置於第一導電層之上；至少兩第一金屬側壁分別沿第一焊錫凸塊的相對兩側設置；第二半導體基板；第二焊墊設置於第二半導體基板之上；第二導電層設置於第二焊墊之上；第二焊錫凸塊設置於第二導電層之上；以及至少兩第二金屬側壁，分別沿第二焊錫凸塊的相對兩側設置，當第一、第二焊錫凸塊相結合且迴焊製程執行時，第二焊錫凸塊與第一焊錫凸塊用於形成焊點。
在本發明的另一實施例中，一種梳狀凸塊結構的製造方法包含：提供半導體基板；形成焊墊於半導體基板之上；形成導電層於焊墊之上；形成焊錫凸塊於導電層之上；以及形成至少兩金屬側壁分別沿焊錫凸塊的相對兩側設置。
綜上所述，本發明之技術方案與現有技術相比具有明顯的優點和有益效果。以下將以實施方式對上述之說明作詳細的描述，並對本發明之技術方案提供更進一步的解釋。
為讓本發明之上述和其他目的、特徵、優點與實施例能更明顯易懂，所附符號之說明如下：
100、200、300、400‧‧‧梳狀凸塊結構
110、210、510‧‧‧半導體基板
120、220、520‧‧‧焊墊
130、230、530‧‧‧鈍化層
140、240、540‧‧‧導電層
150、250、550‧‧‧焊錫凸塊
160、260、560‧‧‧金屬側壁
270、570‧‧‧金屬針腳
310、410‧‧‧第一半導體基板
320、420‧‧‧第一焊墊
330、430‧‧‧第一鈍化層
340、440‧‧‧第一導電層
350、450‧‧‧第一焊錫凸塊
360、361、460、461‧‧‧第一金屬側壁
312、412‧‧‧第二半導體基板
322、422‧‧‧第二焊墊
332、432‧‧‧第二鈍化層
342、442‧‧‧第二導電層
352、452‧‧‧第二焊錫凸塊
362、363、462、463‧‧‧第二金屬側壁
470‧‧‧第一金屬針腳
472‧‧‧第二金屬針腳
542‧‧‧凸塊下金屬層
580、583、585‧‧‧光阻層
582‧‧‧第一開口
584‧‧‧第二開口
為讓本發明之上述和其他目的、特徵、優點與實施例能更明顯易懂，所附圖式之說明如下：第1圖是依照本發明實施例之一種梳狀凸塊結構的剖面圖；第2圖是依照本發明實施例之一種梳狀凸塊結構的剖面圖；第3A、3B圖是依照本發明實施例之一種梳狀凸塊結構在接合之前和之後的剖面圖；第4A、4B圖是依照本發明實施例之一種梳狀凸塊結構在接合之前和之後的剖面圖；以及第5A~5F圖是依照本發明實施例繪示之一種梳狀凸塊結構的製造程序。
為了使本發明之敘述更加詳盡與完備，可參照所附之圖式及以下所述各種實施例，圖式中相同之號碼代表相同或相似之元件。另一方面，眾所週知的元件與步驟並未描述於實施例中，以避免對本發明造成不必要的限制。
於實施方式與申請專利範圍中，涉及『電性連接』之描述，其可泛指一元件透過其他元件而間接電氣耦合至另一元件，或是一元件無須透過其他元件而直接電氣連結至另一元件。
於實施方式與申請專利範圍中，除非內文中對 於冠詞有所特別限定，否則『一』與『該』可泛指單一個或複數個。
第1圖是依照本發明實施例之一種梳狀凸塊結構100圖。如第1圖所示，焊墊120設置在半導體基板110上，導電層140設置在焊墊120上。另外，一個或多個鈍化層130設置在半導體基板110上，鈍化層130具有部分露出焊墊120的開口，並且導電層140在焊墊120和鈍化層130處連接。
在第1圖中，焊錫凸塊150設置在導電層140上，並且至少兩個金屬側壁160分別沿著焊錫凸塊150的相對兩側設置並垂直設置在導電層140上，從而提高後續製程中的接合強度。
在結構中，任何一個金屬側壁160的頂部係高於焊錫凸塊150的頂部。換句話說，焊錫凸塊150的頂部與鈍化層130的頂部之間的垂直距離係小於金屬側壁160的頂部與鈍化層130的頂部之間的垂直距離。
在一些實施例中，導電層140是或包括凸塊下金屬層。例如，凸塊下金屬層可以是金屬的複合層，例如鉻，隨後是銅，隨後是金，以促進改善的附著力(與鉻)並形成擴散阻擋層或防止氧化(金在銅上)。
第2圖是依照本發明實施例之一種梳狀凸塊結構的剖面圖。如第2圖所示，焊墊220設置在半導體基板210上，導電層240設置在焊墊220上。另外，一個或多個鈍化層230設置在半導體基板210上，鈍化層230具有部分露出 焊墊220的開口，並且導電層240連接於焊墊220和鈍化層230。
在第2圖中，焊錫凸塊250設置在導電層240上，並且至少兩個金屬側壁260分別設置在焊錫凸塊250的相對兩側，並垂直設置在導電層240上，從而提高後續製程中的接合強度。
另外，金屬針腳270設置在焊錫凸塊250中並且從導電層240突出，以進一步提高後續過程中的接合強度。在一些實施例中，金屬側壁260的熔點溫度高於金屬針腳270的熔點溫度。
在結構中，任何金屬針腳270的頂部高於焊錫凸塊250的頂部。換句話說，焊錫凸塊250的頂部與鈍化層230的頂部之間的垂直距離係小於金屬針腳270的頂部和鈍化層130的頂部之間的垂直距離。此外，任一金屬針腳270的頂部可以低於任一金屬側壁260的頂部。
第3A、3B圖是依照本發明實施例之一種梳狀凸塊結構300在接合之前和之後的剖面圖。如第3A圖所示，第一焊墊320設置在第一半導體基板310上，第一導電層340設置在第一焊墊320上。一個或多個第一鈍化層330設置在第一半導體基板310上。第一焊錫凸塊350設置在第一導電層340上，並且至少兩第二金屬側壁360、361分別沿著第一焊錫凸塊350的相對兩側設置。
另外，在第3A圖中，第二焊墊322設置在第二半導體基板312上，第二導電層342設置在第二焊墊322上。 一個或多個第二鈍化層332設置在第二導體體基板312上。第二焊錫凸塊352設置在第二導電層342上，並且至少兩第二金屬側壁362、363分別沿著第二個焊錫凸塊352的相對兩側設置。
當第一，第二焊錫凸塊350、352相結合且迴焊製程執行時，第二焊錫凸塊352與第一焊錫凸塊350形成焊點356(如第3B圖所示)。第一焊墊320和第二焊墊322之間的垂直距離係大於金屬側壁360-363中任一者(如第二金屬側壁363)的垂直長度。
如第3B圖所示，第一金屬側壁360設置在焊點356中，並且位於兩個第二金屬側壁362、363之間。第二金屬側壁363設置在焊點356中，並位於兩個第一金屬側壁360和361之間。在一些實施例中，第一、第二金屬側壁360、363的熔點溫度低於第一，第二金屬側壁361、362的熔點溫度。
第4A、4B圖是依照本發明實施例之一種梳狀凸塊結構在接合之前和之後的剖面圖。如第4A圖所示，第一焊墊420設置在第一半導體基板410上，第一導電層440設置在第一焊墊420上。一個或多個第一鈍化層430設置在第一半導體基板410上。第一焊錫凸塊450設置在第一導電層440上，至少兩第一金屬側壁460、461沿第一焊錫凸塊450的相對兩側設置。第一金屬針腳470設置在第一焊錫凸塊450中，並且從第一導電層440突出。
另外，在第4A圖中，第二焊墊422設置在第二 半導體基板412上，第二導電層442設置在第二焊墊422上。一個或多個第二鈍化層432設置在第二半導體基板412上。第二焊錫凸塊452設置在第二導電層442上，至少兩第二金屬側壁462、463沿第二焊錫凸塊452的相對兩側設置。第二金屬針腳472設置在第二焊錫凸塊452中，並且從第二導電層442突出。
當第一，第二焊錫凸塊450、452相結合且迴焊製程執行時，第二焊錫凸塊452與第一焊錫凸塊450形成焊點456(如圖4B所示)。
如第4B圖所示，第一、第二金屬針腳470、472交替地佈置在焊點456中。第一金屬側壁461設置在焊點456中，並且位於兩個第二金屬側壁462、463之間。第二金屬側壁462設置在焊點456中，並且位於兩個第一金屬側壁460、461之間。在一些實施例中，第一、第二金屬側壁461、462的熔點溫度和第一、第二金屬針腳470、472係低於第一、第二金屬側壁460、463的熔點溫度。
第5A~5F圖是依照本發明實施例繪示之一種梳狀凸塊結構的製造程序。應瞭解到，在本實施例中所提及的步驟，除特別敘明其順序者外，均可依實際需要調整其前後順序，甚至可同時或部分同時執行。
如第5A圖所示，提供半導體基板510。在半導體基板510上形成焊墊520，在半導體基板510上形成一個或多個鈍化層530，鈍化層530部分地露出焊墊520，形成凸塊下金屬層540連接於焊墊520和鈍化層530。光阻層580 形成在凸塊下金屬層542上。光阻層580可以被曝光和顯影以形成第一開口582。第一開口582可以將焊墊520上的凸塊下金屬層542的一部分暴露出來。
如第5B圖所示，導電層540形成在凸塊下金屬層542的上述部分之上。光阻層583形成在導電層540上。光阻層583可以被曝光和顯影以形成第二開口584，第二開口584可以暴露在凸塊下金屬層542上的導電層540上的一部分。
如第5C圖所示，焊錫凸塊550形成在導電層540上，並且對應於上述第二開口584的位置。
如第5D圖所示，在凸塊下金屬層542上形成光阻層585。
如第5E圖所示，金屬側壁560分別沿著焊錫凸塊550的外側邊緣形成。金屬針腳570形成在導電層540上，並且設置在焊錫凸塊550中。
如第5F圖所示，去除了焊錫凸塊550，金屬側壁560和金屬針腳570的冗餘部分。例如，通過使用化學機械平面化(CMP)製程來拋光焊錫凸塊550、金屬側壁560和金屬針腳570的尖端，以便去除冗餘部分。
雖然本發明已以實施方式揭露如上，然其並非用以限定本發明，任何熟習此技藝者，在不脫離本發明之精神和範圍內，當可作各種之更動與潤飾，因此本發明之保護範圍當視後附之申請專利範圍所界定者為準。

Claims (6)

  1. 一種梳狀凸塊結構，包含：一第一半導體基板；一第一焊墊，設置於該第一半導體基板之上；一第一導電層，設置於該第一焊墊之上；一第一焊錫凸塊，設置於該第一導電層之上；至少兩第一金屬側壁，分別沿該第一焊錫凸塊的相對兩側設置；一第二半導體基板；一第二焊墊，設置於該第二半導體基板之上；一第二導電層，設置於該第二焊墊之上；一第二焊錫凸塊，設置於該第二導電層之上；以及至少兩第二金屬側壁，分別沿該第二焊錫凸塊的相對兩側設置，當該第一、第二焊錫凸塊相結合且一迴焊製程執行時，第二焊錫凸塊與該第一焊錫凸塊用於形成一焊點。
  2. 如請求項1所述之梳狀凸塊結構，其中該兩第一金屬側壁中的一者位於該焊點中，並位於該兩第二金屬側壁之間。
  3. 如請求項2所述之梳狀凸塊結構，其中該兩第二金屬側壁中的一者位於該焊點中，並位於該兩第一金屬側壁之間。
  4. 如請求項3所述之梳狀凸塊結構，其中該兩第一金屬側壁中的該者與該兩第二金屬側壁中的該者的一熔點溫度係低於該兩第一金屬側壁中的另一者與該兩第二金屬側壁中的另一者的一熔點溫度。
  5. 如請求項4所述之梳狀凸塊結構，更包含：複數個第一金屬針腳，設置於該第一焊錫凸塊中，並從該第一導電層突出；以及複數個第二金屬針腳，設置於該第二個焊錫凸塊中，並從該第二導電層突出，且該第一，第二金屬針腳交替排列在該焊點中。
  6. 如請求項5所述之梳狀凸塊結構，其中該第一、第二金屬針腳的一熔點溫度係低於該兩第一金屬側壁中的該另一者與該兩第二金屬側壁中的該另一者的該熔點溫度。
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