TWI642160B - 用於四方平面無引腳封裝的導線架結構、四方平面無引腳封裝及形成導線架結構的方法 - Google Patents
用於四方平面無引腳封裝的導線架結構、四方平面無引腳封裝及形成導線架結構的方法 Download PDFInfo
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- 239000002184 metal Substances 0.000 claims abstract description 64
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- 239000004065 semiconductor Substances 0.000 claims abstract description 16
- 230000002093 peripheral effect Effects 0.000 claims abstract description 14
- 238000007747 plating Methods 0.000 claims abstract description 5
- 230000015572 biosynthetic process Effects 0.000 claims description 5
- 239000000463 material Substances 0.000 description 7
- 239000007769 metal material Substances 0.000 description 6
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Abstract
用於四方平面無引腳(quad flat no-lead,QFN)封裝的導線架結構包含一基座,複數個端點以及一第一金屬層。該基座具有一中心區域用以承載一半導體晶粒,以及一外圍區域圍繞該中心區域。該複數個端點是環繞該基座設置。該第一金屬層具有一第一部分形成於該基座的外圍區域上,以及一第二部分形成於該複數個端點上。其中該基座及該複數個端點是由一沖壓製程所形成,且該第一金屬層是在該沖壓製程之前由一鍍覆製程所形成。
Description
本發明係相關於一種導線架結構,尤指一種用於四方平面無引腳封裝的導線架結構。
請參考第1圖,第1圖是習知形成導線架結構的方法的流程圖100。如第1圖所示,一導線架的各個元件首先在步驟110中形成。在步驟120中,對導線架的部分區域進行半蝕刻,以減少部分區域的厚度。之後,在步驟130中,一金屬層被鍍覆於導線架上以加強電性連接。
請參考第2圖,並一併參考第1圖。第2圖是習知導線架結構20的剖面圖。如第2圖所示,由於金屬層230是在形成導線架200之元件210、220後被鍍覆於導線架200上,部分殘留金屬材料240有可能會存在於導線架200之元件210、220的側壁上,造成封裝材料容易隨著殘留金屬材料240從導線架200的金屬層230剝離,使得溼氣容易從剝離部分的縫隙入侵至封裝中,進而降低電性可靠度。因此,在導線架結構20被封裝之後,導線架結構20會因殘留金屬材料240而無法穩固地和封裝材料接合。由此可得知,當
習知導線架結構20應用於四方平面無引腳封裝時具有較差的封裝品質和可靠度。
本發明提供一種用於四方平面無引腳(quad flat no-lead,QFN)封裝的導線架結構包含一基座,複數個端點以及一第一金屬層。該基座具有一中心區域用以承載一半導體晶粒,以及一外圍區域圍繞該中心區域。該複數個端點是環繞該基座設置。該第一金屬層具有一第一部分形成於該基座的外圍區域上,以及一第二部分形成於該複數個端點上。其中該基座及該複數個端點是由一沖壓製程所形成,且該第一金屬層是在該沖壓製程之前由一鍍覆製程所形成。
本發明另提供一種四方平面無引腳封裝,包含一導線架結構,一半導體晶粒以及一封裝單元。該導線架結構包含一基座,複數個端點以及一第一金屬層。該基座具有一中心區域用以承載一半導體晶粒,以及一外圍區域圍繞該中心區域。該複數個端點是環繞該基座設置。該第一金屬層具有一第一部分形成於該基座的外圍區域上,以及一第二部分形成於該複數個端點上。該半導體晶粒是藉由一貼附層接合於該基座的中心區域,且電連接於該第一金屬層的第一部分及該第一金屬層的第二部分。該封裝單元是用以封裝該半導體晶粒。其中該基座及該複數個端點是由一沖壓製程所形成,且該第一金屬層是在該沖壓製程之前由一鍍覆製程所形成。
本發明另提供一種形成導線架結構的方法,包含提供一金屬板;於該金屬板的正面形成一圖案化金屬層;以及於形成該圖案化金屬層後,沖壓該金屬板以形成一基座和複數個端點;其中該基座形成有一中心
區域用以承載一半導體晶粒,以及一外圍區域圍繞該中心區域,且該複數個端點是形成於該基座周圍;以及其中該圖案化金屬層具有一第一部分形成於該基座的外圍區域上,以及一第二部分形成於該複數個端點上。
100‧‧‧流程圖
110至130‧‧‧步驟
20‧‧‧導線架結構
200‧‧‧導線架
210‧‧‧導線架元件
220‧‧‧導線架元件
230‧‧‧金屬層
240‧‧‧殘留金屬材料
30‧‧‧導線架結構
310‧‧‧基座
312‧‧‧中心區域
314‧‧‧外圍區域
320‧‧‧端點
330‧‧‧金屬層
330a‧‧‧金屬層的第一部分
330b‧‧‧金屬層的第二部分
330c‧‧‧金屬層的第三部分
340‧‧‧凸塊
350‧‧‧連接條
360‧‧‧外框
400‧‧‧封裝模具
50‧‧‧四方平面無引腳封裝
510‧‧‧半導體晶粒
520‧‧‧封裝單元
530‧‧‧金屬層
70‧‧‧導線架結構
9000‧‧‧流程圖
910至940‧‧‧步驟
P‧‧‧金屬板
M‧‧‧圖案化遮罩
第1圖是習知形成導線架結構的方法的流程圖。
第2圖是習知導線架結構的剖面圖。
第3圖是本發明導線架結構之第一實施例的形成過程的示意圖。
第4圖是本發明導線架結構之第一實施例的俯視圖。
第5圖是四方平面無引腳(quad flat no-lead,QFN)封裝包含本發明導線架結構之第一實施例的示意圖。
第6圖是第5圖封裝單元的形成過程的示意圖。
第7圖是本發明導線架結構之第二實施例的形成過程的示意圖。
第8圖是本發明導線架結構之第二實施例的俯視圖。
第9圖是本發明形成導線架結構的方法的流程圖。
請同時參考第3圖及第4圖,第3圖是本發明導線架結構之第一實施例的形成過程的示意圖,第4圖是本發明導線架結構30之第一實施例的俯視圖。如第3圖所示,一圖案化遮罩M被置放於一金屬板P上,以使圖案相反於該圖案化遮罩M的一金屬層330形成於金屬板P的正面。金屬層330可以是由一鍍覆製程所形成。之後,對金屬板P的背面進行半蝕刻以使金屬板P的部分厚度減少。最後,金屬板P經過一沖壓製程以形成一基座310以及
複數個端點320。如第4圖所示,基座310具有一中心區域312用以承載一半導體晶粒,以及一外圍區域314圍繞中心區域312。複數個端點320是環繞基座310設置。金屬層330具有一第一部分330a形成於基座310的外圍區域314上,以及一第二部分330b形成於複數個端點320上。
金屬層330的第一部分330a可以用來作為電極以提供一預定電壓。在本實施例中金屬層330的第一部分330a是連續地形成於外圍區域314上以環繞中心區域312。但在本發明其他實施例中,金屬層330的第一部分330a亦可以不連續地形成於外圍區域314上以環繞中心區域312。
另一方面,基座310和複數個端點320是連接於一外框360(外框360之後會被切除),以將基座310和複數個端點320支撐於同一平面上。
依據上述配置,由於金屬層是在形成基座310和複數個端點320的沖壓製程之前所形成,基座310和複數個端點320的側壁將不會有殘留金屬材料存在。因此,金屬層的第一部分330a和第二部分330b可以穩固地分別固定在基座310和複數個端點320的正面,且導線架結構30和封裝材料之間可以具有較強的接合力。
請參考第5圖,第5圖是四方平面無引腳(quad flat no-lead,QFN)封裝50包含本發明導線架結構30之第一實施例的示意圖。如第5圖所示,四方平面無引腳封裝50包含導線架結構30,一半導體晶粒510以及一封裝單元520。半導體晶粒510是藉由一貼附層接合於基座310的中心區域312,且經由導線電連接於金屬層的第一部分330a及金屬層的第二部分330b。封裝單元520是由封裝材料形成,用以封裝半導體晶粒510。封裝單元520的下表面是對齊於導線架結構30的背面。本發明四方平面無引腳封裝
50可包含另一金屬層530,用以覆蓋基座310的背面,且覆蓋複數個端點320的背面及側壁。金屬層530可以覆蓋基座310及端點320以避免基座310及端點320被氧化。另外,當四方平面無引腳封裝50安裝於一電路板上時,金屬層530亦可以提供較大的接觸面積,以得到較佳的電連接品質和可靠度。
請參考第6圖,第6圖是在第5圖中封裝單元520的形成過程的示意圖。如第6圖所示,導線架結構30可另包含複數個凸塊340,其高度高於基座310及複數個端點320。凸塊340可用以支撐一封裝模具400。當封裝模具400置放於凸塊340上之後,封裝材料可以注入以封裝半導體晶粒510。當封裝材料固化後即形成封裝單元520。依據上述配置,封裝單元520的上表面是對齊於複數個凸塊340的上表面,也就是說,封裝單元520的高度是由凸塊340所決定。
請同時參考第7圖及第8圖,第7圖是本發明導線架結構70之第二實施例的形成過程的示意圖,第8圖是本發明導線架結構70之第二實施例的俯視圖。相異於本發明第一實施,當對金屬板P進行沖壓製程時,複數個連接條350進一步形成於基座310及複數個端點320之間。另外,金屬層330另具有一第三部分330c形成於複數個連接條350上。金屬層的第三部分330c可以用來作為電極以提供另一預定電壓。
另一方面,基座310、複數個端點320及複數個連接條350是連接於一外框360(外框360之後會被切除),以將基座310、複數個端點320及複數個連接條350支撐於同一平面上。
相似於第5圖,導線架結構70亦可以採用一封裝材料,並被另一金屬層覆蓋以形成一四方平面無引腳封裝。
再者,導線架結構70可另包含複數個凸塊,其高度高於基座310、複數個端點320及複數個連接條350,用以支撐一封裝模具。
請參考第9圖,第9圖為本發明形成導線架結構的方法之流程圖900。本發明形成導線架結構的方法的流程如下列步驟:步驟910:提供一金屬板;步驟920:於該金屬板的正面形成一圖案化金屬層;步驟930:對該金屬板的背面進行半蝕刻;及步驟940:沖壓該金屬板以形成一基座和複數個端點。
相較於先前技術,由於本發明導線架結構的圖案化金屬層是在形成基座和端點的沖壓製程之前所形成,基座和端點的側壁將不會有殘留金屬材料存在,所以圖案化金屬層可以穩固地固定在金屬板的正面,且導線架結構和封裝材料之間可以具有較強的接合力。因此包含本發明導線架結構的四方平面無引腳封裝可以具有較佳的封裝品質、電性連接及可靠度。
以上所述僅為本發明之較佳實施例,凡依本發明申請專利範圍所做之均等變化與修飾,皆應屬本發明之涵蓋範圍。
Claims (5)
- 一種四方平面無引腳(quad flat no-lead,QFN)封裝,包含:一導線架結構,一半導體晶粒以及一封裝單元;該導線架結構包含:一基座,具有一中心區域用以承載一半導體晶粒,以及一外圍區域圍繞該中心區域;複數個端點,環繞該基座設置;一第一金屬層,為一利用圖案化遮罩所產生之圖案化金屬層,其具有一第一部分形成於該基座的外圍區域上,以及一第二部分形成於該複數個端點內側的部分上表面並和該複數個端點的內側邊緣對齊,且相對於該複數個端點內側的另一側則無金屬層形成於其上表面;該半導體晶粒係接合於該基座的中心區域,且電連接於該第一金屬層的第一部分及該第一金屬層的第二部分;以及該封裝單元係用以封裝該半導體晶粒;其中該基座及該複數個端點是由一沖壓製程所形成,且該第一金屬層是在該沖壓製程之前由一鍍覆製程所形成。
- 如請求項1所述的四方平面無引腳封裝,其中該封裝單元的下表面是對齊於該導線架結構的背面。
- 如請求項1所述的四方平面無引腳封裝,其中該導線架結構另包含:複數個連接條,設置於該基座及該複數個端點之間;以及其中該第一金屬層,另具有一第三部分形成於該複數個連接條上。
- 如請求項1所述的四方平面無引腳封裝,其中該導線架結構另包含:複數個凸塊,其高度高於該基座及該複數個端點,用以支撐一封裝模具;其中該封裝單元的上表面是對齊於該複數個凸塊的上表面。
- 如請求項1所述的四方平面無引腳封裝,另包含:一第二金屬層,用以覆蓋該基座的背面,且覆蓋該複數個端點的背面及側壁。
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