TWI638581B - Organic EL display device and method of manufacturing organic EL display device - Google Patents

Organic EL display device and method of manufacturing organic EL display device Download PDF

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TWI638581B
TWI638581B TW106110690A TW106110690A TWI638581B TW I638581 B TWI638581 B TW I638581B TW 106110690 A TW106110690 A TW 106110690A TW 106110690 A TW106110690 A TW 106110690A TW I638581 B TWI638581 B TW I638581B
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丸山哲
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日商日本顯示器股份有限公司
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Abstract

本發明之課題在於提供一種不會導致過度的輝度降低或消耗電功率增加，可改善電晶體特性的畫素間差異之顯示裝置以及該顯示裝置之製造方法。
其解決手段為提供一種有機EL顯示裝置，係具有複數畫素，且於該各畫素具有能夠控制流往有機EL元件的電流之電晶體的有機EL顯示裝置；該電晶體具有：汲極電極及源極電極，其中一者係與該有機EL元件電連接，另一者係從該有機EL顯示裝置的外部供應有電源；第1閘極電極，係形成於該源極電極與該汲極電極之間；以及半導體膜，係形成於該第1閘極電極的下層側；該半導體膜中，該第1閘極電極與該汲極電極或該源極電極間之區域的其中一部份之第1區域係注入有高濃度的n型離子，其他部份之第2區域係注入有低濃度的n型離子。

Description

有機EL顯示裝置及有機EL顯示裝置之製造方法
本發明關於一種有機EL顯示裝置及有機EL顯示裝置之製造方法。
近年來，使用稱作有機發光二極體(OLED：Organic Light Emitting Diode)的自發光體(以下，有機EL元件)之有機EL顯示裝置已被實用化。有機EL顯示裝置係使用設置於各畫素之場效電晶體來控制流往各畫素的有機EL元件之電流，藉以進行影像顯示。
場效電晶體雖具有會對應於施加在閘極電極之電壓來增強源極電極及汲極電極間的電流之作用，但若汲極電極附近產生強電場的情況，則會發生下述般的扭結現象(kink effect)。亦即，若汲極電極附近產生強電場，則會因該強電場，使得從源極電極流往汲極電極的電子被加速，由於加速後的電子與晶格之衝擊而產生載子(衝擊離子現象)。由於該載子，場效電晶體不僅是單純的電流增幅作用，且會具有包含急遽的電流變化之電壓電流特性(扭結現象)。
此處，使用圖7來針對扭結現象加以說明。例如，圖7係顯示場效電晶體的電壓電流特性之圖式，橫軸表示閘極電極的電壓(Vd)，縱軸表示源極與汲極間的電流(Id)。如圖7之橢圓形虛線(符號700)所示，若發生扭結現象的情況，則場效電晶體會具有當Vd電壓高於一定的電壓時，Id會急遽上升之電壓電流特性。
此外，由於扭結現象而導致的場效電晶體特性變化有依畫素而差異較大的情況，故會產生畫素間的輝度差異，或是橫紋、縱紋等的顯示不良。
因此，例如，專利文獻1中揭示了在具有多閘極構造之TFT(Thin Film Transistor)中，於2個通道區域之間設置注入有低濃度的n型離子之低濃度雜質區域(以下稱作LDD(Lightly Doped Drain)區域)與高濃度雜質區域，來緩和汲極電極與源極電極間的電場變化，藉此抑制扭結現象的發生這一點。
[先前技術文獻]
[專利文獻]
專利文獻1：日本特開2014-44439號公報
如專利文獻1般，在LDD區域與高濃度雜質區域相鄰接之構成中，當LDD區域與高濃度雜質區域的交界位置依畫素而有差異的情況，扭結現象的減輕效果會依畫素而不同，而有殘存著顯示不良之可能性。
又，為了防止LDD區域與高濃度雜質區域的交界位置產生差異，雖亦考慮了在相當於專利文獻1的LDD區域之區域亦注入高濃度的雜質之構成，但會因電晶體的阻抗增加，而可能導致消耗電功率增加或輝度降低。
本發明係鑑於上述課題所發明者，其目的在於提供一種不會導致過度的輝度降低或消耗電功率增加，可改善電晶體特性的畫素間差異之有機EL顯示裝置以及該有機EL顯示裝置之製造方法。
本發明之一樣態係一種有機EL顯示裝置，其具有複數畫素，且於該各畫素具有能夠控制流往有機EL元件的電流之電晶體；該電晶體具有：汲極電極及源極電極，其中一者係與該有機EL元件電連接，另一者係從該有機EL顯示裝置的外部供應有電源；第1閘極電極，係形成於該源極電極與該汲極電極之間；以及半導體膜，係形成於該第1閘極電極的下層側；該半導體膜中，該第1閘極電極與該汲極電極或該源極電極間之區域的其中一部份之第1區域係注入有高濃度的n型離 子，其他部份之第2區域係注入有低濃度的n型離子。
又，本發明之其他一樣態係一種有機EL顯示裝置之製造方法，該有機EL顯示裝置係具有複數畫素，且於該各畫素具有能夠控制流往有機EL元件的電流之電晶體；包含以下工序：形成包含於該電晶體的半導體膜之工序；在該半導體膜的上層側，於該半導體膜的中央部形成第1閘極電極之工序；以該第1閘極電極作為遮罩，來對該半導體膜注入n型離子之工序；以覆蓋該半導體膜與該第1閘極電極之方式來形成絕緣膜之工序；於該絕緣膜的上層側，以僅會與該半導體膜中之該第1閘極電極與該汲極電極側或該源極電極之間區域的一部份相重疊之方式來形成第2閘極電極之工序；以及以該第2閘極電極作為遮罩，來對該半導體膜注入n型離子之工序。
100‧‧‧有機EL顯示裝置
110‧‧‧上框架
120‧‧‧下框架
200‧‧‧有機EL面板
202‧‧‧TFT基板
204‧‧‧保護膜
206‧‧‧驅動IC
208‧‧‧畫素
210‧‧‧顯示區域
300‧‧‧驅動電晶體
302‧‧‧發光二極體
304‧‧‧電源配線
306‧‧‧陰極配線
308‧‧‧電容器
310‧‧‧時間點控制電晶體
312‧‧‧時間點控制配線
314‧‧‧階調訊號配線
316‧‧‧時間點控制電路
318‧‧‧階調控制電路
402‧‧‧源極電極
404‧‧‧汲極電極
406‧‧‧第1閘極電極
408‧‧‧半導體膜
410‧‧‧第2閘極電極
412‧‧‧接觸孔
414‧‧‧第1區域
416‧‧‧第2區域
500‧‧‧基板
502‧‧‧底塗膜
504‧‧‧閘極絕緣膜
506‧‧‧第1層間絕緣膜
508‧‧‧第2層間絕緣膜
510‧‧‧第3層間絕緣膜
512‧‧‧平坦化膜
514‧‧‧陽極電極
516‧‧‧肋部
518‧‧‧發光層
520‧‧‧陰極電極
522‧‧‧密封膜
700‧‧‧發生扭結現象之區域
圖1係概略顯示本發明之實施型態相關之有機EL顯示裝置之圖式。
圖2係顯示有機EL面板的概略之圖式。
圖3係顯示畫素及控制電路的概略之圖式。
圖4係顯示驅動電晶體的平面圖之圖式。
圖5係顯示驅動電晶體附近之TFT基板的剖面之圖式。
圖6係用以說明有機EL顯示裝置的製造工序之流程圖。
圖7係用以說明扭結現象之圖式。
以下，針對本發明之各實施型態，參閱圖式來加以說明。此外，揭示僅為一例，本發明所屬技術領域中具通常知識者在遵循發明的主旨下所做的適當變更當中，即便是容易思及者，當然亦包含於本發明之範圍。又，有關圖式，為了使說明更為明確，因此相較於實際的樣態雖有針對各部分的寬度、厚度、形狀等而概略地顯示之情況，但僅 為一例，而非用以限定本發明的解釋。又，本說明書與各圖式中，針對與已說明過的圖式相同之要素，則賦予相同的符號而適當地省略詳細說明。
圖1係顯示本發明之實施型態相關之有機EL顯示裝置100的概略之圖式。如圖所示，有機EL顯示裝置100係由被挾置在上框架110及下框架120般地受到固定之有機EL面板200所構成。
圖2係顯示圖1之有機EL面板200的構成之圖式。有機EL面板200係具有TFT(Thin Film Transistor：薄膜電晶體)基板202、保護膜204及驅動IC(Integrated Circuit)206。
TFT基板202係具有陣列狀地配置於顯示區域210之複數畫素208。具體來說，例如TFT基板202係具有會發出3個或4個不同波長區域的光之複數畫素208。各畫素208係具有由有機EL元件所形成之發光層518，以及控制流往發光層518的電流之驅動電晶體300。有關發光層518及驅動電晶體300將敘述於後。保護膜204為保護TFT基板202之膜，係覆蓋顯示區域210的表面般地以接著劑來加以貼合。
驅動IC206係藉由控制各畫素208的輝度，來將影像顯示於顯示區域210。具體來說，例如圖3所示，係藉由控制流往設置於各畫素208的驅動電晶體300之電流，來將影像顯示於顯示區域210。
接著，針對畫素208、以及控制畫素208的發光時間點及輝度之控制電路來加以說明。如圖3所示，畫素208係包含有驅動電晶體300、發光二極體302、電源配線304、陰極配線306、電容器308、時間點控制電晶體310、時間點控制配線312、以及階調訊號配線314。又，有機EL面板200係包含有時間點控制電路316。再者，驅動IC206係包含有階調控制電路318。
驅動電晶體300會控制流往發光二極體302之電流。具體來說，驅動電晶體300係對應於電容器308所保持的電壓，來控制流往發光二極體302的電流大小，藉此控制發光二極體302所發出的輝度。
發光二極體302係藉由電流從發光二極體302的陽極端子流往陰極端子而發光。具體來說，發光二極體302係藉由以驅動電晶體300 所控制之電流會從陽極端子流往陰極端子，來發出對應於該電流大小之強度的光。此外，發光二極體302係由後述之發光層518所構成。
電源配線304會對驅動電晶體300供應電源。具體來說，電源配線304係與驅動電晶體300的源極電極402或汲極電極404其中一者電連接。又，電源配線304會對驅動電晶體300的源極電極402或汲極電極404供應用以驅動驅動電晶體300之電源。
陰極配線306係與發光二極體302的陰極端子電連接。此外，陰極配線306係與後述之陰極電極520電連接。
電容器308會保持對應於流往發光二極體302的電流大小之電壓。具體來說，電容器308係透過時間點控制電晶體310來保持從階調訊號配線314所供應的電壓。
時間點控制電晶體310會控制改變電容器308所保持的電壓之時間點。具體來說，時間點控制電晶體310係依據被供應至時間點控制電晶體310的閘極端子之訊號，來將階調訊號配線314的電壓供應至電容器308。
時間點控制配線312係與時間點控制電晶體310的閘極端子電連接，會將從時間點控制電路316所供應的訊號供應至時間點控制電晶體310的閘極端子。
階調訊號配線314係與時間點控制電晶體310的源極端子或汲極端子電連接。又，階調訊號配線314會將從階調控制電路318所供應的電壓，透過時間點控制電晶體310而供應至電容器308。
時間點控制電路316會控制各畫素208之發光二極體302的發光時間點。具體來說，時間點控制電路316會生成控制各畫素208之發光二極體302的發光時間點之訊號，並供應至各畫素208的時間點控制配線312。此外，時間點控制電路316可形成於TFT基板202所包含之基板500上，或是形成於驅動IC206的內部。
階調控制電路318會控制各畫素208所包含之發光二極體302的發出輝度。具體來說，階調控制電路318係依據從有機EL顯示裝置100的外部所供應之顯示影像，來生成對應於各畫素208的輝度之電 壓，並供應至各畫素208的階調訊號配線314。此外，階調控制電路318係形成於驅動IC206的內部。
接著，針對驅動電晶體300加以說明。圖4係顯示俯視觀看下，設置於各畫素208之驅動電晶體300的概略之圖式。如圖4所示，驅動電晶體300係具有源極電極402、汲極電極404、第1閘極電極406、半導體膜408及第2閘極電極410。
汲極電極404及源極電極402的其中一者係與發光層518電連接，另一者則會對應於從有機EL顯示裝置100的外部所顯示之影像而被施加電壓。具體來說，例如汲極電極404係配置於驅動電晶體300的右端部，透過後述之陽極電極514而與發光層518電連接。源極電極402係配置於驅動電晶體300的左側，透過階調訊號配線314且藉由驅動IC206而被施加對應於階調值之電壓。此外，汲極電極404與源極電極402亦可互相交換。
又，汲極電極404透係過形成於汲極電極404與半導體膜408之間的層之接觸孔412而與半導體膜408電連接。同樣地，源極電極402透係過形成於源極電極402與半導體膜408之間的層之接觸孔412而與半導體膜408電連接。有關該接觸孔412將使用剖視圖(圖5)來敘述於後。
第1閘極電極406係形成於源極電極402與汲極電極404之間。具體來說，例如第1閘極電極406係在源極電極402與汲極電極404之間的區域處，而形成為從俯視觀看下皆不會與源極電極402及汲極電極404任一者相重疊。又，第1閘極電極406係形成為具有從俯視觀看下會與第1區域414的至少一部分相重疊之區域。
半導體膜408係形成於閘極電極的下層側。具體來說，半導體膜408係形成於為第1閘極電極406、汲極電極404及源極電極402的下層側，且從形成有汲極電極404之區域到形成有源極電極402之區域。
驅動電晶體300進一步地，半導體膜408中為閘極電極與汲極電極404或源極電極402間之區域的其中一部份之第1區域414係注入有高濃度的n型離子，為另一部分之第2區域416係注入有低濃度的n 型離子。
具體來說，例如，形成在為設置於汲極電極404的接觸孔412與第1閘極電極406之間的區域之第1區域414之半導體膜408係注入有高濃度的磷等N型半導體形成用的雜質(n型離子)。又，形成在為設置於源極電極402之接觸孔412與第1閘極電極406之間的區域之第2區域416之半導體膜408係注入有較第1區域414要低濃度的磷等N型半導體形成用的n型離子。
第2閘極電極410係形成為與第1閘極電極406同電位而相連接，從俯視觀看下會具有與第1區域414與第2區域416中的第2區域416相重疊之區域，而不具有與第1區域414相重疊之區域。
具體來說，例如第2閘極電極410係形成為從形成於源極電極402的接觸孔412附近到第1閘極電極406之汲極電極404側的端部。又，第2閘極電極410係介隔著絕緣層而形成於第1閘極電極406之上。
使第2閘極電極410的電位與第1閘極電極406同電位之情況，相較於使第2閘極電極410為浮動之情況，或是未設置第2閘極電極410之情況，源極電極402與汲極電極404間的電場強度緩和效果會提高，可發揮降低扭結現象之效果。
又，若是使第2閘極電極410為浮動的情況，則每個畫素208的電位變動會變大，而無法期待遮蔽效果。
此外，第2閘極電極410之源極電極402側的端部最好是接近源極電極402到不會與源極電極402呈短路之程度。具體來說，最好是盡可能地使該端部接近源極電極402，藉以盡可能地以第2閘極電極410來覆蓋第2區域416。依此構成，則第1區域414便會遍佈該第1區域414的全域而注入有高濃度的n型離子，第2區域416則會遍佈該第2區域416的全域而注入有低濃度的n型離子。
接著，使用圖5來針對驅動電晶體300附近之TFT基板202的剖面加以說明。如圖所示，TFT基板202係包含有基板500、底塗膜502、半導體膜408、閘極絕緣膜504、第1閘極電極406、第1層間絕緣膜506、第2層間絕緣膜508、第2閘極電極410、第3層間絕緣膜510、 汲極電極404、源極電極402、平坦化膜512、陽極電極514、肋部516、發光層518、陰極電極520及密封膜522。
基板500係由例如玻璃或可撓性樹脂所形成。底塗膜502係由例如絕緣材料而形成於基板500的表面來作為半導體膜408的緩衝層。
半導體膜408係在底塗膜502的上層而形成於形成有驅動電晶體300之區域。具體來說，半導體膜408係由非晶矽等半導體材料來形成在底塗膜502的上層，且為形成有汲極電極404與源極電極402之區域間。又，半導體膜408係在第1區域414注入有高濃度的n型離子，在第2區域416注入有低濃度的n型離子。
閘極絕緣膜504係覆蓋半導體膜408般而由例如SiO所形成。第1閘極電極406係形成於閘極絕緣膜504的上層，且與形成有半導體膜408之區域的一部分相重疊。
第1層間絕緣膜506係覆蓋第1閘極電極406般而由例如SiN所形成。第2層間絕緣膜508係由例如SiO而形成在第1層間絕緣膜506的上層。
第2閘極電極410係形成於第2層間絕緣膜508的上層。具體來說，例如，第2閘極電極410係形成於第2層間絕緣膜508的上層，且與第1閘極電極406及第2區域416相重疊。此處，第2閘極電極410之源極電極402側的端部最好是接近源極電極402到不會與源極電極402呈短路之程度。又，第2閘極電極410之汲極電極404側的端部只要會與第1閘極電極406相重疊即可，或是亦可如圖5所示般地為未形成於與第1閘極電極406端部的相同位置之構成。
第3層間絕緣膜510係覆蓋第2閘極電極410般而由例如SiO所形成。
汲極電極404係形成於第3層間絕緣膜510的上層。具體來說，例如，汲極電極404係形成於第3層間絕緣膜510的上層，且與半導體膜408的圖式上右側端部相重疊。又，汲極電極404係透過形成於汲極電極404與半導體膜408之間的層所設置之接觸孔412而與半導體膜408電連接。
源極電極402係形成於第3層間絕緣膜510的上層。具體來說，例如源極電極402係形成於第3層間絕緣膜510的上層，且與半導體膜408的圖式上左側端部相重疊。又，源極電極402係透過形成於源極電極402與半導體膜408之間的層所設置之接觸孔412而與半導體膜408電連接。
平坦化膜512係覆蓋汲極電極404及源極電極402般所形成。具體來說，平坦化膜512係覆蓋汲極電極404、源極電極402、以及形成於汲極電極404與源極電極402的下層之第3層間絕緣膜510般所形成，來使形成於較平坦化膜512更下側之層所致之段差平坦化。
陽極電極514係形成於平坦化膜512的上層。具體來說，陽極電極514係形成於平坦化膜512的上層，且透過設置於平坦化膜512之接觸孔來與汲極電極404電連接。
肋部516係覆蓋陽極電極514的周緣部般所形成。藉由該肋部516，可防止陽極電極514與陰極電極520的短路。
發光層518係形成於陽極電極514的上層側。具體來說，發光層518係層積有電洞注入層、電洞輸送層、有機EL元件、電子注入層、電子輸送層及上部電極所形成。有機EL元件係藉由從陽極電極514注入的電洞與從陰極電極520注入的電子之再鍵結而發光。有關電洞注入層、電洞輸送層、電子注入層及電子輸送層，由於與習知技術相同，故省略說明。此外，本實施型態中，發光層518係使用每個畫素208會發出不同顏色的光之材料所形成。
陰極電極520係形成於肋部516及發光層518的上層。具體來說，例如陰極電極520係由ITO(Indium Tin Oxide)等的透明電極而形成於肋部516及發光層518的上層，藉由電流會在陰極電極520與陽極電極514之間流動，來使發光層518發光。
密封膜522係於陰極電極520的上層覆蓋TFT基板202般所形成。密封膜522係防止水分等會成為有機EL元件劣化原因之分子進入發光層518。
如上所述，藉由使半導體膜408中，第1閘極電極406的源極電 極402側與汲極電極404側之區域中僅有一者會與第2閘極電極410相重疊，而成為第1區域414與第2區域416會因第1閘極電極406而分離之構成。然後，將第1區域414與第2區域416分離來加以形成後，使其中一者為LDD區域，另一者為高濃度雜質區域，藉此便可防止LDD區域與高濃度雜質區域的交界位置產生差異。
再者，藉由遍佈第1區域414的全域來注入高濃度的n型離子，遍佈第2區域416的全域來注入低濃度的n型離子，便可防止第1區域414及第2區域416處，注入n型離子之區域的大小產生差異之情況。藉此，便可防止每個驅動電晶體300因扭結現象造成的影響大小而產生差異之情況，從而提高顯示品質。
此外，為了防止扭結現象的發生，亦考慮了使驅動電晶體300的通道長度較長之方法。然而，近年來，由於伴隨著顯示裝置的高精細化，驅動電晶體300的狹小化演進，而使通道長度變長實為困難，因此上述構成在高精細的顯示裝置中特為有效。
又，上述中，雖為具有第2閘極電極410之構成，但不限於此。只要是使第1區域414與第2區域416分離來形成，其中一者為LDD區域，另一者為高濃度雜質區域之構成，則亦可為驅動電晶體300不含有第2閘極電極410之構成。
接著，針對具有上述般驅動電晶體300之有機EL顯示裝置100的製造方法加以說明。圖6為顯示該製造方法之流程圖。首先，覆蓋基板500般地形成底塗膜502，再於底塗膜502上形成半導體膜408(S601)。接下來，在形成閘極絕緣膜504後，於閘極絕緣膜504的上層，且與形成有半導體膜408之區域的一部分相重疊般地形成第1閘極電極406(S602)。
接著，進行第1次的n型離子注入(S603)。具體來說，例如，係以第1閘極電極406作為遮罩來對半導體膜408進行n型離子的注入。亦即，半導體膜408的第1區域414及第2區域416會注入有n型離子。當第1次之n型離子注入完成的時間點時，第1區域414與第2區域416處的半導體膜408便會同時成為注入有低濃度的n型離子之 狀態。
接下來，覆蓋第1閘極電極406及閘極絕緣膜504般地形成第1層間絕緣膜506及第2層間絕緣膜508(S604)。然後，僅會與第1區域414與第2區域416中的第2區域416相重疊般地來形成第2閘極電極410(S605)。
接著，進行第2次的n型離子注入(S606)。具體來說，例如，係以第2閘極電極410作為遮罩來對半導體膜408進行n型離子的注入。亦即，半導體膜408之第1區域414及第2區域416中僅有第1區域414會被注入n型離子。S606中，藉由僅有第1區域414會被注入n型離子，則第1區域414處的半導體膜408便會成為注入有高濃度的n型離子之狀態。亦即，在第2次的n型離子注入完成之時間點時，第1區域414會成為注入有高濃度的n型離子之區域，而第2區域416會成為LDD區域。
接下來，覆蓋第2閘極電極410般地形成第3層間絕緣膜510(S607)。然後，從半導體膜408到第3層間絕緣膜510所層積之各層在半導體膜408的兩端部處形成接觸孔412後，透過該接觸孔412而與半導體膜408電連接般地形成汲極電極404及源極電極402(S608)。
另外，製造有機EL顯示裝置100之工序雖亦包含形成圖5中所說明之平坦化膜512乃至密封膜522的各層之工序，或是挾置於上框架與下框架之工序等，惟該工序與習知技術相同，故省略詳細的說明。
如以上的說明，藉由使第1次的n型離子注入時所使用之遮罩與第2次的n型離子注入時所使用之遮罩不同，便可在第1區域414注入2次n型離子，而在第2區域416僅會注入1次n型離子。藉由該工序，便可在第1區域414注入高濃度的n型離子，而在第2區域416注入低濃度的n型離子。
在本發明之思想範疇內，只要是本發明所屬技術領域中具通常知識者，應當可思及各種變化例及修正例，且可明瞭該等變化例及修正例亦屬於本發明之範圍。例如，針對前述各實施型態，本發明所屬技術領域中具通常知識者所為之適當的增加、刪除構成要素或是改變設 計者，或是，追加、省略工序或進行條件變更者，只要是符合本發明之要旨則亦包含於本發明之範圍。

Claims (4)

  1. 一種有機EL顯示裝置，係具有複數畫素，且於該各畫素具有能夠控制流往有機EL元件的電流之電晶體的有機EL顯示裝置；該電晶體具有：汲極電極及源極電極，其中一者係與該有機EL元件電連接，另一者係從該有機EL顯示裝置的外部供應有電源；第1閘極電極，係形成於該源極電極與該汲極電極之間；第2閘極電極，係形成於該第1閘極電極的上層側；半導體膜，係形成於該第1閘極電極的下層側；以及3層的層間絕緣膜，係包含有閘極絕緣膜、第2及第3層間絕緣膜；該第1閘極電極係在該閘極絕緣膜上，該第2閘極電極係在該第2層間絕緣膜上，該汲極電極與該源極電極係在該第3層間絕緣膜上，而分別相接於各層間絕緣膜的上面來加以配置；該半導體膜中，該第1閘極電極與該汲極電極或該源極電極間之區域的其中一部份之第1區域係注入有高濃度的n型離子，其他部份之第2區域係注入有低濃度的n型離子；該電晶體係具有從俯視觀看下該第1閘極電極與該第1區域的至少一部分會相重疊之區域；該第2閘極電極係配置於與該源極電極或該汲極電極之不同層。
  2. 如申請專利範圍第1項之有機EL顯示裝置，其中該第1區域係遍佈該第1區域的全域而注入有高濃度的n型離子，該第2區域係遍佈該第2區域的全域而注入有低濃度的n型離子。
  3. 如申請專利範圍第1項之有機EL顯示裝置，其中該第2閘極電極係設置為具有從俯視觀看下會與該第1區域與該第2區域中的該第2區域相重疊之區域，而不具有與該第1區域相重疊之區域。
  4. 一種有機EL顯示裝置之製造方法，該有機EL顯示裝置係具有複數畫素，且於該各畫素具有能夠控制流往有機EL元件的電流之電 晶體；包含以下工序：形成包含於該電晶體的半導體膜之工序；於該半導體膜的上層側形成閘極絕緣膜之工序；相接於該閘極絕緣膜之上，於該半導體膜的中央部形成第1閘極電極之工序；以該第1閘極電極作為遮罩，來對該半導體膜注入n型離子之工序；於該第1閘極電極的上層側形成第2層間絕緣膜之工序；相接於該第2層間絕緣膜之上，以僅會與該半導體膜中之該第1閘極電極與汲極電極側或源極電極之間區域的一部份相重疊，且配置於與該源極電極或該汲極電極之不同層之方式來形成第2閘極電極之工序；以該第2閘極電極作為遮罩，來對該半導體膜注入n型離子之工序；覆蓋該第2閘極電極般地形成第3層間絕緣膜之工序；以及於該第3層間絕緣膜的上層側形成該源極電極與該汲極電極之工序。
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