TWI619250B - 半導體結構及其製造方法 - Google Patents
半導體結構及其製造方法 Download PDFInfo
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- TWI619250B TWI619250B TW105124399A TW105124399A TWI619250B TW I619250 B TWI619250 B TW I619250B TW 105124399 A TW105124399 A TW 105124399A TW 105124399 A TW105124399 A TW 105124399A TW I619250 B TWI619250 B TW I619250B
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- Prior art keywords
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- dielectric layer
- gate dielectric
- interposer
- semiconductor structure
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 85
- 238000000034 method Methods 0.000 title description 65
- 229910052751 metal Inorganic materials 0.000 claims abstract description 46
- 239000002184 metal Substances 0.000 claims abstract description 46
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims abstract description 36
- 229910052760 oxygen Inorganic materials 0.000 claims abstract description 36
- 239000001301 oxygen Substances 0.000 claims abstract description 36
- 239000000758 substrate Substances 0.000 claims abstract description 33
- 238000004519 manufacturing process Methods 0.000 claims abstract description 12
- 229910052735 hafnium Inorganic materials 0.000 claims description 7
- 229910052782 aluminium Inorganic materials 0.000 claims description 6
- 229910052684 Cerium Inorganic materials 0.000 claims description 5
- 229910052692 Dysprosium Inorganic materials 0.000 claims description 5
- 229910052691 Erbium Inorganic materials 0.000 claims description 5
- 229910052693 Europium Inorganic materials 0.000 claims description 5
- 229910052688 Gadolinium Inorganic materials 0.000 claims description 5
- 229910052689 Holmium Inorganic materials 0.000 claims description 5
- 229910052779 Neodymium Inorganic materials 0.000 claims description 5
- 229910052777 Praseodymium Inorganic materials 0.000 claims description 5
- 229910052772 Samarium Inorganic materials 0.000 claims description 5
- 229910052771 Terbium Inorganic materials 0.000 claims description 5
- 229910052775 Thulium Inorganic materials 0.000 claims description 5
- 229910052769 Ytterbium Inorganic materials 0.000 claims description 5
- 229910052746 lanthanum Inorganic materials 0.000 claims description 5
- 229910052727 yttrium Inorganic materials 0.000 claims description 5
- 229910052765 Lutetium Inorganic materials 0.000 claims 2
- 230000002687 intercalation Effects 0.000 abstract description 6
- 238000009830 intercalation Methods 0.000 abstract description 6
- 239000010410 layer Substances 0.000 description 282
- 239000000463 material Substances 0.000 description 49
- 238000005229 chemical vapour deposition Methods 0.000 description 16
- 238000000231 atomic layer deposition Methods 0.000 description 10
- 239000011229 interlayer Substances 0.000 description 10
- 229910044991 metal oxide Inorganic materials 0.000 description 10
- 150000004706 metal oxides Chemical class 0.000 description 10
- 238000007789 sealing Methods 0.000 description 10
- 230000015572 biosynthetic process Effects 0.000 description 9
- 239000003989 dielectric material Substances 0.000 description 9
- 125000006850 spacer group Chemical group 0.000 description 9
- 238000005240 physical vapour deposition Methods 0.000 description 8
- 229910000449 hafnium oxide Inorganic materials 0.000 description 6
- WIHZLLGSGQNAGK-UHFFFAOYSA-N hafnium(4+);oxygen(2-) Chemical compound [O-2].[O-2].[Hf+4] WIHZLLGSGQNAGK-UHFFFAOYSA-N 0.000 description 6
- MZLGASXMSKOWSE-UHFFFAOYSA-N tantalum nitride Chemical compound [Ta]#N MZLGASXMSKOWSE-UHFFFAOYSA-N 0.000 description 6
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 5
- 229910052732 germanium Inorganic materials 0.000 description 4
- CJNBYAVZURUTKZ-UHFFFAOYSA-N hafnium(iv) oxide Chemical compound O=[Hf]=O CJNBYAVZURUTKZ-UHFFFAOYSA-N 0.000 description 4
- 238000002955 isolation Methods 0.000 description 4
- 230000003647 oxidation Effects 0.000 description 4
- 238000007254 oxidation reaction Methods 0.000 description 4
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 3
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 3
- 229910000530 Gallium indium arsenide Inorganic materials 0.000 description 3
- -1 HfSiO Inorganic materials 0.000 description 3
- 229910000673 Indium arsenide Inorganic materials 0.000 description 3
- GPXJNWSHGFTCBW-UHFFFAOYSA-N Indium phosphide Chemical compound [In]#P GPXJNWSHGFTCBW-UHFFFAOYSA-N 0.000 description 3
- 229910000577 Silicon-germanium Inorganic materials 0.000 description 3
- GWEVSGVZZGPLCZ-UHFFFAOYSA-N Titan oxide Chemical compound O=[Ti]=O GWEVSGVZZGPLCZ-UHFFFAOYSA-N 0.000 description 3
- 229910045601 alloy Inorganic materials 0.000 description 3
- 239000000956 alloy Substances 0.000 description 3
- 238000005137 deposition process Methods 0.000 description 3
- 238000005538 encapsulation Methods 0.000 description 3
- WPYVAWXEWQSOGY-UHFFFAOYSA-N indium antimonide Chemical compound [Sb]#[In] WPYVAWXEWQSOGY-UHFFFAOYSA-N 0.000 description 3
- RPQDHPTXJYYUPQ-UHFFFAOYSA-N indium arsenide Chemical compound [In]#[As] RPQDHPTXJYYUPQ-UHFFFAOYSA-N 0.000 description 3
- 238000003780 insertion Methods 0.000 description 3
- 230000037431 insertion Effects 0.000 description 3
- NFFIWVVINABMKP-UHFFFAOYSA-N methylidynetantalum Chemical compound [Ta]#C NFFIWVVINABMKP-UHFFFAOYSA-N 0.000 description 3
- 230000008439 repair process Effects 0.000 description 3
- 238000004528 spin coating Methods 0.000 description 3
- 229910003468 tantalcarbide Inorganic materials 0.000 description 3
- 229910052715 tantalum Inorganic materials 0.000 description 3
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 description 3
- 229910005542 GaSb Inorganic materials 0.000 description 2
- MCMNRKCIXSYSNV-UHFFFAOYSA-N Zirconium dioxide Chemical compound O=[Zr]=O MCMNRKCIXSYSNV-UHFFFAOYSA-N 0.000 description 2
- OBOYOXRQUWVUFU-UHFFFAOYSA-N [O-2].[Ti+4].[Nb+5] Chemical compound [O-2].[Ti+4].[Nb+5] OBOYOXRQUWVUFU-UHFFFAOYSA-N 0.000 description 2
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 2
- 239000005380 borophosphosilicate glass Substances 0.000 description 2
- 150000001875 compounds Chemical class 0.000 description 2
- 239000004020 conductor Substances 0.000 description 2
- 238000000151 deposition Methods 0.000 description 2
- 230000005684 electric field Effects 0.000 description 2
- VBJZVLUMGGDVMO-UHFFFAOYSA-N hafnium atom Chemical compound [Hf] VBJZVLUMGGDVMO-UHFFFAOYSA-N 0.000 description 2
- 238000010438 heat treatment Methods 0.000 description 2
- 238000001459 lithography Methods 0.000 description 2
- 238000004518 low pressure chemical vapour deposition Methods 0.000 description 2
- 150000004767 nitrides Chemical class 0.000 description 2
- BPUBBGLMJRNUCC-UHFFFAOYSA-N oxygen(2-);tantalum(5+) Chemical compound [O-2].[O-2].[O-2].[O-2].[O-2].[Ta+5].[Ta+5] BPUBBGLMJRNUCC-UHFFFAOYSA-N 0.000 description 2
- 238000000059 patterning Methods 0.000 description 2
- 239000005360 phosphosilicate glass Substances 0.000 description 2
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 2
- 238000007517 polishing process Methods 0.000 description 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 2
- 229920005591 polysilicon Polymers 0.000 description 2
- 238000006467 substitution reaction Methods 0.000 description 2
- 229910001936 tantalum oxide Inorganic materials 0.000 description 2
- ITWBWJFEJCHKSN-UHFFFAOYSA-N 1,4,7-triazonane Chemical compound C1CNCCNCCN1 ITWBWJFEJCHKSN-UHFFFAOYSA-N 0.000 description 1
- 229910018072 Al 2 O 3 Inorganic materials 0.000 description 1
- 229910000838 Al alloy Inorganic materials 0.000 description 1
- 229910000980 Aluminium gallium arsenide Inorganic materials 0.000 description 1
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 229910005540 GaP Inorganic materials 0.000 description 1
- 229910005793 GeO 2 Inorganic materials 0.000 description 1
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- 229910010038 TiAl Inorganic materials 0.000 description 1
- 229910010037 TiAlN Inorganic materials 0.000 description 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- CEPICIBPGDWCRU-UHFFFAOYSA-N [Si].[Hf] Chemical compound [Si].[Hf] CEPICIBPGDWCRU-UHFFFAOYSA-N 0.000 description 1
- ILCYGSITMBHYNK-UHFFFAOYSA-N [Si]=O.[Hf] Chemical compound [Si]=O.[Hf] ILCYGSITMBHYNK-UHFFFAOYSA-N 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 238000000137 annealing Methods 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 230000001010 compromised effect Effects 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 229910003460 diamond Inorganic materials 0.000 description 1
- 239000010432 diamond Substances 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- HZXMRANICFIONG-UHFFFAOYSA-N gallium phosphide Chemical compound [Ga]#P HZXMRANICFIONG-UHFFFAOYSA-N 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- ZQXQADNTSSMHJI-UHFFFAOYSA-N hafnium(4+) oxygen(2-) tantalum(5+) Chemical compound [O-2].[Ta+5].[Hf+4] ZQXQADNTSSMHJI-UHFFFAOYSA-N 0.000 description 1
- KQHQLIAOAVMAOW-UHFFFAOYSA-N hafnium(4+) oxygen(2-) zirconium(4+) Chemical compound [O--].[O--].[O--].[O--].[Zr+4].[Hf+4] KQHQLIAOAVMAOW-UHFFFAOYSA-N 0.000 description 1
- KUVFGOLWQIXGBP-UHFFFAOYSA-N hafnium(4+);oxygen(2-);titanium(4+) Chemical compound [O-2].[O-2].[O-2].[O-2].[Ti+4].[Hf+4] KUVFGOLWQIXGBP-UHFFFAOYSA-N 0.000 description 1
- 238000002513 implantation Methods 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 229910052914 metal silicate Inorganic materials 0.000 description 1
- QWDUNBOWGVRUCG-UHFFFAOYSA-N n-(4-chloro-2-nitrophenyl)acetamide Chemical compound CC(=O)NC1=CC=C(Cl)C=C1[N+]([O-])=O QWDUNBOWGVRUCG-UHFFFAOYSA-N 0.000 description 1
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 1
- RVTZCBVAJQQJTK-UHFFFAOYSA-N oxygen(2-);zirconium(4+) Chemical compound [O-2].[O-2].[Zr+4] RVTZCBVAJQQJTK-UHFFFAOYSA-N 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 239000005368 silicate glass Substances 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
- 239000010936 titanium Substances 0.000 description 1
- OGIDPMRJRNCKJF-UHFFFAOYSA-N titanium oxide Inorganic materials [Ti]=O OGIDPMRJRNCKJF-UHFFFAOYSA-N 0.000 description 1
- 229910052723 transition metal Inorganic materials 0.000 description 1
- 229910000314 transition metal oxide Inorganic materials 0.000 description 1
- 229910000326 transition metal silicate Inorganic materials 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
- 229910001928 zirconium oxide Inorganic materials 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7842—Field effect transistors with field effect produced by an insulated gate means for exerting mechanical stress on the crystal lattice of the channel region, e.g. using a flexible substrate
- H01L29/7843—Field effect transistors with field effect produced by an insulated gate means for exerting mechanical stress on the crystal lattice of the channel region, e.g. using a flexible substrate the means being an applied insulating layer
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42364—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the insulating layer, e.g. thickness or uniformity
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28158—Making the insulator
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28158—Making the insulator
- H01L21/28167—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
- H01L21/28194—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation by deposition, e.g. evaporation, ALD, CVD, sputtering, laser deposition
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/401—Multistep manufacturing processes
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- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/4234—Gate electrodes for transistors with charge trapping gate insulator
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- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
- H01L29/51—Insulating materials associated therewith
- H01L29/511—Insulating materials associated therewith with a compositional variation, e.g. multilayer structures
- H01L29/513—Insulating materials associated therewith with a compositional variation, e.g. multilayer structures the variation being perpendicular to the channel plane
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- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
- H01L29/51—Insulating materials associated therewith
- H01L29/517—Insulating materials associated therewith the insulating material comprising a metallic compound, e.g. metal oxide, metal silicate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66545—Unipolar field-effect transistors with an insulated gate, i.e. MISFET using a dummy, i.e. replacement gate in a process wherein at least a part of the final gate is self aligned to the dummy gate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/785—Field effect transistors with field effect produced by an insulated gate having a channel with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Thin Film Transistor (AREA)
- Composite Materials (AREA)
- Electrodes Of Semiconductors (AREA)
Abstract
本發明提供半導體結構及其製造方法。此半導體結構包含基底,在基底上形成的界面層和在界面層上形成的插入層。半導體結構更包含在插入層上形成的閘極介電層和在閘極介電層上形成的閘極結構。此外,插入層是由M1Ox製成,且M1為金屬,O為氧氣,以及x為大於4之值。
Description
本發明是關於半導體結構及其製造方法,特別是有關於包含插入層的半導體裝置結構及其製造方法。
半導體裝置被用於各式各樣的電子應用中,例如個人電腦、手機、數位相機和其他電子設備。典型上,半導體裝置的製造是藉著在半導體基底上依序沉積絕緣或介電層、導電層和半導體層之材料,且利用微影(lithography)將各式的材料層圖案化以形成電路組件及元件於半導體基底上。
然而,雖然現存的半導體製程已普遍滿足它們既定的用途,隨著裝置尺寸持續地縮小,它們仍未在各方面皆徹底的符合要求。
一些實施例中,提供半導體結構。此半導體結構包含基底、在基底上形成的界面層,及在界面層上形成的插入層。半導體結構更包含在插入層上形成的閘極介電層,以及在閘極介電層上形成的閘極結構。此外,插入層是由M1Ox製成,且M1為金屬,O為氧氣,以及x為大於4之值。
一些實施例中,提供半導體結構。此半導體結構包含基底和在基底上形成的界面層。半導體結構更包含在界面
層上形成的插入層,及在插入層上形成的閘極介電層。半導體結構更包含在閘極介電層上形成的閘極結構。此外,插入層是由M1Ox製成,閘極介電層是由M2Oy製成,且其中M1為金屬,M2為金屬,O為氧氣,以及x為大於y之值。
一些實施例中,提供半導體結構的製造方法。此半導體結構的製造方法包含在基底上形成界面層。半導體結構的製造方法更包含在界面層上形成插入層,和在插入層上形成閘極介電層。半導體結構的製造方法更包含在閘極介電層上形成閘極結構。此外,插入層是由M1 mOn製成,M1為金屬,O為氧氣,m為從約1到約2的範圍內之值,且n為從約1.2到約3.5的範圍內之值。
100a、100b、100c、100d、100e‧‧‧半導體結構
102‧‧‧基底
104、304‧‧‧虛設閘極結構
106、206、306’‧‧‧界面層
108、208、208’、308、308’‧‧‧插入層
110、210、310‧‧‧閘極介電層
112、312‧‧‧虛設閘極電極層
114、314‧‧‧密封層
116、316‧‧‧間隙物
118、323‧‧‧源/汲極結構
120、320‧‧‧接觸蝕刻停止層
122、322‧‧‧層間介電層
124、224、324‧‧‧溝槽
126、226、326‧‧‧閘極結構
128、228、328‧‧‧功函數金屬層
130、230、330‧‧‧金屬閘極電極層
303‧‧‧介電層
305‧‧‧遮罩層
306‧‧‧虛設閘極介電層
307‧‧‧感光層
309‧‧‧鰭式結構
311‧‧‧絕緣層
313‧‧‧隔離結構
藉由以下的詳述配合所附圖式,可以更加理解本揭示的觀點。值得注意的是,根據工業上的標準慣例,許多特徵部件並未按照比例繪製。事實上,為了能清楚地討論,不同特徵部件的尺寸可能被增加或減少。
第1A到1D圖是根據一些實施例,顯示形成半導體結構不同階段的剖面示意圖;第2A到2B圖是根據一些實施例,顯示形成半導體結構不同階段的剖面示意圖;第3圖是根據一些實施例,顯示半導體結構的剖面示意圖;第4A到4H圖是根據一些實施例,顯示形成半導體結構不同階段的透視圖;第5圖是根據一些實施例,顯示半導體結構的透視圖。
以下揭示提供了很多不同的實施例或範例,用於實施所提供的標的之不同特徵部件。組件和配置的具體範例描述如下,以簡化本揭示。當然,這些僅僅是範例,並非用以限定本揭示。舉例而言,敘述中若提及第一特徵部件形成在第二特徵部件之上,可能包含第一和第二特徵部件直接接觸的實施例,也可能包含額外的特徵部件形成在第一和第二特徵部件之間,使得它們不直接接觸的實施例。此外,本揭示可能在不同的範例中重複參考數字及/或字母。如此重複是為了簡明和清楚,而非用以表示所討論的不同實施例及/或形態之間的關係。
再者,空間上相關的措辭,例如「在……之下」、「在……下方」、「下方的」、「在……上方」、「上方的」和其他類似的字詞,可用於此,以簡化描述一元件或特徵部件與其他元件或特徵部件之間,如圖所示之關係的陳述。此空間上相關的措辭意欲包含使用中的裝置或操作除圖式描繪之方向外的不同方向。儀器可以其他方向定位(旋轉90度或其他定位方向),且在此使用的空間相關描述符號可同樣依此解讀。
本發明提供了半導體結構及其製造方法之實施例。此半導體結構包含在界面層和閘極介電層之間形成的插入層。此插入層是由金屬氧化物製成,且插入層中的氧可填補閘極介電層中的氧空位(oxygen vacancy)。
第1A到1D圖是根據一些實施例,顯示形成半導體結構100a不同階段的剖面示意圖。根據一些實施例,如第1A圖所示,以基底102為標準。基底102可為半導體晶圓,例如矽
晶圓。或者或更甚者,基底102可包含元素半導體材料、化合物半導體材料,及/或合金半導體材料。元素半導體材料可例如為結晶矽、多晶矽、非晶矽、鍺(Ge)及/或鑽石,但不限於此。化合物半導體材料可例如為碳化矽、砷化鎵、磷化鎵、磷化銦、砷化銦及/或銻化銦,但不限於此。合金半導體材料可例如為SiGe、GaAsP、AlInAs、AlGaAs、GaInAs、GaInP及/或GaInAsP,但不限於此。
根據一些實施例,如第1A圖所示,在基底102上形成虛設(dummy)閘極結構104。根據一些實施例,虛設閘極結構104包含界面層106、插入層108、閘極介電層110和虛設閘極電極層112。
一些實施例中,界面層106由SiO2、GeO2、HfSiO、SiON或其他類似之材料製成。一些實施例中,界面層106之厚度在從約2Å到約50Å的範圍內。界面層106之形成可藉由實施原子層沉積(atomic layer deposition,ALD)製程、熱氧化(thermal oxidation)製程、紫外光臭氧氧化(UV-Ozone oxidation)製程或化學氣相沉積(chemical vapor deposition,CVD)製程達成。
根據一些實施例,如第1A圖所示,在界面層106上形成插入層108,且在插入層108上形成閘極介電層110。插入層108的形成可用以填補閘極介電層110中的氧空位。因此,用以形成插入層108之材料可較用以形成閘極介電層110之材料的含氧量高。一些實施例中,插入層108和閘極介電層110皆由金屬氧化物製成,但用以形成插入層108之金屬氧化物與用以
形成閘極介電層110之金屬氧化物相比,具有較高的配位數(coordination number)。
一些實施例中,插入層108由M1Ox製成。M1為金屬。一些實施例中,M1是選自於Hf、Al、Y、Ga、Sc、La、Ce、Pr、Nd、Pm、Sm、Eu、Gd、Tb、Dy、Ho、Er、Tm、Yb或Lu。O為氧氣。一些實施例中,x為大於4之值。一些實施例中,x在從約5到約10的範圍內。如上所述,可形成插入層108以填補閘極介電層110中的氧空位,因此,x之值應該足夠高,使得插入層108能提供足夠的氧以修補閘極介電層110中的氧空位。然而,x不應該過高,否則插入層108的介電常數可能變得過高,在隨後的製程中,形成於其上的閘極結構之效能可能受到影響。
一些實施例中,閘極介電層110由M2Oy製成。M2為金屬。一些實施例中,M2是選自於Hf、Al、Y、Ga、Sc、La、Ce、Pr、Nd、Pm、Sm、Eu、Gd、Tb、Dy、Ho、Er、Tm、Yb或Lu。O為氧氣。一些實施例中,y為小於5之值。一些實施例中,y在從約1到4的範圍內。一些實施例中,M1和M2為相同的金屬,但用以形成插入層108和閘極介電層110的材料之配位數不同。舉例而言,插入層108由M1Ox製成,且閘極介電層110由M1Oy製成。此外,x為大於y之值。一些實施例中,插入層108由HfOx製成,且閘極介電層110由HfOy製成,而x之值等於或大於5,y之值等於或小於4。
一些實施例中,閘極介電層110的介電常數大於插入層108的介電常數。一些實施例中,閘極介電層110的介電常
數在從18到25的範圍內。一些實施例中,插入層108的介電常數在從13到17的範圍內。一些實施例中,插入層108的介電常數大於界面層106的介電常數。
一些實施例中,插入層108由M1 mOn製成,M1為金屬,O為氧氣,m為從約1到約2的範圍內之值,且n為從約1到約3的範圍內之值。一些實施例中,M1是選自於Hf、Al、Y、Ga、Sc、La、Ce、Pr、Nd、Pm、Sm、Eu、Gd、Tb、Dy、Ho、Er、Tm、Yb或Lu。一些實施例中,n對m之比值在從約5到約10的範圍內。
一些實施例中,插入層108的厚度在從約1Å到約15Å的範圍內。插入層108應該足夠厚,使得插入層108可提供有效的含氧量以修補閘極介電層110內的氧空位。然而,插入層108不應該過厚,否則半導體結構之電容可能變得過高,半導體結構之效能也會因此受到損害。插入層108的形成可藉由退火(annealing)、化學氣相沉積(CVD)、物理氣相沉積(physical vapor deposition,PVD)、原子層沉積(ALD)、旋轉塗佈(spin-on coating)或其他合適的製程實施。在形成插入層108的製程中可使用氣體,例如N2、H2、O2、N2O及/或H2O。
一些實施例中,閘極介電層110由高介電常數(high-k)之介電材料製成。高介電常數之介電材料可例如為氧化鉿(hafnium oxide,HfO2)、鉿矽氧化物(hafnium silicon oxide,HfSiO)、鉿鉭氧化物(hafnium tantalum oxide,HfTaO)、鉿鈦氧化物(hafnium titanium oxide,HfTiO)、鉿鋯氧化物(hafnium zirconium oxide,HfZrO)、氧化鋯(zirconium oxide)、
氧化鈦(titanium oxide)、氧化鋁(aluminum oxide)、二氧化鉿-氧化鋁(hafnium dioxide-alumina,HfO2-Al2O3)合金或其他合適的介電材料,但不限於此。閘極介電層110之形成可藉由化學氣相沉積(CVD)、物理氣相沉積(PVD)、原子層沉積(ALD)、旋轉塗佈或其他合適的製程實施。一些實施例中,閘極介電層110的厚度在從約10Å到約50Å的範圍內。
根據一些實施例,如第1A圖所示,在閘極介電層110上形成虛設閘極電極層112。一些實施例中,虛設閘極電極層112由多晶矽製成。虛設閘極結構104之形成可藉由依序沉積界面層106、插入層108、閘極介電層110和閘極電極層112,且將這些材料層圖案化實施,以形成虛設閘極結構104。
根據一些實施例,如第1B圖所示,在虛設閘極結構104形成之後,在虛設閘極結構104的側壁上形成密封層(sealing layer)114。密封層114可保護虛設閘極結構104,使其在後續製程中不受損害或流失,也可防止其在後續製程中氧化。一些實施例中,密封層114由氮化矽、氧化矽、氮氧化矽、碳化矽或其他合適的介電材料製成。密封層114可包含單層或多層。
根據一些實施例,在密封層114上更形成間隙物116。一些實施例中,間隙物116由氮化矽、氧化矽、碳化矽、氮氧化矽或其他合適的材料製成。根據一些實施例,如第1B圖所示,源/汲極(source/drain)結構118形成於基底102內,且設置於鄰接虛設閘極結構104。一些實施例中,源/汲極結構118的形成係使用植入(implantation)製程或磊晶(epitaxial,epi)製
程。一些實施例中,源/汲極結構118包含Ge、SiGe、InAs、InGaAs、InSb、GaAs、GaSb、InAlP、InP或其他類似的材料。
根據一些實施例,如第1B圖所示,在基底102內形成源/汲極結構118後,在基底102上形成接觸蝕刻停止層(contact etch stop layer,CESL)120,且在接觸蝕刻停止層120上形成層間介電層122。根據一些實施例,如第1B圖所示,接觸蝕刻停止層120係形成於間隙物116的側壁上和源/汲極結構118的頂面。一些實施例中,接觸蝕刻停止層120由氮化矽、氮氧化矽及/或其他合適的材料製成。接觸蝕刻停止層120的形成可藉由化學氣相沉積(CVD)、物理氣相沉積(PVD)、原子層沉積(ALD)、旋轉塗佈或其他合適的製程實施。
一些實施例中,層間介電層122由氧化矽、氮化矽、磷矽酸鹽玻璃(phosphosilicate glass,PSG)、硼磷矽酸鹽玻璃(borophosphosilicate glass,BPSG)及/或其他合適的介電材料,層間介電層122的形成可藉由化學氣相沉積(CVD)、物理氣相沉積(PVD)、原子層沉積(ALD)、旋轉塗佈或其他合適的製程實施。
根據一些實施例,如第1C圖所示,在層間介電層122形成後,移除虛設閘極電極層112以在間隙物116之間形成溝槽124。接著,根據一些實施例,如第1D圖所示,在溝槽124內形成閘極結構126。
一些實施例中,閘極結構126包含功函數金屬層128和金屬閘極電極層130。調整功函數金屬層128使其具備適當的功函數。一些實施例中,功函數金屬層128由金屬氮化物
製成。舉例而言,若對於P型金屬氧化物半導體場效電晶體(p-type metal oxide semiconductor field oxide transistor,PMOS)裝置欲形成P型功函數金屬(P-metal),可使用TiN、WN或W。另一方面,若對於N型金屬氧化物半導體場效電晶體(NMOS)裝置欲形成N型功函數金屬(N-metal),可使用TiAl、TiAlN或TaCN。
一些實施例中,金屬閘極電極層130由導電材料製成,例如金屬。用以形成金屬閘極電極層130之導電材料可例如為鋁、銅、鎢、鈦、鉭或其他合適的材料,但不限於此。如先前所述,在後續的製程中,金屬閘極電極層130的金屬可能擴散至形成於其下的多層。
如第1D圖所示,半導體結構100a包含設置於界面層106和閘極介電層110之間的插入層108。插入層108內的氧可填補閘極介電層110內的氧空位,使得閘極結構126的臨界電壓(threshold voltage)不受閘極介電層110內氧空位的影響。因此,產生的半導體結構100a能具備較佳的均勻度(uniformity),且能改善半導體結構100a的產率。
第2A到2B圖是根據一些實施例,顯示形成半導體結構100b不同階段的剖面示意圖。用以形成半導體結構100b的一些製程和材料可相似或相同於先前所述之用以形成半導體結構100a的製程和材料,在此便不重複。
除了界面層、插入層和閘極介電層在移除虛設閘極結構之後才形成以外,用以形成半導體結構100b的方法相似於用以形成半導體結構100a的方法。與第1A到1C圖所顯示的類
似,在基底102上形成虛設閘極結構,且在虛設閘極結構的側壁上形成密封層114和間隙物116。此外,在基底102內形成源/汲極結構118,且在基底102上形成接觸蝕刻停止層120和層間介電層122。接著,根據一些實施例,如第2A圖所示,移除虛設閘極結構以形成溝槽224。
不同於第1C圖所顯示的結構,虛設閘極結構係被完全移除,且因此藉由溝槽224暴露出基底102的頂面。形成溝槽224後,在溝槽224的底面上形成界面層206。用以形成界面層206的製程和材料可相似或相同於先前所述用以形成界面層106的製程和材料,在此便不重複。
根據一些實施例,如第2B圖所示,形成界面層206後,在界面層206的頂面和溝槽224的側壁上形成插入層208。用以形成插入層208的製程和材料可相似或相同於先前所述用以形成插入層108的製程和材料,在此便不重複。一些實施例中,實施化學氣相沉積(CVD)製程以形成插入層208。
根據一些實施例,如第2B圖所示,在形成插入層208後,在插入層208上形成閘極介電層210。用以形成閘極介電層210的製程和材料可相似或相同於先前所述用以形成閘極介電層110的製程和材料,在此便不重複。
接續前述,根據一些實施例,如第2B圖所示,在閘極介電層210上形成閘極結構226。相似於閘極結構126,根據一些實施例,閘極結構226包含功函數金屬層228和形成於功函數金屬層228上的金屬閘極電極層230。用以形成功函數金屬層228和金屬閘極電極層230的製程和材料可各自相似或相同
於先前所述用以形成功函數金屬層128和金屬閘極電極層130的製程和材料,在此便不重複。
如第2B圖所示,半導體結構100b包含設置於界面層206和閘極介電層210之間的插入層208。如前所述,形成含氧量較閘極介電層210多的插入層208,使得插入層208可被視為修補閘極介電層210內之氧空位的氧來源。因此,可改善和良好地控制所產生的半導體結構100b之效能。
因此,閘極介電層210內的氧空位可藉由插入層208內的氧來修補,且可改善形成半導體結構100b的均勻度。
第3圖是根據一些實施例,顯示半導體結構100c的剖面示意圖。除了未在密封層114的側壁上形成插入層以外,半導體結構100c相似或相同於半導體結構100b。
更明確而言,可實施相似於第2A至2B圖所顯示的製程。然而,取代插入層208的是,在界面層206上形成插入層208’。用以形成插入層208’的材料可相似或相同於先前所述用以形成插入層108和208的材料,在此便不重複。插入層208’和插入層208的不同點在於插入層208’只形成在界面層206的頂面(即在藉由移除虛設閘極結構而形成的溝槽之底面上),而非在密封層114的側壁上(即在藉由移除虛設閘極結構而形成的溝槽之側壁上)。一些實施例中,插入層208’藉由實施熱處理製程而形成。
第4A到4H圖是根據一些實施例,顯示形成半導體結構100d不同階段的透視圖。根據一些實施例,如第4A圖所示,在基底102上形成介電層303和遮罩層305,且在遮罩層305
上形成感光層307。介電層303可用作基底102和遮罩層305之間的黏著層。此外,介電層303也可用作蝕刻遮罩層305的蝕刻停止層。一些實施例中,介電層303由氧化矽製成。介電層305的形成可使用熱氧化製程,雖然其他的實施例可使用其他的沉積製程。
在後續的微影製程中,遮罩層305可用作硬遮罩。一些實施例中,遮罩層305由氮化矽製成。遮罩層305的形成可使用低壓化學氣相沉積(low-pressure chemical vapor deposition,LPCVD)或電漿增強化學氣相沉積(plasma enhanced chemical vapor deposition,PECVD),雖然其他的實施例可使用其他的沉積製程。
接續前述,根據一些實施例,如第4B圖所示,憑藉感光層307依序地蝕刻遮罩層305、介電層303和基底102,以形成鰭式(fin)結構309。之後,移除感光層307。根據一些實施例,如第4C圖所示,形成鰭式結構309後,在基底102上形成絕緣層311。如第4C圖所示,鰭式結構309可由絕緣層311覆蓋。一些實施例中,絕緣層311由氧化矽、氮化矽、氮氧化矽、摻氟矽玻璃(fluoride-doped silicate glass,FSG)或其他低介電常數(low-K)之介電材料製成。絕緣層311的形成可使用高密度電漿化學氣相沉積(high-density-plasma chemical vapor deposition,HDPCVD)製程,雖然其他的實施例可使用其他的沉積製程。
接續前述,根據一些實施例,如第4D圖所示,使絕緣層311凹陷以在鰭式結構309周圍形成隔離結構313,例如
淺溝槽隔離結構。絕緣層311之凹陷可藉由溼式蝕刻製程或乾式蝕刻製程實施。此外,移除遮罩層305和介電層303。
之後,形成虛設閘極結構304橫跨鰭式結構309且延伸至隔離結構313上。一些實施例中,虛設閘極結構304包含虛設閘極介電層306和形成於虛設閘極介電層306上的虛設閘極電極層312。一些實施例中,虛設閘極介電層306由氧化矽製成。一些實施例中,虛設閘極介電層306由高介電常數(high-k)之介電材料,例如金屬氧化物、金屬氮化物、金屬矽酸鹽、過渡金屬氧化物、過渡金屬氮化物、過渡金屬矽酸鹽或金屬氮氧化物製成。高介電常數之介電材料可例如為氧化鉿(HfO2)、鉿矽氧化物(HfSiO)、鉿矽氮氧化物(hafnium silicon oxynitride,HfSiON)、鉿鉭氧化物(HfTaO)、鉿鈦氧化物(HfTiO)、鉿鋯氧化物(HfZrO)、氧化鋯、氧化鈦、氧化鋁、二氧化鉿-氧化鋁合金或其他合適的介電材料,但不限於此。一些實施例中,虛設閘極電極層312由多晶矽製成。
根據一些實施例,如第4E圖所示,在形成虛設閘極結構304後,在虛設閘極結構304的側壁形成密封層314和間隙物316。用以形成密封層314和間隙物316的製程和材料可相似或相同於先前所述用以形成密封層114和間隙物116的製程和材料,在此便不重複。
接續前述,根據一些實施例,如第4E圖所示,在鰭式結構309內形成源/汲極結構323。一些實施例中,使鰭式結構309鄰接虛設閘極結構304的部分凹陷,以在鰭式結構309的兩側形成凹陷,且在凹陷內藉由磊晶(epi)製程生長應變材
料。此外,應變材料的晶格常數可不同於基底102的晶格常數。一些實施例中,源/汲極結構323包含Ge、SiGe、InAs、InGaAs、InSb、GaAs、GaSb、InAlP、InP或其他類似的材料。
根據一些實施例,如第4F圖所示,在形成源/汲極結構323後,在基底102上形成接觸蝕刻停止層(CESL)320,且在接觸蝕刻停止層320上形成層間介電層(ILD)322。用以形成接觸蝕刻停止層320和層間介電層322的製程和材料可相似或相同於先前所述用以形成接觸蝕刻停止層120和層間介電層122的製程和材料,在此便不重複。
接著,根據一些實施例,在層間介電層322和接觸蝕刻停止層320上實施研磨製程,以暴露虛設閘極結構304的頂面。一些實施例中,實施化學機械研磨(chemical mechanical polishing,CMP)製程直到暴露出虛設閘極結構304的頂面。
根據一些實施例,如第4G圖所示,在實施研磨製程後,移除虛設閘極結構304,以形成溝槽324。一些實施例中,藉由乾式蝕刻製程的實施,移除虛設閘極結構304。一些實施例中,藉由乾式蝕刻製程和溼式蝕刻製程的實施,移除虛設閘極結構304。
根據一些實施例,如第4H圖所示,在形成溝槽324後,在溝槽324的底面形成界面層306’。用以形成界面層306’的製程和材料可相似或相同於先前所述用以形成界面層106和206的製程和材料,在此便不重複。
根據一些實施例,如第4H圖所示,在形成界面層306’後,在界面層306’的頂面和溝槽324的側壁上形成插入層
308。用以形成插入層308的製程和材料可相似或相同於先前所述用以形成插入層108、208和208’的製程和材料,在此便不重複。一些實施例中,藉由實施化學氣相沉積(CVD)製程形成插入層308。
根據一些實施例,如第4H圖所示,在形成插入層308後,在插入層308上形成閘極介電層310。用以形成閘極介電層310的製程和材料可相似或相同於先前所述用以形成閘極介電層110和210的製程和材料,在此便不重複。
接續前述,根據一些實施例,如第4H圖所示,在閘極介電層310上形成閘極結構326。根據一些實施例,相似於閘極結構126,閘極結構326包含功函數金屬層328和形成於功函數金屬層328上的金屬閘極電極層330。用以形成功函數金屬層328和金屬閘極電極層330的製程和材料可各自相似或相同於先前所述用以形成功函數金屬層128和228以及金屬閘極電極層130和230的製程和材料,在此便不重複。
如第4H圖所示,半導體結構100d包含設置於界面層306’和閘極介電層310之間的插入層308。如前所述,閘極介電層310內的氧空位可藉由插入層308內的氧進行修補,且能改善半導體結構100d的產率。
第5圖是根據一些實施例,顯示半導體結構100e的透視圖。除了未在密封層114的側壁上形成插入層以外(相似於半導體結構100c),半導體結構100e相似或相同於半導體結構100d。
更明確而言,可實施相似於第4A到4H圖所顯示的
製程。然而,取代插入層308的是,在界面層306’上形成插入層308’。用以形成插入層308’的材料可相似或相同於先前所述用以形成插入層108、208、208’和308的材料,在此便不重複。插入層308’和插入層308的不同點在於插入層308’只形成在界面層306’的頂面(即在溝槽324之底面上),而非在密封層314的側壁上(即在溝槽324之側壁上)。一些實施例中,插入層308’藉由實施熱處理製程而形成。
一般而言,半導體結構中的閘極結構包含閘極介電層和形成於閘極介電層上的閘極電極層。然而,當閘極介電層係由高介電常數之介電材料製成,例如金屬氧化物,在閘極結構的製程中可能會在閘極介電層內形成氧空位。氧空位可能吸引基底頂面上的負電(negative electrons),並誘發內部的電場。換言之,閘極結構的功函數值可能受內部的電場影響,且最終的半導體結構均勻度可能不佳。
因此,本揭示的一些實施例中,設置插入層(例如插入層108、208、208’、308和308’)於界面層(例如界面層106、206和306’)和閘極介電層(例如閘極介電層110、210和310)之間。插入層由與閘極介電層相比相對富含氧的材料製成,所以可用於填補閘極介電層內的氧空位。因此,閘極結構的臨界電壓和功函數值將不受閘極介電層內氧空位的影響,且能良好的控制所產生的半導體結構(例如半導體結構100a到100e)之效能。此外,也能改善半導體結構的均勻度和可靠度,且能增加製程的產率。
一些實施例中,插入層由金屬氧化物,例如先前
所敘述的M1Ox製成,且能藉由任何已知或未來發展的製程輕易地形成。換言之,無需複雜的製程,且製程的成本可相對較低。
本發明提供半導體結構及其製造方法之實施例。此半導體結構包含在基底上形成的界面層、插入層和閘極介電層。在閘極介電層上形成閘極結構。插入層係位於界面層和閘極介電層之間。插入層是由與形成閘極介電層之材料相比含氧量較高之金屬氧化物製成。因此,插入層可用於填補閘極介電層中的氧空位,且可更好地控制閘極介電層上形成的閘極結構之臨界電壓。因此,半導體結構之均勻度可獲得改善,且可增加半導體結構之製程產率。
以上概述數個實施例為特徵,以便在本發明所屬技術領域中具有通常知識者可以更理解本揭示的觀點。在發明所屬技術領域中具有通常知識者應該理解他們能以本揭示為基礎,設計或修改其他製程和結構以達到與在此介紹的實施例相同之目的及/或優勢。在發明所屬技術領域中具有通常知識者也應該理解到,此類等效的結構並無悖離本揭示的精神與範圍,且他們能在不違背本揭示之精神和範圍之下,做各式各樣的改變、取代和替換。
Claims (12)
- 一種半導體結構,包括:一基底;一界面層,形成於該基底上;一插入層,形成於該界面層上;一閘極介電層,形成於該插入層上;以及一閘極結構,形成於該閘極介電層上;其中該插入層由M1Ox製成,且M1為金屬,O為氧氣,以及x為大於4之值。
- 如申請專利範圍第1項所述之半導體結構,其中M1選自於Hf、Al、Y、Ga、Sc、La、Ce、Pr、Nd、Pm、Sm、Eu、Gd、Tb、Dy、Ho、Er、Tm、Yb或Lu。
- 如申請專利範圍第1項所述之半導體結構,其中該閘極介電層由M2Oy製成,M2為金屬,y在從約1到4的範圍內,且x在從約5到約10的範圍內。
- 如申請專利範圍第1項所述之半導體結構,其中該閘極介電層的介電常數大於該插入層的介電常數。
- 如申請專利範圍第1項所述之半導體結構,其中該閘極介電層由M1Oy製成,且y在從約1到4的範圍內。
- 如申請專利範圍第1項所述之半導體結構,其中該插入層的厚度在從約1Å到約15Å的範圍內。
- 一種半導體結構,包括:一基底;一界面層,形成於該基底上; 一插入層,形成於該界面層上;一閘極介電層,形成於該插入層上;以及一閘極結構,形成於該閘極介電層上;其中該插入層由M1Ox製成,該閘極介電層由M2Oy製成,且其中M1為金屬,M2為金屬,O為氧氣,x為大於y之數字,且x為大於4之值。
- 如申請專利範圍第7項所述之半導體結構,其中M1和M2各自選自於Hf、Al、Y、Ga、Sc、La、Ce、Pr、Nd、Pm、Sm、Eu、Gd、Tb、Dy、Ho、Er、Tm、Yb或Lu。
- 一種半導體結構的製造方法,包括:在一基底上形成一界面層;在該界面層上形成一插入層;在該插入層上形成一閘極介電層;以及在該閘極介電層上形成一閘極結構;其中該插入層由M1 mOn製成,M1為金屬,O為氧氣,m為從約1到約2的範圍內之值,且n為從約1.2到約3.5的範圍內之值。
- 如申請專利範圍第9項所述之半導體結構的製造方法,其中n對m之比值在從約5到約10的範圍內。
- 如申請專利範圍第9項所述之半導體結構的製造方法,其中該插入層由HfOn製成,且該閘極介電層由HfOp製成,以及p在從約1到約4的範圍內。
- 如申請專利範圍第9項所述之半導體結構的製造方法,其中該插入層的介電常數大於該界面層的介電常數。
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Also Published As
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