TWI619157B - 在低溫下用於半導體測試之方法及裝置 - Google Patents

在低溫下用於半導體測試之方法及裝置 Download PDF

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TWI619157B
TWI619157B TW103109274A TW103109274A TWI619157B TW I619157 B TWI619157 B TW I619157B TW 103109274 A TW103109274 A TW 103109274A TW 103109274 A TW103109274 A TW 103109274A TW I619157 B TWI619157 B TW I619157B
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tape
strip
semiconductor devices
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聖提 巴特森諾英
尤特哈那 吉塔布
菲沙努 桑巴克朗
馬努斯恰 恰諾克
普拉希特 斯里普拉瑟特
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微晶片科技公司
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    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
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    • H01L22/12—Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions
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    • H01L23/00—Details of semiconductor or other solid state devices
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    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
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    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
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Abstract

本發明揭示一種用於測試配置在一條帶上之複數個半導體器件之方法，其可包含在一框架上形成一半導體器件陣列，其中鄰近半導體器件之接觸襯墊被短接；部分切割該條帶以電隔離在該陣列中之個別半導體器件；將該條帶放置在經組態以耐受低溫(例如，低於-20℃或低於-50℃)之一膠帶上；在一測試夾頭上配置該條帶及膠帶；將該測試夾頭、條帶及膠帶曝露至低於一環境溫度之溫度且當曝露至一低溫時，測試複數個半導體器件。在一實施例中，一KAPTONTM膜係用作該膠帶。

Description

在低溫下用於半導體測試之方法及裝置 [相關申請案交叉參考]
本申請案主張2013年3月14日申請之美國臨時申請案第61/784,499號之權利，該案全文併入本文中。
本發明係關於一種用於半導體測試之方法，特定言之係關於低溫下在膜框架上之無引線封裝隔離(部分切割)條帶之測試。
用於半導體器件之無引線封裝係(例如)四側扁平無引線(QFN)或雙側扁平無引線(DFN)封裝。此等裝置包括一半導體晶粒，其位於無引線之一模製外殼內。此外殼包括並非自外殼延伸之接觸襯墊。在製造程序中，複數個此等裝置放置在一個別QFN/DFN金屬「引線框架」上且經共同模製以形成包含如圖1中展示之複數個器件之一矩陣。
在習知QFN/DFN組裝程序中，在此模製條帶中之半導體器件被短接在一起且因此不允許測試。因此，為將如圖1中展示之此條帶處理為一稱為條帶測試形式，在測試之前，半導體器件需要至少部分隔離。此通常藉由一鋸切刀片、雷射或水噴完成。圖2展示在部分隔離之後，配置在一條帶中之數個半導體器件之一放大圖。如展示，在分離鄰近半導體器件之接觸襯墊之一位置處切割器件。常在此一部分隔 離程序之後，發現一些條帶翹曲。然而，針對環境溫度或高溫條帶測試之情況，條帶仍可用於在個別機器中之測試。
某些半導體裝置(例如，用於自動化產業之裝置)需要在低溫下之測試。然而，當曝露至低溫(例如在低於-20℃之溫度下)時，歸因於金屬引線框架(條帶)之性質，在一環境室中之隔離(部分切割)條帶可經歷顯著翹曲。歸因於由此低溫導致之翹曲，無法適當執行測試，(例如)因為翹曲將導致在一習知條帶測試機台(test handler)中之一真空機制失效。圖3A及圖3B展示在曝露至低溫之後，一翹曲條帶之一實例。為此原因，許多半導體製造商將隔離條帶之測試限於環境溫度測試且不執行低溫下之測試。
用於低溫下之條帶測試之另一嘗試解決方案係在器件完全分離(單體化)之後，將半導體器件放置在一膜框架上，且在單體化器件上執行低溫測試。然而，在單體化程序期間之膠帶畸變影響器件之間之對準及/或間隔，導致在後續自框架取器件期間之問題且限制並行測試之數目。
因此，存在一改進製造及/或組裝步驟以允許在無引線封裝(例如，配置在一隔離(部分切割)條帶中之半導體器件)中之半導體器件之低溫測試之一需要。
一實施例提供一種用於測試配置在一條帶上之複數個半導體器件之方法，其可包含在一框架上形成一半導體器件陣列，其中鄰近半導體器件之接觸襯墊被短接；部份切割條帶以電隔離在陣列中之個別半導體器件；將條帶放置在經組態以在低於-20℃延伸之溫度下使用之一膠帶上；在一測試夾頭上配置條帶及膠帶；將測試夾頭、條帶及膠帶曝露至低於一環境溫度之溫度，且當曝露至一低溫時，測試複數個半導體器件。
膠帶在一UV固化之前可具大於1,200gf/in之一黏著力及/或在一UV固化之後可具小於10gf/in之一黏著力。膠帶經組態以耐受達-50℃而不改變配置在膠帶上之半導體器件之任何熱性質。舉例而言，一KAPTONTM膜可用作膠帶。
另一實施例提供一種用於在低溫下測試半導體器件之裝置，其包括一測試夾頭；一膠帶，其配置在測試夾頭上；及一隔離測試條帶，其配置在膠帶上，隔離測試條帶包括在一框架上之一半導體器件陣列且經部分切割以電隔離在陣列中之鄰近半導體器件。膠帶經組態以在低於-20℃延伸或低至-50℃之溫度下使用。舉例而言，KAPTONTM膜可用作膠帶。另外，可在膠帶上方及環繞條帶配置一金屬框架。
100‧‧‧裝置
102‧‧‧測試條帶
104‧‧‧半導體器件
105‧‧‧引線框架
106‧‧‧切割線
110‧‧‧測試夾頭
120‧‧‧膠帶/膜
124‧‧‧今屬框架
130‧‧‧膠帶/膜
200‧‧‧方法
202‧‧‧步驟
204‧‧‧步驟
206‧‧‧步驟
208‧‧‧步驟
210‧‧‧步驟
212‧‧‧步驟
214‧‧‧步驟
216‧‧‧步驟
218‧‧‧步驟
以下參考圖式討論例示性實施例，其中：圖1繪示包含配置在位於一金屬引線框架上之一陣列中之複數個半導體器件之一例示性條帶；圖2展示圖1之條帶之一部分之一放大圖，其中藉由一鋸切刀片、雷射或水噴形成之一切割線而部分隔離鄰近半導體裝置以形成一隔離條帶；圖3A及圖3B展示配置在一測試夾頭上之圖2之隔離條帶，其中隔離條帶藉由被曝露至低溫而翹曲；圖4A及圖4B繪示根據一例示性實施例用於一部分切割測試條帶之低溫測試之一例示性裝置，其包含在低溫測試期間，用於將部分切割測試條帶固定至一測試條帶之一膠帶；及圖5繪示使用如圖4A及圖4B中展示之一例示性裝置之一低溫測試程序之一例示性方法200。
如上討論，本發明提供用於一隔離(部分切割)半導體裝置測試條帶之低溫測試之實施例，其可避免或減少與習知技術相關聯之問題，諸如在低溫曝露期間之引線框架翹曲之問題。
根據各種實施例，為消除在低溫下半導體器件條帶之翹曲，使用一特殊膠帶將半導體器件測試條帶固定至一測試夾頭，且應用一框架。在一些實施例中，條帶僅經部分切割以在其等預期位置及晶片至晶片間隔處維持器件，適用於執行適當測試。接著在條帶式膠帶總成上方放置一框架。未隨時間而改變IC測試條帶之任何產品特性，此措施已證明係有效且可靠。
圖4A及圖4B繪示根據一例示性實施例之用於一部分切割測試條帶之低溫測試之一例示性裝置100。圖4A展示裝置100之一分解圖，而圖4B展示裝置100之一部分組裝圖。如展示，裝置100包含一測試條帶102，其包含半導體器件104(例如，晶片)之二維陣列，其在一引線框架105上；一測試夾頭110，其用於支撐測試條帶102；一膠帶(或膜)120及一選用金屬框架124。將膠帶120應用至測試夾頭110之一頂部表面，且接著將測試條帶102安裝至膠帶120上。亦可以環繞測試條帶102之一方式將選用金屬框架124安裝至膠帶120上。
如藉由鄰近半導體器件104之間之切割線106指示，利用一鋸切刀片、雷射或水噴部份切割測試條帶102以使個別半導體器件104彼此隔離。在測試期間提供此隔離以避免在半導體器件104之間之短接。
膠帶或膜130可經組態以耐受低溫(例如，在低於-20℃延伸或甚至低於-50℃)，同時維持充分黏著力且不改變上覆半導體器件104之任何熱性質。在一些實施例中，膠帶130在環境溫度及低溫(例如低於-20℃或低於-50℃)之兩者下提供在測試夾頭110與測試條帶框架105(例如，SUS304不鏽鋼)之間之大於1,200gf/in之黏著力。在全部測試溫度下，此黏著力可減少或消除隔離(部分切割)測試條帶102變形(例 如，翹曲)之可能性。在一些實施例中，在UV固化之後，膠帶130亦提供在膠帶130與測試條帶框架105之間之小於10gf/in之黏著力，其實質上在膠帶拆卸程序之後，減少或消除剩餘在測試條帶引線框架105上之殘餘。在一些實施例中，膠帶可係一KAPTONTM膜。
圖5繪示使用如圖4A及圖4B中展示之一例示性裝置100之一低溫測試程序之一例示性方法200。在步驟202中，形成具有模製囊封之一DFN/QFN引線框架條帶。在步驟204處執行一條帶鋸切安裝。接著，在步驟206處，在測試條帶上執行一部分切割以形成如圖4A及圖4B中展示之隔離測試條帶102。在步驟208處，接著如圖4A及圖4B中展示，使用膠帶130將隔離測試條帶102安裝至一測試夾頭110。在步驟210處，在環境溫度、高溫及低溫(例如，低於-20℃或低於-50℃)下測試經安裝測試條帶102。接著在步驟212處執行一UV擦除。在步驟214處，接著可執行膠帶拆卸及條帶標記。在步驟216處，測試條帶可被鋸切安裝及單體化。最終，在步驟218處，單體化器件(例如，晶片)可經檢驗且放置至一管或捲盤中。
圖4A及圖4B之配置及圖5之程序可允許在低溫膜框架測試下之一增加之DFN/QFN並行。另外，可消除對於廣範圍溫度測試之封裝大小限制。最終，可減少或消除轉換時間或工具成本之改變。
儘管本發明中詳細描述所揭示之實施例，然應瞭解，在不背離其等精神及範疇之情況下，可作出各種改變、取代及替代。

Claims (16)

  1. 一種用於測試安置(arranged)在一條帶(strip)上之複數個半導體器件之方法，其包括：在一框架上形成一半導體器件陣列，其中相鄰的(adjacent)半導體器件之接觸襯墊(contact pads)被短接(shorted)；部分切割該條帶以電隔離在該陣列中之個別半導體器件；將該條帶放置在經配置(configured)以在低於-20℃延伸之溫度下使用之一膠帶(adhesive tape)上；將該條帶及該膠帶配安在一測試夾頭(test chuck)上；將該測試夾頭、該條帶及該膠帶曝露至低於一環境溫度之溫度；及當曝露至一低溫時，測試複數個半導體器件。
  2. 如請求項1之方法，其進一步包括將一金屬框架環繞該條帶放置在該膠帶上。
  3. 如請求項1之方法，其中該條帶經部分鋸切使得側軌保持在該條帶上。
  4. 如請求項1之方法，其中該膠帶在一UV固化之前具有大於1200gf/in之一黏著力。
  5. 如請求項1之方法，其中該膠帶在一UV固化之後具有小於10gf/in之一黏著力。
  6. 如請求項1之方法，其中該膠帶經配置以耐受達-50℃而不改變安置在該膠帶上之該等半導體器件之任何熱性質。
  7. 如請求項1之方法，其中該膠帶係一KAPTON膜。
  8. 如請求項1至7任一項之方法，其中該框架係用於四側扁平(quad-flat)無引線(no-leads)或雙側扁平(dual-flat)無引線封裝之一框 架。
  9. 一種用於在低溫下測試半導體器件之裝置，其包括：一測試夾頭；一膠帶，其安置在該夾頭上；及一隔離測試條帶，其配置在該膠帶上，該隔離測試條帶包括在一框架上之一半導體器件陣列且經部分切割以電隔離在該陣列中之相鄰的半導體器件；其中該膠帶經配置以在低於-20℃延伸之溫度下使用。
  10. 如請求項9之裝置，其進一步包括安置在該膠帶上且環繞該條帶之一金屬框架。
  11. 如請求項9之裝置，其中該條帶經部分鋸切使得側軌保持在該條帶上。
  12. 如請求項9之裝置，其中該膠帶在一UV固化之前具有大於1200gf/in之一黏著力。
  13. 如請求項9之裝置，其中該膠帶在一UV固化之後具有小於10gf/in之一黏著力。
  14. 如請求項9之裝置，其中該膠帶經配置以耐受達-50℃而不改變安置在該帶上之該等半導體器件之任何熱性質。
  15. 如請求項9之裝置，其中該膠帶係一KAPTON膜。
  16. 如請求項9至15任一項之裝置，其中該框架係用於四側扁平無引線或雙側扁平無引線封裝之一框架。
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