TW569371B - Semiconductor device and manufacturing method therefor - Google Patents

Semiconductor device and manufacturing method therefor Download PDF

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Publication number
TW569371B
TW569371B TW091136650A TW91136650A TW569371B TW 569371 B TW569371 B TW 569371B TW 091136650 A TW091136650 A TW 091136650A TW 91136650 A TW91136650 A TW 91136650A TW 569371 B TW569371 B TW 569371B
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semiconductor
semiconductor device
individual information
support
manufacturing
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TW091136650A
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TW200305239A (en
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Takashi Sato
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Yamaha Corp
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    • H—ELECTRICITY
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    • H01L23/544—Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps
    • H—ELECTRICITY
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    • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
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    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
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    • H01L2224/4805—Shape
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    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
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    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
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    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
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    • H01L2924/102—Material of the semiconductor or solid state bodies
    • H01L2924/1025—Semiconducting materials
    • H01L2924/10251—Elemental semiconductors, i.e. Group IV
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    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
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  • Engineering & Computer Science (AREA)
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  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Die Bonding (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)

Abstract

A semiconductor device is manufactured by sealing a semiconductor chip, which is mounted on a prescribed support such as a lead frame, support bars, and a substrate connected with electrical wiring, in a package. Herein, individual information containing management information representing manufacturing conditions of semiconductor chips and test information representing results of testing of semiconductor chips is automatically recorded on a prescribed position of the prescribed support with respect to each of the semiconductor chips in synchronization with a die bonding process in response to the type of the package. That is, the individual information is recorded on exposed portions of outer leads, exposed portions of support bars, or the backside of the substrate, for example. This improves workability in reading and writing individual information without error, traceability to assure quality of semiconductor devices, and analysis of defects in semiconductor devices.

Description

569371 ⑴ 玖、發明說明 (發明說明應敘明··發明所屬之技術領域、先前技術、内容、實施方式及圖式簡單說明) 發明背景 1 .發明領域 本發明係關於一種半導體裝置及其製造方法。其中，半 導體晶片係藉由晶粒黏合技術黏著於導線框架上，而且該 半導體晶片具有一可讀取型標記或記號，用以表示有關於 半導體晶片之管理及測試之個別資訊。 2.先前技術說明 一般而言，所製造的半導體裝置係具有一可讀取型標記 或記號，該標記或記號係表示如管理資訊及測試資訊之類 的個別資訊’其中該管理資訊表示運用在控制品質及瑕疵 分析的製造條件及評估結果。 換言之，為確保產品品質及分析瑕疵產品，半導體晶片 不僅具有製訊之記錄，更包含有表示半導體晶片之特 性、測試項目與測試結果之評估資訊等記錄。其中，該製 造資訊係儲存有關於製造工廠、模型名稱、晶圓定位資訊 、晶圓批號、晶粒黏合裝置之記錄、晶粒黏合所使用之材 料及導線框架資料等。 舉例而言’日本專利公開案第2 〇 〇 〇 - 2 2 8 3 4 1號揭示一半 導體晶片之個別資訊（如管理資訊及測試資訊）係藉由雷 射光束圖案化晶圓分割而形成之半導體晶片之記憶線路 ，以直接記錄於半導體晶片上。 再者’另一日本專利公開案第2 〇 〇丨_ 2 8 4 〇 6號係揭示一半 導體裝置之個別資訊（如管理資訊及測試資訊）係記錄於 569371569371 发明 发明, description of the invention (the description of the invention should be stated ... the technical field to which the invention belongs, the prior art, the content, the embodiments, and the drawings are briefly explained) Background of the invention 1. The invention relates to a semiconductor device and a method for manufacturing the same . Among them, the semiconductor wafer is adhered to the lead frame by a die bonding technique, and the semiconductor wafer has a readable mark or symbol for indicating individual information about the management and testing of the semiconductor wafer. 2. Description of the prior art Generally speaking, the manufactured semiconductor device has a readable mark or symbol, which indicates individual information such as management information and test information, where the management information indicates that it is used in Control manufacturing conditions and evaluation results of quality and defect analysis. In other words, in order to ensure product quality and analyze defective products, semiconductor wafers not only have records of information production, but also contain records indicating the characteristics of semiconductor wafers, evaluation information of test items and test results, and so on. Among them, the manufacturing information stores information about the manufacturing plant, model name, wafer positioning information, wafer lot number, die bonding device records, materials used for die bonding, and lead frame data. For example, 'Japanese Patent Publication No. 2000- 2 2 8 3 4 1 reveals that individual information (such as management information and test information) of a semiconductor wafer is formed by patterning the wafer by laser beam patterning. The memory circuit of the semiconductor wafer is directly recorded on the semiconductor wafer. Furthermore, another Japanese Patent Publication No. 2 00 丨 _ 2 8 4 〇 6 reveals the individual information (such as management information and test information) of half of the conductor device is recorded in 569371

(2) 用以保護半導體晶片表面之保護膜（protective film)上。 其中，該半導體晶片係藉由晶粒黏合技術設置於導線框架 上，並包覆於封裝體中。 承上所述，日本專利公開案第2000-22 834 1號所揭示之 半導體裝置之個別資訊（如管理資訊及測試資訊）係直接 記錄於半導體晶片之記憶線路上，故在該記憶線路與外界 元件未電性導通時，該記錄於半導體晶片之記憶線路上之 個別資訊是不可能直接讀取得知的。再者，於此實例中有 一更大之缺點，亦即當所需記錄之資訊增加時，半導體晶 片之整體面積也需隨之擴大。 為了改善上述日本專利公開案第20 00-22 834 1號缺點， 於曰本專利公開案第200 1 -2 8406號係提出將記錄於半導 體晶片表面之保護膜上之個別資訊讀取後，再將其記錄於 用以包覆半導體晶片之封裝體上。 具體地說，在半導體元件之線路形成的過程中所得知的 製造資訊，原先係記錄於半導體晶片之保護膜中並經讀取 儲存於資料庫中。接著，由資料庫讀取出之製造資訊及於 後製程中所記錄之評估資訊，皆記錄於用以包覆半導體晶 片之封裝體上。換言之，原先記錄於半導體晶片保護膜上 之個別資訊係藉由一資料庫而轉記錄於封裝體上，惟此一 步驟是相當繁瑣的。再者，由於原始有關半導體晶片之資 訊並非直接記錄於封裝體上，故此經轉換資訊有可能與原 始資訊不相符合。 ..· 再者，該資訊記錄於粗糙之黑色封裝體之表面上，將使 -6- 569371(2) On a protective film used to protect the surface of the semiconductor wafer. Wherein, the semiconductor wafer is disposed on the lead frame by a die bonding technology and is covered in a package. As mentioned above, the individual information (such as management information and test information) of the semiconductor device disclosed in Japanese Patent Laid-Open No. 2000-22 834 1 is directly recorded on the memory circuit of the semiconductor chip, so the memory circuit and the outside world When the component is not electrically conductive, it is impossible to read and know the individual information recorded on the memory circuit of the semiconductor chip. Furthermore, there is a further disadvantage in this example, that is, as the information to be recorded increases, the overall area of the semiconductor wafer also needs to be enlarged accordingly. In order to improve the above-mentioned shortcomings of Japanese Patent Publication No. 20 00-22 834 No. 1, this Japanese Patent Publication No. 200 1 -2 8406 proposed to read individual information recorded on a protective film on the surface of a semiconductor wafer, and then This is recorded on a package for covering a semiconductor wafer. Specifically, the manufacturing information obtained during the process of forming the semiconductor device wiring was originally recorded in the protective film of the semiconductor wafer and read and stored in the database. Then, the manufacturing information read from the database and the evaluation information recorded in the subsequent processes are recorded on the package used to cover the semiconductor wafer. In other words, the individual information originally recorded on the protective film of the semiconductor wafer is transferred to the package through a database, but this step is quite cumbersome. Furthermore, since the original information about the semiconductor wafer is not directly recorded on the package, the converted information may not match the original information. .. · Furthermore, this information is recorded on the surface of the rough black package, which will make -6- 569371

(3) 該資訊不易使用光學讀取元件或相關之讀取裝置以辨識 讀取之。有鑑於此，有必要改良讀取封裝體上所記錄資訊 之技術。換言之，前述方法在實際生產及製造過程中不僅 難以操作運用，且無法適用於一般之製造過程。 發明概述 有鑑於上述課題，本發明之目的係提供一種半導體裝置 及製造方法，以提供一較佳之辨識能力而使個別資訊能直 接讀取之。其中，該個別資訊係為製造過程中所得知之管 理資訊或測試資訊。換言之，本發明可改善用以確保半導 體裝置品質及進一步分析瑕疵之追蹤能力，更可提升讀取 效能以確保讀取或記錄半導體晶片之個別資訊時不致發 生任何錯漏。 本發明中之半導體裝置係由設置於支撐體上（如導線框 架、支撐肋條及基板）並藉由導電線與該預定支撐體電性 連接之半導體晶片所組成。在該製品中，包含有一個別資 訊，而該個別資訊包含有表示該半導體晶片製造條件之管 理資訊及表示該半導體晶片測試結果之測試資訊。其中， 半導體裝置之個別資訊係於晶粒黏合過程中自動記錄在 相對於用以承載該半導體晶片之支撐體之特定位置上。 在四方扁平封裝體（QFP)之實例中，個別資訊係記錄於 導線框架外引腳上外露封裝體之部分；而於四方扁平無 外引腳封裝體（QFN)之實例中，個別資訊係記錄於用以支 撐及固定半導體晶片之支撐肋條上之外露封裝體之部分。另 外，球格陣列封裝體中，個別資訊係記錄於用以固定承載 (4)569371(3) The information is not easy to read by using optical reading elements or related reading devices. For this reason, it is necessary to improve the technology for reading the information recorded on the package. In other words, the aforementioned method is not only difficult to operate and use in actual production and manufacturing processes, but also cannot be applied to general manufacturing processes. SUMMARY OF THE INVENTION In view of the above-mentioned problems, an object of the present invention is to provide a semiconductor device and a manufacturing method thereof, so as to provide a better discrimination ability so that individual information can be directly read. The individual information is management information or test information obtained during the manufacturing process. In other words, the present invention can improve the tracking ability to ensure the quality of the semiconductor device and further analyze the defects, and can also improve the reading performance to ensure that no errors or omissions occur when reading or recording individual information of the semiconductor chip. The semiconductor device in the present invention is composed of a semiconductor wafer provided on a support (such as a lead frame, a support rib, and a substrate) and electrically connected to the predetermined support through conductive wires. The product includes individual information, and the individual information includes management information indicating manufacturing conditions of the semiconductor wafer and test information indicating test results of the semiconductor wafer. Among them, individual information of a semiconductor device is automatically recorded at a specific position relative to a support used to carry the semiconductor wafer during die bonding. In the case of the Quad Flat Package (QFP), individual information is recorded in the exposed part of the package on the lead outside the lead frame; in the case of the Quad Flat Flat No-lead Package (QFN), the individual information is recorded The exposed part of the package is on a supporting rib for supporting and fixing the semiconductor wafer. In addition, in the ball grid array package, individual information is recorded for fixed carrying (4) 569371

半導體晶 發明詳述 以下將 體裝置及 首先， 例中半導 切割前， 之方式形 、2c等係 在後續之 晶片2，係 導體晶片 接著， 2c等設置 上。其中 導體晶片 本實施 架5之相豐 導線框架 理資訊及 較佳的 片 2a、2b 錄於特定 引腳4上· 片之基板背面上。 參照相關圖式，說明依本發明較佳實 其製造方法。 導 請參照圖1A及1B，其係描述關於本發明第 體裳置之整體晶片結構。圖1A係顯示在發晶旧 該等複數個半導體晶片2係利用微影等其他曰曰相同 成於矽晶圓上。具體地說，半導體晶片^、以 有系統地形成於矽晶圓丨之縱方向及橫方向上。 製程中，該等形成於矽晶圓丨上之複數個半導體 沿著切割道3切割以使其分割為複數個方形之半 〇 如圖1B所示，將分割後之半導體晶片2a、2b、 於具有導線框架引腳（或外引腳）4之導線框架5 ’藉由晶片黏合材料（die bonding material)將半 設置並固定於相對之導線框架5位置上。 例之特徵係將個別資訊6記錄（或印刷）於導線框 i*位置上。其中，該個別資訊6係包含有關設置於 5上之半導體晶片2a、2b、2c等之製造條件之管 該半導體晶片特性之測試資訊。 是，將個別資訊6記錄於用來設置承載半導體晶 、2 c等之導線框架5上。在此，個別資訊6不必記 的引腳4上，而大量的資訊卻可記錄於該複數個 569371 (5) 前述設置於導線框架5上之半導體晶片2及引腳4上記錄 有個別資訊6之導線框架5皆包覆於封裝體内。之後，分割 該封裝體及導線框架5以形成完整之半導體裝置。圖2係顯 示包覆有半導體晶片2a及與其相連接且記錄（或印刷）有 個別資訊6之引腳4之封裝體7之一部分。在此，個別資訊6 係記錄於與導線框架5分離之外引腳4之肩部上。 如同前述，個別資訊6除包含管理資訊外，更包含測試 資訊。其中，管理資訊係用以表示製造工廠、製造年份及 日期、晶圓批號、晶圓1之定位資訊、晶粒黏合裝置之記 錄及晶粒黏合所使用之材料。而測試資訊則用以表示晶片 特性、測試號碼、測試資料及關於半導體晶片之導線框架 資料等。 承上所述，個別資訊中6之定位資訊是可記載的，如圖 1 A所示之有關於半導體晶片2a於矽晶圓1上之位置資訊。一 般而言*半導體晶片之圖案格式係根據表不晶粒方位及與 其垂直方位之定位板而形成的。換句話說，第一座標轴係 平行於該定位板1 a ’而第二座標抽係垂直於該定位板1a 且與該晶圓1共平面。如圖1 A所示之座標系統，半導體晶 片2a、2b、2c等關於矽晶圓1之定位資訊可藉由該座標系 統以決定之。 其他管理資訊，如製造工廠、製造年份及日期、晶圓批 號、晶圓之定位資訊、晶粒黏合裝置記錄及晶粒黏合所使 用之材料，通常於半導體晶片之製造過程中記錄之。再者 ，如晶片特性等測試資訊係藉由測試裝置以量測半導體 569371Semiconductor crystal Detailed description of the invention In the following, the bulk device and first, before the semiconductor is cut in the example, the shape, 2c, etc. are set on the subsequent wafer 2, the conductor wafer, and then 2c and so on. Among them, the conductor chip, the phase-conducting lead frame of the present frame 5 and the better pieces 2a, 2b are recorded on the back of the substrate on the specific pin 4 and the piece. With reference to the related drawings, a description will be given of a manufacturing method according to the present invention. Please refer to Figs. 1A and 1B, which describe the overall wafer structure of the present invention. Fig. 1A shows that the plurality of semiconductor wafers 2 which were formed on the old crystal are formed on a silicon wafer by using photolithography or other methods. Specifically, semiconductor wafers are systematically formed in the longitudinal and lateral directions of the silicon wafer. In the manufacturing process, the plurality of semiconductors formed on the silicon wafer are cut along the scribe line 3 to be divided into a plurality of square halves. As shown in FIG. 1B, the divided semiconductor wafers 2a, 2b, and The lead frame 5 ′ having the lead frame pins (or outer pins) 4 is half-set and fixed on the opposite lead frame 5 by a die bonding material. The example is characterized in that the individual information 6 is recorded (or printed) on the lead frame i * position. Among them, the individual information 6 includes test information on the characteristics of the semiconductor wafers, including the manufacturing conditions of the semiconductor wafers 2a, 2b, 2c, etc. provided on 5. If yes, the individual information 6 is recorded on the lead frame 5 for setting the semiconductor crystal, 2c, etc. Here, the individual information 6 need not be recorded on the pin 4, but a large amount of information can be recorded on the plurality of 569371. (5) The individual information 6 is recorded on the semiconductor chip 2 and the pin 4 provided on the lead frame 5 described above. The lead frames 5 are all enclosed in the package. After that, the package body and the lead frame 5 are divided to form a complete semiconductor device. Fig. 2 shows a part of the package body 7 covered with the semiconductor wafer 2a and the pins 4 connected to it and recording (or printing) the individual information 6 thereon. Here, the individual information 6 is recorded on the shoulder of the lead 4 apart from the lead frame 5. As mentioned above, the individual information 6 includes management information as well as test information. Among them, the management information is used to indicate the manufacturing plant, manufacturing year and date, wafer lot number, wafer 1 positioning information, the record of the die bonding device, and the materials used for die bonding. The test information is used to indicate chip characteristics, test numbers, test data, and information about the lead frame of the semiconductor chip. As mentioned above, the positioning information of 6 in the individual information is recordable. As shown in FIG. 1A, there is information about the position of the semiconductor wafer 2a on the silicon wafer 1. Generally speaking, the pattern format of semiconductor wafers is formed according to the orientation of the crystal grains and the positioning plate perpendicular to it. In other words, the first coordinate axis system is parallel to the positioning plate 1 a ′ and the second coordinate extraction system is perpendicular to the positioning plate 1 a and is coplanar with the wafer 1. As shown in the coordinate system shown in FIG. 1A, the positioning information about the silicon wafer 1 such as the semiconductor wafers 2a, 2b, 2c can be determined by the coordinate system. Other management information, such as manufacturing plant, manufacturing year and date, wafer lot number, wafer positioning information, die bonding device records, and materials used for die bonding, are usually recorded during the semiconductor wafer manufacturing process. Moreover, test information such as chip characteristics is measured by a test device to measure semiconductors.

(6) 晶片而記錄之。 前述第一實施例之半導體裝置係應用於一四方扁平封 裝體（QFP)。其中，半導體晶片2係設置並固定於一四邊具 有外引腳4之典型導線框架上。 然而，本發明除可應用於四方扁平封裝體（QFp)，更可 適用於無外引腳之四方扁平無外引腳封裝體（QFN)、晶片 級尺寸封裝（CSP)及球格陣列封裝體（BGA)中。其中，於 四方扁平無外引腳封裝體（QFN)、晶片級尺寸封裝（csp) φ 及球格陣列封裝體（B G A)中，個別資訊係記錄於特定之位 置上以取代原先記錄於四方扁平封裝體（QFp)中之外引腳 4上。 清參照圖3 A及圖3 B，本發明之第二實施例將以四方扁 平無外引腳封裝體（QFN)形式之半導體裝置21來說明之。圖 3A係為半導體裝置21之背視圖，而圖3b係為對應圖3A中 A - A ’剖面之剖視圖。 半導眩日g片2(2a)係藉由四個支撐肋條（SUpp〇rt 鲁 bai:s)22(22a-22d)所支撐，且包覆於封裝體23中。其中， 支撐肋條2 2係部分外露於封裝體2 3背面。而包含管理資訊 及測試資訊之個別資訊6係記錄於支撐肋條22上，如圖3B 所不’個別資訊6乃記錄於支撐肋條2 2 c及2 2 d上。換言之 ’個別資訊6係記錄於封裝體之外表面或記載於人工可視 別《封裝體23表面上，如封裝體之背面或側面上。值得注 意的是’個別資訊6係確實地記錄於支撐肋條2 2之外露部 上’而圖3 A中之標號2 4係用以表示與外部接墊電性連接 -10- 569371(6) Wafer and record it. The semiconductor device of the aforementioned first embodiment is applied to a quadrangular flat package (QFP). Among them, the semiconductor wafer 2 is arranged and fixed on a typical lead frame having outer pins 4 on four sides. However, the present invention is applicable not only to a quad flat package (QFp), but also to a quad flat flat no-lead package (QFN) without external pins, a chip-level package (CSP), and a ball grid array package. (BGA). Among them, in the quad flat no-lead package (QFN), wafer-level package (csp) φ and ball grid array package (BGA), individual information is recorded at a specific location to replace the original record in the quad flat On the outside of the package (QFp) on pin 4. 3A and 3B, a second embodiment of the present invention will be described in the form of a quadrangular flat outer leadless package (QFN) semiconductor device 21. Fig. 3A is a rear view of the semiconductor device 21, and Fig. 3b is a cross-sectional view corresponding to the A-A 'section in Fig. 3A. The semi-conducting sun glare sheet 2 (2a) is supported by four support ribs (SUpport bai: s) 22 (22a-22d), and is wrapped in the package body 23. Wherein, the supporting ribs 22 and 2 are partially exposed on the back of the package 23. The individual information 6 including management information and test information is recorded on the support rib 22, as shown in FIG. 3B. The individual information 6 is recorded on the support ribs 2 2 c and 2 2 d. In other words, 'individual information 6' is recorded on the outer surface of the package or recorded on the surface of the package 23, such as the back or side of the package. It is worth noting that the “individual information 6 is recorded on the exposed part of the supporting rib 2 2” and the reference numeral 2 4 in FIG. 3A is used to indicate the electrical connection with the external pad -10- 569371

⑺ 之引腳。 接著，請參照圖4A及圖4B ’本發明之第三實施例將以 球格陣列封裝體（BGA)形式之半導體裝置31來說明之。圖 4A係為半導體裝置31之背視圖，而圖4B係為對應圖4A中 B-：^剖面之剖視圖。 在球格陣列封裝體（BGA)形式之半導體裝置31中’半導 體晶片2(2a)係設置旅固定於基板32上’該基板32<背面 係有一印刷電路。此外’相對於外部接點之金屬凸塊（或 金屬球）3 3，係以球格陣列狀配置於基板3 2背面。 個別資訊6係包含有關設置於基板表面之半導體晶片的 管理資訊及測試資訊’而該管理資訊係記錄於基板背面或 選定之側邊上。易言之，個別資訊6係確實記錄於封裝體 之外表面或記載於人工可視別之封裝體表面上，如封裝體 之背面或側面上，而圖4 A中之標號3 4係用以表示上述之 封裝體。 接著，請參照圖5以說明關於前述半導體裝置之製造方 法。 矽晶圓1上之複數個半導體晶片2 a、2 b、2 c等，係利用 一切割器（d i c e r)沿切割道3切割，以使該等半導體晶片2 a 、2b、2c分割為複數個獨立之半導體晶片。 之後，該等獨立之半導體晶片2a、2b、2c等係進行一晶 粒黏合程序❶易言之，半導體晶片2a係藉由一晶粒黏合機 62將其取起（pick up)置放於導線框架5上，如此使該半導 體晶片2a能固定設置於導線框架上預設之位置。⑺ pin. Next, referring to FIG. 4A and FIG. 4B, a third embodiment of the present invention will be described with a semiconductor device 31 in the form of a ball grid array package (BGA). FIG. 4A is a rear view of the semiconductor device 31, and FIG. 4B is a cross-sectional view corresponding to the B-: ^ section in FIG. 4A. In the semiconductor device 31 in the form of a ball grid array package (BGA), the 'semiconductor wafer 2 (2a) is mounted on a substrate 32' and the substrate 32 is provided with a printed circuit on its rear surface. In addition, the metal bumps (or metal balls) 3 3 of the external contacts are arranged on the back of the substrate 32 in a ball grid array. The individual information 6 includes management information and test information 'on the semiconductor wafer provided on the substrate surface, and the management information is recorded on the back of the substrate or on a selected side. In other words, the individual information 6 is actually recorded on the outer surface of the package or recorded on the surface of the package visible by humans, such as the back or side of the package, and the reference numeral 34 in Figure 4A is used to indicate The above package. Next, a method for manufacturing the semiconductor device will be described with reference to FIG. 5. The plurality of semiconductor wafers 2a, 2b, 2c, etc. on the silicon wafer 1 are cut along a dicing path 3 by a dicer, so that the semiconductor wafers 2a, 2b, 2c are divided into a plurality of Independent semiconductor wafer. Thereafter, the independent semiconductor wafers 2a, 2b, 2c, etc. are subjected to a die bonding process. In other words, the semiconductor wafers 2a are picked up and placed on the wires by a die bonder 62. In this way, the semiconductor wafer 2a can be fixedly disposed at a predetermined position on the lead frame.

569371 當半導體晶片2a藉由晶粒黏合機62取起後，該半導體晶 片2a先被置放於一資訊讀取機63(如讀條碼機或掃描器） 上，如此該資訊讀取機將讀取記錄於基板或支撐肋條上關 於半導體晶片2 a之個別資訊6 (如管理資訊或測試資訊）。 接著，當晶粒黏合機62將半導體晶片2a固定設置於導線框 架5上預定之位置5 a後，孩被讀取之個別資訊6將傳送至一 記錄器64上，並依序記錄於配置在導線框架上預定位置之 導線框架引腳（或外引腳）4上。 如上所述，讀取個別資訊6及將其記錄於導線框架上之 步驟，係與晶粒黏合程序同時進行。因此，資訊讀取機Μ 及1己錄器64係同時併入該晶粒黏合機62中，如此該讀取機 63及記錄器64將可依據一預定之程序而與晶粒黏合機62 同步操作。故，上述之操作程序將可更容易且有效率之進 行。 前述之製造步驟乃是根據本發明第一實施例所提之關 於四方爲平封裝體（QFP)形式之半導體裝置η而言，其中 獨立之半導體晶片2a係固定設置於導線框架5上。圖3八及 3B乃是根據本發明第二實施例所提之關於四方扁平無外 引腳封裝體（QFN)形式之半導體裝置21。其中，在進行晶 粒黏合過程中，當獨立之半導體晶片2a藉支撐肋條2設置 於預定位置步驟時，個別資訊6係同時記錄於支撐肋條22 接著請參照圖4 A及4B，其係根據本發明第三實施例所 提之關於球格陣列封裝體（B G A)形式之半導體裝置3 1。其 -12- 569371569371 When the semiconductor wafer 2a is picked up by the die bonder 62, the semiconductor wafer 2a is first placed on an information reader 63 (such as a barcode reader or a scanner), so that the information reader will read Take individual information 6 (such as management information or test information) about the semiconductor wafer 2 a recorded on the substrate or support ribs. Next, when the die bonder 62 fixedly sets the semiconductor wafer 2a at a predetermined position 5a on the lead frame 5, the individual information 6 that is read will be transmitted to a recorder 64 and sequentially recorded in the arrangement on the On the lead frame pin (or outer pin) 4 at a predetermined position on the lead frame. As described above, the steps of reading the individual information 6 and recording it on the lead frame are performed simultaneously with the die bonding process. Therefore, the information reader M and the recorder 64 are simultaneously incorporated into the die bonder 62, so that the reader 63 and the recorder 64 can be synchronized with the die bonder 62 according to a predetermined procedure. operating. Therefore, the above operation procedure will be easier and more efficient. The aforementioned manufacturing steps are related to the semiconductor device η in the form of a flat package (QFP) according to the first embodiment of the present invention, wherein the independent semiconductor wafer 2a is fixedly disposed on the lead frame 5. Figs. 38 and 3B show a semiconductor device 21 in the form of a square flat outer leadless package (QFN) according to a second embodiment of the present invention. Among them, in the process of die bonding, when the independent semiconductor wafer 2a is set at a predetermined position by the support rib 2, the individual information 6 is recorded on the support rib 22 at the same time. Then refer to FIGS. 4A and 4B, which are based on The third embodiment of the invention relates to a semiconductor device 31 in the form of a ball grid array package (BGA). Its -12- 569371

⑺ 中，在進行晶粒黏合過程中，當獨立之半導體晶片2 a設置 於基板3 2上時，個別資訊6係同時記錄於基板3 2背面或預 定之側邊上。 一雷射裝置利用其產生之雷射光束在半導體裝置中頻 定之位置來記錄個別資訊6。舉例而言，如下所述之雷射 裝置。In ⑺, during the die bonding process, when the independent semiconductor wafer 2a is set on the substrate 32, individual information 6 is recorded on the back of the substrate 32 or a predetermined side at the same time. A laser device uses the laser beam generated by it to record individual information at a frequency in the semiconductor device 6. For example, the laser device described below.

(a)固態雷射：釔鋁石榴石雷射（YAG/Neodymium-doped yttrium -aluminum garnet laser)或半導體 雷射。 (b)氣態雷射：氦氧雷射（helium-neon/He-Ne laser)、 二氧化碳雷射（carbon dioxide/ C〇2 laser)、氟化氪 激光雷射（KrF excimer laser)、氬離子雷射（Ar ion laser)及紫外線雷射（ultraviolet laser)。 (O液態雷射：合成雷射（dye laser)(a) Solid-state laser: YAG / Neodymium-doped yttrium-aluminum garnet laser or semiconductor laser. (b) Gaseous laser: helium-neon / He-Ne laser, carbon dioxide / CO2 laser, KrF excimer laser, argon ion laser (Ion laser) and ultraviolet laser (ultraviolet laser). (O liquid laser: synthetic laser

舉例而言，釔鋁石榴石雷射（YAG laser)於後所述之條 件下操作，該操作條件為加熱值之範圍由2微焦耳/每平方 公分至6微焦耳/每平方公分，使用波長設定為532奈米， 最高能量之範圍係由5 0 0瓦特至8 8 0瓦特。 氟化氪激光雷射（KrF excimer laser)雷射於預定後所述 之條件下操作，該操作條件為加熱值之範圍由1 〇微焦斗/ 每平方公分至15微焦耳/每平方公分，使用波長設定為248 奈米。 如前所述之相關圖示，記錄於半導體裝置上之個別資訊 6可使用不同之符號及識別標記。再者，亦可使用如圖6 -13- 569371For example, yttrium aluminum garnet laser (YAG laser) is operated under the conditions described below. The operating condition is that the heating value ranges from 2 microjoules per square centimeter to 6 microjoules per square centimeter. The wavelength is used. Set to 532 nanometers, the maximum energy range is from 500 watts to 880 watts. KrF excimer laser is operated under the conditions described below. The operating condition is that the heating value ranges from 10 microjoules per square centimeter to 15 microjoules per square centimeter. The wavelength used is set to 248 nm. As shown in the related illustration, the individual information recorded on the semiconductor device 6 can use different symbols and identification marks. In addition, you can also use as shown in Figure 6 -13- 569371

(ίο) 所示之其他標記及識別符號以做為半導體裝置上之個別 資訊。 _ 個別資訊6亦可使用蓋印之方法，將其記錄於導線框架 引腳4上預定之表面上。其中，縱使銲料於導線框架引腳4 預定之表面上發生回銲之情形，其中空部分亦可用作為光 學讀取之識別記號。(ίο) Other marks and identifications shown as individual information on semiconductor devices. _ Individual information 6 can also be stamped and recorded on a predetermined surface on lead frame pin 4. Among them, even if the solder is reflowed on a predetermined surface of the lead frame pin 4, the empty portion can also be used as an identification mark for optical reading.

如前所述，本發明具有各種不同之效用及技術特徵，茲 分述如后：As mentioned above, the present invention has various effects and technical features, which are described below:

(1) 依本發明所述之方法所製造之半導體裝置係具有一個 別資訊，該個別資訊係包含有表示該半導體晶片製造 條件之管理資訊及表示該半導體晶片測試特性之測試 資訊。其中，該個別資訊係記錄於支撐體上（如用以設 置及固定半導體晶片之導線框架、承載半導體晶片之 支撐肋條及用以承載半導體晶片並使其與支撐體電性 連接之基板外表面）。如此，在不破壞已完成之封裝體 之情形下，可藉由人工操作或經檢測裝置讀取有關晶 圓製程等半導體裝置之相關資訊。所以，藉由用以分 析半導體裝置瑕疵原因所使用之個別資訊，可改善人 工操作所產生之問題。換句話說，即能顯著地改善用 以分析半導體晶片瑕戚原因之追縱能力。 (2) 個別資訊係記錄（或印刷）於金屬部分（或支撐體），如記 錄於導線框架引腳或支撐肋條上。由於該預定支撐體 或金屬部分具有一使光線等產生高反射特性之平面， 如此使得有關半導體裝置之個別資訊將更容易且確實 •14- 569371(1) A semiconductor device manufactured according to the method of the present invention has a separate piece of information, which includes management information indicating the manufacturing conditions of the semiconductor wafer and test information indicating the test characteristics of the semiconductor wafer. Among them, the individual information is recorded on the support (such as a lead frame for setting and fixing a semiconductor wafer, a supporting rib for carrying the semiconductor wafer, and an outer surface of a substrate for carrying the semiconductor wafer and electrically connecting it to the support) . In this way, without destroying the completed package, the relevant information about semiconductor devices such as wafer manufacturing processes can be read manually or through a testing device. Therefore, the problems caused by manual operation can be improved by using the individual information used to analyze the causes of defects in semiconductor devices. In other words, it can significantly improve the tracking ability for analyzing the causes of semiconductor wafer defects. (2) Individual information is recorded (or printed) on metal parts (or supports), such as lead frames or support ribs. Since the predetermined support or metal part has a plane that causes high reflection characteristics such as light, so that individual information about the semiconductor device will be easier and more reliable. 14- 569371

⑼ 地經由光學讀程序以得之。亦即是，在一般半導體裝 置之製造及檢測製程中，能使用一般用以偵測半導體 裝置之光學偵測機以進行光學讀程序。再者，於後續 之製程中，不論銲料之回銲過程是否發生於引腳之表 面上，本發明仍相對地提供一高可讀性之半導體裝置 之個別資訊，以使其光學讀程序能更容易且確實地進 行。 (3)在晶片黏合過程中，記錄於導線框架引腳、支撐肋條 及基板上之個別資訊係包含有表示該半導體晶片之管 理資訊及測試資訊。其中，該個別資訊係直接由獨立 之半導體晶片讀取出並記錄之。如此，能保證分別正 確地記錄有關半導體裝置之資料將與原先半導體晶片 所個別記錄之資料一致無誤。此外，於人工操作之過 程中，本發明亦可改善讀取半導體裝置個別資訊所造 成之錯誤，如此將可適當地改進人工操作過程所導致 半導體裝置瑕疵之原因。再者，半導體裝置個別資訊 之讀取程序更能與晶粒黏合程序同步進行。故，能顯 著地改進半導體裝置之製造及檢測的效率及其可實行 性。 於本實施例之詳細說明中所提出之具體的實施例僅為 了易於說明本發明之技術内容，而並非將本發明狹義地限 制於該實施例，因此，在不超出本發明之精神及以下申請 專利範圍之情況，可作種種變化實施。 -15- 569371⑼ It is obtained by optical reading program. That is, in the manufacturing and inspection process of a general semiconductor device, an optical detector generally used for detecting a semiconductor device can be used for an optical reading process. Furthermore, in the subsequent process, regardless of whether the reflow process of the solder occurs on the surface of the pin, the present invention still relatively provides individual information of a highly readable semiconductor device, so that its optical reading process can be more Easy and sure. (3) During the wafer bonding process, the individual information recorded on the lead frame pins, the support ribs, and the substrate contains management information and test information indicating the semiconductor wafer. Among them, the individual information is directly read and recorded by an independent semiconductor chip. In this way, it can be ensured that the information about the semiconductor device that is recorded correctly and individually will be consistent with the information recorded individually by the original semiconductor wafer. In addition, in the process of manual operation, the present invention can also improve errors caused by reading individual information of the semiconductor device, so that the cause of defects in the semiconductor device caused by the manual operation process can be appropriately improved. In addition, the reading process of individual information of the semiconductor device can be performed in synchronization with the die bonding process. Therefore, it is possible to significantly improve the efficiency and feasibility of manufacturing and testing semiconductor devices. The specific embodiments proposed in the detailed description of this embodiment are only for easy explanation of the technical content of the present invention, and do not limit the present invention to this embodiment in a narrow sense. Therefore, the spirit and the following applications are not exceeded. The scope of patents can be implemented in various ways. -15- 569371

(12) 圖式簡述 以下將藉相關圖示以更進一步詳細說明本發明之其他 目的、觀點及實施例。 圖1 A為一平面圖，係顯示複數個半導體晶片依一座標 系統配置於半導體晶圓上；其中，該座標系統之水平方向 係藉由一定位板定義之；(12) Brief description of the drawings In the following, other objects, viewpoints, and embodiments of the present invention will be described in further detail with the related drawings. FIG. 1A is a plan view showing a plurality of semiconductor wafers arranged on the semiconductor wafer according to a standard system; wherein the horizontal direction of the coordinate system is defined by a positioning plate;

圖1 B為一平面圖，係顯示由半導體晶圓分割出之半導 體晶片設置固定於具有外引腳之導線框架上； 圖2為一分解透視圖，顯示本發明第一實施例中，選自 於具有個別資訊之半導體裝置之一部分； 圖3 A為一背視圖，顯示本發明第二實例中，具有半導 體晶片及外露於支撐肋條之個別資訊之四方扁平無外引 腳封裝體（QFN)； 圖3B為一剖視圖，其係為對應圖3A中A-Af剖面；FIG. 1B is a plan view showing that a semiconductor wafer divided from a semiconductor wafer is set and fixed on a lead frame having external pins; FIG. 2 is an exploded perspective view showing a first embodiment of the present invention, selected from Part of a semiconductor device with individual information; FIG. 3A is a back view showing a quadrangular flat outer leadless package (QFN) with a semiconductor wafer and individual information exposed from a supporting rib in a second example of the present invention; FIG. 3B is a sectional view, which corresponds to the A-Af section in FIG. 3A;

圖4 A為一背視圖，顯示本發明第三實例中，具有半導 體晶片及記錄於外表面之個別資訊之球格陣列封裝體 (BGA)； 圖4B為一剖視圖，其係為對應圖4A中A-A’剖面； 圖5係為一示意圖，顯示根據本發之半導體裝置之製造 流程；及 圖6係為一符號表，表示使用於半導體裝置中，用以代 表個別資訊。 圖式代表符號說明 1 :碎晶圓 -16- 569371FIG. 4A is a back view showing a ball grid array package (BGA) having a semiconductor wafer and individual information recorded on an outer surface in a third example of the present invention; FIG. 4B is a cross-sectional view corresponding to FIG. 4A AA 'section; FIG. 5 is a schematic diagram showing the manufacturing process of the semiconductor device according to the present invention; and FIG. 6 is a symbol table showing that it is used in the semiconductor device to represent individual information. Description of Symbols for Graphical Representations 1: Broken Wafer -16- 569371

1 a :定位板 1 1、2 1、3 1 :半導體裝置 2、2a、2b、2c:半導體晶片 22、 22a、 22b、 22c、 22d ：支撐肋條 23、 34 :封裝體 3 :切割線 3 2 :基板 3 3 :金屬凸塊/金屬球 24 :導線框架引腳 4:導線框架引腳/外引腳 5 :導線框架 5 a、6 :個另J資訊 61 :切割器 6 2 :黏晶機 6 3 :資訊讀取機 64 :記錄器1 a: positioning plate 1 1, 2 1, 3 1: semiconductor device 2, 2a, 2b, 2c: semiconductor wafer 22, 22a, 22b, 22c, 22d: support ribs 23, 34: package body 3: cutting line 3 2 : Substrate 3 3: metal bump / metal ball 24: lead frame pin 4: lead frame pin / outer pin 5: lead frame 5 a, 6: a separate J information 61: cutter 6 2: die attach machine 6 3: Information reader 64: Recorder

Claims (1)

569371 拾、申請專利範圍 1. 一種半導體裝置，包含： 一半導體晶片，該半導體晶片係黏著於一支撐體上 ;及 至少一記錄，該記錄係表示關於該半導體晶片製造 過程中之個別資訊， 其中，該記錄係轉印至該預定支撐載體之一預定位 置上。 2 .如申請專利範圍第1項之半導體裝置，其中該個別資訊 更包含表示該半導體晶片製造條件之管理資訊及表示 該半導體測試結果之測試資訊。 3 .如申請專利範圍第1項之半導體裝置，其中該預定支撐 體係選自於一導線框架、多個支撐肋條及一對應於一 封裝體形式之基板之一。 4.如申請專利範圍第1項之半導體裝置，其中該預定支撐 體對應於一導線框架，而於一晶片黏合過程中將該記 錄係至少轉印至一外引腳上。 5 .如申請專利範圍第1項之半導體裝置，其中該支撐載體 對應於至少一支撐肋條，而該記錄係至少轉印至該至 少一支撐肋條上。 6. 如申請專利範圍第1項之半導體裝置，其中該預定支撐 體對應於一基板，該基板具有一黏著該半導體晶片之 表面，而該記錄係轉印至該基板背面上。 7. —種半導體裝置之製造方法，包含：569371 Patent application scope 1. A semiconductor device comprising: a semiconductor wafer adhered to a support; and at least one record representing individual information about the semiconductor wafer manufacturing process, wherein The recording is transferred to a predetermined position of the predetermined support carrier. 2. If the semiconductor device according to item 1 of the patent application scope, the individual information further includes management information indicating the manufacturing conditions of the semiconductor wafer and test information indicating the semiconductor test results. 3. The semiconductor device according to item 1 of the patent application scope, wherein the predetermined supporting system is selected from one of a lead frame, a plurality of supporting ribs, and a substrate corresponding to a package form. 4. The semiconductor device according to item 1 of the application, wherein the predetermined support corresponds to a lead frame, and the recording system is transferred to at least one outer pin during a wafer bonding process. 5. The semiconductor device according to item 1 of the patent application range, wherein the support carrier corresponds to at least one support rib, and the record is transferred to at least the at least one support rib. 6. The semiconductor device according to item 1 of the patent application scope, wherein the predetermined support corresponds to a substrate, the substrate has a surface to which the semiconductor wafer is adhered, and the recording is transferred to a back surface of the substrate. 7. A method for manufacturing a semiconductor device, including: 569371 於一具有複數個半導體晶片之半導體晶圓上進行一 切割步驟，以使該等半導體晶片相互分割獨立； 進行一晶粒黏合步驟，以使該等半導體晶片各自黏 著並固定於一支撐體上；及 讀取有關該等半導體晶片之每個半導體晶片的個別 資訊；及 將該個別資訊記錄在該預定支撐體上之一預定位置。 8. 如申請專利範圍第7項之半導體裝置之製造方法，其中 該個別資訊更包含表示該半導體晶片製造條件之管理 資訊及表不該半導體測試結果之測試資訊。 9. 如申請專利範圍第7項之半導體裝置之製造方法，其中 該預定支撐體係選自於一導線框架、支撐肋條及一對 應於一封裝體形式之基板之一。 10. 如申請專利範圍第7項之半導體裝置之製造方法，其中 該預定支撐體對應於一導線框架，而將該個別資訊記 錄在至少一外引腳上。 1 1.如申請專利範圍第7項之半導體裝置之製造方法，其中 該支撐載體對應於至少一支撐肋條，將該個別資訊記 錄在該至少一支撐肋條上。 12.如申請專利範圍第7項之半導體裝置之製造方法，其中 該預定支撐體對應於一基板，該基板具有一黏著該半 導體晶片之表面，將該個別資訊記錄在該基板背面上。 -2 ·569371 performs a dicing step on a semiconductor wafer having a plurality of semiconductor wafers so that the semiconductor wafers are separated from each other independently; a die bonding step is performed so that the semiconductor wafers are each adhered and fixed on a support ; And reading individual information about each of the semiconductor wafers; and recording the individual information at a predetermined position on the predetermined support. 8. If the method for manufacturing a semiconductor device according to item 7 of the scope of patent application, the individual information further includes management information indicating the manufacturing conditions of the semiconductor wafer and test information indicating the semiconductor test results. 9. The method for manufacturing a semiconductor device according to item 7 of the application, wherein the predetermined support system is selected from a lead frame, a support rib, and a pair of substrates in the form of a package. 10. The method of manufacturing a semiconductor device according to item 7 of the patent application, wherein the predetermined support corresponds to a lead frame, and the individual information is recorded on at least one outer pin. 1 1. The method of manufacturing a semiconductor device according to item 7 of the scope of patent application, wherein the support carrier corresponds to at least one support rib, and the individual information is recorded on the at least one support rib. 12. The method of manufacturing a semiconductor device according to item 7 of the scope of patent application, wherein the predetermined support corresponds to a substrate having a surface to which the semiconductor wafer is adhered, and the individual information is recorded on a back surface of the substrate. -2 ·
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