TWI573496B - 印刷電子之印刷相容設計及佈局方式 - Google Patents
印刷電子之印刷相容設計及佈局方式 Download PDFInfo
- Publication number
- TWI573496B TWI573496B TW099126062A TW99126062A TWI573496B TW I573496 B TWI573496 B TW I573496B TW 099126062 A TW099126062 A TW 099126062A TW 99126062 A TW99126062 A TW 99126062A TW I573496 B TWI573496 B TW I573496B
- Authority
- TW
- Taiwan
- Prior art keywords
- structures
- features
- layout
- layer
- subset
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0085—Apparatus for treatments of printed circuits with liquids not provided for in groups H05K3/02 - H05K3/46; conveyors and holding means therefor
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C14/00—Digital stores characterised by arrangements of cells having volatile and non-volatile storage properties for back-up when the power is down
- G11C14/0054—Digital stores characterised by arrangements of cells having volatile and non-volatile storage properties for back-up when the power is down in which the volatile element is a SRAM cell
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
- G11C17/14—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0296—Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/16—Printed circuits incorporating printed electric components, e.g. printed resistors, capacitors or inductors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
- H10K71/60—Forming conductive regions or layers, e.g. electrodes
- H10K71/611—Forming conductive regions or layers, e.g. electrodes using printing deposition, e.g. ink jet printing
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
- H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
- H10W20/44—Conductive materials thereof
- H10W20/4473—Conductive organic materials, e.g. conductive adhesives or conductive inks
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
- G11C17/14—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM
- G11C17/18—Auxiliary circuits, e.g. for writing into memory
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09218—Conductive traces
- H05K2201/09245—Crossing layout
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/12—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using thick film techniques, e.g. printing techniques to apply the conductive material or similar techniques for applying conductive paste or ink patterns
- H05K3/1241—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using thick film techniques, e.g. printing techniques to apply the conductive material or similar techniques for applying conductive paste or ink patterns by ink-jet printing or drawing by dispensing
- H05K3/125—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using thick film techniques, e.g. printing techniques to apply the conductive material or similar techniques for applying conductive paste or ink patterns by ink-jet printing or drawing by dispensing by ink-jet printing
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49155—Manufacturing circuit on or in base
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Thin Film Transistor (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Structure Of Printed Boards (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US23164309P | 2009-08-05 | 2009-08-05 | |
| US25580409P | 2009-10-28 | 2009-10-28 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| TW201125445A TW201125445A (en) | 2011-07-16 |
| TWI573496B true TWI573496B (zh) | 2017-03-01 |
Family
ID=43544671
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW099126062A TWI573496B (zh) | 2009-08-05 | 2010-08-05 | 印刷電子之印刷相容設計及佈局方式 |
Country Status (6)
| Country | Link |
|---|---|
| US (2) | US8383952B2 (https=) |
| JP (1) | JP2013501383A (https=) |
| KR (1) | KR101710862B1 (https=) |
| CN (1) | CN102474254A (https=) |
| TW (1) | TWI573496B (https=) |
| WO (1) | WO2011017552A1 (https=) |
Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| AT12741U1 (de) * | 2011-03-10 | 2012-10-15 | Forster Verkehrs Und Werbetechnik Gmbh | Anordnung mit elektrischen/elektronischen bauteilen |
| WO2015075310A1 (en) * | 2013-11-19 | 2015-05-28 | Teknologian Tutkimuskeskus Vtt Oy | A method for the fabrication and use of electronic circuits and an electronics circuit structure |
| GB2543528B (en) | 2015-10-20 | 2020-01-15 | Advanced Risc Mach Ltd | Memory circuit |
| WO2019036304A1 (en) * | 2017-08-18 | 2019-02-21 | Thin Film Electronics Asa | SPRAY-COATED DETECTION LINES, SAFETY AND / OR IDENTIFICATION LABELS AND DEVICES COMPRISING THE SAME, AND METHODS OF MAKING |
| US20210189165A1 (en) * | 2017-10-19 | 2021-06-24 | Hewlett-Packard Development Company, L.P. | Printable ammonium-based chalcogenometalate fluids |
| US10306749B1 (en) * | 2018-02-19 | 2019-05-28 | Dell Products L.P. | System and method of utilizing serpentine regions |
| CN113486621B (zh) * | 2021-06-28 | 2024-03-01 | 深圳市华星光电半导体显示技术有限公司 | 像素电路的设计方法、装置、控制器及存储介质 |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5805428A (en) * | 1996-12-20 | 1998-09-08 | Compaq Computer Corporation | Transistor/resistor printed circuit board layout |
| US20020079553A1 (en) * | 2000-12-22 | 2002-06-27 | Cleeves James M. | Contact and via structure and method of fabrication |
| US7432126B2 (en) * | 2000-11-30 | 2008-10-07 | Infineon Technologies Ag | Substrate with semiconductor layer, electronic component, electronic circuit, printable composition and method for production thereof |
Family Cites Families (43)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5811750B2 (ja) * | 1979-06-04 | 1983-03-04 | 株式会社日立製作所 | 高耐圧抵抗素子 |
| JPS607147A (ja) * | 1983-06-24 | 1985-01-14 | Mitsubishi Electric Corp | 半導体装置 |
| US4685203A (en) * | 1983-09-13 | 1987-08-11 | Mitsubishi Denki Kabushiki Kaisha | Hybrid integrated circuit substrate and method of manufacturing the same |
| JPH02163960A (ja) * | 1988-12-16 | 1990-06-25 | Toshiba Corp | 半導体装置 |
| JPH0750710B2 (ja) * | 1990-06-06 | 1995-05-31 | 富士ゼロックス株式会社 | 多層配線構造 |
| US5723908A (en) * | 1993-03-11 | 1998-03-03 | Kabushiki Kaisha Toshiba | Multilayer wiring structure |
| US5764488A (en) * | 1996-06-11 | 1998-06-09 | Ast Research, Inc. | Printed circuit board having a dual pattern footprint for receiving one of two component packages |
| EP0909117B1 (en) * | 1997-10-08 | 2006-01-04 | Delphi Technologies, Inc. | Method of making thick film circuits |
| JP3070678B2 (ja) * | 1998-03-24 | 2000-07-31 | 日本電気株式会社 | 図形レイアウト変更システム及び図形レイアウト変更方法 |
| JP4228418B2 (ja) * | 1998-07-30 | 2009-02-25 | 沖電気工業株式会社 | 半導体装置 |
| US6691297B1 (en) * | 1999-03-04 | 2004-02-10 | Matsushita Electric Industrial Co., Ltd. | Method for planning layout for LSI pattern, method for forming LSI pattern and method for generating mask data for LSI |
| US6238824B1 (en) * | 1999-08-31 | 2001-05-29 | Micron Technology, Inc. | Method for designing and making photolithographic reticle, reticle, and photolithographic process |
| TW438198U (en) * | 1999-10-14 | 2001-05-28 | Via Tech Inc | Wiring structure of a printed circuit board |
| EP1113368A3 (en) * | 1999-12-27 | 2001-09-26 | Matsushita Electric Industrial Co., Ltd. | Semiconductor integrated circuit with cache |
| US6792590B1 (en) * | 2000-09-29 | 2004-09-14 | Numerical Technologies, Inc. | Dissection of edges with projection points in a fabrication layout for correcting proximity effects |
| US6858928B1 (en) * | 2000-12-07 | 2005-02-22 | Cadence Design Systems, Inc. | Multi-directional wiring on a single metal layer |
| US6492736B1 (en) * | 2001-03-14 | 2002-12-10 | Lsi Logic Corporation | Power mesh bridge |
| JP2002312414A (ja) * | 2001-04-13 | 2002-10-25 | Toshiba Corp | 半導体集積回路装置のレイアウト設計システム、配線設計方法、配線設計プログラム及び半導体集積回路装置の製造方法 |
| TW522764B (en) * | 2001-08-28 | 2003-03-01 | Via Tech Inc | Power layout structure on host bridge chip substrate and motherboard |
| US6825509B1 (en) * | 2001-11-26 | 2004-11-30 | Corrent Corporation | Power distribution system, method, and layout for an electronic device |
| US7739624B2 (en) * | 2002-07-29 | 2010-06-15 | Synopsys, Inc. | Methods and apparatuses to generate a shielding mesh for integrated circuit devices |
| GB0225202D0 (en) * | 2002-10-30 | 2002-12-11 | Hewlett Packard Co | Electronic components |
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| JP2004335887A (ja) * | 2003-05-09 | 2004-11-25 | Canon Inc | プリント配線基板及び該基板を用いた装置 |
| US7124390B2 (en) * | 2003-07-25 | 2006-10-17 | Mentor Graphics Corporation | Generating a split power plane of a multi-layer printed circuit board |
| TW591985B (en) * | 2003-10-15 | 2004-06-11 | Benq Corp | PCB having a circuit layout for preventing the PCB from bending when heated |
| WO2005111874A2 (en) * | 2004-05-07 | 2005-11-24 | Mentor Graphics Corporation | Integrated circuit layout design methodology with process variation bands |
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| WO2008085806A1 (en) * | 2007-01-03 | 2008-07-17 | Nanogram Corporation | Nanoparticle inks based on silicon/germanium, doped particles, printing and processes for semiconductor applications |
| JP5521270B2 (ja) * | 2007-02-21 | 2014-06-11 | 凸版印刷株式会社 | 薄膜トランジスタアレイ、薄膜トランジスタアレイの製造方法、および薄膜トランジスタアレイを用いたアクティブマトリクス型ディスプレイ |
| TWI363210B (en) * | 2007-04-04 | 2012-05-01 | Au Optronics Corp | Layout structure for chip coupling |
| US7979983B2 (en) * | 2007-04-04 | 2011-07-19 | Cisco Technology, Inc. | Connection an integrated circuit on a surface layer of a printed circuit board |
| TWI370464B (en) * | 2007-04-19 | 2012-08-11 | Ind Tech Res Inst | Resistance layout structure and manufacture method thereof |
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-
2010
- 2010-08-05 KR KR1020127002943A patent/KR101710862B1/ko active Active
- 2010-08-05 WO PCT/US2010/044598 patent/WO2011017552A1/en not_active Ceased
- 2010-08-05 JP JP2012523958A patent/JP2013501383A/ja active Pending
- 2010-08-05 TW TW099126062A patent/TWI573496B/zh not_active IP Right Cessation
- 2010-08-05 US US12/851,014 patent/US8383952B2/en active Active
- 2010-08-05 CN CN2010800345952A patent/CN102474254A/zh active Pending
-
2013
- 2013-02-01 US US13/757,649 patent/US9155202B2/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5805428A (en) * | 1996-12-20 | 1998-09-08 | Compaq Computer Corporation | Transistor/resistor printed circuit board layout |
| US7432126B2 (en) * | 2000-11-30 | 2008-10-07 | Infineon Technologies Ag | Substrate with semiconductor layer, electronic component, electronic circuit, printable composition and method for production thereof |
| US20020079553A1 (en) * | 2000-12-22 | 2002-06-27 | Cleeves James M. | Contact and via structure and method of fabrication |
Also Published As
| Publication number | Publication date |
|---|---|
| US9155202B2 (en) | 2015-10-06 |
| WO2011017552A1 (en) | 2011-02-10 |
| CN102474254A (zh) | 2012-05-23 |
| JP2013501383A (ja) | 2013-01-10 |
| KR101710862B1 (ko) | 2017-02-28 |
| US20110186333A1 (en) | 2011-08-04 |
| US20130146334A1 (en) | 2013-06-13 |
| US8383952B2 (en) | 2013-02-26 |
| KR20120052273A (ko) | 2012-05-23 |
| TW201125445A (en) | 2011-07-16 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| MM4A | Annulment or lapse of patent due to non-payment of fees |