TWI560887B - Structure and method for sram finfet device - Google Patents

Structure and method for sram finfet device

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Publication number
TWI560887B
TWI560887B TW103136328A TW103136328A TWI560887B TW I560887 B TWI560887 B TW I560887B TW 103136328 A TW103136328 A TW 103136328A TW 103136328 A TW103136328 A TW 103136328A TW I560887 B TWI560887 B TW I560887B
Authority
TW
Taiwan
Prior art keywords
finfet device
sram finfet
sram
finfet
Prior art date
Application number
TW103136328A
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English (en)
Other versions
TW201541644A (zh
Inventor
Kuocheng Ching
Kahing Fung
Chihsheng Chang
Zhiqiang Wu
Original Assignee
Taiwan Semiconductor Mfg Co Ltd
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Application filed by Taiwan Semiconductor Mfg Co Ltd filed Critical Taiwan Semiconductor Mfg Co Ltd
Publication of TW201541644A publication Critical patent/TW201541644A/zh
Application granted granted Critical
Publication of TWI560887B publication Critical patent/TWI560887B/zh

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    • H01L21/823814Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the source or drain structures, e.g. specific source or drain implants or silicided source or drain structures or raised source or drain structures
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TW103136328A 2014-04-25 2014-10-21 Structure and method for sram finfet device TWI560887B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US14/262,378 US9721955B2 (en) 2014-04-25 2014-04-25 Structure and method for SRAM FinFET device having an oxide feature

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TW201541644A TW201541644A (zh) 2015-11-01
TWI560887B true TWI560887B (en) 2016-12-01

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US (4) US9721955B2 (zh)
KR (1) KR101672602B1 (zh)
CN (1) CN105023923B (zh)
DE (1) DE102015104604A1 (zh)
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Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9721955B2 (en) 2014-04-25 2017-08-01 Taiwan Semiconductor Manufacturing Company, Ltd. Structure and method for SRAM FinFET device having an oxide feature
US9490340B2 (en) 2014-06-18 2016-11-08 Globalfoundries Inc. Methods of forming nanowire devices with doped extension regions and the resulting devices
US9431512B2 (en) * 2014-06-18 2016-08-30 Globalfoundries Inc. Methods of forming nanowire devices with spacers and the resulting devices
US9960273B2 (en) * 2015-11-16 2018-05-01 Taiwan Semiconductor Manufacturing Company, Ltd. Integrated circuit structure with substrate isolation and un-doped channel
US9627540B1 (en) * 2015-11-30 2017-04-18 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device and manufacturing method thereof
US9882051B1 (en) 2016-09-15 2018-01-30 Qualcomm Incorporated Fin field effect transistors (FETs) (FinFETs) employing dielectric material layers to apply stress to channel regions
US10134760B2 (en) * 2017-01-10 2018-11-20 International Business Machines Corporation FinFETs with various fin height
US10411020B2 (en) 2017-08-31 2019-09-10 Taiwan Semiconductor Manufacturing Co., Ltd. Using three or more masks to define contact-line-blocking components in FinFET SRAM fabrication
US10276718B2 (en) 2017-08-31 2019-04-30 Taiwan Semiconductor Manufacturing Co., Ltd. FinFET having a relaxation prevention anchor
US11404423B2 (en) * 2018-04-19 2022-08-02 Taiwan Semiconductor Manufacturing Co., Ltd Fin-based strap cell structure for improving memory performance
US11257908B2 (en) * 2018-10-26 2022-02-22 Taiwan Semiconductor Manufacturing Company, Ltd. Transistors with stacked semiconductor layers as channels
US10818674B2 (en) 2019-03-07 2020-10-27 Globalfoundries Inc. Structures and SRAM bit cells integrating complementary field-effect transistors
US11133224B2 (en) * 2019-09-27 2021-09-28 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor structure and method for forming the same

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20120193751A1 (en) * 2011-01-28 2012-08-02 Toshiba America Electronic Components, Inc. Semiconductor device and method of manufacturing
US20130122672A1 (en) * 2010-07-30 2013-05-16 Monolithic 3D Inc. Semiconductor device and structure
TW201409713A (zh) * 2012-08-31 2014-03-01 Samsung Electronics Co Ltd 半導體裝置及其製造方法

Family Cites Families (97)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100338783B1 (en) 2000-10-28 2002-06-01 Samsung Electronics Co Ltd Semiconductor device having expanded effective width of active region and fabricating method thereof
US6359311B1 (en) 2001-01-17 2002-03-19 Taiwan Semiconductor Manufacturing Co., Ltd. Quasi-surrounding gate and a method of fabricating a silicon-on-insulator semiconductor device with the same
US6475869B1 (en) 2001-02-26 2002-11-05 Advanced Micro Devices, Inc. Method of forming a double gate transistor having an epitaxial silicon/germanium channel region
KR100487566B1 (ko) 2003-07-23 2005-05-03 삼성전자주식회사 핀 전계 효과 트랜지스터 및 그 형성 방법
KR100487567B1 (ko) 2003-07-24 2005-05-03 삼성전자주식회사 핀 전계효과 트랜지스터 형성 방법
US8008136B2 (en) 2003-09-03 2011-08-30 Advanced Micro Devices, Inc. Fully silicided gate structure for FinFET devices
US7078299B2 (en) 2003-09-03 2006-07-18 Advanced Micro Devices, Inc. Formation of finFET using a sidewall epitaxial layer
KR100521384B1 (ko) 2003-11-17 2005-10-12 삼성전자주식회사 반도체 소자 및 그 제조 방법
KR100550343B1 (ko) 2003-11-21 2006-02-08 삼성전자주식회사 다중 채널 모오스 트랜지스터를 포함하는 반도체 장치의제조 방법
US7259050B2 (en) 2004-04-29 2007-08-21 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device and method of making the same
KR100634372B1 (ko) 2004-06-04 2006-10-16 삼성전자주식회사 반도체 소자들 및 그 형성 방법들
US7018876B2 (en) * 2004-06-18 2006-03-28 Freescale Semiconductor, Inc. Transistor with vertical dielectric structure
KR100591770B1 (ko) 2004-09-01 2006-06-26 삼성전자주식회사 반도체 핀을 이용한 플래쉬 메모리 소자 및 그 제조 방법
KR100674914B1 (ko) 2004-09-25 2007-01-26 삼성전자주식회사 변형된 채널층을 갖는 모스 트랜지스터 및 그 제조방법
US20090130826A1 (en) 2004-10-11 2009-05-21 Samsung Electronics Co., Ltd. Method of Forming a Semiconductor Device Having a Strained Silicon Layer on a Silicon-Germanium Layer
KR100672826B1 (ko) 2004-12-03 2007-01-22 삼성전자주식회사 핀 전계 효과 트랜지스터 및 그 제조방법
JP2008529295A (ja) 2005-01-28 2008-07-31 エヌエックスピー ビー ヴィ デュアルゲートfetを製造する方法
US7384838B2 (en) 2005-09-13 2008-06-10 International Business Machines Corporation Semiconductor FinFET structures with encapsulated gate electrodes and methods for forming such semiconductor FinFET structures
US7709312B2 (en) 2006-09-29 2010-05-04 Intel Corporation Methods for inducing strain in non-planar transistor structures
US7939403B2 (en) 2006-11-17 2011-05-10 Micron Technology, Inc. Methods of forming a field effect transistors, pluralities of field effect transistors, and DRAM circuitry comprising a plurality of individual memory cells
US20080285350A1 (en) 2007-05-18 2008-11-20 Chih Chieh Yeh Circuit and method for a three dimensional non-volatile memory
US7485520B2 (en) 2007-07-05 2009-02-03 International Business Machines Corporation Method of manufacturing a body-contacted finfet
US8883597B2 (en) * 2007-07-31 2014-11-11 Taiwan Semiconductor Manufacturing Company, Ltd. Method of fabrication of a FinFET element
US7939889B2 (en) 2007-10-16 2011-05-10 Taiwan Semiconductor Manufacturing Company, Ltd. Reducing resistance in source and drain regions of FinFETs
US8598650B2 (en) 2008-01-29 2013-12-03 Unisantis Electronics Singapore Pte Ltd. Semiconductor device and production method therefor
JP4575471B2 (ja) * 2008-03-28 2010-11-04 株式会社東芝 半導体装置および半導体装置の製造方法
JP5285947B2 (ja) * 2008-04-11 2013-09-11 株式会社東芝 半導体装置、およびその製造方法
JP5159413B2 (ja) * 2008-04-24 2013-03-06 株式会社東芝 半導体装置及びその製造方法
US8232186B2 (en) 2008-05-29 2012-07-31 International Business Machines Corporation Methods of integrating reverse eSiGe on NFET and SiGe channel on PFET, and related structure
US20110193187A1 (en) 2008-09-01 2011-08-11 Toto Ltd. Electrode member for specific detection of analyte using photocurrent
US8058692B2 (en) 2008-12-29 2011-11-15 Taiwan Semiconductor Manufacturing Company, Ltd. Multiple-gate transistors with reverse T-shaped fins
US8263462B2 (en) 2008-12-31 2012-09-11 Taiwan Semiconductor Manufacturing Company, Ltd. Dielectric punch-through stoppers for forming FinFETs having dual fin heights
US7955928B2 (en) * 2009-03-30 2011-06-07 International Business Machines Corporation Structure and method of fabricating FinFET
US8053299B2 (en) 2009-04-17 2011-11-08 Taiwan Semiconductor Manufacturing Company, Ltd. Method of fabrication of a FinFET element
US20100308409A1 (en) * 2009-06-08 2010-12-09 Globalfoundries Inc. Finfet structures with fins having stress-inducing caps and methods for fabricating the same
US7855105B1 (en) 2009-06-18 2010-12-21 International Business Machines Corporation Planar and non-planar CMOS devices with multiple tuned threshold voltages
US8482073B2 (en) 2010-03-25 2013-07-09 Taiwan Semiconductor Manufacturing Company, Ltd. Integrated circuit including FINFETs and methods for forming the same
US8759943B2 (en) 2010-10-08 2014-06-24 Taiwan Semiconductor Manufacturing Company, Ltd. Transistor having notched fin structure and method of making the same
US8264032B2 (en) 2009-09-01 2012-09-11 Taiwan Semiconductor Manufacturing Company, Ltd. Accumulation type FinFET, circuits and fabrication method thereof
US9245805B2 (en) * 2009-09-24 2016-01-26 Taiwan Semiconductor Manufacturing Company, Ltd. Germanium FinFETs with metal gates and stressors
US8362575B2 (en) 2009-09-29 2013-01-29 Taiwan Semiconductor Manufacturing Company, Ltd. Controlling the shape of source/drain regions in FinFETs
US8101486B2 (en) 2009-10-07 2012-01-24 Globalfoundries Inc. Methods for forming isolated fin structures on bulk semiconductor material
US7993999B2 (en) 2009-11-09 2011-08-09 International Business Machines Corporation High-K/metal gate CMOS finFET with improved pFET threshold voltage
US8313999B2 (en) 2009-12-23 2012-11-20 Intel Corporation Multi-gate semiconductor device with self-aligned epitaxial source and drain
US8283653B2 (en) 2009-12-23 2012-10-09 Intel Corporation Non-planar germanium quantum well devices
US8211772B2 (en) 2009-12-23 2012-07-03 Intel Corporation Two-dimensional condensation for uniaxially strained semiconductor fins
US8395195B2 (en) 2010-02-09 2013-03-12 Taiwan Semiconductor Manufacturing Company, Ltd. Bottom-notched SiGe FinFET formation using condensation
US8310013B2 (en) 2010-02-11 2012-11-13 Taiwan Semiconductor Manufacturing Company, Ltd. Method of fabricating a FinFET device
US8455307B2 (en) 2011-05-19 2013-06-04 GlobalFoundries, Inc. FINFET integrated circuits and methods for their fabrication
US9761666B2 (en) * 2011-06-16 2017-09-12 Taiwan Semiconductor Manufacturing Company, Ltd. Strained channel field effect transistor
CN102903749B (zh) 2011-07-27 2015-04-15 中国科学院微电子研究所 一种半导体器件结构及其制造方法
US8890207B2 (en) 2011-09-06 2014-11-18 Taiwan Semiconductor Manufacturing Company, Ltd. FinFET design controlling channel thickness
US8796124B2 (en) 2011-10-25 2014-08-05 Taiwan Semiconductor Manufacturing Company, Ltd. Doping method in 3D semiconductor device
US8623716B2 (en) 2011-11-03 2014-01-07 Taiwan Semiconductor Manufacturing Co., Ltd. Multi-gate semiconductor devices and methods of forming the same
US8963257B2 (en) 2011-11-10 2015-02-24 Taiwan Semiconductor Manufacturing Company, Ltd. Fin field effect transistors and methods for fabricating the same
US8584569B1 (en) 2011-12-06 2013-11-19 The United States Of America As Represented By The Secretary Of The Navy Plume exhaust management for VLS
US8698199B2 (en) 2012-01-11 2014-04-15 United Microelectronics Corp. FinFET structure
JP2013183085A (ja) 2012-03-02 2013-09-12 Toshiba Corp 半導体装置の製造方法
CN103426755B (zh) 2012-05-14 2015-12-09 中芯国际集成电路制造(上海)有限公司 半导体器件及其形成方法
US8883570B2 (en) 2012-07-03 2014-11-11 Taiwan Semiconductor Manufacturing Company, Ltd. Multi-gate FETs and methods for forming the same
US8815739B2 (en) 2012-07-10 2014-08-26 Globalfoundries Inc. FinFET device with a graphene gate electrode and methods of forming same
US8823085B2 (en) 2012-08-08 2014-09-02 Unisantis Electronics Singapore Pte. Ltd. Method for producing a semiconductor device and semiconductor device
US9947773B2 (en) 2012-08-24 2018-04-17 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor arrangement with substrate isolation
US9330899B2 (en) * 2012-11-01 2016-05-03 Asm Ip Holding B.V. Method of depositing thin film
US9349837B2 (en) 2012-11-09 2016-05-24 Taiwan Semiconductor Manufacturing Company, Ltd. Recessing STI to increase Fin height in Fin-first process
US9443962B2 (en) 2012-11-09 2016-09-13 Taiwan Semiconductor Manufacturing Company, Ltd. Recessing STI to increase fin height in fin-first process
US8987790B2 (en) 2012-11-26 2015-03-24 International Business Machines Corporation Fin isolation in multi-gate field effect transistors
US8815668B2 (en) 2012-12-07 2014-08-26 International Business Machines Corporation Preventing FIN erosion and limiting Epi overburden in FinFET structures by composite hardmask
US8815691B2 (en) 2012-12-21 2014-08-26 Taiwan Semiconductor Manufacturing Company, Ltd. Method of fabricating a gate all around device
US9859429B2 (en) 2013-01-14 2018-01-02 Taiwan Semiconductor Manufacturing Company, Ltd. FinFET device and method of fabricating same
US9257559B2 (en) 2014-01-15 2016-02-09 Taiwan Semiconductor Manufacturing Company Limited Semiconductor device and formation thereof
US8901607B2 (en) 2013-01-14 2014-12-02 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device and fabricating the same
US9006786B2 (en) 2013-07-03 2015-04-14 Taiwan Semiconductor Manufacturing Company, Ltd. Fin structure of semiconductor device
US9318606B2 (en) 2013-01-14 2016-04-19 Taiwan Semiconductor Manufacturing Company, Ltd. FinFET device and method of fabricating same
US9202917B2 (en) 2013-07-29 2015-12-01 Taiwan Semiconductor Manufacturing Co., Ltd. Buried SiGe oxide FinFET scheme for device enhancement
US9202691B2 (en) 2013-01-18 2015-12-01 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device having modified profile metal gate
US9735255B2 (en) 2013-01-18 2017-08-15 Taiwan Semiconductor Manufacturing Company, Ltd. Method for fabricating a finFET device including a stem region of a fin element
KR102018101B1 (ko) 2013-02-04 2019-11-14 삼성전자 주식회사 반도체 소자 및 이의 제조 방법
US9564353B2 (en) 2013-02-08 2017-02-07 Taiwan Semiconductor Manufacturing Company, Ltd. FinFETs with reduced parasitic capacitance and methods of forming the same
US9159824B2 (en) 2013-02-27 2015-10-13 Taiwan Semiconductor Manufacturing Company, Ltd. FinFETs with strained well regions
US9214555B2 (en) 2013-03-12 2015-12-15 Taiwan Semiconductor Manufacturing Co., Ltd. Barrier layer for FinFET channels
US9997617B2 (en) 2013-03-13 2018-06-12 Qualcomm Incorporated Metal oxide semiconductor (MOS) isolation schemes with continuous active areas separated by dummy gates and related methods
US9018054B2 (en) 2013-03-15 2015-04-28 Applied Materials, Inc. Metal gate structures for field effect transistors and method of fabrication
KR20140116632A (ko) 2013-03-25 2014-10-06 삼성전자주식회사 사용자의 모션을 감지하는 웨어러블 장치 및 방법
KR102038486B1 (ko) 2013-04-09 2019-10-30 삼성전자 주식회사 반도체 장치 및 그 제조 방법
US9006842B2 (en) 2013-05-30 2015-04-14 Taiwan Semiconductor Manufacturing Company, Ltd. Tuning strain in semiconductor devices
US9412866B2 (en) 2013-06-24 2016-08-09 Taiwan Semiconductor Manufacturing Co., Ltd. BEOL selectivity stress film
US9299810B2 (en) 2013-07-05 2016-03-29 Taiwan Semiconductor Manufacturing Company Limited Fin-type field effect transistor and method of fabricating the same
US9349850B2 (en) 2013-07-17 2016-05-24 Taiwan Semiconductor Manufacturing Company, Ltd. Thermally tuning strain in semiconductor devices
US9293586B2 (en) 2013-07-17 2016-03-22 Globalfoundries Inc. Epitaxial block layer for a fin field effect transistor device
US9023697B2 (en) 2013-08-08 2015-05-05 International Business Machines Corporation 3D transistor channel mobility enhancement
US9153694B2 (en) 2013-09-04 2015-10-06 Globalfoundries Inc. Methods of forming contact structures on finfet semiconductor devices and the resulting devices
US9219115B2 (en) 2013-10-11 2015-12-22 Taiwan Semiconductor Manufacturing Company, Ltd. Forming conductive STI liners for FinFETS
US9054189B1 (en) * 2014-01-06 2015-06-09 Samsung Electronics Co., Ltd. Semiconductor device and method for fabricating the same
US10468528B2 (en) 2014-04-16 2019-11-05 Taiwan Semiconductor Manufacturing Company, Ltd. FinFET device with high-k metal gate stack
US9209185B2 (en) 2014-04-16 2015-12-08 Taiwan Semiconductor Manufacturing Company, Ltd. Method and structure for FinFET device
US9721955B2 (en) 2014-04-25 2017-08-01 Taiwan Semiconductor Manufacturing Company, Ltd. Structure and method for SRAM FinFET device having an oxide feature

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20130122672A1 (en) * 2010-07-30 2013-05-16 Monolithic 3D Inc. Semiconductor device and structure
US20120193751A1 (en) * 2011-01-28 2012-08-02 Toshiba America Electronic Components, Inc. Semiconductor device and method of manufacturing
TW201409713A (zh) * 2012-08-31 2014-03-01 Samsung Electronics Co Ltd 半導體裝置及其製造方法

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