TWI544582B - 製造半導體晶片的方法，用於垂直安裝到電路載體上的安裝方法及半導體晶片 - Google Patents

製造半導體晶片的方法，用於垂直安裝到電路載體上的安裝方法及半導體晶片 Download PDF

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TWI544582B
TWI544582B TW100142472A TW100142472A TWI544582B TW I544582 B TWI544582 B TW I544582B TW 100142472 A TW100142472 A TW 100142472A TW 100142472 A TW100142472 A TW 100142472A TW I544582 B TWI544582 B TW I544582B
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wafer
semiconductor wafer
upper side
metal layer
carrier
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TW201236115A (en
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漢斯 彼德 貝爾
保羅 法伯
史堤方 懷斯
陸茲 勞許
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羅伯特博斯奇股份有限公司
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Description

製造半導體晶片的方法，用於垂直安裝到電路載體上的安裝方法及半導體晶片
本發明關於相關之獨立項申請專利範圍之製造半導體晶片的方法、安裝方法、以及用於垂直安裝在電路載體上的半導體晶片。
矽技術之電子切換回路及機械式或磁式的感器一般封裝在所謂「晶片包封」中，這點可使它簡單銲接在電路板上以建入器具或模組中。為此，將矽晶片鋸開，並用不同方法將包封的晶片施到載體上冲壓格或電路板上。並同時或在分別的步驟連接成導電方式，在此將晶片建構在一平面中，在此平面它們在製造程序時也位在矽晶圓上，因此一般晶片的高度為方形晶片的最小尺寸，對於感測器的一些應用，將個別晶片垂直於一平面方向(它們在此平面中位在晶圓上)建構造晶片包封中。
在US 70 95226 B2揭示一種可能方式，例如將磁感測器晶片用此方法垂直於其製造方向建構在晶片包封中。其中提到一些解決方案將晶片垂直建構，其端子區域--結合墊片(Bond Pad)以和平行建構者相同的方式設置(平行建構指在矽晶圓的平面中即使安裝後也垂直於安裝底面)。這些晶片不能用一般之用於平行於安裝底面的端子面的一般連接技術連接。WO 2008/01 6198揭示一種垂直安裝的感測器晶片，在一端側面上具有結合面，但未提到其製造及安裝。
相較於此，本發明用於製造半導體晶片的方法、安裝方法、以及用於垂直安裝在電路載體上的半導體晶片有一優點，即：如此製造的晶片可很不複雜地沿一垂直於晶圓平面的方向建構到所謂之晶片封裝中。在此，端子區域(結合墊片)一如在習知之平行安裝的場合，平行於晶片封裝的載體，因此一般的方法，如電線結合，倒裝晶片(Flip-Chip)等可用於作電接觸。
本發明另一優點為：晶片，特別是矽晶片在晶圓切分成晶片前可在一垂直於晶圓平面的面上設以端子區域(結合墊片)。
本發明的實施例利用圖式說明。
圖1顯示一鋸好的晶片(10)，在一垂直於一個平行於晶圓的上側(16)的一端子面側(14)上具有端子面(12)。在安裝在晶片包封中時，晶片(10)轉90°，且端子面側(14)平行於一電路載體。端子面(12)的寬度(18)及高度(20)對應於一典型端子墊片，為50μm～150μm，晶片(10)上側(16)設有接觸面(22)，它們與晶片之切換回路連接[用切換回路(24)表示]。在晶片的製造方法中，各端子面(12)與一接觸面(22)連接(連接部未圖示)。
圖2中，流程圖(35)共同地用圖3中所示一晶圓(42)之一切出的部段(40)的示意圖在不同製造階段(a)～(f)說明製造半導體晶片的方法[例如依本發明圖1的一實施例的晶片(10)]。此方法係由一半導體晶圓(42)開始，它具有在一活性表面(48)上的接觸面(44)(46)，其中該晶片利用鋸道互相切斷分離。部段(40)顯示在二個晶片的外部分的垂直一垂直於鋸道的外部分的區域中的一截面，其中接觸面(44)和一第一晶片(50)的切換回路相關，而接觸面(46)和一第二晶片(52)的切換回路相關。活性表面(48)為和晶圓背側(54)對立的晶圓的上側(56)上的開放面，它係依此方法步驟加工因此變形或移動，程序的中間步驟(如光敏材料的施覆及除去)未圖示，因為它們對行家而言係相關習知者。此處晶圓為一矽晶圓，此方法也適合其他晶圓材料，其中行家可選用配合晶圓材料的技術及各方法步驟用的化學品。
圖3a顯示依此方法步驟(a)的具半導體端子區域的部段(40)：
a)沿一鋸道產生大致方形的凹陷部(58)，它們具有至少一主平面(60)(62)，垂直於上側(56)且平行於鋸道，大致方形的凹陷部(58)利用DRIE方法(深反應離子蝕刻)產生，且具有晶圓(42)中的一下側，在其他程序中在主平面(60)(62)上產生端子面。
b)在該活性表面(48)[包含至少一主平面；此處為二主平面(60)(62)]上施一絕緣層(66)，絕緣層的一較佳材為二氧化矽。
圖3c顯示以下方法步驟(c)的部段(40)：
c)將接觸面(44)(46)上的絕緣層(66)除去。
圖3d顯示以下方法步驟(d)的部段(40)：
d)將一金屬層(40)施在活性表面及主平面(60)(62)，以造成接觸面(44)(46)與端子面(44)(46)在主平面(60)(62)上的導電連接部(70)(72)。金屬層(68)的區域(78)形成接到相鄰之端子面的導電連接部。金屬層(68)施到方形凹陷部(58)的全部五個面。金屬層利用一PVD方法(物理蒸鍍)施覆。
圖3e顯示以下方法步驟(e)的部段(40)：
e)將相鄰端子面之間的導電連接部間的金屬層除去將金屬層構造化。金屬層用一噴漆程序及一般金屬蝕刻程序作光刻版術除去。
圖3f顯示以下方法步驟(f)的部段：
f)用一鋸切刀(84)將半導體晶圓(42)經凹陷部(58)切鋸。此時，晶片(50)和(52)互相分離。
依本發明另一實施例，在方法步驟(d)和(e)中的金屬層利用一影光罩程序施覆及作構造化。
在此例中，半導體晶片為一磁場感測器，它特別可垂直安裝以造成一3維的磁感測器。
圖4顯示一晶圓的一部段(85)，具有在晶圓上切分前的四個晶片(86)以及方形凹陷部(87)的位置。鋸道(88)(89)係為晶圓的一些區域，它們在鋸切時除去。其典型寬度約幾十微米，相當於鋸片寬度。凹陷部(87)設成在切鋸後產生圖1的晶片。圖3d中的金屬層(68)施到方形凹陷部(87)的所有五個面上。但在此實施例中只使用凹陷部(87)的一主面(90)當作端子面(91)，鋸道(88)延伸通過凹陷部(87)。凹陷部(87)之未當作端子面使用的那些側面仍留著，藉著將金屬層構造化及切鋸，將相鄰凹陷部的端子面互相隔絕。
圖5顯示一具有四個晶片(93)(99)的晶圓的一部段(92)及方形凹陷部(96)的位置在晶圓切分前的情形。凹陷部(96)設成在沿鋸道(94)(95)鋸切後產生圖1的晶片。在此實施例中，凹陷部的二主面(97)(98)當作端子面用，如圖3所示，鋸道(94)延伸過凹陷部(96)，各第二晶片列的晶片[此處於晶片(99)]相對於晶片(93)轉了180°，且一凹陷部(96)在鋸切時，在二對立的晶片的產生二個端子墊。
圖6顯示一用電線結合的半導體晶片的安裝方法流程圖。半導體晶片(10)的安裝方法係用端子面(12)(所謂之結合面)在一端子面表面或結合面表面(14)垂直於晶圓一上側(16)在一載體(25)上用連接面在載體上平行於一載體上側(26)，此方法用以下方法步驟(g)開始：
g)將半導體晶片(10)安裝，以與結合面表面(14)對立的面安裝在載體上側(26)，連接面也可在另一構造上設在載體上。
延後為方法步驟(h)：
h)以自動化方式將各一端子面(12)與一連接面用各一「連接電線」連接。圖7顯示鋸成之半導體晶片(10)，具有安裝在晶片封裝中的朝向，具有利用銲點(27)結合到端子面(12)上的結合電線(電線結合部)(28)。
圖8中顯示一半導體晶片(它以倒裝晶片技術垂直安裝在一載體上)的安裝方法的一流程圖，而圖9顯示圖1之半導體晶片，它係對應地安裝。半導體晶片(10)的安裝方法係用端子面(12)在一端子面表面(14)垂直於晶圓一上側(16)用連接面在一導線路(31)上在載體上側(32)，用以下方法步驟開始：
i)將半導體晶片(10)定位，用結合面表面(14)定位在載體上側(32)。連接面也可設在載體(25)上另一構件上。
隨後為方法步驟(j)：
j)將端子面(12)用一軟銲法與連接面連接，圖9顯示鋸成的半導體晶片(10)，其朝向為在晶片包封中安裝的朝向，它係在利用銲錫珠(33)接觸時的情形(導裝晶片方法)。
如此半導體晶片(10)之晶片成使結合面(12)[它們位在一結合面表面(14)中，此結合而表面垂直於晶圓一上側(16)]平行於連接面在一載體表面對準，它適用於依傳統之結合金屬絲技術及倒裝晶片技術的一般方法作接觸。
(10)．．．晶片
(12)．．．端子面
(14)．．．端子面側
(16)．．．(晶圓或晶片的)上側
(18)．．．[端子面(12)的]寬度
(20)．．．[端子面(12)的]高度
(22)．．．接觸面
(24)．．．切換回路
(25)．．．載體
(26)．．．載體上側
(27)．．．銲點
(28)．．．結合電線
(31)．．．導線路
(32)．．．載體上側
(33)．．．銲錫珠
(35)．．．流程圖
(40)．．．部段
(42)．．．晶圓
(44)．．．接觸面
(46)．．．接觸面
(48)．．．活性表面
(50)．．．第一晶片
(52)．．．第二晶片
(54)．．．(晶圓)背側
(56)．．．(晶圓)上側
(58)．．．凹陷部
(60)．．．主平面
(62)．．．主平面
(66)．．．絕緣層
(68)．．．金屬層
(70)．．．導電連接部
(72)．．．導電連接部
(85)．．．部段
(86)．．．晶片
(87)‧‧‧凹陷部
(88)‧‧‧鋸道
(89)‧‧‧鋸道
(90)‧‧‧主面
(91)‧‧‧端子面
(92)‧‧‧部段
(93)‧‧‧晶片
(94)‧‧‧鋸道
(95)‧‧‧鋸道
(96)‧‧‧凹陷部
(97)‧‧‧主面
(98)‧‧‧主面
(99)‧‧‧晶片
圖1係依本發明一實施例的一鋸好的晶片的示意圖，其端子面垂直於該平行於晶圓的上側；
圖2係依本發明一實施例製造半導體晶片的方法的流圖；
圖3係和依圖2的方法相關的不同製造階段中一晶圓之切開片段的示意圖；
圖4係依本發明的一實施例的一晶圓在鋸切前的一片段的示意圖；
圖5係依本發明的另一實施例的一晶圓在鋸切前的一片段的示意圖；
圖6係依本發明的一實施例的一用電線結合的半導體晶片的安裝方法的一流程圖；
圖7係依本發明的一實施例之一垂直安裝在一載體上用電線結合的半導體的示意圖；
圖8係依本發明的一實施例之一用倒裝晶片技術垂直安裝在一載體上的半導體晶片的安裝方法的流程圖；
圖9係依本發明的一實施例用倒裝晶片技術垂直安裝在一載體上的半導體晶片的示意圖。
(10)．．．晶片
(12)．．．端子面
(16)．．．(晶圓或晶片的)上側
(18)．．．[端子面(12)的]寬度
(20)．．．[端子面(12)的]高度
(22)．．．接觸面
(24)．．．切換回路

Claims (11)

  1. 一種製造半導體晶片的方法，用於垂直安裝到電路載體上，由一半導體晶圓(42)開始作業，該晶圓具有成列的晶片(10)(80)(93)，其在一上側(56)具有接觸面(22)(44)(46)(78)(80)(93)，其中晶片利用鋸道(88)(89)(94)(95)互相分開，包含以下方法步驟：(a)沿一鋸道(88)(94)產生大致方形的凹陷部(58)(87)(96)，該凹陷部具有至少一主面(60)(62)，(90)，(97)(98)，垂直於上側(56)且平行於鋸道(88)(94)；(b)施一絕緣層(66)在晶圓的一活性表面(48)上，它包含至少一主面(60)(62)，(90)，(97)(98)；(c)將接觸面(22)，(44)(46)(78)(80)上方絕緣層(66)除去；(d)施一金屬層(68)在該活性表面(48)及主面(60)(62)，(90)(97)(98)上，以造成接觸面與主面的導電連接部；(e)藉著將相鄰的主面(60)(62)，(90)，(97)(98)的導電連接部間的金屬層除去，將該金屬層(68)作構造化，及(f)用一鋸切刀(84)切過凹陷部(58)(87)(96)將半導體晶圓(42)鋸開。
  2. 如申請專利範圍第1項之方法，其中：該大致方形的凹陷部(58)(87)(96)利用深反應離子蝕刻(DRIE)方法產生。
  3. 如申請專利範圍第1或第2項之方法，其中：利用一物理蒸鍍方法施該金屬層。
  4. 如申請專利範圍第1或第2項之方法，其中：利用一噴漆方法作光刻版術將金屬層除去。
  5. 如申請專利範圍第1或第2項之方法，其中：利用一X射線光刻版光罩方法將金屬層施覆及構造化。
  6. 如申請專利範圍第1或第2項之方法，其中：各第二列的晶片(99)轉了180°且具有二個對立的主面(60)(62)，(97)(98)，它們和不同之晶片相關聯。
  7. 如申請專利範圍第1或第2項之方法，其中：該半導體晶圓(42)為一矽晶圓。
  8. 一種半導體晶片，在一上側(56)上有接觸面(22)，平行於晶圓平面，在一垂直於上側的一端子面側(14)具有端子面(12)，其中各端子面與一相關之接觸面(22)連接成導電方式。
  9. 如申請專利範圍第8項之半導體晶片，其中：該半導體晶片(10)為一磁場感測器。
  10. 一種半導體晶片(10)的安裝方法，該半導體晶片在垂直於晶圓的一上側(16)的一結合面表面(14)具有結合面，用於將半導體晶片(10)安裝在一載體上側的導線路(31)上之具有端子面的一載體(25)上，包含以下方法步驟：i)將一具有結合面表面的半導體晶片定位在載體上側(32)；及ii)將端子面(12)用一軟銲方法與連接面連接。
  11. 如申請專利範圍第10項之安裝方法，其中：該軟銲方法利用銲錫珠(33)造成。
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