TWI503340B - 底層充填組成物及使用該組成物製造電氣組合件之方法 - Google Patents

底層充填組成物及使用該組成物製造電氣組合件之方法 Download PDF

Info

Publication number
TWI503340B
TWI503340B TW099140304A TW99140304A TWI503340B TW I503340 B TWI503340 B TW I503340B TW 099140304 A TW099140304 A TW 099140304A TW 99140304 A TW99140304 A TW 99140304A TW I503340 B TWI503340 B TW I503340B
Authority
TW
Taiwan
Prior art keywords
composition
underfill
present
filler
dioxide
Prior art date
Application number
TW099140304A
Other languages
English (en)
Other versions
TW201139492A (en
Inventor
Mark B Wilson
Stephanie L Potisek
Original Assignee
Dow Global Technologies Llc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Dow Global Technologies Llc filed Critical Dow Global Technologies Llc
Publication of TW201139492A publication Critical patent/TW201139492A/zh
Application granted granted Critical
Publication of TWI503340B publication Critical patent/TWI503340B/zh

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • H01L23/293Organic, e.g. plastic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/563Encapsulation of active face of flip-chip device, e.g. underfilling or underencapsulation of flip-chip, encapsulation preform on chip or mounting substrate
    • CCHEMISTRY; METALLURGY
    • C08ORGANIC MACROMOLECULAR COMPOUNDS; THEIR PREPARATION OR CHEMICAL WORKING-UP; COMPOSITIONS BASED THEREON
    • C08GMACROMOLECULAR COMPOUNDS OBTAINED OTHERWISE THAN BY REACTIONS ONLY INVOLVING UNSATURATED CARBON-TO-CARBON BONDS
    • C08G59/00Polycondensates containing more than one epoxy group per molecule; Macromolecules obtained by polymerising compounds containing more than one epoxy group per molecule using curing agents or catalysts which react with the epoxy groups
    • C08G59/02Polycondensates containing more than one epoxy group per molecule
    • C08G59/027Polycondensates containing more than one epoxy group per molecule obtained by epoxidation of unsaturated precursor, e.g. polymer or monomer
    • CCHEMISTRY; METALLURGY
    • C09DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09DCOATING COMPOSITIONS, e.g. PAINTS, VARNISHES OR LACQUERS; FILLING PASTES; CHEMICAL PAINT OR INK REMOVERS; INKS; CORRECTING FLUIDS; WOODSTAINS; PASTES OR SOLIDS FOR COLOURING OR PRINTING; USE OF MATERIALS THEREFOR
    • C09D163/00Coating compositions based on epoxy resins; Coating compositions based on derivatives of epoxy resins
    • CCHEMISTRY; METALLURGY
    • C09DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09JADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J163/00Adhesives based on epoxy resins; Adhesives based on derivatives of epoxy resins
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/0401Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/05599Material
    • H01L2224/056Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05638Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/05639Silver [Ag] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/05599Material
    • H01L2224/056Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05638Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/05644Gold [Au] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/05599Material
    • H01L2224/056Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05638Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/05647Copper [Cu] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/11Manufacturing methods
    • H01L2224/113Manufacturing methods by local deposition of the material of the bump connector
    • H01L2224/1131Manufacturing methods by local deposition of the material of the bump connector in liquid form
    • H01L2224/1132Screen printing, i.e. using a stencil
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/11Manufacturing methods
    • H01L2224/114Manufacturing methods by blanket deposition of the material of the bump connector
    • H01L2224/1146Plating
    • H01L2224/11462Electroplating
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/11Manufacturing methods
    • H01L2224/118Post-treatment of the bump connector
    • H01L2224/11848Thermal treatments, e.g. annealing, controlled cooling
    • H01L2224/11849Reflowing
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001Core members of the bump connector
    • H01L2224/13075Plural core members
    • H01L2224/1308Plural core members being stacked
    • H01L2224/13082Two-layer arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001Core members of the bump connector
    • H01L2224/13099Material
    • H01L2224/131Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001Core members of the bump connector
    • H01L2224/13099Material
    • H01L2224/131Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13101Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/13111Tin [Sn] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001Core members of the bump connector
    • H01L2224/13099Material
    • H01L2224/131Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/13139Silver [Ag] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001Core members of the bump connector
    • H01L2224/13099Material
    • H01L2224/131Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/13147Copper [Cu] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001Core members of the bump connector
    • H01L2224/13099Material
    • H01L2224/13198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/13199Material of the matrix
    • H01L2224/13294Material of the matrix with a principal constituent of the material being a liquid not provided for in groups H01L2224/132 - H01L2224/13291
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001Core members of the bump connector
    • H01L2224/13099Material
    • H01L2224/13198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/13298Fillers
    • H01L2224/13299Base material
    • H01L2224/133Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/16227Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29199Material of the matrix
    • H01L2224/2929Material of the matrix with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298Fillers
    • H01L2224/29299Base material
    • H01L2224/29386Base material with a principal constituent of the material being a non metallic, non metalloid inorganic material
    • H01L2224/29387Ceramics, e.g. crystalline carbides, nitrides or oxides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298Fillers
    • H01L2224/29499Shape or distribution of the fillers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73203Bump and layer connectors
    • H01L2224/73204Bump and layer connectors the bump connector being embedded into the layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8119Arrangement of the bump connectors prior to mounting
    • H01L2224/81191Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed only on the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8119Arrangement of the bump connectors prior to mounting
    • H01L2224/81193Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed on both the semiconductor or solid-state body and another item or body to be connected to the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8138Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/81399Material
    • H01L2224/814Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/81438Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/81439Silver [Ag] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8138Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/81399Material
    • H01L2224/814Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/81438Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/81444Gold [Au] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8138Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/81399Material
    • H01L2224/814Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/81438Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/81447Copper [Cu] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/818Bonding techniques
    • H01L2224/81801Soldering or alloying
    • H01L2224/81815Reflow soldering
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/83053Bonding environment
    • H01L2224/8309Vacuum
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/831Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus
    • H01L2224/83102Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus using surface energy, e.g. capillary forces
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838Bonding techniques
    • H01L2224/8385Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • H01L2224/83855Hardening the adhesive by curing, i.e. thermosetting
    • H01L2224/83862Heat curing
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92Specific sequence of method steps
    • H01L2224/921Connecting a surface with connectors of different types
    • H01L2224/9212Sequential connecting processes
    • H01L2224/92122Sequential connecting processes the first connecting process involving a bump connector
    • H01L2224/92125Sequential connecting processes the first connecting process involving a bump connector the second connecting process involving a layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02Bonding areas ; Manufacturing methods related thereto
    • H01L24/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10Bump connectors ; Manufacturing methods related thereto
    • H01L24/11Manufacturing methods
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10Bump connectors ; Manufacturing methods related thereto
    • H01L24/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L24/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10Bump connectors ; Manufacturing methods related thereto
    • H01L24/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L24/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/91Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L24/80 - H01L24/90
    • H01L24/92Specific sequence of method steps
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01019Potassium [K]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01021Scandium [Sc]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01046Palladium [Pd]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01078Platinum [Pt]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01079Gold [Au]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013Alloys
    • H01L2924/0132Binary Alloys
    • H01L2924/01322Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/1515Shape
    • H01L2924/15151Shape the die mounting substrate comprising an aperture, e.g. for underfilling, outgassing, window type wire connections
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/35Mechanical effects
    • H01L2924/351Thermal stress

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Organic Chemistry (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Polymers & Plastics (AREA)
  • Medicinal Chemistry (AREA)
  • Materials Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Health & Medical Sciences (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Wood Science & Technology (AREA)
  • Epoxy Resins (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Compositions Of Macromolecular Compounds (AREA)
  • Wire Bonding (AREA)

Description

底層充填組成物及使用該組成物製造電氣組合件之方法
本發明係關於有用於半導體電子封裝材料之製造的環氧樹脂製劑,以及更具體地,係關於毛細管式底層充填封裝劑(capillary underfill encapsulant)。
於電子工業中,環氧樹脂一般用來製造半導體封裝材料。現今用於半導體封裝材料之環氧樹脂製劑包含,例如,雙酚F的高純度二縮水甘油醚、或是雙酚A的二縮水甘油醚,以及高性能或多功能樹脂,諸如萘二酚的二縮水甘油醚、或是對胺酚(para-aminophenol)的三環氧化物(triepoxide)。該等已知環氧樹脂受下述問題所苦:平衡可接受之可加工性及下游可靠度所需之關鍵特質。這些特質包括黏度、總氯化物含量、填充劑負載(loading)(關於熱膨脹係數(CTE)與模數修飾)、黏附性、焊劑相容性(flux compatibility)、韌性、可分注性(dispense-ability)、流動(flow)、以及封裝等級可靠度性能,包括預處理(preconditioning)、溫度循環或衝擊、高度加速應力測試(highly accelerated stress testing,HAST)。
傳統底層充填製劑調配方法係倂入高純度雙酚F或雙酚A環氧樹脂,以及高性能或多功能環氧樹脂。該高性能樹脂之納入傾向於增加所得摻合物的黏度,而負面地影響製劑的可加工性、限制可倂入製劑中之顆粒填充劑的量及尺寸兩者。朝向更小型、堆疊式且高節距(high pitch)構形之電子封裝設計趨勢增加了對於要求更佳熱機械與加工性能之電子封裝材料的需求。例如,用於電子封裝之新的底層充填材料必須具有較低CTE以抵抗熱疲勞,而新的熱介面材料(TIMs)則必須更導熱以冷卻產熱源,同時於填充劑負載增加時維持低黏度。
許多種電子封裝材料為經高度填充之材料。此經填充之材料的性質大部分取決於所用填充劑的種類以及填充劑負載的程度(或於該材料中之填充劑的量)。一般而言,增加填充劑負載程度(loading level)通常會降低CTE,同時使模數與導熱性增加。不幸地,材料的黏度也會隨著填充劑負載的增加而增加。在將這些經填充之材料應用於電子封裝時,為了適當的加工以及晶片(die)的完整無空隙底層充填,封裝劑需要具有低黏度(例如,於分注溫度之黏度低於0.7 Pa-s)。因此,需要使用相對較高的施用溫度,以確保傳統經高度填充之底層充填製劑的適當流動。
典型毛細管式底層充填製劑係倂入雙酚A或是雙酚F的二縮水甘油醚,以及改質劑,以改善已固化系統的熱機械性質,諸如玻璃轉移溫度(Tg )。例如,美國專利案第7,482,201號教示使用862與828(Hexion Specialty Chemicals),以及MY-0510(Huntsman Advanced Materials)之經奈米-填充之底層充填封裝劑。該862為雙酚F系環氧樹脂。該828為雙酚A系環氧樹脂,而MY-0510為4-(環氧乙烷-2-基甲氧基)-N,N-雙(環氧乙烷-2-基甲基)苯胺。美國專利案第7,279,223號揭露一些脂族、環脂族、及芳族之環氧樹脂。具有低含量氯化物或不具氯化物之傳統環脂族樹脂的使用受限於適當固化化學品(主要為酸酐或路易士酸(Lewis acid)硬化劑)。美國專利案第7,351,784號教示使用環脂族胺與碳烯之毛細管式不流動底層充填製劑。所載之具體脂族胺結構為4-(2-胺基丙烷-2-基)-1-甲基環己胺以及4,4’-亞甲基雙(2-甲基環己胺)。
前述環氧樹脂係使用表氯醇製造,其中,表氯醇係與酚系羥基反應,或者於芳族胺之例中,表氯醇係與胺基反應,而得到該環氧樹脂。於耦合製程中,可能發生不完全的環閉合,進而導致受阻氯化物(bound chloride)或可水解氯化物。
於可靠度測試期間,尤其是於高溼度與高溫度測試期間(諸如暴露於壓力鍋(PCT) 121℃/15 psi蒸氣),樹脂之可水解氯化物含量可能對裝置或元件之性能產生負面影響。在暴露於高溼度測試期間,可自已固化聚合物中萃取出該可水解氯化物,且形成高度酸性物質,進而造成裝置內的腐蝕。因此,有用於底層充填應用且不使用表氯醇或其他鹵化反應物來製造環氧樹脂之鹼樹脂為高度所欲者。
存在著對毛細管式底層充填用之電子封裝材料的需求,該電子封裝材料為經高度填充之材料,且與傳統底層充填材料相比,具有低黏度及改善的熱機械性質(CTE、Tg、模數,及於某些例中,導熱性)。較佳地,此材料應具有改善之可加工性以及下游封裝可靠度。再者,此材料應具有少於100 ppm,且較佳少於5 ppm之總氯化物含量。
最終,於電子工業中所需者為發展具下述性質之製劑材料:低CTE(例如,少於30 ppm/℃)、高導熱性(例如,大於0.7 W/mK)、中等模數(例如,自3 GPa至15 GPa)、以及於底層充填封裝劑之例中之適當流動(於20μm之裂隙(gap)中,以15至100秒橫越15 mm)、為了特定應用而於固化後調整Tg之能力(例如,自25至300 ℃),所有該等製劑材料都同時於25℃之溫度維持少於10 Pa-s之可接受的流變學性能以及於30℃至100℃之溫度範圍維持少於1.0 Pa-s之可接受的流變學性能。
因此,本發明之一個目的為發展具有低黏度(即使是在含有相對高量填充劑時)之環氧樹脂底層充填組成物,且該組成物可使用廣泛範圍之環氧樹脂固化劑予以固化。較佳地,該底層充填組成物具有非常低至無的總氯化物含量。
本發明之一具體實施例係有關用於電子封裝材料(諸如半導體封裝材料)之製造的環氧樹脂製劑,更具體為毛細管式底層充填封裝劑,其包含二乙烯基芳烴二氧化物作為製劑組分,該二乙烯基芳烴二氧化物為諸如1,4-二(環氧乙烷-2-基)苯/1,3-二(環氧乙烷-2-基)苯(統稱二乙烯基苯二氧化物或DVBDO)。DVBDO之利用係使得兼具改良的可加工性以及下游的可靠度性能之材料性質的獨特組合變得可能,這是以現今技術狀態之單體以及環氧樹脂製劑對策所無法達成的。
本發明提供一種製造電氣組合件(electrical assembly)之方法,該方法包含提供電子元件及基板,其中,該電子元件與該基板中之一者具有複數個銲點凸塊(solder bump),而另一者具有複數個電氣接合墊(electrical bonding pad);電氣連接該電子元件與該基板;將底層充填組成物形成於該電子元件與該基板之間;以及固化該底層充填組成物,其中,該底層充填組成物包含二乙烯基芳烴二環氧化物。二乙烯基芳烴二氧化物(諸如二乙烯基苯二氧化物)樹脂之使用係使得高填充劑負載、高Tg值、以及由樹脂提供之非常低至無的總氯化物污染變得可能。此外,與傳統低黏度環脂族環氧樹脂不同,該二乙烯基芳烴二氧化物樹脂使得使用一些不同硬化劑變得可能。於該電子元件與該基板間之已固化底層充填(cured underfill)的存在係強化軟焊接合(solder joint)並幫助降低熱循環期間軟焊接合的故障。
亦提供一種電子組合件,其包含電氣連接至基板的電子元件,以及介於該電子元件與該基板之間的底層充填組成物,其中,該底層充填組成物包含二乙烯基芳烴二環氧化物之反應產物。
於另一具體實施例中,本發明提供一種底層充填組成物,其包含二乙烯基芳烴二環氧化物;固化劑;以及填充劑,其中,以該組成物之總體積為基礎計,當該填充劑以1至70 vol%(體積%)的量存在時,該組成物於25℃具有0.005至100 Pa-s之黏度。
本發明的另一具體實施例係有關用於製備上述環氧樹脂製劑之製程。
除非內文清楚另行指明者外,於說明書通篇中所使用之下述縮寫應具有下述意義:psi=磅/平方吋;℃=攝氏溫度;g/mol=公克/莫耳;ppm=百萬分之一;rpm=每分鐘轉數;Pa-s=帕-秒;MPa=百萬帕;GPa=十億帕;W/mK=瓦/米凱氏溫度(Watt per meter Kelvin);CTE=熱膨脹係數;wt%=重量百分比;vol%=體積百分比;g=公克;mg=毫克;以及μm=微米。除非另行指明,否則所有量皆為重量百分比且所有的比率皆為莫耳比。所有的數值範圍皆包含上下限值,且可以任何順序組合,除非此等數值範圍顯然受到加總至多100%之限制。如本文中所使用者,範圍包括端值。專有名詞“二氧化物”與“二環氧化物”係可互換使用。
可根據本發明之方法製備電氣組合件,該方法包含下列步驟:提供電子元件及基板,其中,該電子元件與該基板中之一者具有複數個銲點凸塊,而另一者具有複數個電氣接合墊;電氣連接該電子元件與該基板;將底層充填組成物形成於該電子元件與該基板之間;以及固化該底層充填組成物,其中,該底層充填組成物包含二乙烯基芳烴二環氧化物。
本發明之方法可用於將各式電子元件附接至各式基板。適當之電子元件包括但不限於晶片、電容器、電阻器等。專有名詞“晶片”係指藉由各式製程轉換成所欲之積體電路裝置的工作件。晶片通常係由晶圓單分(singulate)而得,晶圓可由半導體材料、非半導體材料、或其組合製成。適當之基板包括但不限於印刷電路板以及軟性電路。由本發明所製備之電氣組合件亦包含黏合至基板之封裝件。“封裝件”係指置於薄電路板上並被封裝之積體電路。該封裝件典型含有位於該電路板之底部之焊球,以允許連接至基板。
該電子元件與該基板中之一者具有複數個銲點凸塊,而另一者具有複數個電氣接合墊。如本文所使用者,專有名詞“銲點凸塊”包括銲點凸塊、焊球、接腳以及導柱(pillar),諸如銅導柱。銲點凸塊包括球柵陣列以及針柵陣列。銲點凸塊可由任何適當之可焊(solderable)材料所構成,例如但不限於,錫、錫-鉛、錫-鉍、錫-銀、錫-銀-銅、錫-銦以及銅。特別有用之銲點凸塊為由錫、錫-鉛、錫-銀以及錫-銀-銅所構成者。該錫-合金銲點凸塊典型為共熔混合物(eutectic mixture)。例如,適當的錫-銀銲點凸塊具有96.5%錫及3.5%銀之組成。銲點凸塊可藉由任何傳統手段諸如膏(paste)或藉由電鍍而沉積。由合金所構成之銲點凸塊可直接以合金沉積,諸如藉由電鍍Sn-Ag銲點凸塊,或藉由依序沉積第一金屬(諸如錫),並接著於第一金屬上沉積第二金屬(諸如銀),然後再藉由回焊金屬來形成合金。適當之電氣接合墊可為任何適當之墊,且可與基板或電子元件之表面齊平、或可為電子元件之基板的表面。適當之接合墊可為銅、銀、金或任何其他適當金屬。
於使用時,銲點凸塊與接合墊係使用焊劑(flux)以確保良好可焊性。可使用任何適當之焊劑且焊劑之使用屬於本領域具有通常知識者之能力範圍內之事。將該電子元件與該基板定位成使得銲點凸塊與接合墊對準。接著,將該組合件加熱以回焊焊料並電氣連接(也就是說,焊接)該電子元件與該基板。特定焊料之回焊溫度係取決於銲點凸塊之組成,且為本領域具有通常知識者所熟知。
於電子元件焊接至基板之後,使底層充填組成物流動於該電子元件與該基板之間。底層充填組成物亦流動於軟焊接合周圍。可藉由一些方法來施加底層充填組成物,施加方法係取決於最終之應用。例如,典型施加方法包括用於底層充填應用之注射器分注(dispensing)或是筒式(cartridge)分注。適當之分注機器為由Asymtek,A Nordson Company,或Speedline Technologies所製造者。分注閥的設計可包含正排量、時間-壓力、噴射分注(jet dispense)、或是具有精準體積控制的另一種閥設計。雖然,一般來說,並非本發明之底層充填組成物所必須者,然可使用真空來幫助拽拉於該電子元件與該基板之間以及於軟焊接合周圍的底層充填組成物。
一旦底層充填組成物填滿該電子元件與該基板之間的空間,接著固化底層充填組成物。該組成物的固化可藉由在足以固化該組成物之預定溫度進行預定時間而完成。特別的固化條件可取決於底層充填組成物中所使用之硬化劑。例如,固化溫度通常可自10℃至200℃;較佳為自100℃至190℃;且更佳為自125℃至175℃。適當之固化時間可為自1分鐘至4小時,較佳為自5分鐘至2小時,且更佳為自10分鐘至1.5小時。少於1分鐘的時間可能太短而無法確保於傳統加工條件下有足夠的反應;而高於4小時的時間可能太長而不實際或不經濟。
較佳地,本發明之底層充填組成物係藉由在75至100℃之第一溫度加熱底層充填組成物2至90分鐘,以及接著在125至200℃之第二溫度加熱底層充填組成物2至180分鐘而固化。較佳地,第一溫度為自80至95℃,且更佳地為自80至90℃。較佳地,係使底層充填組成物於該第一溫度歷經5至90分鐘的時間,且更佳地,歷經自15至60分鐘。較佳地,第二溫度係於135至200℃之範圍,且更佳地為自150至180℃。較佳地,係使底層充填組成物於該第二溫度歷經10至150分鐘的時間,更佳地,歷經自20至150分鐘,且又更佳地,歷經自30至120分鐘。
參考第1圖,其顯示電子組合件之橫截面,該電子組合件為諸如覆晶封裝件,大體而言以數字10指示,係包含基板12,其中,基板12具有位於基板12下表面上之視需要的焊球13。此外,電子組合件10包含電子元件14,諸如晶片,該電子元件14係藉由軟焊接合15(由電子元件14上之銲點凸塊與基板12上之接合墊所形成)電氣連接至基板12,具有置於電子元件14與基板12之間的已固化底層充填組成物11,其中,已固化底層充填組成物11包含二乙烯基芳烴二環氧化物之反應產物。
於本發明最廣的範圍中,本發明包括用於底層充填封裝劑之可固化環氧樹脂組成物或製劑,包含(a)二乙烯基芳烴二氧化物;(b)硬化劑;以及(c)視需要之催化劑。本發明之環氧化物組成物或製劑係包括下列具體實施例:(1)可聚合之可固化組成物,其包含二乙烯基芳烴二氧化物;(2)部分固化之組成物,其包含二乙烯基芳烴二氧化物;以及(3)得自上述(1)與(2)之已固化組成物,其包含二乙烯基芳烴二氧化物。本發明亦關於包含二乙烯基芳烴二氧化物之組成物的固化(亦即,聚合)。此外,預期有某種程度(少於約50%)的雜質存在於二乙烯基芳烴二氧化物中,且該某種程度的雜質可存在而對最終性能產生極少影響。
本發明之底層充填組成物於室溫係有利地為低-黏度之均質液體,諸如例如,於25℃之黏度少於5.0 Pa-s。可將固體顆粒材料,諸如填充劑,倂入底層充填組成物中,以對未固化或已固化聚合物之物理性質提供各式修改。不論具有或是不具有該添加之固體材料,該組成物係在無需施加高壓、真空輔助或加熱至高溫之情況下填滿小裂隙(例如,少於20μm),雖然也可採用該等措施(如果想要的話)。可利用該底層充填組成物來保護脆弱的電子元件,其中,該組成物具有少於5 ppm,且較佳地少於3 ppm之低總氯化物含量。“總”氯化物含量同時包含受阻氯化物及可水解氯化物之含量。
於本發明之底層充填組成物的製備中,該二乙烯基芳烴二氧化物(組分(a))可包括,例如,在任何環位置上帶有兩個乙烯基之任何經取代或未經取代的芳烴核。該二乙烯基芳烴二氧化物之芳烴部分可包括苯、經取代之苯、環化苯(ring-annulated benzene)、經取代之環化苯、同質鍵結苯(homologously bonded benzene)、經取代之同質鍵結苯、或其混合物。該二乙烯基芳烴二氧化物之二乙烯基芳烴部分可為鄰位、間位或對位異構物或其任何混合物。額外的取代基可由耐-H2 O2 基團(H2 O2 -resistant group)所組成,包括飽和烷基、芳基、鹵素、硝基、異氰酸酯基(isocyanate)、或RO-(其中R可為飽和烷基或芳基)。環化苯可包括例如萘、四氫萘等。同質鍵結之(經取代之)苯可包括例如聯苯、二苯基醚等。
用於製備本發明之組成物的二乙烯基芳烴二氧化物一般可藉由下述化學結構I至IV例示:
於本發明之二乙烯基芳烴二氧化物共-單體的上述結構I、II、III及IV中,各R1 、R2 、R3 及R4 可獨立為氫、烷基、環烷基、芳基或芳烷基;或是耐-H2 O2 基團,包括例如鹵素、硝基、異氰酸酯基或RO基團(其中R可為烷基、芳基或芳烷基);x為0至4之整數;y為大於或等於2之整數;x+y為小於或等於6之整數;z為0至6之整數;以及z+y為小於或等於8之整數;以及Ar為芳烴片段(fragment),包括例如1,3-伸苯基。此外,R4 可為反應性基團,包括環氧基(epoxide)、異氰酸酯基或任何反應性基團,以及Z為取決於取代模式(substitution pattern)之自0至6之整數。
於一具體實施例中,用於本發明之二乙烯基芳烴二氧化物可藉由,例如,國際專利申請案第WO 2010/077483號所揭示之製程製造,該案係藉由引用形式倂入本文。有用於本發明之二乙烯基芳烴二氧化物組成物也揭示於,例如,美國專利案第2,924,580號中,該案係藉由引用形式倂入本文。
於另一具體實施例中,有用於本發明之二乙烯基芳烴二氧化物可包括,例如二乙烯基苯二氧化物、二乙烯基萘二氧化物、二乙烯基聯苯二氧化物、或二乙烯基二苯基醚二氧化物、及其混合物。
於本發明的一較佳具體實施例中,有用於底層充填組成物之二乙烯基芳烴二氧化物包括二乙烯基苯二氧化物(DVBDO)。最佳地,該二乙烯基芳烴二氧化物組分為藉由下述結構V之化學式所例示之二乙烯基苯二氧化物:
上述DVBDO化合物的化學式為C10 H10 O2 ;DVBDO之分子量為162.2;且DVBDO之元素分析為:C,74.06;H,6.21;及O,19.73,具有81 g/mol之環氧當量(epoxide equivalent weight)。
下述結構VI例示出有用於本發明之DVBDO的較佳化學結構之一具體實施例:
下述結構VII例示出有用於本發明之DVBDO的較佳化學結構之另一具體實施例:
當DVBDO係藉由本領域已知之製程製備時,可能得到三種可能異構物(鄰位、間位及對位)之一種。因此,本發明包含由上述結構的單獨任一者或其混合物所例示之DVBDO。上述結構VI與VII分別顯示DVBDO之間位(1,3-DVBDO)與對位異構物。鄰位異構物很稀少;且通常來說,大部分製造之DVBDO一般具有自9:1至1:9範圍之間位(結構VI)與對位(結構VII)異構物之比。本發明較佳包括自6:1至1:6範圍之結構VI對結構VII之比的一具體實施例,且於其他具體實施例中,結構VI對結構VII之比可為自4:1至1:4或自2:1至1:2。
於本發明的又一具體實施例中,該二乙烯基芳烴二氧化物可含有大量(諸如例如少於20 wt%)經取代之芳烴。經取代之芳烴的量與結構取決於用於將二乙烯基芳烴前驅物製備成二乙烯基芳烴二氧化物之製程。例如,藉由二乙基苯(DEB)的脫氫作用所製備之二乙烯基苯可能含有大量乙基乙烯基苯(EVB)及DEB。在與過氧化氫反應後,EVB產生乙基乙烯基苯一氧化物,而DEB保持不變。這些化合物的存在可使二乙烯基芳烴二氧化物之環氧當量值增加至大於純化合物之環氧當量值,卻可以環氧樹脂部分之0至99%的程度利用之。
於一具體實施例中,有用於本發明之二乙烯基芳烴二氧化物包括例如二乙烯基苯二氧化物(DVBDO),一種低黏度液體環氧樹脂。本發明之方法所使用之二乙烯基芳烴二氧化物的黏度,於25 ℃通常為自0.001 Pa-s至0.1 Pa-s,較佳為自0.01 Pa-s至0.05 Pa-s,且更佳為自0.01 Pa-s至0.025 Pa-s。
於本發明中用來作為製劑之環氧樹脂部分的二乙烯基芳烴氧化物之濃度可取決於其他製劑成分的分率(fraction),然而,一般來說,該環氧樹脂部分係在自0.5 wt%至100 wt%、較佳為自1 wt%至99 wt%、更佳為自2 wt%至98 wt%、且甚至更佳為自5 wt%至95 wt%之範圍內。例如,製劑中DVBDO之濃度將取決於其他製劑成分,然而,一般來說,以總組成物的重量為基礎計,DVBDO的濃度為自1 wt%至99 wt%、較佳為自5 wt%至90 wt%、且最佳為自7 wt%至60 wt%。於本發明之系統的一具體實施例中,DVBDO為該環氧樹脂組分,且以總組成物的重量為基礎計,DVBDO係以自20 wt%至80 wt%的濃度使用。
就本發明最廣義角度來說,本發明之底層充填組成物中係使用硬化劑(固化劑或交聯劑)或固化劑摻合物(硬化劑之混合物)。一般來說,可使用任何本領域中已知之適用於固化(聚合)環氧樹脂之硬化劑。硬化劑的選擇可取決於應用的要求。有用於本發明之底層充填組成物的硬化劑可包括,但不限於,二氰二胺樹脂、經取代之胍樹脂、酚系樹脂、胺基樹脂、苯并樹脂、酸酐樹脂、醯胺基胺(amido amine)樹脂、聚醯胺樹脂、聚胺樹脂、芳族胺樹脂、聚酯樹脂、聚異氰酸酯樹脂、聚硫醇樹脂、尿素甲醛樹脂及三聚氰胺甲醛樹脂,以及其混合物。於一具體實施例中,本發明之底層充填組成物係實質上不含酸酐,且較佳地,係不含酸酐。
但硬化劑的濃度將取決於化學計量考量(莫耳比)。環氧樹脂對硬化劑的典型莫耳比為0.25至4,更佳為0.5至2,且最佳為0.9至1.1。
就本發明最廣義角度來說,於本發明之底層充填組成物中可視需需要地使用催化劑。一般來說,可使用任何本領域中已知之適用於促進環氧樹脂與硬化劑間之反應的均質或非均質催化劑。催化劑可包含,但不限於,咪唑、三級胺、鏻錯合物、路易士酸或路易士鹼、過渡金屬催化劑、及其混合物。於一具體實施例中,底層充填組成物係實質不含路易士酸催化劑,且較佳係不含路易士酸催化劑。
有用於本發明之催化劑可包括例如:路易士酸,諸如三氟化硼錯合物;路易士鹼,諸如類三級胺之二氮雜雙環十一烯及2-苯基咪唑;四級鹽,諸如四丁基鏻溴化物及四乙基銨溴化物;以及有機銻鹵化物,諸如三苯基四碘化銻及三苯基二溴化銻;及其混合物。
當存在催化劑時,以底層充填組成物之總重為基礎計,催化劑之濃度一般來說為自0.05 wt%至10 wt%,較佳為自0.1 wt%至5 wt%,且最佳為自0.15 wt%至1 wt%。可調整催化劑之量以允許最終應用之適當加工。
可將填充劑添加至本發明之底層充填組成物以改善已固化系統之熱機械性質而提供更佳之元件可靠度性能。填充劑之存在會增加已固化底層充填之模數並降低黏著劑(已固化底層充填)之CTE,以較佳地匹配該電子元件與該基板之CTE。例如,製劑可包含一種或多種視需要之功能性或非功能性填充劑諸如,例如,熔融矽石、天然矽石、合成矽石、天然氧化鋁、合成氧化鋁、中空填充劑、氫氧化鋁、氫氧化鋁氧化物、氮化硼、碳化矽、雲母、鋁粉、氧化鋅、銀、石墨、氮化鋁、富鋁紅柱石、金、碳、奈米碳管、石墨烯、玻璃纖維/片、碳纖維、或其他有機或無機顆粒填充劑,該填充劑係以其最終狀態或於原位(in-situ)形成而添加至製劑中。矽石,不論是熔融、天然或是合成者,為較佳填充劑。可視需要地處理填充劑之表面以改善填充劑與聚合物之交互作用。於另一具體實施例中,將矽石填充劑添加至底層充填組成物所用之DVBDO摻合物中可增加最終之已固化底層充填材料的斷裂韌性。
一般來說,填充劑材料之可接受粒徑可於自奈米至傳統微米尺寸之範圍。例如,填充劑之粒徑可於自0.0005 μm至500 μm,較佳為自0.100 μm至100 μm,且更佳為自0.01 μm至30 μm之範圍。
可接受之填充劑形貌包括,但不限於,薄層(platelet)、纖維狀、球狀、針狀、不定形、或其之任一組合。可組合具有不同尺寸與不同形狀之填充劑以於熱膨脹係數、模數、導電性及/或導熱性上具有加乘效果。
於本發明中所使用之填充劑,可於倂入底層充填組成物之前、或於原位、於混煉製劑期間視需要經表面處理。表面處理之實例包括脂肪酸、矽烷耦合劑、鈦酸鹽、鋯酸鹽或矽氮烷化合物。
有用於本發明之填充劑負載為可變化的。一般來說,以組成物之固體重量為基礎計,填充劑之濃度係自0 wt%至99 wt%,較佳為自0.1 wt%至95 wt%,更佳為自10 wt%至90 wt%,且最佳為自50 wt%至80 wt%。取決於所欲之性質,體積負載(volumetric loading)的範圍可為自0至90 vol%,更佳為自0.1至90 vol%,另更佳為高達85 vol%,又更佳為自0.1至85 vol%,再更佳為自1至85 vol%,且最佳為自1至70 vol%。
已知,傳統環氧化物系底層充填組成物所需之高填充劑負載係存在許多技術挑戰,諸如大量增加底層充填組成物之黏度、降低於該電子元件與該基板間之組成物的可流動性、以及需要較高的施用溫度。持續縮小銲點凸塊與接合墊之節距尺寸係使此難題更惡化。已發現,即使是在具有相對高的填充劑負載下,本發明之底層充填組成物仍具有低黏度及優異的可流動性。更具體地,本發明提供一種組成物,其包含二乙烯基芳烴二環氧化物;固化劑;以及填充劑,其中,以該組成物之總體積為基礎計,當該填充劑以1至70 vol%的量存在時,該組成物於25℃具有自0.005至100 Pa-s之黏度。當該填充劑以1至70 vol%的量存在時,較佳地,該組成物於25℃具有自0.01至25 Pa-s之黏度,且更佳地,該組成物於25℃具有自0.01至10 Pa-s之黏度。於一特佳具體實施例中,當該填充劑以50至70 vol%的量存在時,該組成物於25℃具有自0.005至1 Pa-s之黏度。較佳地,於該組成物中,二乙烯基芳烴二環氧化物為二乙烯基苯二氧化物。本發明之底層充填組成物的進一步優點在於其可於室溫或接近室溫(顯著低於傳統底層充填組成物之施用溫度)施加。
本發明之底層充填組成物可有利地使用廣泛種類的硬化劑,且,本發明之組成物允許比傳統底層充填組成物對於填充劑具有更多種選擇,諸如奈米填充劑,因此本發明組成物的製劑選項變廣。本發明之底層充填組成物也具有低(例如,少於5 ppm)至無的總鹵化物。此外,由於本發明之底層充填組成物亦允許高填充劑負載,因此該底層充填組成物可達成下列者:於施用期間相同流動速率下,具較低的CTE(例如少於30 ppm/低於Tg之℃)或較佳導熱性(例如,大於1.0 W/mK);或是於相同CTE或導熱性下,具有較佳流動速率。
可有用於本發明之底層充填組成物的其他視需要之組分為本領域具有通常知識者所知通常用於樹脂製劑中之組分。例如,該視需要之組分可包括可添加至組成物中以增強施用性質(例如,表面張力改質劑或流動助劑)、可靠度性質(例如,黏附性促進劑)、反應速率、反應選擇性、及/或催化劑壽命之化合物。
有各種各樣的添加劑可添加至本發明之組成物中,包括例如,其他樹脂,諸如不同於二乙烯基芳烴二氧化物(組分(a))之環氧樹脂、稀釋劑、安定劑、填充劑、塑化劑、催化劑、去活化劑(deactivator)、韌化劑等;及其混合物。
有用於本發明之製劑的其他添加劑包括例如,含鹵素或不含鹵素之耐燃劑;用以改善可滅焰性(flame extinguishing ability)之性能的增效劑(synergist),例如氫氧化鎂、硼酸鋅或茂金屬(metalocene);為了可加工性之溶劑,例如丙酮、甲基乙基酮、Dowanol PMA;黏附性促進劑,諸如經改質之有機矽烷(環氧化、甲基丙烯化(methacryl)、胺化(amino))、乙醯丙酮化合物(acytlacetonate)、或含硫分子;濕潤及分散助劑,諸如經改質之有機矽烷,Byk 900系列及Byk W-9010、經改質之氟碳化物;釋氣添加劑,諸如Byk-A 530、Byk-A 525、Byk-A 555、Byk-A 560;表面改質劑,諸如滑且光澤(slip and gloss)添加劑(其中之一些可由Byk-Chemie購得);反應性或非反應性熱塑性樹脂諸如聚苯碸、聚碸、聚醚碸、聚偏二氟乙烯、聚醚醯亞胺、聚酞醯亞胺(polypthalimide)、聚苯并咪唑(polybenzimidiazole)、丙烯酸系(acrylic)、苯氧基聚合物(phenoxy)、胺甲酸乙酯;脫膜劑,諸如蠟;用以改善聚合物性質之其他功能性添加劑或預反應產物,諸如異氰酸酯、異氰尿酸酯、氰酸酯、含烯丙基之分子及其他乙烯系不飽和化合物、以及丙烯酸酯;及其混合物。
一般來說,本發明所用之視需要之添加劑的濃度範圍可為自0 wt%至99 wt%,較佳為自0.001 wt%至95 wt%,更佳為自0.01 wt%至60 wt%,且最佳為自0.05 wt%至50 wt%。
關於意欲使用作為根據本發明之底層充填組成物的製劑之一般性例示,該底層充填製劑可含有下述成分及其各自含量:
DVBDO(The Dow Chemical Company) 20至30 wt%
Kyahard AA pt(Nippon Kayaku) 10至20 wt%
Denka FB-1SDX Silica(Denka Corporation) 45至75 wt%
Byk W-9010(Byk Chemie) 0.5 wt%
Silwet 7608(GE Silicones) 0.5 wt%
Byk A-530(Byk-Chemie) 0.5 wt%
Silane Z-6040(Dow Corning) 0.7 wt%
該用於製備低黏度(例如,於25℃,少於3.0 Pa-s)且含低總氯化物(例如,少於5 ppm)之有用於半導體封裝材料之製造的環氧樹脂製劑之方法包含:將(a)二乙烯基苯二氧化物;(b)硬化劑;(c)視需要之催化劑;以及(d)視需要之其他成分(若有需要的話)摻合。例如,本發明之可固化環氧樹脂製劑的製備係藉由在真空下或無真空下於Ross PD混合器(Charles Ross)中將二乙烯基苯二氧化物、固化劑、催化劑以及視需要之任何其他所欲添加劑摻合而達成。上述視需要之各種製劑添加劑之任一者,例如填充劑,亦可於混合期間或混合之前添加至組成物中以形成該組成物。
環氧樹脂製劑的所有組分,典型地係於能夠製備用於所欲應用之具有低黏度的有效環氧樹脂組成物之溫度下進行混合與分散。一般來說,混合所有組分期間的溫度可為自20℃至80℃,且較佳為自25℃至35℃。較低之混合溫度有助於最小化樹脂與硬化劑組分的反應,而最大化製劑的使用期限。
該已摻合之化合物典型係儲存於低於環境溫度之溫度以最大化貨架壽命。可接受的溫度範圍為例如自-100℃至25℃,更佳地,自-70℃至10℃,以及甚至更佳於自-50℃至0℃。作為一例示用具體實施例,該溫度為-40℃。
該二乙烯基苯二氧化物(DVBDO)(本發明之環氧樹脂)可作為主要樹脂使用,以於最終製劑中形成環氧化物基質;或者該二乙烯基苯二氧化物樹脂可作為最終製劑中之其中一種組分使用。例如,該環氧樹脂可作為添加劑稀釋劑使用。該二乙烯基苯二氧化物的使用對可固化組成物及最終已固化產物提供較之傳統縮水甘油醚、縮水甘油酯或縮水甘油胺環氧樹脂來得改善之性質。具體來說,DVBDO之使用允許相對高填充劑負載,並同時維持於25℃之相對低黏度。
此外,二乙烯基苯二氧化物之使用提供了所欲之低至無的總鹵素含量,以維持於高溼度測試及於裝置壽命期間內現場使用時,電子組合件性能的可靠度。一般來說,鹵素含量,諸如氯含量,為少於500 ppm;較佳為少於100 ppm,且更佳為少於5 ppm。
本發明之已固化底層充填組成物(亦即,由可固化組成物製得之已交聯產物)顯示數種較之已固化傳統環氧化物系底層充填來得改善的性質。例如,本發明之已固化底層充填可具有自-55℃至300℃之玻璃轉移溫度(Tg)。一般來說,樹脂的Tg係高於-60℃,較佳高於0℃,更佳高於10℃,更佳高於25℃,且最佳高於50℃。低於-55℃時,本申請案所述技術較之於先前技術中所描述之傳統技術來說,不提供任何進一步顯著的好處;而高於200℃,一般來說,本發明申請案所述技術將得到非常脆的網狀物而未將韌性技術納入,其並不適用於本發明申請案之範圍內的應用且也可能造成裝置於低溫(例如,少於0℃)之顯著彎曲。較佳地,本發明之已固化底層充填組成物藉由ASTM D 3418測得,具有之玻璃轉移溫度為自25至300℃,更佳為自50至250℃,且最佳為自50至225℃。
由於在乙烯基的環氧化期間排除了表氯醇,所以於樹脂中存在極少量至無的可水解或總氯化物。因此,藉由於Parr彈萃取(Parr bomb extraction)(約60網目顆粒,120℃,24小時)後之離子層析法,本發明之底層充填組成物具有之可水解氯化物含量為自0.00001至5000 ppm,較佳為自0.00001至100 ppm,且最佳為少於5 ppm。
下述結構顯示於傳統縮水甘油醚樹脂之反應中所形成的各式產物與副產物,其導致較高程度之總及可水解氯化物含量:
本發明之已固化底層充填組成物具有以ASTM D 5045(室溫)測得之高於1.0 MPa.m1/2 ,較佳高於1.7 MPa.m1/2 ,且更佳高於2.0 MPa.m1/2 (百萬帕/米)之斷裂韌性。
藉由ASTM D 790,低於Tg時,本發明之已固化底層充填組成物具有高於1 GPa,較佳高於2 GPa,且更佳介於3.5 MPa與15 GPa之間的抗彎模數(flexural modulus)。
藉由ASTM D 5335,低於Tg時,本發明之已固化底層充填具有65 ppm/℃,且較佳低於50 ppm/℃之CTE。
藉由根據ASTM E 1131之熱重分析,本發明之底層充填組成物在固化期間具有少於10%的重量損失。
於一具體實施例中,利用二乙烯基芳烴之二環氧化物衍生物的本發明之環氧樹脂製劑,可作為半導體封裝材料之毛細管式底層充填封裝劑使用。環氧樹脂製劑之使用使得由樹脂所提供之相對高填充劑負載(例如,>30 vol%,諸如自30至85 vol%)、固化後之高Tg值(例如,>90℃)、以及非常低至無總氯化物濃度(例如,<5 ppm)變得可能。此外,不同於傳統低黏度環脂族環氧樹脂,此樹脂使得可使用一些不同的硬化劑。製造不使用鹵化中間產物(例如,表氯醇)之分子的合成路徑係產生相對低的氯化物污染。
施例
下述實施例與比較例進一步詳細例示說明本發明,但不應被理解為用以限制本發明之範疇。
實施例1至3及比較例A與B
進行一套實驗以探索填充劑負載與樹脂對感興趣之關鍵性質的影響。根據下述步驟製備比較例A與B以及實施例1至3:將各組成物之成分置於加蓋之75 mL聚丙烯塑膠罐中,並使用FlackTek分發之DAC 150以3200 rpm摻合120秒。填充劑負載程度為35%、50%、及65%(以固體重計)。該實驗設計也包含將樹脂種類作為變數,使用D.E.R.TM 354(雙酚F系環氧樹脂,具有174 g/mol之平均環氧當量(EEW),可自The Dow Chemical Company購得);以及二乙烯基苯二氧化物(DVBDO)。也包含中心點,其組合有1:1重量比的這兩種樹脂,並同時維持與芳族胺硬化劑(二乙基甲苯二胺(DETDA))為1:1之化學計量平衡。
用於這些實施例的其他原料係描述如下:Ethacure 100為購自Albemarle Corporation之DETDA;Byk-A 530為Byk-Chemie,GmbH,Germany所生產之聚矽氧烷消泡助劑;Byk W996為Byk-Chemie,GmbH,Germany所生產之濕潤助劑,其為具酸性基團之共聚物(酸值為71 mg KOH/g);矽烷Z-6040為Dow-Corning所生產之環氧化物功能性矽烷耦合劑;Modaflow為Ctyec Surface Specialties所生產之表面張力改質劑/流動助劑;以及Denka FB-1SDX為Denka Co JP,Japan所生產之熔融合成球狀矽石粉末,具有約1.5微米之平均粒徑。Coat O Sil 2810為得自Momentive之環氧基封端之聚二甲基矽氧烷。D230為得自Hunstman Corporation之聚醚胺。Amicure PACM為得自Air之環脂族胺。MP15EF與MP8FS為購自Tatsumori之矽石填充劑。Regal 400 R為得自Cabot Corporation等級的碳黑。Silwet L-7608為得自Momentive Performance Materials的有機矽表面張力改質劑。
於Speedmixer中摻合且於約3000 Pa真空烘箱中除氣15分鐘後,將8 g的各樣本置於單獨的鋁稱重盤中。將該等盤置於150℃烘箱中60分鐘,接著再置於175℃烘箱中90分鐘。冷卻後,將樣本(餅(slug))自鋁盤移出並使用Buehler Isomet 1000鋸予以切割。自各餅切下約3 mm×3 mm的小樣本,並藉由使用配有3 mm探針之TA Instruments Q400熱機械分析儀的熱機械分析法(TMA)進行分析。該分析法之程序係由一個元件構成;自室溫(約25℃)以10℃/分鐘線性變化至275℃,並且以0.05 N的力進行50 mL/分鐘氮沖洗。接著使用整體分析數據分析軟體(Universal Analysis data analysis software,購自TA Instruments)來測定所分析樣本之玻璃轉移溫度(Tg)(起始),以及在低於Tg時的CTE(α1 CTE)。
使用配有35 mm上方板及50 mm下方板之TA Instruments ARES分析儀(TA Instruments)測量摻合樣本相對於溫度之黏度。該測試程序係由以5℃/分鐘線性變化速率自25℃升至250℃之動態溫度所構成。
下表II包含自模型底層充填製劑所收集之數據的總論。值得注意的是高Tg與低黏度之組合。藉由TMA,DVBDO系樣本的Tg比由D.E.R.TM 354所製得之樣本的Tg高出約70℃。此外,於65%填充劑負載時,DVBDO樣本的最小黏度為由D.E.R.TM 354所製得之樣本的最小黏度的20%。亦值得注意的是在沒有使用任何催化劑下D.E.R. 354系統的相對低Tg。
實施例4至10
使用如實施例1至3所述之相同程序來進行實施例4至10;且包含下述原料:DVBDO,為一種二氧化物,購自The Dow Chemical Company;506,為一種聚醯胺硬化劑,購自Air Products;D230,為一種聚醚胺,購自Huntsman Corporation;Silazane Z-6079(六甲基二矽氮烷),購自Dow Corning;MP-15EF-矽石填充劑,購自Tatsumori Ltd,Japan;以及Silane Z-6040,為一種環氧矽烷,購自Dow Corning。
描述於表III中之實施例4至10之製劑係根據下述程序使用DAC150(FlackTek,Landrum,SC)摻合:添加DVBDO與MP 15EF至75 mL加蓋之聚丙烯罐中。於3500 rpm混合50秒。添加Silane Z-6079並於3500 rpm混合120秒。添加硬化劑與Silane 6040並於3500 rpm混合60秒。接著置於25℃烘箱中(於約3000 Pa)15分鐘以將樣本除氣。
於最終混合步驟後,使用TA Instruments AR2000流變計分析該等製劑樣本。該流變計配有60 mm,1度錐。該測試程序係由在25℃於10秒-1 預剪切(pre-shear)30秒;以及接著維持於10秒-1 預剪切120秒的雙步驟所構成,且每2秒紀錄下數據點。所示黏度值為至少10個數據點的平均值。
將約9 g的各樣本倒入到鋁稱重碟並於85℃固化45分鐘,接著再於175℃固化45分鐘。自烘箱中移出已固化樣本並使其回溫至室溫,接著再置入塑膠儲存袋中。
使用TA Instruments 2920 Dual Cell DSC來測定固化後樣本的Tg。該程序係由單一線性變化(自25 ℃至300℃之10℃/分鐘線性變化速度以及50 mL/分鐘氮沖洗)所構成。使用TA Instruments整體分析軟體之外切法(extrapolated tangents method)來測定Tg。從各已固化樣本切下一小(約15 mg)並根據先前之方法進行分析。
此外,使用TA Instruments Q400熱機械分析儀來測量各樣本的CTE。記述低於Tg(α1)及高於Tg(α2)的值。該程序係由單一溫度線性變化(自25℃至300℃之10℃/分鐘線性變化速度以及50 mL/分鐘氮沖洗)所構成。結果揭示於表IV。
10...電子組合件
11...已固化底層充填組成物
12...基板
13...焊球
14...電子元件
15...軟焊接合
第1圖顯示本發明之電子組合件(諸如覆晶封裝件)的橫截面圖。
10...電子組合件
11...已固化底層充填組成物
12...基板
13...焊球
14...電子元件
15...軟焊接合

Claims (7)

  1. 一種製造電氣組合件之方法,其包含:提供電子元件及基板,其中,該電子元件與該基板中之一者具有複數個銲點凸塊,而另一者具有複數個電氣接合墊;電氣連接該電子元件與該基板;使液體底層充填組成物於該電子元件與該基板之間流動;以及固化該底層充填組成物;其中,該底層充填組成物包含二乙烯基芳烴二氧化物、固化劑以及10wt%至90wt%之填充劑,其中,該二乙烯基芳烴二氧化物與該固化劑是以二乙烯基芳烴二氧化物對固化劑為0.25至4之莫耳比存在,以及其中該液體底層充填組成物於25℃具有少於5.0Pa-s之黏度。
  2. 如申請專利範圍第1項所述之方法,其中,該二乙烯基芳烴二氧化物為二乙烯基苯二氧化物。
  3. 如申請專利範圍第1項所述之方法,其中,該填充劑是以含量至高85vol%之含量存在。
  4. 如申請專利範圍第3項所述之方法,其中,該填充劑以50至70wt%之含量存在,且其中該液體底層充填組成物於25℃具有0.05至1Pa-s之黏度。
  5. 如申請專利範圍第1項所述之方法,其中,該固化步驟包含:在75至100℃之第一溫度加熱該液體底層充填組成物2至90分鐘,以及接著在125至200℃之第二溫度加熱該液體底層充填組成物2至180分鐘。
  6. 一種組成物,其包含二乙烯基芳烴二氧化物;固化劑; 以及以該組成物之總體積為基礎計之1至70體積%(vol%)之填充劑,其中,該二乙烯基芳烴二氧化物對該固化劑之莫耳比為0.25至4,以及其中該組成物於25℃具有0.005至100Pa-s之黏度。
  7. 如申請專利範圍第6項所述之組成物,其中,該二乙烯基芳烴二氧化物為二乙烯基苯二氧化物。
TW099140304A 2009-11-23 2010-11-23 底層充填組成物及使用該組成物製造電氣組合件之方法 TWI503340B (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US26345909P 2009-11-23 2009-11-23

Publications (2)

Publication Number Publication Date
TW201139492A TW201139492A (en) 2011-11-16
TWI503340B true TWI503340B (zh) 2015-10-11

Family

ID=43513936

Family Applications (1)

Application Number Title Priority Date Filing Date
TW099140304A TWI503340B (zh) 2009-11-23 2010-11-23 底層充填組成物及使用該組成物製造電氣組合件之方法

Country Status (7)

Country Link
US (1) US20110122590A1 (zh)
EP (1) EP2325876A3 (zh)
JP (1) JP5698500B2 (zh)
KR (1) KR20110060823A (zh)
CN (1) CN102163563B (zh)
SG (1) SG171555A1 (zh)
TW (1) TWI503340B (zh)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5390444B2 (ja) * 2010-03-23 2014-01-15 新日鉄住金化学株式会社 耐アンモニア性エポキシ樹脂組成物およびその成形硬化物
US20130059945A1 (en) * 2010-05-21 2013-03-07 Maurice J. Marks Curable compositions
RU2574054C2 (ru) * 2010-06-25 2016-01-27 БЛЮ КЬЮБ АйПи ЭлЭлСи Отверждаемые композиции на основе эпоксидных смол и композитные материалы, полученные из них
US20130105329A1 (en) * 2010-08-02 2013-05-02 Atotech Deutschland Gmbh Method to form solder deposits and non-melting bump structures on substrates
BR112013029224B1 (pt) * 2011-05-13 2021-03-09 Dow Global Technologies Llc composição de formulação de resina epóxi curável, processo para preparar uma composição de formulação de resina epóxi curável, processo para preparar um material isolante de epóxi e produto
WO2013043363A2 (en) * 2011-09-21 2013-03-28 Dow Global Technologies Llc Epoxy-functional resin compositions
WO2014024849A1 (ja) * 2012-08-06 2014-02-13 積水化学工業株式会社 半導体装置の製造方法及びフリップチップ実装用接着剤
US9716299B2 (en) * 2012-10-25 2017-07-25 The Regents Of The University Of California Graphene based thermal interface materials and methods of manufacturing the same
CN105164797B (zh) * 2012-11-30 2019-04-19 瑟拉斯公司 用于电子应用的复合组合物
US10224258B2 (en) * 2013-03-22 2019-03-05 Applied Materials, Inc. Method of curing thermoplastics with microwave energy
US9321245B2 (en) * 2013-06-24 2016-04-26 Globalfoundries Inc. Injection of a filler material with homogeneous distribution of anisotropic filler particles through implosion
US9441070B2 (en) 2013-09-11 2016-09-13 Rohm And Haas Electronic Materials Llc Divinylarene dioxide compositions having reduced volatility
TWI491683B (zh) * 2014-02-24 2015-07-11 石墨烯複合塗層
US10141197B2 (en) 2016-03-30 2018-11-27 Stmicroelectronics S.R.L. Thermosonically bonded connection for flip chip packages
CA3153628A1 (en) 2019-09-10 2021-03-18 Countertrace Llc Hexasubstituted benzenes, surfaces modified therewith, and associated methods

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW200700453A (en) * 2005-04-05 2007-01-01 Gen Electric Method for producing cure system, adhesive system, and electronic device
CN101238563A (zh) * 2005-06-07 2008-08-06 莫门蒂夫功能性材料公司 用于制备电子装置的方法

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2924580A (en) 1957-08-08 1960-02-09 Union Carbide Corp Divinyl benzene dioxide compositions
US6724091B1 (en) * 2002-10-24 2004-04-20 Intel Corporation Flip-chip system and method of making same
EP1508261B1 (en) 2002-05-23 2010-09-22 3M Innovative Properties Company Electronic assembly and method of making an electronic assembly
US7022410B2 (en) * 2003-12-16 2006-04-04 General Electric Company Combinations of resin compositions and methods of use thereof
US20040101688A1 (en) * 2002-11-22 2004-05-27 Slawomir Rubinsztajn Curable epoxy compositions, methods and articles made therefrom
US7047633B2 (en) * 2003-05-23 2006-05-23 National Starch And Chemical Investment Holding, Corporation Method of using pre-applied underfill encapsulant
US7279223B2 (en) 2003-12-16 2007-10-09 General Electric Company Underfill composition and packaged solid state device
US20060275608A1 (en) * 2005-06-07 2006-12-07 General Electric Company B-stageable film, electronic device, and associated process
US20070004871A1 (en) * 2005-06-30 2007-01-04 Qiwei Lu Curable composition and method
US7351784B2 (en) 2005-09-30 2008-04-01 Intel Corporation Chip-packaging composition of resin and cycloaliphatic amine hardener
JP2007258207A (ja) * 2006-03-20 2007-10-04 Three M Innovative Properties Co バンプ付きチップもしくはパッケージの実装方法
JP5450386B2 (ja) * 2008-03-27 2014-03-26 新日鉄住金化学株式会社 エポキシ樹脂組成物及び硬化物
EP2384325B1 (en) 2008-12-30 2018-04-04 Blue Cube IP LLC Process for preparing divinylarene dioxides

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW200700453A (en) * 2005-04-05 2007-01-01 Gen Electric Method for producing cure system, adhesive system, and electronic device
CN101238563A (zh) * 2005-06-07 2008-08-06 莫门蒂夫功能性材料公司 用于制备电子装置的方法

Also Published As

Publication number Publication date
JP5698500B2 (ja) 2015-04-08
JP2011176278A (ja) 2011-09-08
US20110122590A1 (en) 2011-05-26
CN102163563B (zh) 2013-03-27
SG171555A1 (en) 2011-06-29
EP2325876A3 (en) 2016-04-20
CN102163563A (zh) 2011-08-24
TW201139492A (en) 2011-11-16
EP2325876A2 (en) 2011-05-25
KR20110060823A (ko) 2011-06-08

Similar Documents

Publication Publication Date Title
TWI503340B (zh) 底層充填組成物及使用該組成物製造電氣組合件之方法
EP2504394B1 (en) Toughened epoxy resin formulations
WO2007066763A1 (ja) 電子部品用液状樹脂組成物及び電子部品装置
TWI480326B (zh) 用於含低k介電質之半導體裝置中作為底填密封劑之可固化樹脂組合物
WO2003044089A1 (en) Thermosetting resin compositions useful as underfill sealants
US20050288396A1 (en) Epoxy resin compositions
JP3411164B2 (ja) ダイアタッチペースト
JP2012216836A (ja) 三次元集積回路積層体
US9441070B2 (en) Divinylarene dioxide compositions having reduced volatility
JP2018039992A (ja) 樹脂組成物および該樹脂組成物を用いた三次元積層型半導体装置
JP5768529B2 (ja) 三次元積層型半導体装置用の層間充填材組成物及びその塗布液
JPWO2018198992A1 (ja) 液状封止樹脂組成物、電子部品装置及び電子部品装置の製造方法
JP5445005B2 (ja) エポキシ樹脂組成物、半導体封止充てん用樹脂組成物及び半導体装置
JP2008509241A (ja) 電子デバイス用の低空孔で非流動性のフラクシングアンダーフィル
JP2013107993A (ja) 半導体封止用液状樹脂組成物とそれを用いた半導体装置
JP7160512B1 (ja) フェノール樹脂混合物、硬化性樹脂組成物及びその硬化物
JP6277821B2 (ja) 積層型半導体装置の層間充填材用の組成物、積層型半導体装置、および積層型半導体装置の製造方法
JP5958799B2 (ja) 半導体封止用液状エポキシ樹脂組成物とそれを用いた半導体装置
JP2012216840A (ja) 三次元集積回路積層体
CN117980427A (zh) 导热性粘合剂组合物、其制备方法和用途

Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees