TWI479626B - 導線架基板及其製造方法以及半導體裝置 - Google Patents

導線架基板及其製造方法以及半導體裝置 Download PDF

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Publication number
TWI479626B
TWI479626B TW098132770A TW98132770A TWI479626B TW I479626 B TWI479626 B TW I479626B TW 098132770 A TW098132770 A TW 098132770A TW 98132770 A TW98132770 A TW 98132770A TW I479626 B TWI479626 B TW I479626B
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Taiwan
Prior art keywords
semiconductor element
metal plate
connection terminal
lead frame
protrusions
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TW098132770A
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English (en)
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TW201019445A (en
Inventor
Junko Toda
Susumu Maniwa
Yasuhiro Sakai
Takehito Tsukamoto
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Toppan Printing Co Ltd
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Publication of TW201019445A publication Critical patent/TW201019445A/zh
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Publication of TWI479626B publication Critical patent/TWI479626B/zh

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Description

導線架基板及其製造方法以及半導體裝置
本發明係有關於適合半導體元件之組裝的半導體封裝基板技術，尤其係有關於導線架基板及其製造方法以及使用該導線架基板的半導體裝置。
在由QFP(Quad Flat Package；方型扁平式封裝)所代表之使用導線架的半導體封裝，用以和印刷配線基板連接的外導線配置於半導體封裝的側面。導線架於金屬板的雙面形成所要的光阻劑圖案，再從雙面蝕刻，藉此，可得到半導體元件裝載部、屬於和半導體元件電極之連接部的內導線、外導線、以及固定這些導線的外框部。
又，除了蝕刻工法以外，利用沖床的沖孔加工亦可得到。
作為半導體封裝的組立步驟，於半導體元件裝載部將半導體元件進行晶元接合後，使用金線等，以電性連接半導體元件的電極和內導線。然後，將包含有內導線部的半導體元件附近進行樹脂密封，裁斷外框部，並因應於需要而對外導線施加彎曲加工。
如此被設置於側面的外導線，從微細化的加工性能看，在約30mm正方的封裝尺寸，其接腳限度為200至300支。
近年來，隨著半導體元件的電極數增加，在側面具有外導線之導線架型式的半導體封裝無法應付端子數，部分置換成BGA(Ball Grid Array；球隔陣列)或LGA(Land Grid Array；平面閘格陣列)型式等在封裝基板底面將和印刷配線基板的外部連接端子配置成陣列狀的半導體封裝。這些所使用的基板，一般是以鑽頭對雙面貼銅玻璃環氧樹脂基板鑽孔，並利用電鍍在孔內導通，一側面形成用以和半導體元件之電極連接的端子，在另一側面形成排列成陣列狀的外部連接端子。
可是，因為這些基板之製造的步驟變得複雜、費用變得昂貴，同時在基板內之配線連接使用電鍍，所以具有所謂可靠性比導線架型式之封裝差的問題點。
因而，公開一種BGA型式的半導體封裝構造，其利用將導線架從雙面蝕刻的步驟，並使用導線架(例如專利文獻1)。
這是改變表裡之光阻劑的圖案，同時蝕刻，或者在蝕刻一側後，將電沉積聚醯亞胺樹脂層形成於蝕刻面表層後，或塗布預模製樹脂後，從另一面施加蝕刻，藉此，於一面上形成半導體元件電極的連接端子，並於另一面上以陣列狀形成外部連接端子。
[專利文獻]
[專利文獻1]專利第3642911號公報
第4A圖及第4B圖係表示先前技術之導線架基板之代表例的模式剖面圖。
導線架基板包含半導體元件裝載部8、半導體元件電極連接端子9、配線10、外部連接端子11以及外框部12。在BGA型式的導線架，外部連接端子11的個數增加時，半導體元件電極連接端子9側之配線10的長度變長。此配線10是將金屬板進行半蝕刻而製作，其寬度及厚度都小，具有所謂在蝕刻以後的步驟發生折斷或彎曲而良率變得很差的問題。
在專利文獻1公開，首先，僅外部連接端子11側進行半蝕刻，在蝕刻面形成電沉積聚醯亞胺層17後，以蝕刻形成半導體元件電極連接端子9側。因而，微細的配線10由是薄膜之電沉積聚醯亞胺層17所載持，而避免製作導線架時配線折斷或彎曲。
可是，在將半導體元件裝載於本構造之導線架基板的半導體元件裝載部8並利用打線接合方式連接半導體元件電極和半導體元件電極連接端子9時，因為半導體元件電極連接端子9的下部成為中空，所以線連接的力未作用，而發生連接不良，具有顯著降低組立良率的問題。
又，作為(在專利文獻1未公開)其他的一對策，亦想到以預模製樹脂澆注電沉積聚醯亞胺層而使樹脂層變厚。
推測利用此對策可某程度地避免接合不良的問題，但是無法完全避免中空狀態。
據此，很難調整預模製樹脂的塗布量，形成電沉積聚醯亞胺層的孔部面積變寬時，中心變薄，而擔心無法以電積沉聚醯亞胺層17載持微細之配線10的問題。又，由於中心變薄，根據情況，亦擔心在下一步驟發生破洞的問題。
本發明係鑑於該先前技術之問題點而開發者，其課題在於提供一種應付半導體元件之電極數的增加、可靠性高以及可穩定地進行製作及半導體封裝組立之導線架基板及其製造方法以及半導體裝置。
本發明之第1形態是一種導線架基板，其具備：具有第1面和第2面的金屬板；形成於該第1面之半導體元件裝載部及半導體元件電極連接端子；外部連接端子，係形成於該第2面，並電性連接於該半導體元件電極連接端子；連接該半導體元件電極連接端子和該外部連接端子的配線；孔部，係局部地形成於該金屬板的第2面，並未貫穿該金屬板；以及複數個突起，係形成於該孔部的底面，並在離開該金屬板的方向形成凸狀的複數個突起，而該複數個突起的高度比該第2面的位置更低，該複數個突起和配線未導通，而且各個分散。
本發明之第2形態是一種導線架基板的製造方法，其包含：形成第1光阻劑圖案，其用以於金屬板的第1面形成半導體元件裝載部、半導體元件電極連接端子、配線以及外框部，並於該金屬板的第2面分別形成外部連接端子及外框部；於該第2面之該外部連接端子和該外框部以外的區域形成第2光阻劑圖案，其用以形成未貫穿該金屬板的孔部，並形成突起，其係在該孔部的底面在離開該金屬板的方向形成凸狀且高度比該第2面的位置更低的突起，該突起和配線未導通，而且各個分散；藉由蝕刻該第2面所露出的金屬板露出部，而形成該孔部及屬該突起之未完成狀態的凸狀構造物；對該孔部塗布液狀預模製樹脂，加熱而使其變硬，而形成樹脂層；然後，藉由蝕刻該第1面，而形成該半導體元件裝載部、和該外部連接端子導通的該半導體元件電極連接端子以及該外框部，又使該凸狀的構造物完成為該突起。
又，本發明之第3形態是一種半導體裝置，其具備：導線架基板，係具備：具有第1面和第2面的金屬板；形成於該第1面之半導體元件裝載部及半導體元件電極連接端子；外部連接端子，係形成於該第2面，並電性連接於該半導體元件電極連接端子；連接該半導體元件電極連接端子和該外部連接端子的配線；形成於該金屬板的樹脂層；孔部，係局部地形成於該金屬板的第2面，並未貫穿該金屬板；以及複數個突起，係形成於該孔部的底面，並在離開該金屬板的方向形成凸狀的複數個突起，而該複數個突起的高度比該第2面的位置更低，該複數個突起和配線未導通，而且各個分散；及被裝載於該導線架基板的半導體元件；該半導體裝置係該導線架基板和該半導體元件利用打線接合方式電性連接。
若依據本發明，可將用以和印刷配線基板連接的外部連接端子陣列狀地配置於導線架基板的整個背面，而可應付半導體元件的多端子化。
又，是以導線架為基底的基板，因為未使用電鍍配線，所以可確保對熱應力的可靠性。
另一方面，在製作這種導線架基板時，不會發生配線之折斷或彎曲等的不良，在半導體封裝組立步驟進行打線接合時，預模製樹脂被均勻地充填於外部連接端子表面，而打線連接端子的下部可穩定地連接。
第1A圖~第1F圖係表示本發明之導線架基板的製造方法之一例的模式剖面圖。
第1A圖表示導線架所使用之金屬板1。
於導線架所使用之金屬板1的雙面形成第1光阻劑圖案2(第1B圖)。
第1光阻劑圖案2於金屬板1的第1面(在第1B圖為上面)分別形成半導體元件裝載部8及係進行和半導體元件電極之連接之屬端子的半導體元件電極連接端子9、配線10以及外框部12。
又，第1光阻劑圖案2於金屬板1的第2面(在第1B圖為下面)形成外部連接端子11及外框部12。
於金屬板1的第2面形成第2光阻劑圖案3。第2光阻劑圖案3於金屬板1的第2面形成1個以上之適當個數的突起5。為了巧妙地形成此突起5。如下所示設計第2光阻劑圖案3。即，設計成在半蝕刻結束之前，和突起5接觸之第2光阻劑圖案3剝離，結果，進行半蝕刻，在已形成突起5的時刻，突起5成為至少比外部連接端子11低的高度。
作為金屬板1，雖然只要具有作為導線架的蝕刻加工性、機械強度、導熱性以及膨脹係數等，則可使用任何材料，但是常使用由42合金所代表之鐵-鎳系合金、或為了提高機械強度而添加各種金屬元素的銅系合金等。
使用氯化亞鐵液等將金屬板溶解的蝕刻液從下面蝕刻，而形成孔部4(第1c圖)。因為金屬板之殘留部最後成為配線，孔部4的深度殘留約10μm~50μm厚較佳，使可在從第2次之上面側的蝕刻時形成微細配線。
又，於孔部4同時形成至少1個突起5。突起5如第1c圖所示，若將高度設定成比孔部4的高度低，則可利用圓柱形、或山脈形、光阻劑的形狀來調整突起5的形狀。而且，是一種導線架基板，其特徵為：突起5未和其他的配線連接，在電氣上獨立的金屬面露出。
使被蝕刻加工之金屬板的上下面顛倒，並對金屬板的上面注入液狀的預模製樹脂6(第1D圖)。
藉由以突起5將孔部4隔開成至少2個部分，而預模製樹脂面可形成無不勻之同一面的面。
進而，蝕刻反面(第1E圖)，形成半導體元件裝載部8、半導體元件電極連接端子9以及配線10，而製作導線架基板7(第1F圖)。在第2A圖表示導線架基板7之半導體元件裝載部8側的上視圖，在第2B圖表示導線架基板7之外部連接端子11側的上視圖。可將外部連接端子11配置成陣列狀，而可應付半導體元件的多接腳化。
第3A圖表示已將半導體元件14裝載於導線架基板7並已打線接合的剖面圖。
利用晶元連接材料13將半導體元件14貼黏於導線架基板7，再以金線15連接半導體元件14和半導體元件電極連接端子9。亦可因應於需要，而對半導體元件電極連接端子9適當地施加鍍鎳一金、鍍錫、鍍銀、鍍鎳-鈀-金等之任一種。
在進行打線接合時，將導線架基板7放置於熱塊上，並一面加熱一面進行接合，而預模製樹脂6以同一面位於半導體元件電極連接端子9的下部，因為未採用中空構造，所以可組立半導體封裝，而不會產生接合不良。
最後，利用澆注劑(potting)將導線架基板7的半導體元件側密封，再以鑽石刀等使外框部12分離，而作成小片(第3B圖)。澆注劑亦可例如傳送模製樹脂16。
若是BAG型式，將焊劑球裝載於外部連接端子11，而得到使用導線架基板7的半導體封裝。
[實施例]
以下，作為本發明之導線架基板的製造方法例，以LGA(Land Grid Array)型式的導線架基板為例，使用第1A圖~第1F圖來說明。
所製造之LGA的封裝尺寸是10mm正方，並於封裝下面具有168支接腳之陣列形的外部連接端子。
首先，第1A圖所示的金屬板1準備寬度為150mm、厚度為200μm之長條帶狀的銅合金製金屬板(古河電工製，EFTEC64T)。
接著，於此金屬板1的雙面，以輥塗布器將光阻劑(東京應化(股份公司)製，OFPR4000)塗布成厚度5μm後，以90℃進行前烘烤。
接著，經由具有所要之圖案的光罩從雙面進行圖案曝光，然後，以1%碳酸鈉水溶液進行顯像處理後，進行沖水及後烘烤，而得到第1B圖所示之第1光阻劑圖案2、第2光阻劑圖案3。
作為第1光阻劑圖案2，於第1面，形成用以形成半導體元件裝載部8、半導體元件電極連接端子9、配線10以及外框部12之光阻劑的圖案，又於第2面，形成用以形成外部連接端子11及外框部12之光阻劑的圖案。
又，作為用以形成突起5之第2光阻劑圖案3，將直徑30μm之光阻劑的圖案以間距0.5mm陣列狀地配置於非配線部。
然後，以保護片覆蓋並保護金屬板1的第1面側後(未圖示)，使用氯化亞鐵溶液自金屬板1的第2面進行第1次的蝕刻處理，使從金屬板1之第2面側的第1光阻劑圖案2所露出的金屬板部位的厚度薄至30μm(第1C圖)。將氯化亞鐵溶液的比重設為1.38、液溫設為50℃。
將第2面已蝕刻的金屬板1浸泡於30℃、50g/L的高硫酸銨水溶液5分鐘，使在第1次的蝕刻所形成之蝕刻面的表面變成粗糙(未圖示)。進而，浸泡於氫氧化鈉水溶液系剝離液，並剝離金屬板1之第2面的光阻劑(未圖示)。
接著，對在第1次的蝕刻所形成之金屬板1的第2面注入對應於預模製樹脂6之液狀的熱硬化樹脂(信越化學工業製SMC-376KF1)，以180℃進行正式硬化3小時，而形成預模製層。
熱硬化樹脂的埋入性良好，未觀察到空隙等的不良。於外部連接端子11及外框部12之未被蝕刻的面上，雖然幾乎未殘留熱硬化樹脂，但兼具洗淨其表面，在60℃之過錳酸鉀的鹼性水溶液(40g/L過錳酸鉀+20g/L氫氧化鈉)進行處理約3分鐘。
接著，在除去金屬板1之第1面側的保護片後，利用氯化亞鐵溶液自金屬板1的第1面側施加第2次的蝕刻處理，溶解並除去從第1光阻劑圖案2所露出的金屬板部位，而形成半導體元件裝載部8、半導體元件電極連接端子9、配線10以及外框部12(第1E圖)。
外部連接端子11從半導體元件電極連接端子9延伸。此外，雖未圖示，為了避免對下面側進行不必要的蝕刻，在第2次的蝕刻處理時預先將保護片等貼黏於第2面側較佳。
接著，剝離金屬板1之第1面的第1光阻劑圖案2，而得到所要之LGA型式的導線架基板7(第1F圖)。
然後，對在光阻劑剝離後所露出的金屬面，施加電鍍鎳-金。
鎳之厚度是5μm，金之厚度是0.1μm(未圖示)。
接著，使用晶元連接材料13將半導體元件14裝載於導線架基板7，藉由在150℃放置1小時，而使晶元連接材料13變硬。進而，使用直徑30μm的金線15，將半導體元件14的電極和半導體元件電極連接端子9進行打線連接(第3A圖)。打線接合的加熱溫度以200℃進行，測定半導體元件電極連接端子9側之金線15的拉力強度，有9g以上，得到良好的連接。
然後，如第3B圖所示，以傳送模將半導體元件14及包含有半導體元件電極連接端子9的區域密封，並裁成小片，而得到使用LGA型式之導線架基板7的半導體封裝。
 [工業上的可應用性]
藉由使用本發明之導線架基板的其製造方法，可得到降低製造時的不良或半導體封裝組立時的不良，並提高對熱應力之可靠性的導線架基板。本發明尤其適用於以導線架型式之半導體封裝無法應付的多接腳封裝基板。
1．．．金屬板
2．．．第1光阻劑圖案
3．．．第2光阻劑圖案(突起之形成用)
4．．．孔部
5．．．突起
6．．．預模製樹脂
7．．．導線架基板
8．．．半導體元件裝載部
9．．．半導體元件電極連接端子
10．．．配線
11．．．外部連接端子
12．．．外框部
13．．．晶元連接材料
14．．．半導體元件
15．．．金線
16．．．傳送模製樹脂
17．．．電沉積聚醯亞胺層
第1A圖係表示本發明之導線架基板的製造方法之一例的模式剖面圖。
第1B圖係表示本發明之導線架基板的製造方法之一例的模式剖面圖。
第1C圖係表示本發明之導線架基板的製造方法之一例的模式剖面圖。
第1D圖係表示本發明之導線架基板的製造方法之一例的模式剖面圖。
第1E圖係表示本發明之導線架基板的製造方法之一例的模式剖面圖。
第1F圖係表示本發明之導線架基板的製造方法之一例的模式剖面圖。
第2A圖係表示本發明之導線架基板的一例的模式上視圖。
第2B圖係表示本發明之導線架基板的一例的模式上視圖。
第3A圖係在本發明之導線架基板的一例表示己裝載半導體元件並已打線接合之傳送模密封狀態的模式剖面圖。
第3B圖係在本發明之導線架基板的一例表示己裝載半導體元件並已打線接合之傳送模密封狀態的模式剖面圖。
第4A圖係表示先前技術之導線架基板之代表例的模式剖面圖。
第4B圖係表示先前技術之導線架基板之代表例的模式剖面圖。
1．．．金屬板
2．．．第1光阻劑圖案
3．．．第2光阻劑圖案
4．．．孔部
5．．．突起
6．．．預模製樹脂
7．．．導線架基板
8．．．半導體元件裝載部
9．．．半導體元件電極連接端子
10．．．配線
11．．．外部連接端子
12．．．外框部

Claims (3)

  1. 一種導線架基板，其具備：具有第1面和第2面的金屬板；形成於該第1面之半導體元件裝載部及半導體元件電極連接端子；外部連接端子，係形成於該第2面，並電性連接於該半導體元件電極連接端子；連接該半導體元件電極連接端子和該外部連接端子的配線；形成於該金屬板的樹脂層；孔部，係局部地形成於該金屬板的第2面，並未貫穿該金屬板；以及複數個突起，係形成於該孔部的底面，並在離開該金屬板的方向形成凸狀的複數個突起，而該複數個突起的高度比該第2面的位置更低，該複數個突起和配線未導通，而且各個分散。
  2. 一種導線架基板的製造方法，其包含：形成第1光阻劑圖案，其用以於金屬板的第1面形成半導體元件裝載部、半導體元件電極連接端子，以及外框部，並於該金屬板的第2面分別形成外部連接端子及外框部；於該第2面之該外部連接端子和該外框部以外的區域形成第2光阻劑圖案，其用以形成未貫穿該金屬板的孔部，並形成突起，其係在該孔部的底面在離開該金屬板的方向形成凸狀且高度比該第2面的位置更低的突起，該突起和配線未導通，而且各個分散；藉由蝕刻該第2面所露出的金屬板露出部，而形成該孔部及屬該突起之未完成狀態的凸狀構造物；對該孔部塗布液狀預模製樹脂，加熱而使其變硬，而形成樹脂層；然後，藉由蝕刻該第1面，而形成該半導體元件裝載部、和該外部連接端子導通的該半導體元件電極連接端子以及該外框部，又使該凸狀的構造物完成為該突起。
  3. 一種半導體裝置，其具備：導線架基板，係具備：具有第1面和第2面的金屬板；形成於該第1面之半導體元件裝載部及半導體元件電極連接端子；外部連接端子，係形成於該第2面，並電性連接於該半導體元件電極連接端子；連接該半導體元件電極連接端子和該外部連接端子的配線；形成於該金屬板的樹脂層；孔部，係局部地形成於該金屬板的第2面，並未貫穿該金屬板；以及複數個突起，係形成於該孔部的底面，並在離開該金屬板的方向形成凸狀的複數個突起，而該複數個突起的高度比該第2面的位置更低，該複數個突起和配線未導通，而且各個分散；及被裝載於該導線架基板的半導體元件；該半導體裝置係該導線架基板和該半導體元件利用打線接合方式電性連接。
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