TWI452743B - 磁阻感測器的製造方法 - Google Patents

磁阻感測器的製造方法 Download PDF

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TWI452743B
TWI452743B TW100107197A TW100107197A TWI452743B TW I452743 B TWI452743 B TW I452743B TW 100107197 A TW100107197 A TW 100107197A TW 100107197 A TW100107197 A TW 100107197A TW I452743 B TWI452743 B TW I452743B
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manufacturing
forming
magnetoresistive sensor
magnetoresistive
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TW201238106A (en
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Fu Tai Liou
Chih Chien Liang
Chien Min Lee
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Voltafield Technology Corp
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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R33/00Arrangements or instruments for measuring magnetic variables
    • G01R33/02Measuring direction or magnitude of magnetic fields or magnetic flux
    • G01R33/06Measuring direction or magnitude of magnetic fields or magnetic flux using galvano-magnetic devices
    • G01R33/09Magnetoresistive devices
    • G01R33/093Magnetoresistive devices using multilayer structures, e.g. giant magnetoresistance sensors
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B82NANOTECHNOLOGY
    • B82YSPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y25/00Nanomagnetism, e.g. magnetoimpedance, anisotropic magnetoresistance, giant magnetoresistance or tunneling magnetoresistance
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R33/00Arrangements or instruments for measuring magnetic variables
    • G01R33/02Measuring direction or magnitude of magnetic fields or magnetic flux
    • G01R33/06Measuring direction or magnitude of magnetic fields or magnetic flux using galvano-magnetic devices
    • G01R33/09Magnetoresistive devices
    • G01R33/098Magnetoresistive devices comprising tunnel junctions, e.g. tunnel magnetoresistance sensors
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Description

磁阻感測器的製造方法
本發明是有關於一種磁阻感測器的製造方法,且特別是有關於一種可提高製程良率,同時降低製造成本的磁阻感測器製造方法。
由於消費電子產品如手機、電子羅盤的出現,再加上汽車及工業應用等產品,使磁阻式磁感測器的需求日益增加。
請參照第1A圖至第1C圖,第1A圖至第1C圖係根據習知技術所繪示的一系列製造磁阻感測器100的製程剖面示意圖。傳統製造磁阻感測器100的方法包括下述步驟,首先如第1A圖所繪示,先在基材101上進行半導體前段製程,以形成包含有銲墊106a結構的金屬內連接層(metal interconnection layer)106。之後,於金屬內連接層106上形成至少一個與金屬內連接層106電性連結的磁阻元件102。並在磁阻元件102和金屬內連接層106上形成一個護層103。
接著,在護層103中形成一銲墊開口104,將銲墊106a暴露出來(如第1B圖所繪示),以利後續佈線與封裝製程的進行。然後,在磁阻元件102上方的護層103上形成一圖案化磁性金屬層,藉以定義出一個磁性屏蔽與集中(shielding and concentrator)結構105(如第1C圖所繪示),用來屏蔽外部元件對磁阻元件102所產生的電磁干擾(ElectroMagnetic Interference;EMI),或加強外部磁場對磁阻元件102的作用。
然而,在磁性屏蔽與集中結構105的形成過程多會對銲墊106造成損傷,進而影響磁阻感測器100的製程良率。再者,為防止上述缺點,勢必使製造程序更加繁複,墊高製程成本。
因此,有需要提供一種磁阻感測器的製造方法,可提高磁阻感測器的製程良率,同時降低製造成本。
本發明的目的就是在提供一種可提高磁阻感測器的製程良率,同時降低製造成本的磁阻感測器製造方法。
一種磁阻感測器的製造方法,包含下述步驟:首先提供一基材。接著於基材上形成至少一個磁阻元件及至少一個銲墊與磁阻元件電性連結。然後,於磁阻元件及銲墊上形成護層。再於護層上形成一個磁性屏蔽與集中結構,對應磁阻元件。之後再於護層上形成開口,藉以將銲墊暴露出來。
在本發明之一實施例中,構成磁阻元件的材料係鐵磁材料(ferromagnet)、反鐵磁材料(antiferromagnet)、非鐵磁性金屬材料、穿隧氧化物材料(tunneling oxide)之一或其組合。
在本發明之一實施例中,磁阻元件可以為異向性磁阻(Anisotropic Magnetoresistance,AMR)元件、巨磁阻(Giant Magnetoresistance,GMR)元件、穿隧式磁阻(Tunneling Magnetoresistance,TMR)元件、龐磁阻(Colossal Magnetoresistance,CMR)元件或上述之任意組合。
在本發明之一實施例中,護層為經由低溫熱製程所形成的氧化矽(SiO2 )層與氮化矽(SiN)疊層。
在本發明之一實施例中,磁性屏蔽與集中結構的形成步驟包括:先於護層上形成一種晶層。接著,於種晶層上形成圖案化光阻層。再以圖案化光阻層為罩幕,於種晶層上形成一磁性金屬層。
在本發明之一實施例中,磁性金屬層的形成,包括將磁性材料電鍍於由圖案化光阻層所暴露的種晶層上,最後把光阻與種晶層剝除,以完成磁性屏蔽與集中結構的定義。
在本發明之一實施例中,開口的形成步驟包括:於護層及磁性屏蔽與集中結構上形成高分子罩幕層。在圖案化高分子罩幕層之後,根據圖案化的高分子罩幕層,移除銲墊上的護層,藉以將銲墊暴露於外。高分子罩幕層的材質可為聚醯亞胺(Polyimide;PI)。且在形成開口之後,可將高分子罩幕層加以保留或移除。
在本發明之一實施例中,磁性屏蔽與集中結構的材料為鐵磁材料(Ferromagnets),包含鎳(Ni)、鐵(iron)、鈷(cobalt)其中之一或上述材質的任意組合。
在本發明之一實施例中,基材為包含有矽(Si)、矽鍺(SiGe)、砷化鎵(GaAs)、碳化矽(SiC)或上述組合的半導體基板特殊應用積體電路(Application-specific integrated circuit;ASIC)板或印刷電路板(Printed circuit board;PCB)。
本發明之磁阻感測器的製造方法,有別於傳統製造程序,係先在護層上形成磁性屏蔽與集中結構,再進行銲墊開口步驟。於形成磁性屏蔽與集中結構時,並不需額外增加其他製程的步驟來防止銲墊受到傷害。加上,用來形成銲墊開口的高分子罩幕層,可加以保留,當作額外的保護層,而不需藉由光阻剝除步驟加以移除,更能節省製程步驟與成本,達到上述的發明目的。
本發明的目的就是在提供一種可提高磁阻感測器的製程良率,同時降低製造成本的磁阻感測器製造方法。
以下將以較佳實施例詳述本發明的製造與使用。值得注意的是本發明所提出的實施例,僅是發明概念說明,其仍可在其他不同的特殊實施例中得到體現。而以下所述的實施例只是描述製造與使用本發明的特定方式,並非用以限制本發明的範圍。實施例中所有圖式與說明,相似的元件符號將用以標示相似的元件。
請參照第2A圖至第2H圖,第2A圖至第2H圖係根據習知技術所繪示的一系列製造磁阻感測器200的製程剖面示意圖。
製造磁阻感測器200的方法包括下述步驟,首先提供基材201(如第2A圖所繪示)。在本發明的一些實施例之中,製造磁阻感測器200的方法,是在晶圓級製程(wafer scaled process)中進行。基材201包括矽(Si)、矽鍺(SiGe)、砷化鎵(GaAs)、碳化矽(SiC)或上述組合的半導體基板,或是具有前段邏輯電晶體元件的矽晶片,例如特殊應用積體電路(ASIC)板、印刷電路板(PCB)。在本實施例之中,基材201係一矽基板。
接著如第2B圖所繪示之前段製程,於基材201上形成至少一個金屬內連接層207,其包含有至少一個銲墊206,之後再於金屬內連接層207上形成至少一個磁阻元件202與金屬內連接層207電性連結。。
其中,金屬內連接層207的材質可為鎢、鋁或銅。每一個磁阻元件202包括至少一個磁阻層202a和至少一個硬罩幕層202b。一般來說,磁阻層202a包含異向性磁阻(AMR)元件、巨磁阻(GMR)元件以及穿隧式磁阻(TMR)元件、龐磁阻(CMR)元件或其組合中之一,而構成磁阻層202a的材料,可為鐵磁材料、反鐵磁材料、非鐵磁性金屬材料、穿隧氧化物材料之一或其組合,但本發明不以此為限。
接下來,在磁阻元件202及銲墊206上覆蓋一層護層203(如第2C圖所繪示),以保護磁阻元件202。在本實施例之中,護層203較佳為經由低溫熱製程所形成的氧化矽和氮化矽疊層。
再於護層203上形成一個金屬磁性屏蔽與集中結構205,以對應磁阻元件202。金屬磁性屏蔽與集中結構205的形成包括下述步驟:首先於護層203上形成一種晶層(seeding layer)208。接著,於種晶層208上形成圖案化光阻層209。如第2D圖所繪示,圖案化光阻層209具有光阻開口209a對準或錯開磁阻元件202,並將一部份的種晶層208暴露出來。之後,再以圖案化光阻層209為罩幕,進行電鍍製程,將磁性材料214電鍍於經由光阻開口209a暴露於外的種晶層208上。在剝除圖案化光阻層209與一部份的種晶層208之後,形成如第2E圖所繪示的磁性屏蔽與集中結構205。
在本發明的一些實施例之中,磁性屏蔽與集中結構205與磁阻元件202的中心對準;且磁性屏蔽與集中結構205的尺寸,實質大於磁阻元件202的尺寸,可用以屏蔽外部磁場對磁阻元件202所產生的影響。在本發明的另一些實施例之中,磁性集中結構205與磁阻元件錯開,可用來加強外部磁場對磁阻元件202的作用。在本實施例之中,構成金屬磁性屏蔽與集中結構205的材料為鐵磁材料,較佳可包含鎳(Ni)、鐵、鈷其中之一或上述材質的任意組合。
之後,再於護層203上形成銲墊開口204,藉以將銲墊206暴露出來。在本發明之一實施例中,銲墊開口204的形成,包括下述步驟:
先於護層203及磁性屏蔽與集中結構205上形成圖案化的高分子罩幕層210,藉由曝光顯影的步驟,在高分子罩幕層210上形成對準銲墊206的高分子罩幕開口211(如第2F圖所繪示)。在本發明的較佳實施例中,高分子罩幕層210的材質可為聚醯亞胺。
在圖案化高分子罩幕層210之後,以圖案化的高分子罩幕層210為罩幕,移除位於銲墊上方的一部份護層203,藉以在護層203上形成銲墊開口204,使銲墊206經由銲墊開口204和高分子罩幕開口211暴露於外(如第2G圖所繪示),完成磁阻感測器200的製備。
值得注意的是,形成銲墊開口204之後,可採用光阻剝除製程,將高分子罩幕層210移除。但在本發明的另一些實施例之中,可將高分子罩幕層210加以保留,作為磁性屏蔽與集中結構205的額外保護層。
根據上述實施例,有別於傳統製造程序,本發明之磁阻感測器的製造方法,係先在保護磁阻元件的護層上形成磁性屏蔽與集中結構,再進行銲墊的開口步驟。由於磁性屏蔽與集中結構定義於護層開口前,可防止製程過程中對銲墊的傷害。另外,磁性屏蔽與集中結構而言,該製程可採用不同材料及厚度,也較不會對銲墊產生傷害,不須額外開發新製程。
因此進行磁性屏蔽與集中結構的圖案化製程時,不需額外增加其他的製程步驟來防止金屬沉積製程(例如電鍍)及圖案化製程(例如蝕刻製程)對銲墊所造成的傷害。加上,用來形成銲墊開口的高分子罩幕層可加以保留,用來作為磁性屏蔽與集中結構的保護層,不需再藉由另一個光阻剝除步驟加以移除,更能節省製程步驟與成本,達到上述的發明目的。
雖然本發明已以較佳實施例揭露如上,然其並非用以限定本發明,任何熟習此技藝者,在不脫離本發明之精神和範圍內,當可作些許之更動與潤飾,因此本發明之保護範圍當視後附之申請專利範圍所界定者為準。
100...磁阻感測器
101...基材
102...磁阻元件
103...護層
104...銲墊開口
105...磁性屏蔽與集中結構
106...金屬內連接
106a...銲墊
200...磁阻感測器
201...基材
202...磁阻元件
202a...磁阻層
202b...硬罩幕層
203...護層
204...銲墊開口
205...磁性屏蔽與集中結構
206...銲墊
207...金屬內連接層
208...種晶層
209...光阻層
209a...光阻開口
210...高分子罩幕層
211...高分子罩幕開口
第1A圖至第1C圖係根據習知技術所繪示的一系列製造磁阻感測器的製程剖面示意圖。
第2A圖至第2G圖係根據習知技術所繪示的一系列製造磁阻感測器的製程剖面示意圖。
200...磁阻感測器
201...基材
202...磁阻元件
202a...磁阻層
202b...硬罩幕層
203...護層
204...銲墊開口
205...磁性屏蔽與集中結構
206...銲墊
207...金屬內連接層
208...種晶層
210...高分子罩幕層
211...高分子罩幕層開口

Claims (10)

  1. 一種磁阻感測器的製造方法,包含:提供一基材;於該基材上形成至少一磁阻元件以及至少一銲墊,其中該銲墊與該磁阻元件電性連結;於該磁阻元件及該銲墊上形成一護層;於該護層上形成一磁性屏蔽與集中結構,其中該磁性屏蔽與集中結構更包含配置於該磁阻元件上方;以及於該護層上形成一開口,藉以將該銲墊暴露出來。
  2. 如申請專利範圍第1項所述之磁阻感測器的製造方法,其中該磁阻元件可以是一異向性磁阻(Anisotropic Magnetoresistance,AMR)元件、一巨磁阻(Giant Magnetoresistance,GMR)元件、一穿隧式磁阻(Tunneling Magnetoresistance,TMR)元件、一龐磁阻(Colossal Magnetoresistance,CMR)元件或上述之任意組合。
  3. 如申請專利範圍第1項所述之磁阻感測器的製造方法,其中構成磁阻元件的材料係鐵磁材料(ferromagnetic)、反鐵磁材料(antiferromagnetic)、非鐵磁性金屬材料、穿隧氧化物材料(tunneling oxide)其中之一者或上述之任意組合。
  4. 如申請專利範圍第1項所述之磁阻感測器的製造方法,其中該護層為經由低溫熱製程所形成的氧化矽(SiO2)和氮化矽(SiN)疊層。
  5. 如申請專利範圍第1項所述之磁阻感測器的製造方法,其中該磁性屏蔽與集中結構的形成步驟包括:於該護層上形成一種晶層;於該種晶層上形成一圖案化光阻層;以及以該圖案化光阻層為罩幕,於該種晶層上形成一磁性金屬層。
  6. 如申請專利範圍第1項所述之磁阻感測器的製造方法,其中該開口的形成步驟包括:於該護層及該磁性屏蔽與集中結構上形成一高分子罩幕層;圖案化該高分子罩幕層;根據該圖案化高分子罩幕層,移除銲墊上之護層,藉以將該銲墊暴露於外。
  7. 如申請專利範圍第6項所述之磁阻感測器的製造方法,其中該高分子罩幕層的材質為聚醯亞胺(Polyimide;PI)。
  8. 如申請專利範圍第6項所述之磁阻感測器的製造方法,其中在形成該開口之後,包括將該高分子罩幕層加以保留或移除。
  9. 如申請專利範圍第1項所述之磁阻感測器的製造方法,其中構成該磁性屏蔽與集中結構的材料為鐵磁材料(Ferromagnets),包含鎳(Ni)、鐵(iron)、鈷(cobalt)其中之一或上述材質的任意組合。
  10. 如申請專利範圍第1項所述之磁阻感測器的製造方法, 其中該基材為包含有矽(Si)、矽鍺(SiGe)、砷化鎵(GaAs)、碳化矽(SiC)或上述組合的一半導體基板、一特殊應用積體電路(Application-specific integrated circuit;ASIC)板或一印刷電路板(Printed circuit board;PCB)。
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